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Sun, 10 May 2026 11:54:35 -0700 From: Mark Bloch To: Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , "David S. Miller" , Jiri Pirko CC: Jonathan Corbet , Shuah Khan , Simon Horman , Saeed Mahameed , "Leon Romanovsky" , Tariq Toukan , Mark Bloch , Andrew Morton , "Borislav Petkov (AMD)" , Randy Dunlap , "Petr Mladek" , "Peter Zijlstra (Intel)" , Christian Brauner , Thomas Gleixner , Dapeng Mi , Kees Cook , "Marco Elver" , Li RongQing , Eric Biggers , "Paul E. McKenney" , , , , Subject: [RFC V2 net-next 1/2] devlink: Add eswitch mode boot defaults Date: Sun, 10 May 2026 21:54:23 +0300 Message-ID: <20260510185424.2041415-2-mbloch@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260510185424.2041415-1-mbloch@nvidia.com> References: <20260510185424.2041415-1-mbloch@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBA:EE_|IA0PPF0C93AC97B:EE_ X-MS-Office365-Filtering-Correlation-Id: e4e809a1-5d23-470d-e8b7-08deaec59f2f X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|7416014|1800799024|82310400026|56012099003|3023799003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: IcnjadyzRYcVXtfsiT6yP4UMrOGvyLJz/h9s/5YSAohEMQFuspG7ACyPsE1Jd0bXiS1HQVwPSB0T3b7lzYz97MgHBWNftMwvdXjz/Kyyak/+1coUL4uCYcMGhRn11eJXpQM7cen21cQKwRuGRgMb+EcVV50kPz/Dx2O+1wZVbJjeTh+uRKfg8bYfkz+uwJbKEAY49d/fTZmmvgGm/XmQ/OdV8iila75eD2a0+CQNHdzVL07ZtJ3hgWRy8tWvgxTMF0fSGIJ+kzrTWIw/tQWAz+/22+IutXX0BoW9HhcxCIzd+bO3J3Y5lTGjN/icHNxb7UTRXq++ag/jWslbdlHx9EnmHiyq8u0Zf45V9cwjxyK0htUfJZgHXB1xl+6bLdkD0OHl3Uhw/kOHGqgUj2b7ym2j+OkdXL7QenifYCXUpg2c9zFitSETL/N12fIcxq41uChcOSNJHMJ0COH2oN0ecGrDsZgTyiuQ+EsXrwrWqMrw6kPUxTzD8Uv6ctPPhFgviLFqJwl04h7tEIY9x0rIY6JgHJmRNqt/+mmzcxJ3FQIKtAmQe8/0GISq+GuRHl88pOK8Ga6LYii4eEN5UcQpALhx/GR64cOEIKi7kf+T39kWtrFiekEfx9wPDwhQa6Ay5Gx897uMjMkfbeedljh8FTAHtin08DQAYR3w7BXfngI3ise3uXGPMSqzN+x8udFrVY4p4oO+WBmJZQjUC56GYFdhrjcErjuJbQOkJD/Qa0k= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(376014)(7416014)(1800799024)(82310400026)(56012099003)(3023799003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 7TXsxcCUsXndJVLzoUdgoO82rSFezn1BqwoyOlvzoggAdlKcIWBVaCDYVk2B6YPEw1H3tOh4t91pCY56eDX8GgHSjB/7xRE5MUuwCbulDZLNRusBKvfAsdOkocV2lxPE0Lew27yT9SwtX6nvfhfKYtfxWivrVIR2O62SMvSvZoIEKttQIOi2OC3HQHoAsiATVEhJKUrqc/md1PrNtw09W3845BuTXPLigCLpckL9THTvut21CQvgifNqeszu5dl8joPrqjCU1JpNCHsQAzQSpyVuBp6bqnngC2DA7BmlGKnchBl4CJKfHNE5fiNyw4raiYS76YgmhErVXso6DINS7sM6p738/eh/6QILUURDDxiwQl61Rm2TdqAcaepnyG9xNCZ3HnqhnPjgzJgDvZ/bb7/XXhrcXhqlYyTnmnY6cgycft+jOSuVXG7htSTRJ++d X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 May 2026 18:54:53.3909 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e4e809a1-5d23-470d-e8b7-08deaec59f2f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBA.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PPF0C93AC97B Content-Type: text/plain; charset="utf-8" Add devlink=3D kernel command line support for configuring devlink eswitch mode during device initialization. The supported syntax selects either all devlink handles or one explicit comma-separated handle list: devlink=3D[*]:esw:mode: devlink=3D[[,...]]:esw:mode: where is one of legacy, switchdev or switchdev_inactive. All selected handles receive the same mode. Comma-separated default groups are not supported. The default is applied through the existing eswitch_mode_set() devlink operation, matching the userspace devlink eswitch set command. Document the devlink=3D syntax and duplicate handle handling. Signed-off-by: Mark Bloch --- .../admin-guide/kernel-parameters.txt | 24 ++ .../networking/devlink/devlink-defaults.rst | 93 ++++++ Documentation/networking/devlink/index.rst | 1 + include/net/devlink.h | 1 + net/devlink/core.c | 269 ++++++++++++++++++ 5 files changed, 388 insertions(+) create mode 100644 Documentation/networking/devlink/devlink-defaults.rst diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index 7834ee927310..46435bdfe039 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1278,6 +1278,30 @@ Kernel parameters dell_smm_hwmon.fan_max=3D [HW] Maximum configurable fan speed. =20 + devlink=3D [NET] + Format: + []:esw:mode: + + : + * | [,...] + + : + / + + Configure default devlink settings for matching + devlink instances during device initialization. + + Currently supported settings: + esw:mode:{ legacy | switchdev | switchdev_inactive } + + Examples: + devlink=3D[*]:esw:mode:switchdev + devlink=3D[pci/0000:08:00.0]:esw:mode:switchdev + devlink=3D[pci/0000:08:00.0,pci/0000:09:00.1]:esw:mode:legacy + + See Documentation/networking/devlink/devlink-defaults.rst + for the full syntax. + dfltcc=3D [HW,S390] Format: { on | off | def_only | inf_only | always } on: s390 zlib hardware support for compression on diff --git a/Documentation/networking/devlink/devlink-defaults.rst b/Docume= ntation/networking/devlink/devlink-defaults.rst new file mode 100644 index 000000000000..4db3025c540f --- /dev/null +++ b/Documentation/networking/devlink/devlink-defaults.rst @@ -0,0 +1,93 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +Devlink Defaults +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Devlink defaults allow selected devlink settings to be provided on the +kernel command line and applied to matching devlink instances during device +initialization. + +The devlink device is selected by its devlink handle. For PCI devices this= is +the same handle shown by ``devlink dev show``, for example +``pci/0000:08:00.0``. + +Kernel command line syntax +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D + +Defaults are specified with the ``devlink=3D`` kernel command line paramet= er. + +The general syntax is:: + + devlink=3D[]:esw:mode: + +```` is either ``*`` or one or more devlink handles:: + + * | /[,/...] + +``*`` applies the default to every devlink instance. All handles in the sa= me +``[]`` list receive the same eswitch mode setting. + +```` is one of ``legacy``, ``switchdev`` or ``switchdev_inactive``. + +Syntax rules +------------ + +The following syntax rules apply: + +* Specify the default in one ``devlink=3D`` parameter. Repeated ``devlink= =3D`` + parameters are not accumulated. +* The ``devlink=3D`` value is limited by the kernel command line size. +* Whitespace is not allowed within the parameter value. +* ```` must be either ``*`` or a handle list. ``*`` cannot be + combined with explicit handles. +* ```` and ```` must not be empty. +* ```` must not contain ``:``. +* ```` may contain ``:``. This allows PCI names such as + ``0000:08:00.0``. +* Handles must not contain whitespace, ``[``, ``]``, ``*`` or more than one + ``/``. +* A comma inside ``[]`` separates handles. +* Comma-separated default groups are not supported. +* Duplicate handles are rejected and the devlink default is ignored. + +Supported defaults +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +The supported command is ``esw``: + +.. list-table:: + :widths: 10 25 35 + :header-rows: 1 + + * - Command + - Options + - Values + * - ``esw`` + - ``mode:`` + - ``legacy``, ``switchdev``, ``switchdev_inactive`` + +The ``esw:mode`` default corresponds to the userspace command:: + + devlink dev eswitch set mode + + +Examples +=3D=3D=3D=3D=3D=3D=3D=3D + +Set all devlink instances to switchdev mode:: + + devlink=3D[*]:esw:mode:switchdev + +Set one PCI devlink instance to switchdev mode:: + + devlink=3D[pci/0000:08:00.0]:esw:mode:switchdev + +Set two PCI devlink instances to legacy mode:: + + devlink=3D[pci/0000:08:00.0,pci/0000:09:00.1]:esw:mode:legacy + +The following is invalid because comma-separated default groups are not +supported:: + + devlink=3D[pci/0000:08:00.0]:esw:mode:switchdev,[pci/0000:09:00.0]:esw:m= ode:switchdev_inactive diff --git a/Documentation/networking/devlink/index.rst b/Documentation/net= working/devlink/index.rst index f7ba7dcf477d..0d27a7008b14 100644 --- a/Documentation/networking/devlink/index.rst +++ b/Documentation/networking/devlink/index.rst @@ -56,6 +56,7 @@ general. :maxdepth: 1 =20 devlink-dpipe + devlink-defaults devlink-eswitch-attr devlink-flash devlink-health diff --git a/include/net/devlink.h b/include/net/devlink.h index bcd31de1f890..058654d6800f 100644 --- a/include/net/devlink.h +++ b/include/net/devlink.h @@ -1622,6 +1622,7 @@ int devl_trylock(struct devlink *devlink); void devl_unlock(struct devlink *devlink); void devl_assert_locked(struct devlink *devlink); bool devl_lock_is_held(struct devlink *devlink); +int devl_apply_defaults(struct devlink *devlink); DEFINE_GUARD(devl, struct devlink *, devl_lock(_T), devl_unlock(_T)); =20 struct ib_device; diff --git a/net/devlink/core.c b/net/devlink/core.c index eeb6a71f5f56..2cfd50f9393b 100644 --- a/net/devlink/core.c +++ b/net/devlink/core.c @@ -4,6 +4,10 @@ * Copyright (c) 2016 Jiri Pirko */ =20 +#include +#include +#include +#include #include #define CREATE_TRACE_POINTS #include @@ -16,6 +20,247 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(devlink_trap_report); =20 DEFINE_XARRAY_FLAGS(devlinks, XA_FLAGS_ALLOC); =20 +static char *devlink_default; +static bool devlink_default_match_all; +static enum devlink_eswitch_mode devlink_default_eswitch_mode; +static LIST_HEAD(devlink_default_nodes); + +struct devlink_default_node { + struct list_head list; + char *bus_name; + char *dev_name; +}; + +static int __init +devlink_default_esw_mode_to_value(const char *str, + enum devlink_eswitch_mode *mode) +{ + if (!strcmp(str, "legacy")) { + *mode =3D DEVLINK_ESWITCH_MODE_LEGACY; + return 0; + } + if (!strcmp(str, "switchdev")) { + *mode =3D DEVLINK_ESWITCH_MODE_SWITCHDEV; + return 0; + } + if (!strcmp(str, "switchdev_inactive")) { + *mode =3D DEVLINK_ESWITCH_MODE_SWITCHDEV_INACTIVE; + return 0; + } + + return -EINVAL; +} + +static int __init +devlink_default_cmd_parse(char *str) +{ + char *cmd; + char *attr; + char *mode; + + cmd =3D strsep(&str, ":"); + attr =3D strsep(&str, ":"); + mode =3D strsep(&str, ":"); + if (!cmd || strcmp(cmd, "esw") || !attr || strcmp(attr, "mode") || + !mode || !*mode || str) + return -EINVAL; + + return devlink_default_esw_mode_to_value(mode, + &devlink_default_eswitch_mode); +} + +static int devlink_default_eswitch_apply(struct devlink *devlink) +{ + const struct devlink_ops *ops =3D devlink->ops; + + if (!ops->eswitch_mode_set) + return -EOPNOTSUPP; + + return ops->eswitch_mode_set(devlink, devlink_default_eswitch_mode, + NULL); +} + +static int __init +devlink_default_handle_parse(char *handle, char **bus_name, char **dev_nam= e) +{ + char *slash; + char *p; + + if (!handle || !*handle) + return -EINVAL; + + for (p =3D handle; *p; p++) { + if (*p =3D=3D '[' || *p =3D=3D ']' || *p =3D=3D '*') + return -EINVAL; + } + + slash =3D strchr(handle, '/'); + if (!slash || slash =3D=3D handle || !slash[1]) + return -EINVAL; + if (strchr(slash + 1, '/')) + return -EINVAL; + + *slash =3D '\0'; + if (strchr(handle, ':')) + return -EINVAL; + + *bus_name =3D handle; + *dev_name =3D slash + 1; + return 0; +} + +static struct devlink_default_node * +devlink_default_node_find(const char *bus_name, const char *dev_name) +{ + struct devlink_default_node *node; + + list_for_each_entry(node, &devlink_default_nodes, list) { + if (!strcmp(node->bus_name, bus_name) && + !strcmp(node->dev_name, dev_name)) + return node; + } + + return NULL; +} + +static int __init +devlink_default_node_add(const char *bus_name, const char *dev_name) +{ + struct devlink_default_node *node; + + if (devlink_default_node_find(bus_name, dev_name)) + return -EEXIST; + + node =3D kzalloc_obj(*node); + if (!node) + return -ENOMEM; + + INIT_LIST_HEAD(&node->list); + node->bus_name =3D kstrdup(bus_name, GFP_KERNEL); + node->dev_name =3D kstrdup(dev_name, GFP_KERNEL); + if (!node->bus_name || !node->dev_name) { + kfree(node->bus_name); + kfree(node->dev_name); + kfree(node); + return -ENOMEM; + } + + list_add_tail(&node->list, &devlink_default_nodes); + return 0; +} + +static int __init devlink_default_handles_parse(char *handles) +{ + char *handle; + int err; + + if (!strcmp(handles, "*")) { + devlink_default_match_all =3D true; + return 0; + } + + while ((handle =3D strsep(&handles, ",")) !=3D NULL) { + char *bus_name; + char *dev_name; + + err =3D devlink_default_handle_parse(handle, &bus_name, + &dev_name); + if (err) + return err; + + err =3D devlink_default_node_add(bus_name, dev_name); + if (err) + return err; + } + + return 0; +} + +static void __init devlink_default_node_free(struct devlink_default_node *= node) +{ + kfree(node->bus_name); + kfree(node->dev_name); + kfree(node); +} + +static void __init devlink_default_nodes_clear(void) +{ + struct devlink_default_node *node; + struct devlink_default_node *node_tmp; + + list_for_each_entry_safe(node, node_tmp, &devlink_default_nodes, list) { + list_del(&node->list); + devlink_default_node_free(node); + } + + devlink_default_match_all =3D false; +} + +static int __init devlink_default_parse(char *str) +{ + char *handles_end; + char *handles; + char *cmd; + int err; + + if (!str || *str !=3D '[') + return -EINVAL; + + handles =3D str + 1; + handles_end =3D strchr(handles, ']'); + if (!handles_end || handles_end[1] !=3D ':' || !handles_end[2]) + return -EINVAL; + + *handles_end =3D '\0'; + cmd =3D handles_end + 2; + if (!*handles) + return -EINVAL; + + err =3D devlink_default_cmd_parse(cmd); + if (err) + return err; + + err =3D devlink_default_handles_parse(handles); + if (err) + devlink_default_nodes_clear(); + + return err; +} + +/** + * devl_apply_defaults - Apply defaults matching the devlink instance + * @devlink: devlink + * + * The caller must hold the devlink instance lock. + * + * Return: 0 on success, negative error code otherwise. + */ +int devl_apply_defaults(struct devlink *devlink) +{ + const char *bus_name =3D devlink_bus_name(devlink); + const char *dev_name =3D devlink_dev_name(devlink); + struct devlink_default_node *node; + + devl_assert_locked(devlink); + + if (devlink_default_match_all) + return devlink_default_eswitch_apply(devlink); + + node =3D devlink_default_node_find(bus_name, dev_name); + if (node) + return devlink_default_eswitch_apply(devlink); + + return 0; +} +EXPORT_SYMBOL_GPL(devl_apply_defaults); + +static int __init devlink_default_setup(char *str) +{ + devlink_default =3D str; + return 1; +} +__setup("devlink=3D", devlink_default_setup); + static struct devlink *devlinks_xa_get(unsigned long index) { struct devlink *devlink; @@ -578,6 +823,27 @@ static int __init devlink_init(void) { int err; =20 + if (devlink_default) { + char *def; + + def =3D kstrdup(devlink_default, GFP_KERNEL); + if (!def) { + err =3D -ENOMEM; + goto out; + } + err =3D devlink_default_parse(def); + kfree(def); + if (err =3D=3D -EEXIST) { + devlink_default =3D NULL; + pr_warn("devlink: duplicate handles ignored\n"); + } else if (err =3D=3D -EINVAL) { + devlink_default =3D NULL; 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Miller" , Jiri Pirko CC: Jonathan Corbet , Shuah Khan , Simon Horman , Saeed Mahameed , "Leon Romanovsky" , Tariq Toukan , Mark Bloch , Andrew Morton , "Borislav Petkov (AMD)" , Randy Dunlap , "Petr Mladek" , "Peter Zijlstra (Intel)" , Christian Brauner , Thomas Gleixner , Dapeng Mi , Kees Cook , "Marco Elver" , Li RongQing , Eric Biggers , "Paul E. McKenney" , , , , Subject: [RFC V2 net-next 2/2] net/mlx5: Apply devlink boot defaults during init Date: Sun, 10 May 2026 21:54:24 +0300 Message-ID: <20260510185424.2041415-3-mbloch@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260510185424.2041415-1-mbloch@nvidia.com> References: <20260510185424.2041415-1-mbloch@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FC0:EE_|CH3PR12MB8186:EE_ X-MS-Office365-Filtering-Correlation-Id: d243ee91-aca7-4046-cfb5-08deaec5a6d3 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|36860700016|1800799024|82310400026|18002099003|22082099003|56012099003; X-Microsoft-Antispam-Message-Info: PQLc/7v28yEOTJSNhmqMnLFW2odbYTBkgAyGuakDoOUXFwekx/UQZ28NfgHMzhxixUDQsDwGZmmrV238oThDI1HwwaDth9UUVpj+VgruHtaCi9M+GZu4kBlI+CiE6Br6HHmjq/rRSR6PBgPK9ivJGGLPdY0+jKuB78DcLhuUBa+R6xE4mppz0iZYr1yC5+47g/axnFQg04EXN+xIPjB/5toMeWJW+ojUxjpzB04pGJkJ7wCYMEK1ncc7nR+ebSe8kRn8FPho//5hYjZ7G/q6AhR9pGE6PbNIPdnmfY0XiAib0NfARd16eWnwCuY/neCdiC320Os9R2EPJYDJfSYumB93esHLWAWVcE1FRLx5MrY3PvVkfd18S4+P2wKPcPu9Fwi1sYd8/kD4106mtSmN9m4rANfJ+u9sVNbOvfjmXLobrkd8E2dsPYANZa0QVClK1jrjwPcpmEnScUiBLPYrZ/IoyTYvhubBjRLg9/eIkWta5wpSTVt45qUzRK0iSnts0Exu+HuD6j4JgbhHBhf7FdU2Ms3+3jSna/GFKo1tlh6HNDj1HemrO7btXEEVBqI2yGQcNAGAXe05pJVt/9t0a8eVMUmoxQlIwbs6nzj1iKwOvJjqzIrL6Hg6ahxcSVcQDXSI7kDHX4e4VhOoXLXyvTtQvStSyDvAmlL5MsTAf3yAM/Wp05ERY9GVL8e6Qj717lopT1aBhzwL119XNUBkoDTZpDhWg8Q81ANsxxUw7v0= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(376014)(36860700016)(1800799024)(82310400026)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: F9R9HWEm69IXvPeah1Zn/DzqcPpZ5RvssNNRP4B508nAWXyEy/orgl/CCSDcQAk+bVH07GzzcbEYlzDwzw+HpkHgrBpOk80bZJKNeVOV8kYB13uAeKhJeNgMTuHswYssanCva3DR22hCfQ0Ct8MPC+9oF2jpd0QDMvyhEq+OCZE92NSZG9RvkKuG6OWqFW2I+kOQ1bbVyuWm9NiiMuScoVUdigxt8rvCDHYFN11dZrmPKHnqipNOxVA9caoiaR7Yt9uQi+RzacmpUnZBT8wgmySwBF4NSX9HiYO276t4B1VNxJj0A20F04Uumn8I3Tejk5grvahFCENl7vWUaIhw32MMU+LuOxdus8CgQaqdK4VFwasS/Ybl4zwVdZYxI/rNZmmf21yj17biK4P9ft/lccs3bBrgrEfo0octbfRBnt0EN9HJTE8t+RuXJIhNjF8P X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 May 2026 18:55:06.1904 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d243ee91-aca7-4046-cfb5-08deaec5a6d3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FC0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8186 Content-Type: text/plain; charset="utf-8" Apply devlink boot defaults for mlx5 devices after successful device initialization while holding the devlink instance lock. At this point the devlink instance is registered and the mlx5 devlink operations are available, so eswitch mode defaults can be applied to the matching PCI devlink handle. Signed-off-by: Mark Bloch --- drivers/net/ethernet/mellanox/mlx5/core/main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/e= thernet/mellanox/mlx5/core/main.c index 296c5223cf61..deea7150084f 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c @@ -1470,6 +1470,8 @@ int mlx5_init_one(struct mlx5_core_dev *dev) err =3D mlx5_init_one_devl_locked(dev); if (err) devl_unregister(devlink); + else + devl_apply_defaults(devlink); unlock: devl_unlock(devlink); return err; --=20 2.34.1