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charset="utf-8" When IOMMU_DMA is enabled, devices get paging domains and MSI writes to IMSIC interrupt files must be handled correctly in the s-stage. As the device always writes to the host physical IMSIC addresses, which the IMSIC irqchip programs directly, install s-stage identity mappings for the host IMSICs. But, use IOMMU_RESV_DIRECT_RELAXABLE since the 1:1 mappings aren't required for device assignment. Loop over the cpus rather than imsic groups to handle asymmetric configurations. Signed-off-by: Andrew Jones --- drivers/iommu/riscv/iommu.c | 34 +++++++++++++++++++++++++++++ include/linux/irqchip/riscv-imsic.h | 7 ++++++ 2 files changed, 41 insertions(+) diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index a31f50bbad35..3c6aa9d69f95 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -1286,6 +1287,38 @@ static struct iommu_domain *riscv_iommu_alloc_paging= _domain(struct device *dev) return &domain->domain; } =20 +static void riscv_iommu_get_resv_regions(struct device *dev, struct list_h= ead *head) +{ + const struct imsic_global_config *imsic_global; + unsigned int cpu; + + if (!imsic_enabled()) + return; + + imsic_global =3D imsic_get_global_config(); + + for_each_possible_cpu(cpu) { + const struct imsic_local_config *local; + struct iommu_resv_region *reg; + + local =3D per_cpu_ptr(imsic_global->local, cpu); + if (!local->msi_va) + continue; + + /* + * The device always writes to the host physical IMSIC address, so insta= ll + * identity mappings directly. Use IOMMU_RESV_DIRECT_RELAXABLE instead of + * IOMMU_RESV_DIRECT since these 1:1 mappings are not required for assig= ned + * devices. + */ + reg =3D iommu_alloc_resv_region(local->msi_pa, IMSIC_MMIO_PAGE_SZ, + IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO, + IOMMU_RESV_DIRECT_RELAXABLE, GFP_KERNEL); + if (reg) + list_add_tail(®->list, head); + } +} + static int riscv_iommu_attach_blocking_domain(struct iommu_domain *iommu_d= omain, struct device *dev, struct iommu_domain *old) @@ -1401,6 +1434,7 @@ static const struct iommu_ops riscv_iommu_ops =3D { .blocked_domain =3D &riscv_iommu_blocking_domain, .release_domain =3D &riscv_iommu_blocking_domain, .domain_alloc_paging =3D riscv_iommu_alloc_paging_domain, + .get_resv_regions =3D riscv_iommu_get_resv_regions, .device_group =3D riscv_iommu_device_group, .probe_device =3D riscv_iommu_probe_device, .release_device =3D riscv_iommu_release_device, diff --git a/include/linux/irqchip/riscv-imsic.h b/include/linux/irqchip/ri= scv-imsic.h index 4b348836de7a..ba3000f047b0 100644 --- a/include/linux/irqchip/riscv-imsic.h +++ b/include/linux/irqchip/riscv-imsic.h @@ -88,6 +88,13 @@ static inline const struct imsic_global_config *imsic_ge= t_global_config(void) =20 #endif =20 +static inline bool imsic_enabled(void) +{ + const struct imsic_global_config *imsic_global =3D imsic_get_global_confi= g(); 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charset="utf-8" From: Tomasz Jeznach With iommu/riscv driver available we can enable IOMMU_DMA support for RISC-V architecture. Signed-off-by: Tomasz Jeznach Signed-off-by: Andrew Jones Reviewed-by: Nutty Liu --- drivers/iommu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index f86262b11416..34d8a792339f 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -151,7 +151,7 @@ config OF_IOMMU =20 # IOMMU-agnostic DMA-mapping layer config IOMMU_DMA - def_bool ARM64 || X86 || S390 + def_bool ARM64 || X86 || S390 || RISCV select DMA_OPS_HELPERS select IOMMU_API select IOMMU_IOVA --=20 2.43.0