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Fri, 08 May 2026 03:07:13 -0700 (PDT) Received: from hu-priyjain-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83967dbf7d2sm15876379b3a.49.2026.05.08.03.07.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 03:07:12 -0700 (PDT) From: Priyansh Jain To: Amit Kucheria , Thara Gopinath , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba Cc: linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, manaf.pallikunhi@oss.qualcomm.com, Priyansh Jain Subject: [PATCH v2 1/2] thermal: qcom: tsens: atomic temperature read with hardware-guided retries Date: Fri, 8 May 2026 15:36:59 +0530 Message-ID: <20260508100700.772985-2-priyansh.jain@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260508100700.772985-1-priyansh.jain@oss.qualcomm.com> References: <20260508100700.772985-1-priyansh.jain@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=bMAm5v+Z c=1 sm=1 tr=0 ts=69fdb5d2 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=BLZHAyhsm81VJvnBO_kA:9 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-GUID: YLuclRCyrAuxO4pyxkJ0qoX1LJNo9KP8 X-Proofpoint-ORIG-GUID: YLuclRCyrAuxO4pyxkJ0qoX1LJNo9KP8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA4MDEwNCBTYWx0ZWRfX9R1jg+KfFT4W AJUdgkgiuZX+ykz1XcMG/Lqdn2BDZXritQ7U66XJRf16acwutsVgvvChfbN89Tfxo1rU6EAAAow 7fv6rYBMHytnjHfeU08usjctT0BF9sc/owghP8S7NFkz/7IEfPR13xLSlikmrdB/D3KPf+mQXi/ atOPtxKLyvzoAE3ukfj+N3mO3CDIH/2pmwMfjqMIQKkSJb6dusTJ0F5e+ebmC+DgIpttMkfokSk jm66pEViKZALlMlcINf2jpSmvHD4ZyeDIc3CqK4jsWBxn5MDfH7+O98QkMFYZuRT2CdKEYl4CVk 2CPtxMgnRuXO6+4LFRNehM+TbS4onTPhahm0kvvPTlOLRDjb+/6IvAlV+hp4G/PNNPkCEhFPJuS t8ao8A5LRSMxr+g73246VWk9PNP078093+ijSNwlZdM7uLCl5ldKn/cMdoZ6YuC8NybgPlEzqAL 6eIC31RYGkrrQvAdv4Q== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-07_02,2026-05-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 spamscore=0 bulkscore=0 priorityscore=1501 lowpriorityscore=0 malwarescore=0 adultscore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605080104 Content-Type: text/plain; charset="utf-8" The existing TSENS temperature read logic polls the valid bit and then reads the temperature register. When temperature reads are triggered at very short intervals, this can race with hardware updates and allow the temperature field to be read while it is still being updated. In this case, the valid bit may already be asserted even though the temperature value is transitioning, resulting in an incorrect reading. Hardware programming guidelines require the temperature value and the valid bit to be sampled atomically in the same read transaction. A reading is considered valid only if the valid bit is observed set in that same sample. The guidelines further specify that software should attempt the temperature read up to three times to account for transient update windows. If none of the attempts observe a valid sample, a stable fallback value must be returned: if the first and second samples match, the second value is returned; otherwise, if the second and third samples match, the third value is returned. Update the TSENS sensor read logic to implement atomic sampling along with the recommended retry-and-compare fallback behavior. This removes the race window and ensures deterministic temperature values in accordance with hardware requirements. Signed-off-by: Priyansh Jain --- drivers/thermal/qcom/tsens-v0_1.c | 1 + drivers/thermal/qcom/tsens-v1.c | 4 ++ drivers/thermal/qcom/tsens-v2.c | 6 ++ drivers/thermal/qcom/tsens.c | 114 ++++++++++++++++++++---------- drivers/thermal/qcom/tsens.h | 7 ++ 5 files changed, 96 insertions(+), 36 deletions(-) diff --git a/drivers/thermal/qcom/tsens-v0_1.c b/drivers/thermal/qcom/tsens= -v0_1.c index 32d2d3e33287..9426646d1124 100644 --- a/drivers/thermal/qcom/tsens-v0_1.c +++ b/drivers/thermal/qcom/tsens-v0_1.c @@ -287,6 +287,7 @@ static struct tsens_features tsens_v0_1_feat =3D { .max_sensors =3D 11, .trip_min_temp =3D -40000, .trip_max_temp =3D 120000, + .last_temp_resolution =3D 9, }; =20 static const struct reg_field tsens_v0_1_regfields[MAX_REGFIELDS] =3D { diff --git a/drivers/thermal/qcom/tsens-v1.c b/drivers/thermal/qcom/tsens-v= 1.c index faa5d00788ca..c0263375b771 100644 --- a/drivers/thermal/qcom/tsens-v1.c +++ b/drivers/thermal/qcom/tsens-v1.c @@ -77,6 +77,8 @@ static struct tsens_features tsens_v1_feat =3D { .max_sensors =3D 11, .trip_min_temp =3D -40000, .trip_max_temp =3D 120000, + .valid_bit =3D BIT(14), + .last_temp_resolution =3D 9, }; =20 static struct tsens_features tsens_v1_no_rpm_feat =3D { @@ -88,6 +90,8 @@ static struct tsens_features tsens_v1_no_rpm_feat =3D { .max_sensors =3D 11, .trip_min_temp =3D -40000, .trip_max_temp =3D 120000, + .valid_bit =3D BIT(14), + .last_temp_resolution =3D 9, }; =20 static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] =3D { diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v= 2.c index 8d9698ea3ec4..d39d3a2923a3 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -56,6 +56,8 @@ static struct tsens_features tsens_v2_feat =3D { .max_sensors =3D 16, .trip_min_temp =3D -40000, .trip_max_temp =3D 120000, + .valid_bit =3D BIT(21), + .last_temp_resolution =3D 11, }; =20 static struct tsens_features ipq8074_feat =3D { @@ -67,6 +69,8 @@ static struct tsens_features ipq8074_feat =3D { .max_sensors =3D 16, .trip_min_temp =3D 0, .trip_max_temp =3D 204000, + .valid_bit =3D BIT(21), + .last_temp_resolution =3D 11, }; =20 static struct tsens_features ipq5332_feat =3D { @@ -78,6 +82,8 @@ static struct tsens_features ipq5332_feat =3D { .max_sensors =3D 16, .trip_min_temp =3D 0, .trip_max_temp =3D 204000, + .valid_bit =3D BIT(21), + .last_temp_resolution =3D 11, }; =20 static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] =3D { diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index a2422ebee816..1a7324afe321 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -315,10 +315,64 @@ static inline int code_to_degc(u32 adc_code, const st= ruct tsens_sensor *s) return degc; } =20 +/** + * tsens_read_temp - Retrieve temperature readings from the hardware. + * @s: Pointer to sensor struct + * @field: Index into regmap_field array pointing to temperature data + * @temp: temperature in deciCelsius to be read from hardware + * + * This function handles temperature returned in ADC code or deciCelsius + * depending on IP version. + * + * Return: 0 on success, a negative errno will be returned in error cases + */ +static int tsens_read_temp(const struct tsens_sensor *s, int field, int *t= emp) +{ + struct tsens_priv *priv =3D s->priv; + int temp_val[MAX_READ_RETRY] =3D {0}; + u32 status =3D 0; + int ret; + + for (int i =3D 0; i < MAX_READ_RETRY; i++) { + ret =3D regmap_read(priv->tm_map, priv->fields[field].reg, &status); + if (ret) + return ret; + + /* VER_0 doesn't have VALID bit */ + if (!priv->rf[VALID_0 + s->hw_id]) { + *temp =3D status & priv->feat->last_temp_mask; + return 0; + } + + temp_val[i] =3D status & priv->feat->last_temp_mask; + + if (status & priv->feat->valid_bit) { + *temp =3D temp_val[i]; + return 0; + } + } + + /* As per the HW guidelines, if none of the attempts observe a + * valid sample, a stable fallback value must be returned. If the + * first and second samples match, the second value is returned; + * otherwise, if the second and third samples match, the third + * value is returned. + */ + if (temp_val[0] =3D=3D temp_val[1]) + *temp =3D temp_val[1]; + else if (temp_val[1] =3D=3D temp_val[2]) + *temp =3D temp_val[2]; + else + return -EAGAIN; + + return ret; +} + /** * tsens_hw_to_mC - Return sign-extended temperature in mCelsius. * @s: Pointer to sensor struct * @field: Index into regmap_field array pointing to temperature data + * @temp: temperature in milliCelsius to be read from hardware * * This function handles temperature returned in ADC code or deciCelsius * depending on IP version. @@ -326,19 +380,12 @@ static inline int code_to_degc(u32 adc_code, const st= ruct tsens_sensor *s) * Return: Temperature in milliCelsius on success, a negative errno will * be returned in error cases */ -static int tsens_hw_to_mC(const struct tsens_sensor *s, int field) +static int tsens_hw_to_mC(const struct tsens_sensor *s, int temp) { struct tsens_priv *priv =3D s->priv; u32 resolution; - u32 temp =3D 0; - int ret; - - resolution =3D priv->fields[LAST_TEMP_0].msb - - priv->fields[LAST_TEMP_0].lsb; =20 - ret =3D regmap_field_read(priv->rf[field], &temp); - if (ret) - return ret; + resolution =3D priv->feat->last_temp_resolution; =20 /* Convert temperature from ADC code to milliCelsius */ if (priv->feat->adc) @@ -514,8 +561,12 @@ static int tsens_read_irq_state(struct tsens_priv *pri= v, u32 hw_id, &d->crit_irq_mask); if (ret) return ret; - - d->crit_thresh =3D tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id); + ret =3D regmap_field_read(priv->rf[CRIT_THRESH_0 + hw_id], &d->crit_thre= sh); + if (ret) + return ret; + d->crit_thresh =3D tsens_hw_to_mC(s, d->crit_thresh); + if (ret) + return ret; } else { /* No mask register on older TSENS */ d->up_irq_mask =3D 0; @@ -524,9 +575,14 @@ static int tsens_read_irq_state(struct tsens_priv *pri= v, u32 hw_id, d->crit_irq_mask =3D 0; d->crit_thresh =3D 0; } - - d->up_thresh =3D tsens_hw_to_mC(s, UP_THRESH_0 + hw_id); - d->low_thresh =3D tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id); + ret =3D regmap_field_read(priv->rf[UP_THRESH_0 + hw_id], &d->up_thresh); + if (ret) + return ret; + d->up_thresh =3D tsens_hw_to_mC(s, d->up_thresh); + ret =3D regmap_field_read(priv->rf[LOW_THRESH_0 + hw_id], &d->low_thresh); + if (ret) + return ret; + d->low_thresh =3D tsens_hw_to_mC(s, d->low_thresh); =20 dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u|%u) | clr(%u|%u|%u) | mask(%u= |%u|%u)\n", hw_id, __func__, @@ -750,33 +806,16 @@ static void tsens_disable_irq(struct tsens_priv *priv) =20 int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) { - struct tsens_priv *priv =3D s->priv; + int ret; int hw_id =3D s->hw_id; u32 temp_idx =3D LAST_TEMP_0 + hw_id; - u32 valid_idx =3D VALID_0 + hw_id; - u32 valid; - int ret; =20 - /* VER_0 doesn't have VALID bit */ - if (tsens_version(priv) =3D=3D VER_0) - goto get_temp; + ret =3D tsens_read_temp(s, temp_idx, temp); =20 - /* Valid bit is 0 for 6 AHB clock cycles. - * At 19.2MHz, 1 AHB clock is ~60ns. - * We should enter this loop very, very rarely. - * Wait 1 us since it's the min of poll_timeout macro. - * Old value was 400 ns. - */ - ret =3D regmap_field_read_poll_timeout(priv->rf[valid_idx], valid, - valid, 1, 20 * USEC_PER_MSEC); - if (ret) - return ret; - -get_temp: - /* Valid bit is set, OK to read the temperature */ - *temp =3D tsens_hw_to_mC(s, temp_idx); + if (!ret) + *temp =3D tsens_hw_to_mC(s, *temp); =20 - return 0; + return ret; } =20 int get_temp_common(const struct tsens_sensor *s, int *temp) @@ -1065,6 +1104,9 @@ int __init init_common(struct tsens_priv *priv) regmap_field_write(priv->rf[CC_MON_MASK], 1); } =20 + priv->feat->last_temp_mask =3D + GENMASK(priv->feat->last_temp_resolution, 0); + spin_lock_init(&priv->ul_lock); =20 /* VER_0 interrupt doesn't need to be enabled */ diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 2a7afa4c899b..e56b6f29621b 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -21,6 +21,7 @@ #define THRESHOLD_MIN_ADC_CODE 0x0 =20 #define MAX_SENSORS 16 +#define MAX_READ_RETRY 3 =20 #include #include @@ -511,6 +512,9 @@ enum regfield_ids { * @max_sensors: maximum sensors supported by this version of the IP * @trip_min_temp: minimum trip temperature supported by this version of t= he IP * @trip_max_temp: maximum trip temperature supported by this version of t= he IP + * @valid_bit: validate if read temperature is valid or not? + * @last_temp_mask: mask register for last temperature + * @last_temp_resolution: last temperarure sign bit resolution */ struct tsens_features { unsigned int ver_major; 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba Cc: linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, manaf.pallikunhi@oss.qualcomm.com, Priyansh Jain Subject: [PATCH v2 2/2] thermal: qcom: tsens: widen temperature limits to match hardware range Date: Fri, 8 May 2026 15:37:00 +0530 Message-ID: <20260508100700.772985-3-priyansh.jain@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260508100700.772985-1-priyansh.jain@oss.qualcomm.com> References: <20260508100700.772985-1-priyansh.jain@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA4MDEwNCBTYWx0ZWRfXzJpKvRZ4H7VK oR1OOc/9sbcQSHQddQFZ3H1pgKUSUmrPgjYyrBFCYxMLDT/aPoohe0foz6egg+DTiYQnzWb1Kdm IcPPqJTjp4trmCCn5YYSS2fSUNe3HpOZpJUzWDS7C8kTROZ+b5PCiKuLE2vjHTlAmORDj5ZfUpL S56y1Ir/GfTv232PBy4J8Nj9TZnvpE/T2Lcu1sYWALWvINxZ1Wz7c/yPHLp3u75zo3CRQ0+Zv+2 S/hkLevY/epIxDhlgfDWVmLnregHS6qtK0ddmwm0TYXMRUb+gGvWGCDg2LG27iWOZjVXasBeZek Ms//8Ap/h2og/KqS1ls2YPom1cIe6U2MZhznUvihI9hUBsHKjD94UDjD0bjtORj3wMts/uQvr9k A776LaM31Gp1g054OimDz/xjwnB6UZrDChuwirvtrttEkK/0L7Q3JxPJlpJXpUU5H6Kx4Be0eyK wgVTxMfD0QiuzvQMMeg== X-Proofpoint-GUID: bIXm7GDLT-vuqNx1798jdqyva30etd9O X-Proofpoint-ORIG-GUID: bIXm7GDLT-vuqNx1798jdqyva30etd9O X-Authority-Analysis: v=2.4 cv=NKblPU6g c=1 sm=1 tr=0 ts=69fdb5d8 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=7FrdJh-Z1z6zKSyd9LYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-07_02,2026-05-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 spamscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 suspectscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605080104 The TSENS v2 software driver currently clamps trip_min_temp and trip_max_temp to -40=C2=B0C and 120=C2=B0C respectively. However, the TSENS v2 hardware temperature threshold registers support a wider programmable range from -204=C2=B0C to +204=C2=B0C. On newer chipsets using TSENS v2, devices may legitimately operate beyond the existing software limits (for example, up to 130=C2=B0C). When a trip temperature is programmed outside the software clamped range, it is constrained to 120=C2=B0C on the upper end or -40=C2=B0C on the lower end. If the actual temperature continues to exceed this clamped limit, the threshold is immediately violated again, which can result in a continuous interrupt storm. Expand the TSENS v2 software trip temperature limits to match the full hardware supported range (-204=C2=B0C to +204=C2=B0C). This avoids repeated threshold reprogramming and ensures correct trip handling on TSENS v2 based platforms. Signed-off-by: Priyansh Jain Reviewed-by: Konrad Dybcio --- drivers/thermal/qcom/tsens-v2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v= 2.c index d39d3a2923a3..7e967d47aafe 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -54,8 +54,8 @@ static struct tsens_features tsens_v2_feat =3D { .adc =3D 0, .srot_split =3D 1, .max_sensors =3D 16, - .trip_min_temp =3D -40000, - .trip_max_temp =3D 120000, + .trip_min_temp =3D -204000, + .trip_max_temp =3D 204000, .valid_bit =3D BIT(21), .last_temp_resolution =3D 11, }; --=20 2.43.0