From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 232C83F1655; Thu, 7 May 2026 12:55:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158558; cv=none; b=V0wUb6QS93LNxNo+qYYxm7VPB5e+kdtD6CtU69dyB6EQ8F7RGeHLpTuSBwZ/IW0fADC0xjRHAp3/nSgU19ntXRO2qiO4QNAuf0DY8rAxU7VVB3Q3kQJe/Vhodz0iOu/k5NMGJ++o60uioqe/28RNwOUEvH+QnIPCYOSLkUS8EFw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158558; c=relaxed/simple; bh=QU+EV71M3RfDkpd2j74yk/F9jJAx6XKKcfHyhMO6vL0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YxJefz7Tk0vnb01KaUvShNVm9Y6QqoIOVe6UhJQjogq0njaDKM62YWzhcU3x0tum9ECHqCLYqrBz6HWFasUc2rZrXT3ZfsB19n9jne4gJRN2f3qzq+QIq24HYV2ht4Lw72CUqLdzV0XWcNT5HjoB5urcuVpTYz0bjM522fowNzY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZODJHxeP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZODJHxeP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E0E22C2BCC4; Thu, 7 May 2026 12:55:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158558; bh=QU+EV71M3RfDkpd2j74yk/F9jJAx6XKKcfHyhMO6vL0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZODJHxeP8OtPRJz+rU1Fk8V0mWl85x/N5CZIgJJcHKnCOPwPWNdQPLcOCw3CCB7Ag 9PEiBca50PwkbMGS6FWHN+04iWY67+lP/1VsZwdp6gCw53hlkzt/TN7BUFXanxkiR3 Wd1dhZe4FvvVu8UOkzfkhHk0+L+qJS8GG9mqo/GGxw9/Xjh93MCPSRtJsS93HTEaR8 l1muivG7li21sxb12peSOYVrePhJJKmizEniiSy80LFa6apjkzc5WD+7BseYl3Pnsv o+oWwJL0As9ziwfWuBKksF1aeWvsxkplEjO3gYPJ3uvp60YYos9YjFyX2CBIJOOsnI y25edkYZiYulw== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGh-00000000d7d-1jcY; Thu, 07 May 2026 12:55:55 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 01/16] ACPI: GTDT: Parse information related to the EL2 virtual timer Date: Thu, 7 May 2026 13:55:29 +0100 Message-ID: <20260507125544.2903406-2-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Since ARMv8.1, the architecture has grown an EL2-private virtual timer. This has been described in ACPI since ACPI v6.3 and revision 3 of the GTDT table. An aditional structure was added in ACPICA, though in a rather bizarre way, and merged in v5.1 as 8f5a14d053100 ("ACPICA: ACPI 6.3: add GTDT Revision 3 support"). Finally plug the table parsing in GTDT, and allow it to be eventually presented to the architected timer driver. Signed-off-by: Marc Zyngier Reviewed-by: Sudeep Holla --- drivers/acpi/arm64/gtdt.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index ffc867bac2d60..1a58007fccf0a 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -88,6 +88,19 @@ static int __init map_gt_gsi(u32 interrupt, u32 flags) return acpi_register_gsi(NULL, interrupt, trigger, polarity); } =20 +struct gtdt_v3 { + struct acpi_table_gtdt gtdt_v2; + struct acpi_gtdt_el2 el2_vtimer; +}; + +static struct acpi_gtdt_el2 *gtdt_to_el2_vtimer(struct acpi_table_gtdt *gt= dt) +{ + if (gtdt->header.revision < 3) + return NULL; + + return &container_of(gtdt, struct gtdt_v3, gtdt_v2)->el2_vtimer; +} + /** * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer. * @type: the type of PPI. @@ -101,6 +114,7 @@ static int __init map_gt_gsi(u32 interrupt, u32 flags) int __init acpi_gtdt_map_ppi(int type) { struct acpi_table_gtdt *gtdt =3D acpi_gtdt_desc.gtdt; + struct acpi_gtdt_el2 *el2_vtimer =3D gtdt_to_el2_vtimer(gtdt); =20 switch (type) { case ARCH_TIMER_PHYS_NONSECURE_PPI: @@ -113,6 +127,12 @@ int __init acpi_gtdt_map_ppi(int type) case ARCH_TIMER_HYP_PPI: return map_gt_gsi(gtdt->non_secure_el2_interrupt, gtdt->non_secure_el2_flags); + case ARCH_TIMER_HYP_VIRT_PPI: + if (el2_vtimer && el2_vtimer->virtual_el2_timer_gsiv) + return map_gt_gsi(el2_vtimer->virtual_el2_timer_gsiv, + el2_vtimer->virtual_el2_timer_flags); + + return 0; default: pr_err("Failed to map timer interrupt: invalid type.\n"); } @@ -130,6 +150,7 @@ int __init acpi_gtdt_map_ppi(int type) bool __init acpi_gtdt_c3stop(int type) { struct acpi_table_gtdt *gtdt =3D acpi_gtdt_desc.gtdt; + struct acpi_gtdt_el2 *el2_vtimer =3D gtdt_to_el2_vtimer(gtdt); =20 switch (type) { case ARCH_TIMER_PHYS_NONSECURE_PPI: @@ -141,6 +162,10 @@ bool __init acpi_gtdt_c3stop(int type) case ARCH_TIMER_HYP_PPI: return !(gtdt->non_secure_el2_flags & ACPI_GTDT_ALWAYS_ON); =20 + case ARCH_TIMER_HYP_VIRT_PPI: + return el2_vtimer && el2_vtimer->virtual_el2_timer_gsiv && + !(el2_vtimer->virtual_el2_timer_flags & ACPI_GTDT_ALWAYS_ON); + default: pr_err("Failed to get c3stop info: invalid type.\n"); } --=20 2.47.3 From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 343383F20F3; Thu, 7 May 2026 12:55:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158559; cv=none; b=tXlOxQvLmFbSLrBawFfEdQd21jAtVVtAS1SRChRNCEf/l//m6KflLu93z+fRfn21XLcsX1mGUnJXKOAeUhcHeOV8yrty+VsFXwz1KxgwHeoreXfQEb/U/zQorHzkhnvtNgNvm2X79X3WIjEVrMeuIlZzDqAvbm2S+7eAouoRCmw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158559; c=relaxed/simple; bh=jmztYL+cRetID0Id+T0uR/HfaxaSY7cdDgh3n5/jrck=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fHNut28csG+evuBFrTDzuzKDjdxeQPHALcuBOB7pBJai3Eo4lfxjKXxJ7IvVk+XedFUYmdydH+ob6Rf6vDtCcU3CcnanWNL7wPR/p+qktoT697rtvvUsVkOVGRQgr6gAJAXDAJAh1k81PzsPapxCMY3BKmq5oJDAFL0GSqSAZYQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=V4wqzSuw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="V4wqzSuw" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8FD24C4AF51; Thu, 7 May 2026 12:55:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158558; bh=jmztYL+cRetID0Id+T0uR/HfaxaSY7cdDgh3n5/jrck=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V4wqzSuwuZmFBP1AYiBi9xtz60JFhzvxqIwimyJTstBjGNuyWtoXnSRRoKFcgz6Y/ IuAphYyswgyREfOthSY9wHlNF8qj5EorQwCJK1w2Uk6D9N7FanYAcPHIHcxOo1rcuf 44fM07Hm4pygxoKeX4cIYXN+DfWE9S2Nmz+3v4pfMhLNygveV3ZqxiPHnYpOeOQc+L ippHJ0cYkCj99A1K72R87ktEC+Xw7PAMysDGnXSysziLUQtSoAXlUCEWmgUVzmVHXM WdXuDGYFw0WNBCxkhEIpoGcnWjCbEAxCpRJZ0P2IDclexs0jxwsPr6+TYJBBYMqX3D qG+148ZT8lNqQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGh-00000000d7d-3zVR; Thu, 07 May 2026 12:55:56 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 02/16] clocksource/drivers/arm_arch_timer: Default to EL2 virtual timer when running VHE Date: Thu, 7 May 2026 13:55:30 +0100 Message-ID: <20260507125544.2903406-3-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" When running with at EL2 with VHE enabled, the architecture provides two EL2 timer/counters, dubbed physical and virtual. Apart from their names, they are strictly identical. However, they don't get virtualised the same way, specially when it comes to adding arbitrary offsets to the timers. When running as a guest, the host CNTVOFF_EL2 does apply to the guest's view of CNTHV*_El2. This is not true for CNTPOFF_EL2 and CNTHP*_EL2, as the architecture is broken past the first level of virtualisation (it lacks some essential mechanisms to be usable, despite what the ARM ARM pretends). This means that when running as a L2 guest hypervisor, using the physical timer results in traps to L0, which are then forwarded to L1 in order to emulate the offset, leading to even worse performance due to massive trap amplification (the combination of register and ERET trapping is absolutely lethal). Switch the arch timer code to using the virtual timer when running in VHE by default, only using the physical timer if the interrupt is not correctly described in the firmware tables (which seems to be an unfortunately common case). This comes as no impact on bare-metal, and slightly improves the situation in the virtualised case. Signed-off-by: Marc Zyngier --- drivers/clocksource/arm_arch_timer.c | 44 ++++++++++++++++------------ 1 file changed, 25 insertions(+), 19 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm= _arch_timer.c index 90aeff44a2764..eaf276a9b9d28 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -688,6 +688,7 @@ static void __arch_timer_setup(struct clock_event_devic= e *clk) clk->irq =3D arch_timer_ppi[arch_timer_uses_ppi]; switch (arch_timer_uses_ppi) { case ARCH_TIMER_VIRT_PPI: + case ARCH_TIMER_HYP_VIRT_PPI: clk->set_state_shutdown =3D arch_timer_shutdown_virt; clk->set_state_oneshot_stopped =3D arch_timer_shutdown_virt; sne =3D erratum_handler(set_next_event_virt); @@ -879,7 +880,7 @@ static void __init arch_timer_banner(void) pr_info("cp15 timer running at %lu.%02luMHz (%s).\n", (unsigned long)arch_timer_rate / 1000000, (unsigned long)(arch_timer_rate / 10000) % 100, - (arch_timer_uses_ppi =3D=3D ARCH_TIMER_VIRT_PPI) ? "virt" : "phys"); + arch_timer_ppi_names[arch_timer_uses_ppi]); } =20 u32 arch_timer_get_rate(void) @@ -1023,6 +1024,7 @@ static int __init arch_timer_register(void) ppi =3D arch_timer_ppi[arch_timer_uses_ppi]; switch (arch_timer_uses_ppi) { case ARCH_TIMER_VIRT_PPI: + case ARCH_TIMER_HYP_VIRT_PPI: err =3D request_percpu_irq(ppi, arch_timer_handler_virt, "arch_timer", arch_timer_evt); break; @@ -1090,25 +1092,34 @@ static int __init arch_timer_common_init(void) /** * arch_timer_select_ppi() - Select suitable PPI for the current system. * - * If HYP mode is available, we know that the physical timer - * has been configured to be accessible from PL1. Use it, so - * that a guest can use the virtual timer instead. + * On AArch32, if HYP mode is available, we know that the physical + * timer has been configured to be accessible from PL1. Use it, so + * that a guest can use the virtual timer instead (though KVM host + * support has long been removed). * - * On ARMv8.1 with VH extensions, the kernel runs in HYP. VHE - * accesses to CNTP_*_EL1 registers are silently redirected to - * their CNTHP_*_EL2 counterparts, and use a different PPI - * number. + * On ARMv8.1 with FEAT_VHE, the kernel runs in EL2. Accesses to + * CNTV_*_EL1 registers are silently redirected to their CNTHV_*_EL2 + * counterparts, and the timer uses a different PPI number. Similar + * thing happen when using the EL2 physical timer. Note that a bunch + * of DTs out there omit the virtual EL2 timer, so fallback gracefully + * on the physical timer. + * + * Without VHE, if no interrupt provided for virtual timer, we'll have + * to stick to the physical timer. It'd better be accessible... * - * If no interrupt provided for virtual timer, we'll have to - * stick to the physical timer. It'd better be accessible... * For arm64 we never use the secure interrupt. * * Return: a suitable PPI type for the current system. */ static enum arch_timer_ppi_nr __init arch_timer_select_ppi(void) { - if (is_kernel_in_hyp_mode()) + if (is_kernel_in_hyp_mode()) { + if (arch_timer_ppi[ARCH_TIMER_HYP_VIRT_PPI]) + return ARCH_TIMER_HYP_VIRT_PPI; + + pr_warn_once("VHE without EL2 virtual timer interrupt, broken firmware\n= "); return ARCH_TIMER_HYP_PPI; + } =20 if (!is_hyp_mode_available() && arch_timer_ppi[ARCH_TIMER_VIRT_PPI]) return ARCH_TIMER_VIRT_PPI; @@ -1200,14 +1211,9 @@ static int __init arch_timer_acpi_init(struct acpi_t= able_header *table) if (ret) return ret; =20 - arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] =3D - acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI); - - arch_timer_ppi[ARCH_TIMER_VIRT_PPI] =3D - acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI); - - arch_timer_ppi[ARCH_TIMER_HYP_PPI] =3D - acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI); + /* The GTDT parser can't be bothered with the secure timer */ + for (int i =3D ARCH_TIMER_PHYS_NONSECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PP= I; i++) + arch_timer_ppi[i] =3D acpi_gtdt_map_ppi(i); =20 arch_timer_populate_kvm_info(); =20 --=20 2.47.3 From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 344093F20F4; Thu, 7 May 2026 12:55:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158559; cv=none; b=Peu5ODVGm1nesY6NImwaoz+DYxNDH/pCUfU1MoKRPHXtIiXNXfvo/PiwfehwrgxMTphZlvGf/hb5puDidSne9PmOlDRWJn/9GMWkSnqsI6MZTs+0E66iYnF/x8DP5J71e6Fo0+/8x5H7PrHzvOrvasmKGAI2G/PDJSOXesb8vt4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158559; c=relaxed/simple; bh=6c96IjMHaMre41xBr3FzTv5pSHvU6UTiqN3k4zC2F0A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=g2l2w4/H2LYknu+tXLa+f6W2EC3LLm5UnoFIlJCoxqOQ774U2UlbWl4cl5KsPaMDiJ4sPuulk77B294D5jdIH1FK14Sa0nmWK3iWy6XyBn8TIVbX7I4Q24t+zWLj4GG980QhHBYDH0i8q2pQ3yZcMC/3oslSEjXx5QrTMvGDdqM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=MZprJQtb; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="MZprJQtb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B1CBDC4AF52; Thu, 7 May 2026 12:55:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158559; bh=6c96IjMHaMre41xBr3FzTv5pSHvU6UTiqN3k4zC2F0A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MZprJQtbEL/qKSJ+blHqLXn59EDJTINi2PRv8HZAJjZMGROUPoGzPTJmGlmAGFX3e PTDLW7Q3wARN/9UIHA87bU4LvS35WvweNlTSOV2N4QyUwpyKMoCcmXWDLViTxOkrz9 1ErRvSfAbQb8+DlgtOg1hu8FQgUlVMfBT9OgirBt9ZE9U+bZHUQg7yH4iU/6xQ6Mrk M8yP6TCze5NN4CY5los0Up5KFHtKKV/CFilK3ntIJP+T2EcaOFKulLZIKLQ7BlB+Zv x8koVqu2iX8ZGsOLRudsFodKQ8ae5cJKJZNwLrVwLhfC8/6GQXaWAp7ZmBAuwZVU2v vRExc3FIx62kQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGi-00000000d7d-23jP; Thu, 07 May 2026 12:55:56 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 03/16] dt-bindings: timer: arm,arch_timer: Fix requirements for interrupt description Date: Thu, 7 May 2026 13:55:31 +0100 Message-ID: <20260507125544.2903406-4-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The arm,arch_timer DT binding is extremely imprecise in describing the requirements for interrupts. Follow the architecture by making it explicit that: - the EL1 secure timer irq is required if EL3 is implemented - the EL1 physical timer irq is always required - the EL1 virtual timer irq is always required - the EL2 physical timer irq is required if EL2 is implemented - the EL2 virtual timer irq is required if FEAT_VHE is implemented The consequence of the above is that the minimum number of interrupts to be described is 2, and not 1. Finally, clean up the description which made the assumption that the timers are plugged into a GIC (unfortunately, that's not always true), drop the MMIO nonsense that has long be moved to a separate binding, and use the architectural terminology to describe the various interrupts. Signed-off-by: Marc Zyngier Acked-by: Rob Herring (Arm) --- .../bindings/timer/arm,arch_timer.yaml | 21 +++++++------------ 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/= Documentation/devicetree/bindings/timer/arm,arch_timer.yaml index c5fc3b6c8bd0b..c65e48a155ab6 100644 --- a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml +++ b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml @@ -10,13 +10,8 @@ maintainers: - Marc Zyngier - Mark Rutland description: |+ - ARM cores may have a per-core architected timer, which provides per-cpu = timers, - or a memory mapped architected timer, which provides up to 8 frames with= a - physical and optional virtual timer per frame. - - The per-core architected timer is attached to a GIC to deliver its - per-processor interrupts via PPIs. The memory mapped timer is attached t= o a GIC - to deliver its interrupts via SPIs. + The per-core architected timer is expected to deliver per-CPU interrupts + (commonly to a GIC to deliver its per-processor interrupts as PPIs). =20 properties: compatible: @@ -33,13 +28,13 @@ properties: - const: arm,armv7-timer =20 interrupts: - minItems: 1 + minItems: 2 items: - - description: secure timer irq - - description: non-secure timer irq - - description: virtual timer irq - - description: hypervisor timer irq - - description: hypervisor virtual timer irq + - description: EL1 secure physical timer irq, if EL3 is implemented + - description: EL1 non-secure physical timer irq + - description: EL1 virtual timer irq + - description: EL2 physical timer irq, if EL2 is implemented + - description: EL2 virtual timer irq, if FEAT_VHE is implemented =20 interrupt-names: oneOf: --=20 2.47.3 From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B3223F54DA; Thu, 7 May 2026 12:56:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158562; cv=none; b=cD25xFEZMhMkGKAsJ+OBHCBTopytaQwT43aHfDwb5CjTXXYX3UaOHQYfnOG6j7oSQstcCMegSKV2z58J39TT1cy2P29uBJsOVbZSbFaVveg00GQzKuVzRG78DQGwfCOENIBwC7YynIV7G1MnH2nk01y9xmpVoawc6jEfIUR3/Rw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158562; c=relaxed/simple; bh=AUUR2mNpd4MZjYN5NiaEO2JmuYp8gYDD2xKReT+S1UA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MmywWEIc04exhDHVE7iW33yxMU5uczxoSWlqkowQ6RzU6enGZDSJYamWs65hE9mtQTEdYUss9qkwAZVmzW3Dl5n9AgGtdN8tLZEwsw0g7Xd8/nCdNjDzkYrG9BOf+BPbBjZ70Y3Mkg5ad+Da2v6Fc7/yXYWrJVdZ2UttbEtq9uM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pcP4b0Ze; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pcP4b0Ze" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AC137C4E677; Thu, 7 May 2026 12:56:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158561; bh=AUUR2mNpd4MZjYN5NiaEO2JmuYp8gYDD2xKReT+S1UA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pcP4b0Zejwv6+2w4K8LhMWHs1WayrOKmpUcXWogyuQ37pqbQjEvTOJv8x6G1mjg9b WmhztKpBLykQBURvS4YOZ9EOt5mL3KN23FT5nHXrVEksxtDJreYYNfZy76aac6rT93 BYSfVnTTr0t6qRXsvGt51MH9a/0D+71csej3pxH5Mq81FoytStn3kguepZDW93+Qf4 A3aRJ8BnmiDFoPnmsF6kFfi5FussTwOPbMyc8+pEkHonevtKcx9guWboukBggiBSY1 5+corEULaX2Ncun+bh9bZvVM8jQYJscFPUFeN6vf6GtrLHa1cYH0IVR6hUxEqVvYRl mWORoIq/EqJZA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGj-00000000d7d-0Tmb; Thu, 07 May 2026 12:55:57 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 04/16] arm64: dts: allwinner: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:32 +0100 Message-ID: <20260507125544.2903406-5-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in the A523 SoC (and derivatives) are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun55i-a523.dtsi index 5afa8d92acbfb..d3c47966e8fc8 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -101,7 +101,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 soc { --=20 2.47.3 From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D73DD3F7860; Thu, 7 May 2026 12:56:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; cv=none; b=DpHyOmhZtKpA9mHOoB5T1KXgKvGdwvK4QTDEdNDqjN0AIfOmT2sBBgZCja2XGchkO69sLxX80PdjhXV6xUWVfafABD1FSSY3sbxbKcBYljfiCkGz4cjc06K2EJbLB3UCkZmyRn0qlv6iaW78XJENAc5mt6wLdA2tT324Onp7XFI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; c=relaxed/simple; bh=Ndk1gHcTE4MDCW8saID4GCZT+tRNO56H9hFusMG+7wk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Se3Im8oogiM2ygvWpIoD8lvdeNiMPiw0up5AvwMVFJDwECWRNlgsE/JOx0YNiveLjC6ZLHk4OM+I/hmpd4TB9QmbF9maZWUbZRoUBijL2pkUa8S4o0VVXplAuojtv4az3BGlPm0ep3FJWhODE/J6URgRIzLarP27ASfG6K/m4T0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=tM4IgBbv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="tM4IgBbv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A8B0AC4AF0C; Thu, 7 May 2026 12:56:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158562; bh=Ndk1gHcTE4MDCW8saID4GCZT+tRNO56H9hFusMG+7wk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tM4IgBbvBrhbJ0yMHD3phsMTB6n5sJC+PO7413tKNIoTYJoD0sDMHE37iGqx4bBF5 eOtSuUT1jnnW80OVAkCkqc4VMs+6OGWxaKlE+raku1u7DosJi6sk77DFBm/9568nvD XJfFG1wCB9YoHr7T4009c8oHlMjffeROvTY1UWzvU5M0ksfFn3Nvo6wm7eArAiiHTa QAh6THZfEbQA+KWXImObaa2/XXWI7naguXG+4RMw7uMKhSDaO/IhbaG77pmlzNJ7YW ciKS7T/giwzVCebr/06fbMaAckZ2WkXph9HuRSyIiBwZvwHseQBBgrC75Lsw/KFO0/ UHbNtRsO8uRgg== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGj-00000000d7d-2p8l; Thu, 07 May 2026 12:55:57 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 05/16] arm64: dts: amlogic: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:33 +0100 Message-ID: <20260507125544.2903406-6-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of Amlogic SoCs are missing the EL2 virtual timer interrupt. Add it. This requires some surgery in the "common" files to move the timer node to locations that makes it possible to add the interrupt only where it is actually implemented. Signed-off-by: Marc Zyngier Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi | 8 -------- arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 8 ++++++++ arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 9 +++++++++ arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 3 ++- arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 3 ++- arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 3 ++- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 13 ------------- arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 9 +++++++++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 10 ++++++++++ 9 files changed, 42 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi b/arch/arm6= 4/boot/dts/amlogic/amlogic-a4-common.dtsi index 54d7a2d56ef64..6f559e4dd9ee9 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-common.dtsi @@ -7,14 +7,6 @@ #include #include / { - timer { - compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; - }; - psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a4.dtsi index fce45933fa28b..c28fc7fcbae7f 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -86,6 +86,14 @@ pwrc: power-controller { #power-domain-cells =3D <1>; }; }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + }; }; =20 &apb { diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a5.dtsi index 2b12d8284594f..c22c0acb4807e 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -49,6 +49,15 @@ pwrc: power-controller { #power-domain-cells =3D <1>; }; }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + , + ; + }; }; =20 &apb { diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s6.dtsi index ab3acef2b147e..853d32929ff46 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi @@ -56,7 +56,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 psci { diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s7.dtsi index a3faf4d188e11..bfaac5f3e22da 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi @@ -94,7 +94,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 psci { diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi b/arch/arm64/boot= /dts/amlogic/amlogic-s7d.dtsi index 0c4417bcd6827..32d8683059964 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi @@ -58,7 +58,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 psci { diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64= /boot/dts/amlogic/meson-g12-common.dtsi index 00609d2da6743..a911a5181a88d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -2579,19 +2579,6 @@ map { }; }; =20 - timer { - compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; - arm,no-tick-in-suspend; - }; - xtal: xtal-clk { compatible =3D "fixed-clock"; clock-frequency =3D <24000000>; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-g12.dtsi index 664912d1beaab..866fc07d1b0ae 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi @@ -43,6 +43,15 @@ tdmif_c: audio-controller-2 { clock-names =3D "sclk", "lrclk", "mclk"; status =3D "disabled"; }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + arm,no-tick-in-suspend; + }; }; =20 &apb { diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/d= ts/amlogic/meson-sm1.dtsi index 8f5b850b1774f..77c72936ffdd3 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -128,6 +128,16 @@ l2: l2-cache0 { }; }; =20 + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + , + ; + arm,no-tick-in-suspend; + }; + cpu_opp_table: opp-table { compatible =3D "operating-points-v2"; opp-shared; --=20 2.47.3 From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B4163F54DB; Thu, 7 May 2026 12:56:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158562; cv=none; b=C6he0JiesyssvExmM795HF43MRxmJm37K2y3ulJmZpC84CdsfDdkmbkYoyb5eDGNZRM6tHq7ERfHgAdoPFuwJmURq6Ozj/lh9RUHhq4//QXmluImgrzmO5vViYInL45BQ+L92C9xNuzP+JE0YUoRwSG3X2j8GwlSwHDHO1DhMWo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158562; c=relaxed/simple; bh=VLsh85YozgAjTbaFo7luW5wp3AU+M3q21SDYWi9Ryio=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; 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Thu, 07 May 2026 12:55:58 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 06/16] arm64: dts: bst: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:34 +0100 Message-ID: <20260507125544.2903406-7-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in the bst c1200 SoC are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/bst/bstc1200.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/bst/bstc1200.dtsi b/arch/arm64/boot/dts/bs= t/bstc1200.dtsi index dd13c6bfc3c89..104ecf76ced10 100644 --- a/arch/arm64/boot/dts/bst/bstc1200.dtsi +++ b/arch/arm64/boot/dts/bst/bstc1200.dtsi @@ -92,6 +92,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; --=20 2.47.3 From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3B50C3F54DC; Thu, 7 May 2026 12:56:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158562; cv=none; b=MEJzeIWkVu3Ld0uMJxwpv2zyYRqHg4Lbe6EjFkqBegOtJs7hAHXy122Ase4NDiAhGMMOuJ8BvZbpOGvFlAw2ZT39p/aHktpbSssAl9ojBuuUbQ0hXNNaOHCpru6oBNCBsurB277C0YVoFte+XtHzXjRpi01i2VRi4M7L/Lpi3Tw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158562; c=relaxed/simple; bh=pSC+Wz3RdPQ5vZ/77OK/N1UzWpdcXw75IYRf3Cx9KpI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BeGUJf1OA2rFiQy22Tuiex18olhiVyyRHZXUev858SCCgtp+mb5myWABsXKEKoSrnQGU5H9zh0ROR4HvZwXrLj5Ul8znDGjGzZJsEcTFziOS4jMaofDpS17IhBZerGsHNQS5Npyr0kVwksDal6tR4lnFc/C9/Tzhm4BJv8PFcvw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hr//lE5B; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hr//lE5B" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9FB15C4DE1B; Thu, 7 May 2026 12:56:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158561; bh=pSC+Wz3RdPQ5vZ/77OK/N1UzWpdcXw75IYRf3Cx9KpI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hr//lE5BXql89qyasDHL2mo2OqWjztkKcwY4gx3htD4jtU7bvlR8cVJBHQJUUOTgA c5KJXR9rP1NeJIZwUFGUgCL4Vp1VT41BwJ0lIweQjfe/XYvNprThl5med2/XVDGmU3 IQdlFb4nx9Y/eZFlkcQBYQxFN/R6/BMO/MDD8bCHGyZyl3VDpijBkgpI9Sun6GtiyR 5QYB9Jsj5MmceM5vqRppvvxBFbOttFmULU7xwC+DxNcsf02IUg3oSEV3kQ16cJ6KHw 7Rwn2bOZnohI+s2IOF5dDerkLAZsmpqgy/ngeOiyUUoe7vea+aF6exgPnqUq9B76Ab bt6P484o9we9g== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGk-00000000d7d-3AWs; Thu, 07 May 2026 12:55:58 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 07/16] arm64: dts: exynos: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:35 +0100 Message-ID: <20260507125544.2903406-8-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" A bunch of Samsung SoCs are missing the EL2 virtual timer interrupt despite using ARMv8.1+ CPUs. Add the missing interrupt, except for those broken designs where the interrupt is documented as not being wired. Signed-off-by: Marc Zyngier Acked-by: Jesper Nilsson --- arch/arm64/boot/dts/exynos/axis/artpec9.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynos2200.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynos990.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 3 ++- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi b/arch/arm64/boot= /dts/exynos/axis/artpec9.dtsi index f8ed43c6e8258..cd46aaf056287 100644 --- a/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi +++ b/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi @@ -272,6 +272,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/d= ts/exynos/exynos2200.dtsi index 6487ccb58ae76..59662f9bdb98f 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi @@ -1911,7 +1911,8 @@ timer { interrupts =3D , , , - ; + , + ; /* * Non-updatable, broken stock Samsung bootloader does not * configure CNTFRQ_EL0 diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dt= s/exynos/exynos990.dtsi index f8e2a31b4b751..2e6fb24a3c928 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -405,7 +405,8 @@ timer { interrupts =3D , , , - ; + , + ; =20 /* * Non-updatable, broken stock Samsung bootloader does not diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot= /dts/exynos/exynosautov9.dtsi index 66628cb32776e..2c34a2b30ad02 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -148,7 +148,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 fixed-rate-clocks { diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot= /dts/exynos/google/gs101.dtsi index d085f9fb0f62a..86933f22647b7 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1856,7 +1856,8 @@ timer { , , , - ; + , + ; }; }; =20 --=20 2.47.3 From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F84A3F7897; Thu, 7 May 2026 12:56:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; cv=none; b=bqBkoTFNxRez0JVSf8yvskcaQ16kx/YwbTaZ8csD8IqFEYbH21fGgt2nI54e9SEvd+sFH0NYlBpPfeymW6XO9ij94KV/BjetZnLSmA9o0ECvyRwzL2xXNE2xRspKBcRf0UTKnDqIcF36sadzcUvfHsSRXUs2dn1ctABAp8BxiAY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; c=relaxed/simple; bh=CJXY43NWPhe/kEFDLFlqtBJ4A3u4UFccm33o2sFJ4aY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Dm5DOJJWlcnWCuKOUWkUbZwXnQVgHYBRCvX/asInr2JSxYuJyUl+2GJ20LtBcHScxS9F7ThRnJr2Svq/EDWRblj9c8XyvnZgjY7TK3dEDi9iHsxIzpwKeI+IPyjp5yaDBdcNaVHZ5n9CrW87GVz4Pbr022XGP5L6AwaWl0HsGnQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mSM0vSwE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mSM0vSwE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BC8B7C2BCF5; Thu, 7 May 2026 12:56:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158562; bh=CJXY43NWPhe/kEFDLFlqtBJ4A3u4UFccm33o2sFJ4aY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mSM0vSwEN1Ftvy7cGmWM3VCf1fYefJyIOC9v1s2PgVtv4DasoMlB5VQA1p365GJlq qhcLIV3NIzW2Q5Igg685SbWr3lkfM8vve3VUpiflyzr4OUbNNDT9HalBUPCaJHq2vX SNz4EMoDlwp4EI6ahIVa9ZG/xr2RTZrmIwtBrWprnDcPDVYmzoBPFPH6RmbRLMfA4A 8hf4zc9c/mkFqwuaIQTwicb4uMO6gntcWnCz0H3v6es1e/B8TmROSiaPt3qUpU4VWB CHpEkW/AGJmXrLif75DsHoK3x3CFNvbsbRQMX12qDQ+Chzx5JnW0f/UG+WALuQ5jtP 6tPfeDd16S1Ew== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGl-00000000d7d-1JI4; Thu, 07 May 2026 12:55:59 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 08/16] arm64: dts: freescale: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:36 +0100 Message-ID: <20260507125544.2903406-9-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of NXP/FSL SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/freescale/imx91_93_common.dtsi | 3 ++- arch/arm64/boot/dts/freescale/imx94.dtsi | 3 ++- arch/arm64/boot/dts/freescale/imx95.dtsi | 3 ++- arch/arm64/boot/dts/freescale/imx952.dtsi | 3 ++- arch/arm64/boot/dts/freescale/s32n79.dtsi | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi b/arch/arm6= 4/boot/dts/freescale/imx91_93_common.dtsi index 46a5d2df074d5..679b9a6f7160f 100644 --- a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi +++ b/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi @@ -82,7 +82,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts= /freescale/imx94.dtsi index c460ece6070f8..7431ce293625b 100644 --- a/arch/arm64/boot/dts/freescale/imx94.dtsi +++ b/arch/arm64/boot/dts/freescale/imx94.dtsi @@ -147,7 +147,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <24000000>; interrupt-parent =3D <&gic>; arm,no-tick-in-suspend; diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index 71394871d8dd0..e318048dc755b 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -524,7 +524,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; diff --git a/arch/arm64/boot/dts/freescale/imx952.dtsi b/arch/arm64/boot/dt= s/freescale/imx952.dtsi index b30707837f353..7c65956bc72dc 100644 --- a/arch/arm64/boot/dts/freescale/imx952.dtsi +++ b/arch/arm64/boot/dts/freescale/imx952.dtsi @@ -298,7 +298,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; diff --git a/arch/arm64/boot/dts/freescale/s32n79.dtsi b/arch/arm64/boot/dt= s/freescale/s32n79.dtsi index 94ab58783fdc8..fb40abec4c5cd 100644 --- a/arch/arm64/boot/dts/freescale/s32n79.dtsi +++ b/arch/arm64/boot/dts/freescale/s32n79.dtsi @@ -357,6 +357,7 @@ timer: timer { interrupts =3D , , , - ; + , + ; }; }; --=20 2.47.3 From nobody Mon Jun 15 09:33:08 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5CEB33F7875; Thu, 7 May 2026 12:56:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; cv=none; b=QB03SJOLFR1XtixzJSSRxB9sISwVxZGWk1kUERvgsZTD2JPV7MFGdg0bF0I+xQlwdGhUj7iWwvCWYqYH5NYIzsQxZQ1Ui+3WXyEx6PKX6wpcIZwkhgMlncEekAT1gRZnAYNzs3qkazWji3BykBHSroGSXqpxQQITqhlTrHShM6A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; c=relaxed/simple; bh=7SdSyDDXa1EaMUGQJrwp+Cr56XdCLyQjJ8uS5iUDaAw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NJ08zPVdgKlfFfSo1jqn0j89XlAH3zeUkl3L4Tdb8iRGjNk49oLg7oD56DwZNGHslidN8OWMGpQlb0hMtaHdRIKzb5wOAtdRU83BZHfmw964dGjgyXo58RY9pCD2VfJN4jSU2q3zs2fNnBTpUuCdf8/vbADYzqDzayUXyAnRK0c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qHDjo2KK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qHDjo2KK" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C50E3C2BCF7; Thu, 7 May 2026 12:56:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158562; bh=7SdSyDDXa1EaMUGQJrwp+Cr56XdCLyQjJ8uS5iUDaAw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qHDjo2KKdvyom6yFvhbVAAZZsX0UZCQJHdHHUXF60Vujp81bV1S9xxDuua84C2EUT NYZvD+onHkg0K+D3xF+dSCGBXWGsuiQGsdMmJrmVpJoHVDkgqC54mVAKkUsUklpTP6 Zlz3DbJhKQ+u6imLfXPkdqISal34NY36xDEbCJTuLaplLSs7eS+s9K2SpeOkSkhECE VPTW1eH93w0dzyMwqomC8wn75E9fZN/kFogfkwgkkFSvQFEd2nWEzQybCC9ZjLyy/t XcU/v+tD+dfjegI4H2VRZUSQHQ9hiFSePoLn/SNfgprDt7YK5JweZYO6vIAL7nEOiH PhCqBY4PAPaxQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGl-00000000d7d-3PDR; Thu, 07 May 2026 12:55:59 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 09/16] arm64: dts: intel: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:37 +0100 Message-ID: <20260507125544.2903406-10-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in the agilex5 SoC are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier Acked-by: Dinh Nguyen --- arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/bo= ot/dts/intel/socfpga_agilex5.dtsi index 02e62d954e949..6db2d48b9bad3 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -155,7 +155,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 usbphy0: usbphy { --=20 2.47.3 From nobody Mon Jun 15 09:33:09 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C3303F7868; Thu, 7 May 2026 12:56:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; cv=none; b=aORsuL+mwS+UEcmRnFiOJkrJQb13Y/Q2bANWWBJD84gLTbav0zwOojmruB+CEBcPPVVbYU5ocoLi9tsL3r3kvUZiQ+U16JwCvhWJ+HBq2TPeLQZA8R6dBjKM3LF1cASq1IurJ3yBTNhu3T2cCD9i6hpGFTylp4f33Wmx6x/W7mk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; c=relaxed/simple; bh=C8QlCN0PZK11mrLCs9oNNpttQLwIcnWA9/xtBgloldA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OMIfKkSf5GlXKopABo15I2C0ZDm5NRmTDBktA6hebGNzcQi7ek488wy++bpDNHhFtBPoiQslEQYHy/C5HbQCBtNAKtDOBlebFDQhQK98wCKhIcuT3WbTKkoNRPDykOKGRvpJoR0KLQ/UwoTFwdp5xB8FFI1LWRyXKOBqvqROfDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=F9IQmMxP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="F9IQmMxP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CE39DC2BCFA; Thu, 7 May 2026 12:56:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158563; bh=C8QlCN0PZK11mrLCs9oNNpttQLwIcnWA9/xtBgloldA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F9IQmMxP91Og2ndw7nbq7bf9f5YZBGH4jqYScfZV/WGLI6qCsqNIEPHsf2o90n4H1 pcw44gGrzUwKeKBUPLTnNSj6WAJNnG+F7MbtZOW0A0Dw9HXY4IA/J5ebP4ucNAG//i eJJ30mwM94mPrdNqv7L+BOh6trbGQSpyrBMwElTJavFNnCViqZoqLMJ74Ius6Okv54 7MPT/0VAXKxc10mhKLEhpiKXy9UOVc9oSGSqV0MduyPREnuy//AuOUBH/7+aHy8CfG IHAIpjNiKE0q0N/AZ2CrL3fXMy4DdKlMlHOZL21Ks707fOYeZZ/NJZ3jvO3fqUCATf RYALOdSPqteFA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGm-00000000d7d-1QD8; Thu, 07 May 2026 12:56:00 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 10/16] arm64: dts: mediatek: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:38 +0100 Message-ID: <20260507125544.2903406-11-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.1+ based CPUs used in a number of Mediatek SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/mediatek/mt6779.dtsi | 3 ++- arch/arm64/boot/dts/mediatek/mt8186.dtsi | 3 ++- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 3 ++- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 3 ++- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 ++- 5 files changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts= /mediatek/mt6779.dtsi index 70f3375916e8c..106df7603d533 100644 --- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi @@ -108,7 +108,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 soc { diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts= /mediatek/mt8186.dtsi index b91f88ffae0e8..a4621ce370d8e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -815,7 +815,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 soc { diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts= /mediatek/mt8188.dtsi index 75133794cec38..614e75f46c72d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -918,7 +918,8 @@ timer: timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <13000000>; }; =20 diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 9f8f115edd4cc..873c4fae6afc9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -328,7 +328,8 @@ timer: timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <13000000>; }; =20 diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index c72e34c57629d..3c9a7a08612b9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -451,7 +451,8 @@ timer: timer { interrupts =3D , , , - ; + , + ; }; =20 soc { --=20 2.47.3 From nobody Mon Jun 15 09:33:09 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 601153F787D; Thu, 7 May 2026 12:56:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; cv=none; b=D8iJH5YQFfV81VpVZK3iG1MUyZ01rPfMBRYDph0hqM0nVeuvasrV1qidZFuNKwsf5EPzsp7ds6Nm2X6fIs+ET4Df5nAguyPo1wbaQ0KCKI1f3riN0Li10w9jthNqYgN/qvJigrejNvHAdHKZsCWbZe7Lb5nBTFwRZDg2X8vM09Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158563; c=relaxed/simple; bh=VC6LANEhwgs+80fyZ4VYEW4hOL3vmlUcBIfmWto4pj8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VBj+SSXz55K1WeUmv3V2cWpAAwhbxiwtsdeGTLUDnZupZTT+2IKhykSVScON9V2fbrWYTmNwUMqz5q0u2AFQNG3+2t+at9yld3R2X/tlF2IgO0kQVAh3379QTQ82Mzv8xOp805YdCPOASG6Z6/Zz0royH1cmAiV25ziCs4a0PSw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qQTonxlF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qQTonxlF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C7D74C2BCFB; Thu, 7 May 2026 12:56:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158562; bh=VC6LANEhwgs+80fyZ4VYEW4hOL3vmlUcBIfmWto4pj8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qQTonxlFv0Vf/oNvRzcQ6i1UojCQNYUOkxDszf/ZjVQ6dAo9Tp3ipjUVYa3T9sPG1 OFNEy2FAuhzYJMSmPEeKknaX1GEGhibfNS9si8w5ZxB3PKvhfaXhTgHFJWVGzJEDNs bPipIXw9bGR1H7CyxkX9soPYc+eId6hRioKGtw9ZL9h9Td+TacZ43A+Hs1wUWouRys yx3rWr8cIuLuGoU0jlScRx1UM0ONt4A9uCrxqg0dVKs9aFwQtc4yIZRwJzm+9U+X99 Z1BDsAXsghnv+3ew3y1pFdcxtYIsH05qiNPTHhlhb5aKGKxv+yuf4cQ1EHjsRybvK3 +rhQFnAKSfbjg== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGm-00000000d7d-3dOR; Thu, 07 May 2026 12:56:00 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 11/16] arm64: dts: nvidia: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:39 +0100 Message-ID: <20260507125544.2903406-12-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of nvidia SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 ++ arch/arm64/boot/dts/nvidia/tegra234.dtsi | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts= /nvidia/tegra194.dtsi index 849694f751d90..45cc180ac9973 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -3163,6 +3163,8 @@ timer { , , + ; interrupt-parent =3D <&gic>; always-on; diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts= /nvidia/tegra234.dtsi index 04a95b6658caa..ab9813f9ba30c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi @@ -5872,7 +5872,8 @@ timer { interrupts =3D , , , - ; + , + ; interrupt-parent =3D <&gic>; always-on; }; --=20 2.47.3 From nobody Mon Jun 15 09:33:09 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8B1C3F9F4C; Thu, 7 May 2026 12:56:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158564; cv=none; b=U7pAOSZEvOHlUaq/cw6ZPpemSA8LyiTLUyXlkTY6ToIZwjwNML3VFsTYAcA9bZCvNxK8zDJ5sYv1uAMXMVSwVF3buHyjeQgnBOvQvIPPMv6v8uI6MM0xPIEpL5BcSGP7764oFPAQEqJJMHi3sEJ9IHTHywDxq/n9uz5NBPXsOmk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158564; c=relaxed/simple; bh=4/6vzm3F89tYIBWYAzm8ccRLU9saqSBjgruCZuRt+ck=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BWoBugId220SDrwL1Q0SOtrbnl9lBauKHgDjOBFaOeeWnYIHBFgXuwY8MY+jbPCAbZdxUyQlFyLnarLjWvPM88ZX/TE3euHIN9FGtJgNWKMOwmuwPXxpnZXchjPIeJ4Ae9/lGFiMNOsO3ts9PZGNJ/NS38baLp8QbsUQK0xbIn0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Tp/QRs/q; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Tp/QRs/q" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5ADCFC2BCB8; Thu, 7 May 2026 12:56:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158563; bh=4/6vzm3F89tYIBWYAzm8ccRLU9saqSBjgruCZuRt+ck=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Tp/QRs/qYq7nSuEnWwDda9Ki2sMj2S2LVLgqIIXEE8SeQM3JKjx5VzKd+em2jabL3 LoFuZ43KPM39X060vw3XgfcC8Zu9smDCJBXRklrgYkXusKciuqewBvXu3WOtQxd+fb ifrNyc3oHmMNbwKIz7nVbiGetozY9wTmzpEYowi8eWn950TVLu5bVwZMsOIAmp+xmj ZwjdVzS7w2iwPvewvBh+kFHrYol1TX/GOfVG8nBqxNdTClmRkpX7LduTczYuz8I0Zb /vSjdm00gOR5KJ7Zbo3dVyVD9OaO0p0AUOB+hegYenmnorhY7tayYv+1vzLNTWtgnA 86C5qAID5HNqw== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGn-00000000d7d-1ilu; Thu, 07 May 2026 12:56:01 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 12/16] arm64: dts: qcom: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:40 +0100 Message-ID: <20260507125544.2903406-13-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.1+ based CPUs used in a number of Qualcomm SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/qcom/eliza.dtsi | 3 ++- arch/arm64/boot/dts/qcom/hamoa.dtsi | 3 ++- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 3 ++- arch/arm64/boot/dts/qcom/kodiak.dtsi | 3 ++- arch/arm64/boot/dts/qcom/lemans.dtsi | 3 ++- arch/arm64/boot/dts/qcom/milos.dtsi | 1 + arch/arm64/boot/dts/qcom/monaco.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sar2130p.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sdm670.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sdm845.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sdx75.dtsi | 1 + arch/arm64/boot/dts/qcom/sm4450.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm6350.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm6375.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8250.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8450.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8650.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8750.dtsi | 3 ++- arch/arm64/boot/dts/qcom/talos.dtsi | 3 ++- 25 files changed, 48 insertions(+), 23 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom= /eliza.dtsi index 4a7a0ac40ce62..7267e0ec44b2b 100644 --- a/arch/arm64/boot/dts/qcom/eliza.dtsi +++ b/arch/arm64/boot/dts/qcom/eliza.dtsi @@ -1880,6 +1880,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index 051dee0764167..cc638b9162c25 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -8982,7 +8982,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 thermal_zones: thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/= qcom/kaanapali.dtsi index 7cc326aa1a1aa..149275828f1bc 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -6953,7 +6953,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 tpdm-cdsp-llm { diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index 988ca5f7c8a0e..8e0a1ca0125d1 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -7876,6 +7876,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index fe6e763518230..cd9c964e884f3 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -8585,7 +8585,8 @@ arch_timer: timer { interrupts =3D , , , - ; + , + ; }; =20 turing-llm-tpdm { diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom= /milos.dtsi index 4a64a98a434b6..b991124b8ce9f 100644 --- a/arch/arm64/boot/dts/qcom/milos.dtsi +++ b/arch/arm64/boot/dts/qcom/milos.dtsi @@ -3235,6 +3235,7 @@ timer { interrupts =3D , , , + , ; }; }; diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qco= m/monaco.dtsi index 7b1d57460f1e6..38e54b91f0d81 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -8312,6 +8312,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sar2130p.dtsi b/arch/arm64/boot/dts/q= com/sar2130p.dtsi index d65ad0df68652..11ea2330f3ac5 100644 --- a/arch/arm64/boot/dts/qcom/sar2130p.dtsi +++ b/arch/arm64/boot/dts/qcom/sar2130p.dtsi @@ -3165,7 +3165,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qco= m/sc7180.dtsi index a4b17564469ee..25a9235f41b7a 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -4861,6 +4861,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qc= om/sc8180x.dtsi index f45deb188c6c0..10344e682495c 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -4399,6 +4399,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/q= com/sc8280xp.dtsi index 761f229e8f472..e5fc52e6f613e 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -7043,6 +7043,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qco= m/sdm670.dtsi index c195c79c1c85b..f6e6ac4d8abcc 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -604,7 +604,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 soc: soc@0 { diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qco= m/sdm845.dtsi index 4ae8627d6dbc3..9ad4cd36c8927 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -6041,6 +6041,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom= /sdx75.dtsi index d1b61530b562f..b6cdf71051026 100644 --- a/arch/arm64/boot/dts/qcom/sdx75.dtsi +++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi @@ -1583,6 +1583,7 @@ timer { interrupts =3D , , , + , ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qco= m/sm4450.dtsi index 696e2e0841ad9..c7890f5ab8f13 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -681,6 +681,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qco= m/sm6350.dtsi index 034545d2af2d1..a06c1f54e228d 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -3528,6 +3528,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qco= m/sm6375.dtsi index ccf572bb1549b..e89cf4829f10b 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -2472,6 +2472,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index 0e101096209ab..c77fea73eaeee 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -4630,7 +4630,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qco= m/sm8250.dtsi index 7076720413ab2..ad44ab7d89fdb 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -6293,7 +6293,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 thermal-zones { diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index c830953156ec6..63081dcc94aac 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -4542,6 +4542,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 03bf30b53f289..e7a890dc2e57f 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -6327,7 +6327,8 @@ timer { interrupts =3D , , , - ; + , + ; clock-frequency =3D <19200000>; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 912525e9bca6f..4958b653678ae 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -6806,6 +6806,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qco= m/sm8650.dtsi index 1604bc8cff373..24714688b50af 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -8599,6 +8599,7 @@ timer { interrupts =3D , , , - ; + , + ; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qco= m/sm8750.dtsi index 18fb52c14acd7..e9192b806f9f0 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -6796,7 +6796,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 tpdm-cdsp-llm { diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom= /talos.dtsi index ff5afbfce2a47..9b3172e8c5545 100644 --- a/arch/arm64/boot/dts/qcom/talos.dtsi +++ b/arch/arm64/boot/dts/qcom/talos.dtsi @@ -5153,7 +5153,8 @@ arch_timer: timer { interrupts =3D , , , - ; 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Thu, 07 May 2026 12:56:02 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 13/16] arm64: dts: realtek: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:41 +0100 Message-ID: <20260507125544.2903406-14-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of Realtek SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi b/arch/arm64/boot/dts= /realtek/rtd16xx.dtsi index 3a7f6e35b7f74..43b13d133c324 100644 --- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi @@ -105,7 +105,8 @@ timer { interrupts =3D , , , - ; + , + ; }; =20 arm_pmu: pmu { --=20 2.47.3 From nobody Mon Jun 15 09:33:09 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F219F3FA5C9; Thu, 7 May 2026 12:56:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158565; cv=none; b=MBglVSH3H+jb8K+FJrZv9kB/a2P6Xf1tIJssnAEOHCJH1Fz+XsKjB2bTAlfBp192lJoETGz1f3ls5woC36dgLHsPdDM+DqsRWCksYBeCNBXTJHJEaLCuat43JstWfKkcefIOGQwmbcdPgMHa7ZD1SEjhGa2gkdQOWsFvfWA05y8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158565; c=relaxed/simple; bh=fkZMrW6p1fEj7FMV4QtZc65vSfeoK86dRg/bwwIVPxA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aNP/hFe6UUHgYo6XYEKHwptkfKbcR8oPPkCWaD7k2If/d/8mLVRgfa0MTz5gDfeoVandafQ9MO7qc5sj+Bs6bGF2/oQhE3V9iLXfvqnBMBamVEYbxu0aWtoObn+7sEboZJg5xsAIqzAVcup097/egccoyFLId36BmdbYtDk9GbY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=G12jMoK1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="G12jMoK1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7A411C2BCC4; Thu, 7 May 2026 12:56:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158564; bh=fkZMrW6p1fEj7FMV4QtZc65vSfeoK86dRg/bwwIVPxA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=G12jMoK18dep+y7vRZxfUxMqrbEbQHbwgjM7fbtSooaJbrMVGFjUwMF1pVr46s9ts d6xsoVaf6yB936RzYNZ5hkcmsvVKbZNcF9ReoliQAiorsLSvbLE/jdVZ3UtzCedyqJ UxNUhHgoNLwDdu1XrO6K9gnqOuZunTmzGGD091/kjzQi+aPx3HWMeWgAUTvcNIge+V cARY1vSydyckBOc7beHXsTJiiLSIlZb/4sMo9T+CCbD8ja7ByAiG/9j66a9NoiCbv+ ExOU1PuDw7ccMn0tFiyOLwoFf6hsDEBwJ35GgMlAIrHMouYxwk5VaJFEkLRbiZnbh6 IoB7tuzcjAY0g== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGo-00000000d7d-2D0G; Thu, 07 May 2026 12:56:02 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 14/16] arm64: dts: rockchip: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:42 +0100 Message-ID: <20260507125544.2903406-15-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of Rockchip SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier Acked-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk356x-base.dtsi index 64bdd8b7754b5..a5832895bd392 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -195,7 +195,8 @@ timer { interrupts =3D , , , - ; + , + ; arm,no-tick-in-suspend; }; =20 --=20 2.47.3 From nobody Mon Jun 15 09:33:09 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB9033FB7EA; Thu, 7 May 2026 12:56:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158565; cv=none; b=Bk7nxo6BGTFK+t2Qnmx/eEZp9W5KcCyWzlZMwh/CPz7w/aY2oDpVjFAyIqoXU8afOluoO6SYaNDDS+cUmDGeReuDmcx1tGe+pfrX1n2kXwA8TFlTW6//DN/g6+NZa0Qzcy78yHBUzwTsR1+EBUI3rZ7d6zO83ZaVysuDIemZzgo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158565; c=relaxed/simple; bh=SYhI9mJBt1jThfR8leDkHslN2mb7/RuCI4SqdrZLTgs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZCeT7d0wmcmdHrv6LTrM3lih34LEqmO40bl0VGSUC083z4mbAK9wFxgzCikXBU+H/59U3EZ8fu92/HosMx1O4sbKAy2PhH2KAbvIBAzRm5pDZQAYPJkkkEzC6GXunX/m2Bwnu1w6/8+E/PX5bMPBaMkNjUCH3DIpWDSqHTVRTEY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GhTDYUy0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GhTDYUy0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0FA50C2BCB2; Thu, 7 May 2026 12:56:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158565; bh=SYhI9mJBt1jThfR8leDkHslN2mb7/RuCI4SqdrZLTgs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GhTDYUy0LChzu5wk460Wge5SOK0ExlLyUYnYlhPW/woJs8d6kUiQoRDzzXSuiv91o c3NCWdMOXnZjlfKDUVXWitE9/W6I97Vt9Y9wU8PJJx+clBmhiSztezpCRv1xM5ujli CxpF7Vabun9pfNHWQnLJjnBSKQDtWZNxI3hgaOkVaPzxalDZ4HWK6pCN8v74TmojAb khLWxxiPE1z+6pB1gsXdMTuXUCkq4jhCz1b9ibkZ8vnLRB+YgqNVcEUj5CuGu5EijG ebUlou64uatzFUHhSEkYLX4iObiPiVw86xFzZq+L52c5yqk24V4vNuVSsmSmErl0w+ LmUI+QuR7ZxNA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGp-00000000d7d-0Cro; Thu, 07 May 2026 12:56:03 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 15/16] arm64: dts: sprd: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:43 +0100 Message-ID: <20260507125544.2903406-16-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in a number of Unisoc SoCs are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier --- arch/arm64/boot/dts/sprd/sc9863a.dtsi | 3 ++- arch/arm64/boot/dts/sprd/ums512.dtsi | 3 ++- arch/arm64/boot/dts/sprd/ums9620.dtsi | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/sprd/sc9863a.dtsi b/arch/arm64/boot/dts/sp= rd/sc9863a.dtsi index 31799579d7f2e..18e61c25aa36f 100644 --- a/arch/arm64/boot/dts/sprd/sc9863a.dtsi +++ b/arch/arm64/boot/dts/sprd/sc9863a.dtsi @@ -130,7 +130,8 @@ timer { interrupts =3D , /* Physical Secure PPI = */ , /* Physical Non-Secure PPI */ , /* Virtual PPI */ - ; /* Hipervisor PPI */ + , /* Hypervisor physical PPI */ + ; /* Hypervisor virtual PPI */ }; =20 pmu { diff --git a/arch/arm64/boot/dts/sprd/ums512.dtsi b/arch/arm64/boot/dts/spr= d/ums512.dtsi index efa14309cc4ef..4105647aabd17 100644 --- a/arch/arm64/boot/dts/sprd/ums512.dtsi +++ b/arch/arm64/boot/dts/sprd/ums512.dtsi @@ -133,7 +133,8 @@ timer { interrupts =3D , /* Physical Secure PPI = */ , /* Physical Non-Secure PPI */ , /* Virtual PPI */ - ; /* Hipervisor PPI */ + , /* Hypervisor physical PPI */ + ; /* Hypervisor virtual PPI */ }; =20 pmu-a55 { diff --git a/arch/arm64/boot/dts/sprd/ums9620.dtsi b/arch/arm64/boot/dts/sp= rd/ums9620.dtsi index 2458071320c9b..037e3401d4991 100644 --- a/arch/arm64/boot/dts/sprd/ums9620.dtsi +++ b/arch/arm64/boot/dts/sprd/ums9620.dtsi @@ -141,7 +141,8 @@ timer { interrupts =3D , /* Physical Secure PPI = */ , /* Physical Non-Secure PPI */ , /* Virtual PPI */ - ; /* Hipervisor PPI */ + , /* Hypervisor physical PPI */ + ; /* Hypervisor virtual PPI */ }; =20 pmu-a55 { --=20 2.47.3 From nobody Mon Jun 15 09:33:09 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9616C3FCB17; Thu, 7 May 2026 12:56:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158566; cv=none; b=nmjZKXkXGl7IbBAFWxLsXlxk7P56IWbGrjMbameQ8mWB3mV63sP2aAY/oA5TGizhguokJd78ACF7vsNfOuumFRVyTkTWEP9iAb7aSZRzMUKkTzzs66zGRX5rRRp/T89iWNfZPiy35ajQde65c2gwGVTfejXUR7nW89wwVv93OkI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778158566; c=relaxed/simple; bh=ooIRCgQX5OeUGSAo2/xNpQTbZ9wBCKsVHL/Ug1S38FI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BzS4bVaSwdy1d4ui1qoZvQIj26w8Rwj8ck4I7iQDhPhJ/6JvPnH8junbIq9OwJs8ePMvfela/q5gB8PwQHtQzUhm3yUeCHuOKKr2OULkkJFj9CyxtcnM3beYk+xVaQrWZh7nqi0aQ5cjPQVaH3dguJ1k5yDTCJflf50KcSpzuDo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KzFIoyru; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KzFIoyru" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 87710C2BCB8; Thu, 7 May 2026 12:56:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778158565; bh=ooIRCgQX5OeUGSAo2/xNpQTbZ9wBCKsVHL/Ug1S38FI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KzFIoyrug8FgPnGUt1StPWbUHf+Hpwwp4Vzw7KUywhsoFeFL83xkXgdKWwRJuXU77 EPq4L+RTbGVVeN2w/GZFGtB8MbvkPVmmvpDzVn7/heVhOjchuAtzJvSvsCI5x6oRZy 0EFc+72Th74q8PwOvwn7tiD4TPu9PVafm7YOTIfaxGKFl/RCKdExDmFAKIeibDeRV/ 10B2hoVmScyTP8CmaW1IL7oGI8DZoe9kKbERhFA4JOQEDIIvHwf17rBet4LnKIjPrr dIlP8MGjlYF8Q8EktD685BG2N9ikQ1Y3InXYiruUmH8UMJTqVU1moSf+k0sSVrOst3 4C2L1DrJY/xkA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKyGp-00000000d7d-2fbM; Thu, 07 May 2026 12:56:03 +0000 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J. Wysocki" , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Ge Gordon , BST Linux Kernel Upstream Group , Jesper Nilsson , Lars Persson , Alim Akhtar , Ivaylo Ivanov , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Matthias Brugger , AngeloGioacchino Del Regno , Thierry Reding , Jonathan Hunter , Bjorn Andersson , Konrad Dybcio , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Heiko Stuebner , Shawn Lin , Orson Zhai , Baolin Wang , Michal Simek Subject: [PATCH 16/16] arm64: dts: xilinx: Add EL2 virtual timer interrupt Date: Thu, 7 May 2026 13:55:44 +0100 Message-ID: <20260507125544.2903406-17-maz@kernel.org> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260507125544.2903406-1-maz@kernel.org> References: <20260507125544.2903406-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lpieralisi@kernel.org, guohanjun@huawei.com, sudeep.holla@kernel.org, catalin.marinas@arm.com, will@kernel.org, rafael@kernel.org, mark.rutland@arm.com, daniel.lezcano@kernel.org, tglx@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, wens@kernel.org, jernej.skrabec@gmail.com, samuel@sholland.org, neil.armstrong@linaro.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, gordon.ge@bst.ai, bst-upstream@bstai.top, jesper.nilsson@axis.com, lars.persson@axis.com, alim.akhtar@samsung.com, ivo.ivanov.ivanov1@gmail.com, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, dinguyen@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, thierry.reding@kernel.org, jonathanh@nvidia.com, andersson@kernel.org, konradybcio@kernel.org, afaerber@suse.de, heiko@sntech.de, shawn.lin@rock-chips.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, michal.simek@amd.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" The ARMv8.2 based CPUs used in the versal SoC are missing the EL2 virtual timer interrupt. Add it. Signed-off-by: Marc Zyngier Acked-by: Michal Simek --- arch/arm64/boot/dts/xilinx/versal-net.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/xilinx/versal-net.dtsi b/arch/arm64/boot/d= ts/xilinx/versal-net.dtsi index 15f767608e67f..0aac93675ad77 100644 --- a/arch/arm64/boot/dts/xilinx/versal-net.dtsi +++ b/arch/arm64/boot/dts/xilinx/versal-net.dtsi @@ -728,7 +728,8 @@ fpga: fpga-region { =20 timer: timer { compatible =3D "arm,armv8-timer"; - interrupts =3D <1 13 4>, <1 14 4>, <1 11 4>, <1 10 4>; + interrupts =3D <1 13 4>, <1 14 4>, <1 11 4>, <1 10 4>, + <1 12 4>; }; =20 versal_fpga: versal-fpga { --=20 2.47.3