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Thu, 07 May 2026 01:07:38 -0700 (PDT) Received: from hu-mojha-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-365b0560fa8sm1986094a91.1.2026.05.07.01.07.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:07:38 -0700 (PDT) From: Mukesh Ojha To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Robert Marko , Guru Das Srinagesh Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mukesh Ojha , Konrad Dybcio Subject: [PATCH 1/4] dt-bindings: firmware: qcom,scm: Add minidump SRAM property Date: Thu, 7 May 2026 13:37:17 +0530 Message-ID: <20260507080727.3227367-2-mukesh.ojha@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260507080727.3227367-1-mukesh.ojha@oss.qualcomm.com> References: <20260507080727.3227367-1-mukesh.ojha@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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Before DDR is initialised on the warm reset following a crash, firmware reads this word to decide if minidump is enabled and collect a minidump and where to deliver it (USB upload to a host, or save to local storage). Add 'sram' and 'sram-names' properties to the SCM binding to describe a region in always-on SRAM where the minidump download destination value could be written. Boot firmware reads it before DDR is initialised on a warm reset to decide where to store the minidump either to host PC or to on device storage. Most of the Qualcomm SoC supporting minidump supports this, added the kaanapali SoC for now. Suggested-by: Konrad Dybcio Signed-off-by: Mukesh Ojha Suggested-by would be fitting if I said "hey Mukesh, could you please --- .../bindings/firmware/qcom,scm.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Doc= umentation/devicetree/bindings/firmware/qcom,scm.yaml index 7918d31f58b4..6813081fd74a 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -127,6 +127,22 @@ properties: - description: offset of the download mode control register description: TCSR hardware block =20 + sram: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandle to a region in always-on SRAM used to store the download + mode value for boot firmware to read before DDR is initialised on + the next warm reset. + maxItems: 1 + + sram-names: + items: + - const: minidump + +dependencies: + sram: [ sram-names ] + sram-names: [ sram ] + allOf: # Clocks - if: @@ -229,6 +245,18 @@ allOf: properties: memory-region: false =20 + - if: + not: + properties: + compatible: + contains: + enum: + - qcom,scm-kaanapali + then: + properties: + sram: false + sram-names: false + required: - compatible =20 @@ -247,3 +275,32 @@ examples: clock-names =3D "core", "bus", "iface"; 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charset="utf-8" Replace the bare `return ret` after qcom_scm_find_dload_address() with dev_err_probe() to produce a consistent, deferred-probe-aware error message when the download-mode address cannot be resolved. Signed-off-by: Mukesh Ojha Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Suggested-by: Konrad Dybcio --- drivers/firmware/qcom/qcom_scm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index d9ee180388aa..f65b132004a5 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -2762,7 +2762,8 @@ static int qcom_scm_probe(struct platform_device *pde= v) scm->dev =3D &pdev->dev; ret =3D qcom_scm_find_dload_address(&pdev->dev, &scm->dload_mode_addr); if (ret < 0) - return ret; + return dev_err_probe(&pdev->dev, ret, + "Failed to find download mode address\n"); =20 mutex_init(&scm->scm_bw_lock); =20 --=20 2.53.0 From nobody Sat Jun 13 13:06:34 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E05A33B6F8 for ; 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charset="utf-8" On most Qualcomm SoCs where minidump is supported, a word in always-on SRAM is shared between the kernel and boot firmware. Before DDR is initialised on the warm reset following a crash, firmware reads this word to decide if minidump is enabled and collect a minidump and where to deliver it (USB upload to a host, or save to local storage). The SRAM region is described by a 'sram'/'sram-names' phandle pair on the SCM DT node. If the property is absent the feature is silently disabled, keeping existing SoCs unaffected. Expose a 'minidump_dest' module parameter (default: usb) so the user can select the destination. Only the string names "usb" or "storage" are accepted; an invalid value is rejected with -EINVAL. Changing the destination while minidump mode is already active updates SRAM immediately. Suggested-by: Konrad Dybcio Signed-off-by: Mukesh Ojha --- drivers/firmware/qcom/qcom_scm.c | 95 ++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index f65b132004a5..b57f8cce7a8c 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -57,6 +57,7 @@ struct qcom_scm { int scm_vote_count; =20 u64 dload_mode_addr; + void __iomem *minidump_sram; =20 struct qcom_tzmem_pool *mempool; unsigned int wq_cnt; @@ -141,6 +142,18 @@ static const u8 qcom_scm_cpu_warm_bits[QCOM_SCM_BOOT_M= AX_CPUS] =3D { #define QCOM_DLOAD_MINIDUMP 2 #define QCOM_DLOAD_BOTHDUMP 3 =20 +/* Minidump destination values written to always-on SRAM for boot firmware= */ +#define QCOM_MINIDUMP_DEST_USB 0x0 +#define QCOM_MINIDUMP_DEST_STORAGE 0x2 + +static u32 minidump_dest =3D QCOM_MINIDUMP_DEST_USB; + +static const char * const minidump_dest_name[] =3D { "usb", "storage" }; +static const u32 minidump_dest_val[] =3D { + QCOM_MINIDUMP_DEST_USB, + QCOM_MINIDUMP_DEST_STORAGE, +}; + #define QCOM_SCM_DEFAULT_WAITQ_COUNT 1 =20 static const char * const qcom_scm_convention_names[] =3D { @@ -568,6 +581,17 @@ static void qcom_scm_set_download_mode(u32 dload_mode) =20 if (ret) dev_err(__scm->dev, "failed to set download mode: %d\n", ret); + + /* + * Mirror the destination into the always-on SRAM so boot firmware + * can read it before DDR is initialised on the next warm reset. + * Only written when minidump is active; skip if SRAM already holds + * the requested destination to avoid unnecessary writes. + */ + if (__scm->minidump_sram && (dload_mode & QCOM_DLOAD_MINIDUMP)) { + if (readl_relaxed(__scm->minidump_sram) !=3D minidump_dest) + writel_relaxed(minidump_dest, __scm->minidump_sram); + } } =20 /** @@ -2055,6 +2079,37 @@ int qcom_scm_gpu_init_regs(u32 gpu_req) } EXPORT_SYMBOL_GPL(qcom_scm_gpu_init_regs); =20 +static int qcom_scm_map_minidump_sram(struct device *dev, void __iomem **o= ut) +{ + struct device_node *np =3D dev->of_node; + struct device_node *sram_np; + struct resource res; + int ret; + + if (of_property_match_string(np, "sram-names", "minidump") < 0) + return 0; + + sram_np =3D of_parse_phandle(np, "sram", 0); + if (!sram_np) + return -EINVAL; + + ret =3D of_address_to_resource(sram_np, 0, &res); + of_node_put(sram_np); + if (ret) + return ret; + + if (resource_size(&res) < sizeof(u32)) { + dev_err(dev, "minidump SRAM region too small\n"); + return -EINVAL; + } + + *out =3D devm_ioremap(dev, res.start, resource_size(&res)); + if (!*out) + return -ENOMEM; + + return 0; +} + static int qcom_scm_find_dload_address(struct device *dev, u64 *addr) { struct device_node *tcsr; @@ -2748,6 +2803,41 @@ static const struct kernel_param_ops download_mode_p= aram_ops =3D { module_param_cb(download_mode, &download_mode_param_ops, NULL, 0644); MODULE_PARM_DESC(download_mode, "download mode: off/0/N for no dump mode, = full/on/1/Y for full dump mode, mini for minidump mode and full,mini for bo= th full and minidump mode together are acceptable values"); =20 +static int get_minidump_dest(char *buffer, const struct kernel_param *kp) +{ + int i; + + for (i =3D 0; i < ARRAY_SIZE(minidump_dest_val); i++) + if (minidump_dest =3D=3D minidump_dest_val[i]) + return sysfs_emit(buffer, "%s\n", minidump_dest_name[i]); + + return sysfs_emit(buffer, "unknown\n"); +} + +static int set_minidump_dest(const char *val, const struct kernel_param *k= p) +{ + int i; + + i =3D sysfs_match_string(minidump_dest_name, val); + if (i < 0) + return -EINVAL; + + minidump_dest =3D minidump_dest_val[i]; + if (__scm && __scm->minidump_sram && (download_mode & QCOM_DLOAD_MINIDUMP= ) && + readl_relaxed(__scm->minidump_sram) !=3D minidump_dest) + writel_relaxed(minidump_dest, __scm->minidump_sram); + + return 0; +} + +static const struct kernel_param_ops minidump_dest_param_ops =3D { + .get =3D get_minidump_dest, + .set =3D set_minidump_dest, +}; + +module_param_cb(minidump_dest, &minidump_dest_param_ops, NULL, 0644); +MODULE_PARM_DESC(minidump_dest, "Minidump SRAM destination: usb (default) = or storage"); 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charset="utf-8" Wire up the minidump destination word in the kaanapali always-on SRAM to the SCM node. It is used for destination place for collection of minidump whether it is via USB to the host PC or to on device storage. Signed-off-by: Mukesh Ojha Suggested-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/= qcom/kaanapali.dtsi index 7cc326aa1a1a..06d6da6877f9 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -224,6 +224,8 @@ scm: scm { qcom,dload-mode =3D <&tcsr 0x19000>; interconnects =3D <&aggre_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + sram =3D <&minidump_config>; + sram-names =3D "minidump"; }; =20 scmi: scmi { @@ -5294,6 +5296,10 @@ sram@14680000 { #address-cells =3D <1>; #size-cells =3D <1>; =20 + minidump_config: minidump-config@1c { + reg =3D <0x1c 0x4>; + }; + pil-sram@94c { compatible =3D "qcom,pil-reloc-info"; reg =3D <0x94c 0xc8>; --=20 2.53.0