From nobody Sat Jun 13 13:03:25 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D98C3B8D75 for ; Thu, 7 May 2026 09:01:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778144513; cv=none; b=qOZFhG2W75gAK/MpncVai5uzIB/tof81enkr+yH5A7flxLPNB6hePeCQlT2IV2YCM8bTzGS31LHc7rHgb+tNLa8xugJm6hAuyoQIW8qCiQ9PRPqtf9h+016GaBwjC2ssnEEIjDri/YFFYidQFqYB21MGrrBKjzyctFiFfpqDd8Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778144513; c=relaxed/simple; bh=w48Zy9gh5QY1c+XBDez5fRMIM+TtMcaQ5hJ5uAZ3v3w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cSbWiBMvMKPwzhop+4uSO3atAvrvEL4zgv+RwGm8Gy5et6bAQGO0/jCbh+Yn/rDIPUiVrMGBijn/AG6b2N38A5ZzSvztCvoF99TXRUFI7R5wDTN+2XS0EsYD57izD7tEBiwWWk3lNKj9HuDa08+UYheACjE5PuJCt1KqZRUK8so= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=nbONzyc7; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=Ujf/UYrf; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="nbONzyc7"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="Ujf/UYrf" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6475IMfq3924278 for ; Thu, 7 May 2026 09:01:45 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= cRa6k2yGNWTv2u39mO+7rvnN9ZODp7GRurjicrpgf9w=; b=nbONzyc7Dl1xsX65 raPyO7Bz2IFfjkNwR28WjPYmvQgkmo+qIxOfg/K8NEIr7YYkc6vD3Sc45qpVo9Qs hUylzDXmpM7Wyn7964ddUzOzQNpd2Cx+DnJkL/Udxda0rDEZBqmSpd7Ar8SeY5sa uvIdtiOC5y3aGkQj4WodVIVdGzvOGNxKIfGLrregX0nnmnaaGEQKlYxTOtqCg4DW dO2SseyCfJ+rMgyDvhON/iFeQB9WvS8oLBcg2ezuAO+rGIdsOgqN7VV82D84sPrV 5iBeaXUSRFE1qOeHpe/mwSX7eomkP93YZqZaYTVNuihchgRQEr6jv+uSX3QMOWYl TErgiw== Received: from mail-oo1-f69.google.com (mail-oo1-f69.google.com [209.85.161.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4e0c88abqd-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 07 May 2026 09:01:45 +0000 (GMT) Received: by mail-oo1-f69.google.com with SMTP id 006d021491bc7-6949742b3ebso1163749eaf.3 for ; Thu, 07 May 2026 02:01:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1778144505; x=1778749305; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=cRa6k2yGNWTv2u39mO+7rvnN9ZODp7GRurjicrpgf9w=; b=Ujf/UYrfnsVE6jKzdS/lNeRsgqiWv+uwmUXHdvkuDocCSWpQT+ug3v584UARqi7CUl kockesTxUBc93IOn3M7VOpOhjY+nQKzTfHWiHO15Ied30SoaQwCvUH7XVIfH4itQFPr1 DXukEWomlwHIafIK3KSU0NwSF7uLbs003ZxjUgymZ6G2gFVoHpvM3y7BDmwdc1fJeTmC mJ/rvFKQiJlgCVPmy9UB0b7Qo/mkOb4HrRsPhCuCZVvL3V9SmEF6oc3V3/PlcKqEYjsS 2Um+PDM1MaCcsjxekvf+jwQbWNHrj2Ans4cMbaSWl02fXebRiPTJ9bC3nPNoICB02RIV MU8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144505; x=1778749305; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=cRa6k2yGNWTv2u39mO+7rvnN9ZODp7GRurjicrpgf9w=; b=or5a1Vu+ZbHB8qk3S8l2+Mr9Yk294NLb2jff3yN+iCqKoJpw6UkUgrnRWgyQBZWoHk aPnkc21ZWgRh0WYwj6QZR5NlxmKRAaWjJERuIoMoTJhPzHdQZC2ZIBRPSREuDSUffGQM QB32EfM7M9Ly/PX2JJytG21Fsc37lhhzNgadoWnxad5xJ9iQivkkKfGTxDYw4kHO+IL0 Ub6wjHEkDF1zNTXttr18xtK1Cwm71my5n7vj8fsclSWFcNx9QWLIvPMsnpJypiHdd8DG 9BgNkOQmD4SyNo8Wpf1LEwCUPKPKPHxO6nSXftCWQk8OMqDtvzLuVXSpFFG2j2bSrd/T HNlA== X-Forwarded-Encrypted: i=1; AFNElJ/23K497z46X/tCAPBqF19IwDRP9+5323kB/RZ2295j7xzpOx16uJUh3nhwy6g/DEmDHfaHOyNUQk536QQ=@vger.kernel.org X-Gm-Message-State: AOJu0YxzTTnFSj+QNOPFlt9gT9J2pWsPW18VMvj+YXuLSxQXnWH+r/Jl hgAoszsUnD+N9lGqcA1JscDTk6HS3ne8EqnOJNPgOacz5lFSc9N/ivUh+52AxNA1qWr1vUrG+04 T6LJOR4++eF4OHdGH+REmWBbW+F4JIB9/neJJdbF1aNK/FHu2mOwQjsgJBenCK60SuU4= X-Gm-Gg: AeBDiethDIG2DmBMXUktVTFgEbFhzS+rV2A6l8HgVNobyKQSrwvPsLnRIynskDoKXwH 8t1j55kKLFRwcm/+Bh+NpP/HJw1OsSeItFXJ7kafg4NEtL/0XmQle1LwvTXqUIdbbYxKk8VTtIT m/c8Aq7gixgKuhdbyLf0vN92XNprv5k34h2vKTzPNoRE+a1wUFUwu053lS/e8VOLsjsgn8oRC21 m3nZeUO7w0t3pIXhzi9oilznAw0j8uUMpPl3l+gmynBWWBfmy6qZD8OvS4R2TsXwaXIPI8fj1B0 s2hemLoA+vZBqM6m/WVOT8z4vzG5KZ4UXPrCzVxr68VHFNmSlTX49t/m1S7nBRXvvcCX/R+rECx DZ5Eqt08sC8+QypvRRZuDSb9ChHLdZnaqew6Byfuzhi8F7m0ZjB2ywz7JYfMLtQEmHdlVGZAvA8 6Wwnr5q25mpngyqL2YaX7QNci4xKpKz+xjJ7hn4YvuoapWGcswCn2by5xC X-Received: by 2002:a05:6820:1352:b0:696:2cb1:a019 with SMTP id 006d021491bc7-69998d0fc71mr3582176eaf.28.1778144504712; Thu, 07 May 2026 02:01:44 -0700 (PDT) X-Received: by 2002:a05:6820:1352:b0:696:2cb1:a019 with SMTP id 006d021491bc7-69998d0fc71mr3582151eaf.28.1778144504236; Thu, 07 May 2026 02:01:44 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a870f96cb1sm3480516e87.22.2026.05.07.02.01.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 02:01:42 -0700 (PDT) From: Dmitry Baryshkov Date: Thu, 07 May 2026 12:01:32 +0300 Subject: [PATCH v5 1/2] dt-bindings: gpio: describe Waveshare GPIO controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260507-waveshare-dsi-touch-v5-1-d2ac7ccc22d4@oss.qualcomm.com> References: <20260507-waveshare-dsi-touch-v5-0-d2ac7ccc22d4@oss.qualcomm.com> In-Reply-To: <20260507-waveshare-dsi-touch-v5-0-d2ac7ccc22d4@oss.qualcomm.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Cong Yang , Ondrej Jirman , Javier Martinez Canillas , Jagan Teki , Liam Girdwood , Mark Brown , Linus Walleij , Bartosz Golaszewski , Jie Gan Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Conor Dooley X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2894; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=w48Zy9gh5QY1c+XBDez5fRMIM+TtMcaQ5hJ5uAZ3v3w=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBp/FTuy7mfOfX5kl07Us/qpiAyzHwTLGyx9ydu7 NTUppEPARqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCafxU7gAKCRCLPIo+Aiko 1fdWB/wPpnOVm0D7aCjD77DcG2BIksrTgqtu9mc4m1QefgIzAtXub3PGmjaGDderabja1f83ALp zo8EPN+tQ0rC+z0iODQc5GXSI9+tts3VhNMtFdsA6RD+zIy8TQhbOH+UQPKrih7HfahBpuOtaJu QLSuBephxSEjUKCXAKnVBk+XLwW2Z3qrr2hn0OcHcSftvkMCWOaaRnMADPaO3zOK3C+4h5QZp81 DxAPUVe2/UnLBw5mbDUVNd1tzbOqwRCv/12pRB1/CZ6/QHVEaP8JaYAgTYdGYl4t3GXiuIAf1Yv fVOpqEJXCR9qr1WOCaratjm5n3XioAimdHG3GVbfk2gwfd0d X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-ORIG-GUID: gOPGHKFn5FUoec03lnljRzi1uSTSkEiY X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA3MDA4OSBTYWx0ZWRfX+hg9Dyl3S3Mh 3hxER6i3Jx1pI2AMM4ABR6viDIF772KE2GItjzgMXWftu57TiifTaWi67vSUwXrdF//7V/3auqZ iVDNVLLApNcJopB9EOKeA1gnmj/xDpaL4ghlMAPn/KV3hs1Stt1GlzqFjN8yv+BmVL4wE/oF1HQ wZ5SRjtWCRBe4KhxvqM8Jr9EFueF2cd75Aid3+K21kauCoIKwH/m8QVqV0lwsWZVl17oVfbITaB hpi6Hljo7/Ha+A7w30unOIxNVVDhAEZjypSRXSJC5fg6Kky2NrL+Clj3h/9zuEKDbbeQqdWKjz9 gAC3IwMUuHnVVn2vg+MjSeeS6b3sw520e2x13wngG/w6LyCVal8a07B48VBJmcQkoBj+I5GFuj6 2BcKCipOPHHXvJHiWtErweO4K4dluFVjRiRyw7GAJ4mSuv9drdsWmAqEuXIkdvJZc/lUywN2vjE L6lX+HHMuiAZq4KLo+g== X-Proofpoint-GUID: gOPGHKFn5FUoec03lnljRzi1uSTSkEiY X-Authority-Analysis: v=2.4 cv=X8Zi7mTe c=1 sm=1 tr=0 ts=69fc54f9 cx=c_pps a=lVi5GcDxkcJcfCmEjVJoaw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=gEfo2CItAAAA:8 a=XYAwZIGsAAAA:8 a=EUspDBNiAAAA:8 a=btNYDYKGUqI20VIe7WUA:9 a=QEXdDO2ut3YA:10 a=rBiNkAWo9uy_4UTK5NWh:22 a=sptkURWiP4Gy88Gu7hUp:22 a=E8ToXWR_bxluHZ7gmE-Z:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-06_02,2026-05-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 spamscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 priorityscore=1501 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605070089 The Waveshare DSI TOUCH family of panels has separate on-board GPIO controller, which controls power supplies to the panel and the touch screen and provides reset pins for both the panel and the touchscreen. Also it provides a simple PWM controller for panel backlight. Add bindings for these GPIO controllers. As overall integration might be not very obvious (and it differs significantly from the bindings used by the original drivers), provide complete example with the on-board regulators and the DSI panel. Acked-by: Conor Dooley Signed-off-by: Dmitry Baryshkov --- .../bindings/gpio/waveshare,dsi-touch-gpio.yaml | 73 ++++++++++++++++++= ++++ 1 file changed, 73 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/waveshare,dsi-touch-gpi= o.yaml b/Documentation/devicetree/bindings/gpio/waveshare,dsi-touch-gpio.ya= ml new file mode 100644 index 000000000000..091e1fffcd47 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/waveshare,dsi-touch-gpio.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/waveshare,dsi-touch-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Waveshare GPIO controller on DSI TOUCH panels + +maintainers: + - Dmitry Baryshkov + +description: + Waveshare DSI TOUCH panel kits contain separate GPIO controller for togg= ling + power supplies and panel / touchscreen resets. + +properties: + compatible: + const: waveshare,dsi-touch-gpio + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + wsgpio: gpio@45 { + compatible =3D "waveshare,dsi-touch-gpio"; + reg =3D <0x45>; + gpio-controller; + #gpio-cells =3D <2>; + }; + }; + + panel_avdd: regulator-panel-avdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "panel-avdd"; + gpios =3D <&wsgpio 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + panel_iovcc: regulator-panel-iovcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "panel-iovcc"; + gpios =3D <&wsgpio 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + panel_vcc: regulator-panel-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "panel-vcc"; + gpios =3D <&wsgpio 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; +... --=20 2.47.3 From nobody Sat Jun 13 13:03:25 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20BCA3A257C for ; Thu, 7 May 2026 09:01:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778144517; cv=none; b=O5x1KvX8D77YNQVFMUcQmfdo1lU8d8CTpPwS1cmMet6wMcqOTF01niDXeufV8ZIPLHuNlEtsBtfVVat3ltfbjmxoGoAKlj3x8NdLT7jOs3sEWja6cczOjOAh7S1ILwWtFXvDWPsk4p7mNcbASNINxJBolqTJ88mjBW8cf1WnAaA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778144517; c=relaxed/simple; bh=KKME6iYlsGtIRkbeCWgSysWc/SsTcPMTPytNfArf9VU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LrUTESvVcA/aXDjMpkKkwWAludD2+39yP8qekI/o500RJ9WjYr5oefF+OFnjQJjFINRsYJqdSjqQyhCTtOMPQLSpdcCHQzCPJ6kmYD1AY41oXBMJGidKFoBnxax9XDKuLBzb/0O8wwclHLaeioJ71cVQnuKJHHuWikBXaKT6++k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=hcXndHCE; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=VZ7dlDdo; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="hcXndHCE"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="VZ7dlDdo" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6475wST01926210 for ; Thu, 7 May 2026 09:01:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= BdeZ22yc5lNb0lR3mUu0n4xdAdKcxqKN4LRfXkSTI9o=; b=hcXndHCEpLoUoI9D uAhPq4aMJmU9tlVeOs9WdGK74K6/slb7Vvqzxok9GVtrZSJfAO9GLDk1Y9tUWZYP 1d9BCKweQutn3busPS3OcJjZ2JeC0mxP6NMeVyK5SJWqJmNHP/+7+4rnrBt2rRTz 2Fvj9HSvfGqGqpnyWydgzLoB02ovQym6CI2fcCZHMZkOQY3V0me40mzzOaMJu6mq 1Ie3muRCUQ9UL/OWKZDic7JqkIo2wTtZpaY6lufp2iJHzJv6A7YipvZY3Gx4cnUA S09McgGb55SId9eT/8gA6GASa0CYIxHXgZkDS+UNWPAShw+24ulBaPD4ZV+or98O +rsCAw== Received: from mail-oo1-f71.google.com (mail-oo1-f71.google.com [209.85.161.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4e0n2g8pp7-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 07 May 2026 09:01:47 +0000 (GMT) Received: by mail-oo1-f71.google.com with SMTP id 006d021491bc7-6947f168159so1282996eaf.2 for ; Thu, 07 May 2026 02:01:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1778144507; x=1778749307; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=BdeZ22yc5lNb0lR3mUu0n4xdAdKcxqKN4LRfXkSTI9o=; b=VZ7dlDdoFZz1CnyJ5v6/RrYui0lCrNonJkImasmfoZvcZ31XUQsxKyIbmHL0x4ltAJ VTm6Csuk+6X+PHy4rqo8/5EjqIHlWr+XNEPXRI9QI3hJBu5/2cVuNZ+XDe5fHw1uaz19 jJvNgMMebzva5lR+Bc2V1ZT+hQkTwMq/yTE6njvRPWiUlsPEAwDP/36rWXqA7iV+lyQW +qY+twPKjQEbQ13hwEcHSvn4mk+Usp4TzItOIpEDCaAh41IIfNIttmyFY8AVScrlCOcD pV0Wb5Yl9ARKeg47j7GeonVmlVO2hkCAOzT02G/P7k5tptSPKhuvmYAS57+ioxskgXAW yjnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144507; x=1778749307; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=BdeZ22yc5lNb0lR3mUu0n4xdAdKcxqKN4LRfXkSTI9o=; b=UQTuM7XEjCTQRw+fNz3e5XV9DTmLN1qEFhmE/0Y5FpmEQmt6uDnrAw5376UXvsjoB2 iPhieqL6oe/J/bzMiZ8btS7fN++X+lHD2Bu9mEAFyZAmIew6gjjE4Rw3AoVkonzoo/ST RzdT7GnKTqDbC63bYRSwlQwY5PTKlpN/cEjYy6rwqWsPwZoG+KzZJq9KgVOgGlv1xbel 2WjA+1p4hBmFpVv8Wj0t6kYEaKxlyoM1AqRP/NaBcvLq05aLFYp79vCj1d/MkQR6Q9VM i4p5UujXWCPaIHbuMCArr5SsUz7ptXAYOqkUY51IwdE+dvl1tYNsCReRI7Eyuie6CEGq Rr9g== X-Forwarded-Encrypted: i=1; AFNElJ+/qNaXeZMnQ2QfAe+A8aqg0M1gcdD65/X5nl5C99rapIfkmADt/31sT3MLclP9kkLhrrTDAP9B/LM9i7U=@vger.kernel.org X-Gm-Message-State: AOJu0YxAo03q83wjooHE0I6E7akBW33MrcKCjUQQW/lPGWI11dGwif70 yeMT5n8FBDRS1en97yeldAoXQp+dyGwAev1HOLCs1Wi0gA88bxNCyqCFfvDuAFvAmmcH+zyO6wa J4NgBXyTyZoEg7xFsIhoOkKznkEatxMsRXsW+xErR35P0Lp7JK/par6g8mnm7ahbCkck= X-Gm-Gg: AeBDietn79ikgA3JpOCSwGM+x9r9MiVwWDLk2nXQRPLfM5pyUGLFV5DBCbMdZXZ2Kd1 ekjl2xW9vUtvnMDBlNix8rq/oxTA8AgvR4x5eCynAf7QJz/77vfl48PCQvRF9dau9pPL15wz/JD LduzL1uGyLKTRBG1HaIfSaDXJ1gH0vvSGb6GCGwAg0iAFjnVyFzKMFs/FDM5jQh//gvykhBWMMK zv8xciNDBUGqfFlIxsHf1phsmc7efX8fE3e7BAUAynQAUCS9Nb+Rv8Lljpc8s8Ptli8wORAkZmU QIKDDsfWPiqc2E0RCuC2uRCBYySMaG5i0140ffQpUCiWn1p7UogOrmvj3NkYCFw05Bl4VzWIHn+ XpuA4olPeU4ayRfZbbD6xMTTAliQ+hV6rzhUhoKFYEz1AM9A77mVlln3y4b4j3pxmpuleVsO5VA cfICXBQ23tt3isJeH5uoIN3hbuN3hEMPlL+XRXi5b3o4qPJA== X-Received: by 2002:a05:6820:160c:b0:696:924d:2fe5 with SMTP id 006d021491bc7-69998d30716mr3943908eaf.51.1778144506487; Thu, 07 May 2026 02:01:46 -0700 (PDT) X-Received: by 2002:a05:6820:160c:b0:696:924d:2fe5 with SMTP id 006d021491bc7-69998d30716mr3943878eaf.51.1778144505963; Thu, 07 May 2026 02:01:45 -0700 (PDT) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a870f96cb1sm3480516e87.22.2026.05.07.02.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 02:01:44 -0700 (PDT) From: Dmitry Baryshkov Date: Thu, 07 May 2026 12:01:33 +0300 Subject: [PATCH v5 2/2] gpio: add GPIO controller found on Waveshare DSI TOUCH panels Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260507-waveshare-dsi-touch-v5-2-d2ac7ccc22d4@oss.qualcomm.com> References: <20260507-waveshare-dsi-touch-v5-0-d2ac7ccc22d4@oss.qualcomm.com> In-Reply-To: <20260507-waveshare-dsi-touch-v5-0-d2ac7ccc22d4@oss.qualcomm.com> To: Neil Armstrong , Jessica Zhang , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Cong Yang , Ondrej Jirman , Javier Martinez Canillas , Jagan Teki , Liam Girdwood , Mark Brown , Linus Walleij , Bartosz Golaszewski , Jie Gan Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Riccardo Mereu X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=7772; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=KKME6iYlsGtIRkbeCWgSysWc/SsTcPMTPytNfArf9VU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBp/FTv507N2zMjhKuukBTJZaa24cJ52RhkWf8FC R3Xr3WCMUqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCafxU7wAKCRCLPIo+Aiko 1TMICACcfSSppOas5sNdyuHnJaTnorQ4H4K6p9AZctZ3mtr9uNvuMqNmQoNMQRwx5CZ6HyuJAI5 T7pZpxp+e0HT8uhMMb6kWtDcwX96R/x86fZcoEI9OKfwKdcO5Blq1W0wglbBzus8AgSKiymzxGX mg+Js05+m5YJ6RoDGSZrf6E1aD/G3F+LWT7s1Nvp3hAoqJmwG0qAr7D3MX9iiHvVdk45VZxlxXf GWr/o5mphMoKl20Zw2j79LgOkaSDIa3+n9r9Z8VwjDQqACCubq1OmhA7CY6vrGvdDnrkYKBvcQw Qb0rEi5p1zkofCg6tWMlYI/r5SJXVJhoZRk/dvhW4NSto+A3 X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=Wv4b99fv c=1 sm=1 tr=0 ts=69fc54fb cx=c_pps a=V4L7fE8DliODT/OoDI2WOg==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=BBJQNc9AFPM2Ar9AcygA:9 a=QEXdDO2ut3YA:10 a=WZGXeFmKUf7gPmL3hEjn:22 X-Proofpoint-ORIG-GUID: ukDxcriSJMqh23QgdPyD9WUVO7hAIEid X-Proofpoint-GUID: ukDxcriSJMqh23QgdPyD9WUVO7hAIEid X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA3MDA4OSBTYWx0ZWRfX4wHDPYMihKfm Qxj9yYT6bDl+r2nQC9p0iMV6WdFIwdAEmK9hV/9QcMVTBBELLXkei4GWPDvaBTas3s4ZZh5nZXb 37wJMwE7ksnzEklWacyle+LfrXgx3LIyoRs4buuirHwsETiidQ9hadccFGWpRedKN1IXNjfjgYD tpUV4gs8ZsILQ6oiEbzJPhIjZYu5K+r20BZ10itAz4yoA2ag3kRwQEkSfZjPCeeAh58cvl+xL39 kZjwOfsEUpwOxFbjI+tFSrwt3SC8zUyyswebMI8qXARvxOgd7oACpLYLi2LqXNsSFl0ldgBwzqk vkXzGAeD1wM7MJs/bSUVNlGium/+i1evdEhzI6EOiUO0yNxaT5Z/6vx5PimxkqOVZZl9aVVImgm dDa58aBdg7HzVcwWtk5EbW0pcb42BFwMgH7hDSFfNJeD00zgEXquFjQ+PIsrrPmZ87lBBHUJZem Dmzm3aIiNIpOIEYlzrQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-06_02,2026-05-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 impostorscore=0 spamscore=0 phishscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605070089 The Waveshare DSI TOUCH family of panels has separate on-board GPIO controller, which controls power supplies to the panel and the touch screen and provides reset pins for both the panel and the touchscreen. Also it provides a simple PWM controller for panel backlight. Add support for this GPIO controller. Tested-by: Riccardo Mereu Reviewed-by: Linus Walleij Signed-off-by: Dmitry Baryshkov --- drivers/gpio/Kconfig | 10 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-waveshare-dsi.c | 208 ++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 219 insertions(+) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ce95a25298a8..8ae6a423da6d 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -806,6 +806,16 @@ config GPIO_VISCONTI help Say yes here to support GPIO on Tohisba Visconti. =20 +config GPIO_WAVESHARE_DSI_TOUCH + tristate "Waveshare GPIO controller for DSI panels" + depends on BACKLIGHT_CLASS_DEVICE + depends on I2C + select REGMAP_I2C + help + Enable support for the GPIO and PWM controller found on Waveshare DSI + TOUCH panel kits. It provides GPIOs (used for regulator control and + resets) and backlight support. + config GPIO_WCD934X tristate "Qualcomm WCD9340/WCD9341 GPIO controller driver" depends on MFD_WCD934X diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index b267598b517d..2ea47d9d3dca 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -205,6 +205,7 @@ obj-$(CONFIG_GPIO_VIRTUSER) +=3D gpio-virtuser.o obj-$(CONFIG_GPIO_VIRTIO) +=3D gpio-virtio.o obj-$(CONFIG_GPIO_VISCONTI) +=3D gpio-visconti.o obj-$(CONFIG_GPIO_VX855) +=3D gpio-vx855.o +obj-$(CONFIG_GPIO_WAVESHARE_DSI_TOUCH) +=3D gpio-waveshare-dsi.o obj-$(CONFIG_GPIO_WCD934X) +=3D gpio-wcd934x.o obj-$(CONFIG_GPIO_WHISKEY_COVE) +=3D gpio-wcove.o obj-$(CONFIG_GPIO_WINBOND) +=3D gpio-winbond.o diff --git a/drivers/gpio/gpio-waveshare-dsi.c b/drivers/gpio/gpio-waveshar= e-dsi.c new file mode 100644 index 000000000000..38f52351bb58 --- /dev/null +++ b/drivers/gpio/gpio-waveshare-dsi.c @@ -0,0 +1,208 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024 Waveshare International Limited + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* I2C registers of the microcontroller. */ +#define REG_TP 0x94 +#define REG_LCD 0x95 +#define REG_PWM 0x96 +#define REG_SIZE 0x97 +#define REG_ID 0x98 +#define REG_VERSION 0x99 + +enum { + GPIO_AVDD =3D 0, + GPIO_PANEL_RESET =3D 1, + GPIO_BL_ENABLE =3D 2, + GPIO_IOVCC =3D 4, + GPIO_VCC =3D 8, + GPIO_TS_RESET =3D 9, +}; + +#define NUM_GPIO 16 + +struct waveshare_gpio { + struct mutex dir_lock; + struct mutex pwr_lock; + struct regmap *regmap; + u16 poweron_state; + + struct gpio_chip gc; +}; + +static const struct regmap_config waveshare_gpio_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .max_register =3D REG_VERSION, +}; + +static int waveshare_gpio_get(struct waveshare_gpio *state, unsigned int o= ffset) +{ + u16 pwr_state; + + guard(mutex)(&state->pwr_lock); + pwr_state =3D state->poweron_state & BIT(offset); + + return !!pwr_state; +} + +static int waveshare_gpio_set(struct waveshare_gpio *state, unsigned int o= ffset, int value) +{ + u16 last_val; + int err; + + guard(mutex)(&state->pwr_lock); + + last_val =3D state->poweron_state; + if (value) + last_val |=3D BIT(offset); + else + last_val &=3D ~BIT(offset); + + state->poweron_state =3D last_val; + + err =3D regmap_write(state->regmap, REG_TP, last_val >> 8); + if (!err) + err =3D regmap_write(state->regmap, REG_LCD, last_val & 0xff); + + return err; +} + +static int waveshare_gpio_gpio_get_direction(struct gpio_chip *gc, unsigne= d int offset) +{ + return GPIO_LINE_DIRECTION_OUT; +} + +static int waveshare_gpio_gpio_get(struct gpio_chip *gc, unsigned int offs= et) +{ + struct waveshare_gpio *state =3D gpiochip_get_data(gc); + + return waveshare_gpio_get(state, offset); +} + +static int waveshare_gpio_gpio_set(struct gpio_chip *gc, unsigned int offs= et, int value) +{ + struct waveshare_gpio *state =3D gpiochip_get_data(gc); + + return waveshare_gpio_set(state, offset, value); +} + +static int waveshare_gpio_update_status(struct backlight_device *bl) +{ + struct waveshare_gpio *state =3D bl_get_data(bl); + int brightness =3D backlight_get_brightness(bl); + + waveshare_gpio_set(state, GPIO_BL_ENABLE, brightness); + + return regmap_write(state->regmap, REG_PWM, brightness); +} + +static const struct backlight_ops waveshare_gpio_bl =3D { + .update_status =3D waveshare_gpio_update_status, +}; + +static int waveshare_gpio_probe(struct i2c_client *i2c) +{ + struct backlight_properties props =3D {}; + struct waveshare_gpio *state; + struct device *dev =3D &i2c->dev; + struct backlight_device *bl; + struct regmap *regmap; + unsigned int data; + int ret; + + state =3D devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); + if (!state) + return -ENOMEM; + + ret =3D devm_mutex_init(dev, &state->dir_lock); + if (ret) + return ret; + + ret =3D devm_mutex_init(dev, &state->pwr_lock); + if (ret) + return ret; + + regmap =3D devm_regmap_init_i2c(i2c, &waveshare_gpio_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to allocate register = map\n"); + + state->regmap =3D regmap; + i2c_set_clientdata(i2c, state); + + ret =3D regmap_read(regmap, REG_ID, &data); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to read register\n"); + + dev_dbg(dev, "waveshare panel hw id =3D 0x%x\n", data); + + ret =3D regmap_read(regmap, REG_SIZE, &data); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to read register\n"); + + dev_dbg(dev, "waveshare panel size =3D %d\n", data); + + ret =3D regmap_read(regmap, REG_VERSION, &data); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to read register\n"); + + dev_dbg(dev, "waveshare panel mcu version =3D 0x%x\n", data); + + ret =3D waveshare_gpio_set(state, GPIO_TS_RESET, 1); + if (ret) + return dev_err_probe(dev, ret, "Failed to program GPIOs\n"); + + msleep(20); + + state->gc.parent =3D dev; + state->gc.label =3D i2c->name; + state->gc.owner =3D THIS_MODULE; + state->gc.base =3D -1; + state->gc.ngpio =3D NUM_GPIO; + + /* it is output only */ + state->gc.get =3D waveshare_gpio_gpio_get; + state->gc.set =3D waveshare_gpio_gpio_set; + state->gc.get_direction =3D waveshare_gpio_gpio_get_direction; + state->gc.can_sleep =3D true; + + ret =3D devm_gpiochip_add_data(dev, &state->gc, state); + if (ret) + return dev_err_probe(dev, ret, "Failed to create gpiochip\n"); + + props.type =3D BACKLIGHT_RAW; + props.max_brightness =3D 255; + props.brightness =3D 255; + bl =3D devm_backlight_device_register(dev, dev_name(dev), dev, state, + &waveshare_gpio_bl, &props); + return PTR_ERR_OR_ZERO(bl); +} + +static const struct of_device_id waveshare_gpio_dt_ids[] =3D { + { .compatible =3D "waveshare,dsi-touch-gpio" }, + {}, +}; +MODULE_DEVICE_TABLE(of, waveshare_gpio_dt_ids); + +static struct i2c_driver waveshare_gpio_regulator_driver =3D { + .driver =3D { + .name =3D "waveshare-regulator", + .of_match_table =3D of_match_ptr(waveshare_gpio_dt_ids), + }, + .probe =3D waveshare_gpio_probe, +}; + +module_i2c_driver(waveshare_gpio_regulator_driver); + +MODULE_DESCRIPTION("GPIO controller driver for Waveshare DSI touch panels"= ); +MODULE_LICENSE("GPL"); --=20 2.47.3