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Thu, 07 May 2026 03:54:03 -0700 (PDT) Received: from ho-tower-lan.lan ([185.48.77.170]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48e538ca8c0sm107180055e9.13.2026.05.07.03.54.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 03:54:03 -0700 (PDT) From: James Clark Date: Thu, 07 May 2026 11:53:45 +0100 Subject: [PATCH] coresight: trbe: Hide enable_sink sysfs file Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260507-james-cs-hide-trbe-enable-v1-1-b4e40439f44c@linaro.org> X-B4-Tracking: v=1; b=H4sIADhv/GkC/x3MywrCMBBG4Vcps3Ygjb0EX0VcpMlfO1KjZEQKJ e/e0OW3OGcnRRYo3ZqdMv6i8kkV7aWhsPj0BEusJmvsYHoz8Mu/oRyUF4ngX57ASH5awdfg4ug 6jDY6qv03Y5btfN8fpRzB3uI8awAAAA== To: Suzuki K Poulose , Mike Leach , Leo Yan , Alexander Shishkin Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, James Clark X-Mailer: b4 0.14.0 TRBE doesn't support sysfs mode, but the enable_sink file can still be successfully written to enable the device, and only attempting to enable the source would later fail. Avoid misleading users by adding a flag that devices can use to hide either the enable_sink or enable_source files, and set it for TRBE. Don't set it for ETE as it's possible that ETE could appear on the legacy bus and work with sysfs, and writing to enable_source already reports EINVAL if the device doesn't support sysfs mode. Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-core.c | 1 + drivers/hwtracing/coresight/coresight-sysfs.c | 19 +++++++++++++------ drivers/hwtracing/coresight/coresight-trbe.c | 7 +++++++ include/linux/coresight.h | 10 ++++++++-- 4 files changed, 29 insertions(+), 8 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtraci= ng/coresight/coresight-core.c index 46f247f73cf6..5244ff579ef6 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -1341,6 +1341,7 @@ struct coresight_device *coresight_register(struct co= resight_desc *desc) csdev->ops =3D desc->ops; csdev->access =3D desc->access; csdev->orphan =3D true; + csdev->no_sysfs_mode =3D desc->flags & CORESIGHT_DESC_NO_SYSFS_MODE; =20 csdev->dev.type =3D &coresight_dev_type[desc->type]; csdev->dev.groups =3D desc->groups; diff --git a/drivers/hwtracing/coresight/coresight-sysfs.c b/drivers/hwtrac= ing/coresight/coresight-sysfs.c index d2a6ed8bcc74..5729f16df2c4 100644 --- a/drivers/hwtracing/coresight/coresight-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-sysfs.c @@ -387,16 +387,23 @@ static ssize_t label_show(struct device *dev, } static DEVICE_ATTR_RO(label); =20 -static umode_t label_is_visible(struct kobject *kobj, - struct attribute *attr, int n) +static umode_t coresight_attr_is_visible(struct kobject *kobj, + struct attribute *attr, int n) { struct device *dev =3D kobj_to_dev(kobj); + struct coresight_device *csdev =3D to_coresight_device(dev); =20 if (attr =3D=3D &dev_attr_label.attr) { if (fwnode_property_present(dev_fwnode(dev), "label")) return attr->mode; else return 0; + } else if (attr =3D=3D &dev_attr_enable_sink.attr || + attr =3D=3D &dev_attr_enable_source.attr) { + if (csdev->no_sysfs_mode) + return 0; + else + return attr->mode; } =20 return attr->mode; @@ -410,7 +417,7 @@ static struct attribute *coresight_sink_attrs[] =3D { =20 static struct attribute_group coresight_sink_group =3D { .attrs =3D coresight_sink_attrs, - .is_visible =3D label_is_visible, + .is_visible =3D coresight_attr_is_visible, }; __ATTRIBUTE_GROUPS(coresight_sink); =20 @@ -422,7 +429,7 @@ static struct attribute *coresight_source_attrs[] =3D { =20 static struct attribute_group coresight_source_group =3D { .attrs =3D coresight_source_attrs, - .is_visible =3D label_is_visible, + .is_visible =3D coresight_attr_is_visible, }; __ATTRIBUTE_GROUPS(coresight_source); =20 @@ -433,7 +440,7 @@ static struct attribute *coresight_link_attrs[] =3D { =20 static struct attribute_group coresight_link_group =3D { .attrs =3D coresight_link_attrs, - .is_visible =3D label_is_visible, + .is_visible =3D coresight_attr_is_visible, }; __ATTRIBUTE_GROUPS(coresight_link); =20 @@ -444,7 +451,7 @@ static struct attribute *coresight_helper_attrs[] =3D { =20 static struct attribute_group coresight_helper_group =3D { .attrs =3D coresight_helper_attrs, - .is_visible =3D label_is_visible, + .is_visible =3D coresight_attr_is_visible, }; __ATTRIBUTE_GROUPS(coresight_helper); =20 diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtraci= ng/coresight/coresight-trbe.c index 1511f8eb95af..75c1fa6ab620 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -1289,6 +1289,13 @@ static void arm_trbe_register_coresight_cpu(struct t= rbe_drvdata *drvdata, int cp desc.ops =3D &arm_trbe_cs_ops; desc.groups =3D arm_trbe_groups; desc.dev =3D dev; + /* + * ETE isn't connected to TRBE with a link like other Coresight devices + * and the TRBE driver has been written to always assume Perf mode, so + * Prevent sysfs from being used. + */ + desc.flags =3D CORESIGHT_DESC_NO_SYSFS_MODE; + trbe_csdev =3D coresight_register(&desc); if (IS_ERR(trbe_csdev)) goto cpu_clear; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 2131febebee9..ccd99a480477 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -141,6 +141,8 @@ struct csdev_access { .base =3D (_addr), \ }) =20 +#define CORESIGHT_DESC_NO_SYSFS_MODE BIT(0) + /** * struct coresight_desc - description of a component required from drivers * @type: as defined by @coresight_dev_type. @@ -163,6 +165,7 @@ struct coresight_desc { const struct attribute_group **groups; const char *name; struct csdev_access access; + u32 flags; }; =20 /** @@ -260,7 +263,6 @@ struct coresight_trace_id_map { * device's spinlock when the coresight_mutex held and mode =3D=3D * CS_MODE_SYSFS. Otherwise it must be accessed from inside the * spinlock. - * @orphan: true if the component has connections that haven't been linked. * @sysfs_sink_activated: 'true' when a sink has been selected for use via= sysfs * by writing a 1 to the 'enable_sink' file. A sink can be * activated but not yet enabled. Enabling for a _sink_ happens @@ -276,6 +278,8 @@ struct coresight_trace_id_map { * @config_csdev_list: List of system configurations added to the device. * @cscfg_csdev_lock: Protect the lists of configurations and features. * @active_cscfg_ctxt: Context information for current active system conf= iguration. + * @orphan: true if the component has connections that haven't been linked. + * @no_sysfs_mode: Device can't be activated from sysfs, only via Perf. */ struct coresight_device { struct coresight_platform_data *pdata; @@ -286,7 +290,6 @@ struct coresight_device { struct device dev; atomic_t mode; int refcnt; - bool orphan; /* sink specific fields */ bool sysfs_sink_activated; struct dev_ext_attribute *ea; @@ -300,6 +303,9 @@ struct coresight_device { struct list_head config_csdev_list; raw_spinlock_t cscfg_csdev_lock; void *active_cscfg_ctxt; + /* flags */ + bool orphan : 1; + bool no_sysfs_mode : 1; }; =20 /* --- base-commit: 551bb2fd5e4ed63d33aa11f07102cce5179b7595 change-id: 20260506-james-cs-hide-trbe-enable-3c8d784e72d8 Best regards, --=20 James Clark