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Thu, 7 May 2026 03:33:23 -0400 (EDT) From: Janne Grunau Date: Thu, 07 May 2026 09:33:07 +0200 Subject: [PATCH v3 1/5] dt-bindings: power: apple,pmgr-pwrstate: Add t8122 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260507-apple-m3-initial-devicetrees-v3-1-ca07c81b5dc7@jannau.net> References: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> In-Reply-To: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Neal Gompa , Wim Van Sebroeck , Guenter Roeck , Mark Kettenis , Sasha Finkelstein , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, linux-pwm@vger.kernel.org, Janne Grunau , Joshua Peisach X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1260; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=+bvTFb6N9eybW1xIFA7El09z2HTI0pUgSg1eZJeYWis=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhsw/Dnbe+9784P3y6VLrru6waUuYlaRqagtszaxt/KaLf 80L8GvrKGVhEONikBVTZEnSftnBsLpGMab2QRjMHFYmkCEMXJwCMJGaJEaGky9sGCxtxV8ePHt7 VuWSS9YO3GWNbJsVHtjx7xOSlekQZmR4scX2ZOTb8n8lXwwWxfqonFXbOunLlmUTt318mr5j0uJ /fAA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The device power state management of the PMGR blocks on Apple's t8122 SoC (M3) is compatible with the existing driver. Add "apple,t8122-pmgr-pwrstate" as SoC specific compatible under the existing "apple,t8103-pmgr-pwrstate" used by the driver. Acked-by: Rob Herring (Arm) Reviewed-by: Joshua Peisach Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.ya= ml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index caf151880999..c9be097cfba0 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -43,7 +43,9 @@ properties: - apple,t6000-pmgr-pwrstate - const: apple,pmgr-pwrstate - items: - - const: apple,t6020-pmgr-pwrstate + - enum: + - apple,t6020-pmgr-pwrstate + - apple,t8122-pmgr-pwrstate - const: apple,t8103-pmgr-pwrstate =20 reg: --=20 2.54.0 From nobody Fri Jun 12 05:52:46 2026 Received: from fout-a3-smtp.messagingengine.com (fout-a3-smtp.messagingengine.com [103.168.172.146]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB02933F8C5; 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Thu, 7 May 2026 03:33:25 -0400 (EDT) From: Janne Grunau Date: Thu, 07 May 2026 09:33:08 +0200 Subject: [PATCH v3 2/5] dt-bindings: watchdog: apple,wdt: Add t8122 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260507-apple-m3-initial-devicetrees-v3-2-ca07c81b5dc7@jannau.net> References: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> In-Reply-To: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Neal Gompa , Wim Van Sebroeck , Guenter Roeck , Mark Kettenis , Sasha Finkelstein , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, linux-pwm@vger.kernel.org, Janne Grunau , Joshua Peisach X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1090; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=tqRDD38M1lfDTOrUhWfFbq/m1TiGBjjHF1HjCcLG/DA=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhsw/DnZvPv7+uCZm4bUNF5PPFwstErzlxLaW9emmwD+XN wZ/0Am71lHKwiDGxSArpsiSpP2yg2F1jWJM7YMwmDmsTCBDGLg4BWAiG38xMlxkOl/Yw9zRWla6 2apgWY/Vh9Nqx9ZK/vq7ytF7+87jQssYGXZu2OcZEz9B6NmCCT5vNtw5udjN9d/UxEOCRzXKmMK 02HgA X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The watchdog on the Apple silicon t8122 (M3) SoC is compatible with the existing driver. Add "apple,t8122-wdt" as SoC specific compatible under "apple,t8103-wdt" used by the driver. Acked-by: Rob Herring (Arm) Reviewed-by: Joshua Peisach Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/watchdog/apple,wdt.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Do= cumentation/devicetree/bindings/watchdog/apple,wdt.yaml index 05602678c070..845b5e8b5abc 100644 --- a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml @@ -16,7 +16,9 @@ properties: compatible: oneOf: - items: - - const: apple,t6020-wdt + - enum: + - apple,t6020-wdt + - apple,t8122-wdt - const: apple,t8103-wdt - items: - enum: --=20 2.54.0 From nobody Fri Jun 12 05:52:46 2026 Received: from fhigh-a4-smtp.messagingengine.com (fhigh-a4-smtp.messagingengine.com [103.168.172.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3C5135B654; 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Thu, 7 May 2026 03:33:27 -0400 (EDT) From: Janne Grunau Date: Thu, 07 May 2026 09:33:09 +0200 Subject: [PATCH v3 3/5] dt-bindings: pwm: apple,s5l-fpwm: Add t8122 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260507-apple-m3-initial-devicetrees-v3-3-ca07c81b5dc7@jannau.net> References: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> In-Reply-To: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Neal Gompa , Wim Van Sebroeck , Guenter Roeck , Mark Kettenis , Sasha Finkelstein , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, linux-pwm@vger.kernel.org, Janne Grunau , Joshua Peisach X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1086; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=gUN8s2Ri7zG9BdlChN+PUyMx26oLN03c/SpGRdRYMTI=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhsw/Dna7Hq8Wnz1FwKF59hOrbW90XTir8vazJM7iaBN78 OrKwnmJHaUsDGJcDLJiiixJ2i87GFbXKMbUPgiDmcPKBDKEgYtTACayvZqRoWHKrtJdfo1Jahyu CWl35jZ8a2jLPPgrndM9p5N9momICsNf0YqDy4r8GKyFOYNVI/6Khulf0dnBmuV3do3P3VIvzxZ 2AA== X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The PWM controller on the Apple silicon t8122 (M3) SoC is compatible with the existing driver. Add "apple,t8122-fpwm" as SoC specific compatible under "apple,s5l-fpwm" used by the driver. Acked-by: Rob Herring (Arm) Acked-by: Uwe Kleine-K=C3=B6nig Reviewed-by: Joshua Peisach Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml b/Do= cumentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml index d8f4f9ffe884..25ef04b60ca1 100644 --- a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml +++ b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml @@ -18,6 +18,7 @@ properties: - enum: - apple,t8103-fpwm - apple,t8112-fpwm + - apple,t8122-fpwm - apple,t6000-fpwm - apple,t6020-fpwm - const: apple,s5l-fpwm --=20 2.54.0 From nobody Fri Jun 12 05:52:46 2026 Received: from fhigh-a4-smtp.messagingengine.com (fhigh-a4-smtp.messagingengine.com [103.168.172.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B791335CBD7; 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Thu, 7 May 2026 03:33:29 -0400 (EDT) From: Janne Grunau Date: Thu, 07 May 2026 09:33:10 +0200 Subject: [PATCH v3 4/5] dt-bindings: arm: apple: Add M3 based devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260507-apple-m3-initial-devicetrees-v3-4-ca07c81b5dc7@jannau.net> References: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> In-Reply-To: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Neal Gompa , Wim Van Sebroeck , Guenter Roeck , Mark Kettenis , Sasha Finkelstein , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, linux-pwm@vger.kernel.org, Janne Grunau , Joshua Peisach X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1938; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=1IVQx6AIB/vfknI1NzcqynJhB4K52mpqTMLBWl1yw0s=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhsw/DvYNB+YcY7rL03R7TW1F5feZFw+cX/04rEqlZ+Z+A e3ULM7nHSUsDGJcDLJiiixJ2i87GFbXKMbUPgiDmcPKBDKEgYtTACZy24nhn338VBmN3WuroqW+ /Te0cjuaxW7gMcOb4V3byVeKRWxF2xg+MmoLO05cMneL4BORU19XnLznu0Nna+JkZ/c3yo8Wevd wAAA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 The Apple devices with the t8122 SoC (M3) are very similar to their M1 and M2 predecessors. Only the 13-inch Macbook Pro is replaced by a 14-inch version based on the design of the 14-inch Macbook Pro with (M1/M2 Pro/Max). The Mac mini was not offered with M3. Acked-by: Rob Herring (Arm) Reviewed-by: Joshua Peisach Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau --- Documentation/devicetree/bindings/arm/apple.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 5c2629ec3d4c..e49403c73f9d 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -96,6 +96,13 @@ description: | - MacBook Pro (13-inch, M2, 2022) - Mac mini (M2, 2023) =20 + Devices based on the "M3" SoC: + + - MacBook Air (13-inch, M3, 2024) + - MacBook Air (15-inch, M3, 2024) + - MacBook Pro (14-inch, M3, 2023) + - iMac (24-inch, M3, 2023) + Devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs: =20 - MacBook Pro (14-inch, M1 Pro, 2021) @@ -297,6 +304,17 @@ properties: - const: apple,t8112 - const: apple,arm-platform =20 + - description: Apple M3 SoC based platforms + items: + - enum: + - apple,j433 # iMac (24-inch, 2x USB-C, M3, 2023) + - apple,j434 # iMac (24-inch, 4x USB-C, M3, 2023) + - apple,j504 # MacBook Pro (14-inch, M3, 2023) + - apple,j613 # MacBook Air (13-inch, M3, 2024) + - apple,j615 # MacBook Air (15-inch, M3, 2024) + - const: apple,t8122 + - const: apple,arm-platform + - description: Apple M1 Pro SoC based platforms items: - enum: --=20 2.54.0 From nobody Fri Jun 12 05:52:46 2026 Received: from fout-a3-smtp.messagingengine.com (fout-a3-smtp.messagingengine.com [103.168.172.146]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A758235E950; 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Thu, 7 May 2026 03:33:31 -0400 (EDT) From: Janne Grunau Date: Thu, 07 May 2026 09:33:11 +0200 Subject: [PATCH v3 5/5] arm64: dts: apple: Initial t8122 (M3) device trees Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260507-apple-m3-initial-devicetrees-v3-5-ca07c81b5dc7@jannau.net> References: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> In-Reply-To: <20260507-apple-m3-initial-devicetrees-v3-0-ca07c81b5dc7@jannau.net> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Neal Gompa , Wim Van Sebroeck , Guenter Roeck , Mark Kettenis , Sasha Finkelstein , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, linux-pwm@vger.kernel.org, Janne Grunau , Michael Reeves , Joshua Peisach X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=53454; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=bW8H+uMt9fdemoccmhOQq1rm7kUTL1JHELX8OB5rnso=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhsw/DvYez0uEjn5n6uBeFM9zcdqqnzt9fgQc+squXXq9t 4R9h//HjlIWBjEuBlkxRZYk7ZcdDKtrFGNqH4TBzGFlAhnCwMUpABOJ+8bIMOuG7/nlBTdNVbL3 C375f7b+xHQjq/9+ix0v+zRs/n37ZzvD/9K1Es7H1zvXff9zqkGMfc3WVrX9DavlvxkmT7Z9dDl RhhsA X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 Add minimal device trees for all t8122 based devices. The devices are - iMac (24-inch, M3, 2023) - MacBook Air (13-inch, M3, 2024) - MacBook Air (15-inch, M3, 2024) - MacBook Pro (14-inch, M3, 2023) The device trees have a minimal set of devices limited to CPU cores, interrupt controller, power states, watchdog, serial, pin controller, i2c and the boot framebuffer. The device trees for the notebooks add a PWM controller for the keyboard LED illumination. The iMacs and the 14-inch device trees add the i2c based Apple cd321x USB Type-C port controller. Co-developed-by: Michael Reeves Signed-off-by: Michael Reeves Reviewed-by: Joshua Peisach Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/Makefile | 5 + arch/arm64/boot/dts/apple/t8122-j433.dts | 19 + arch/arm64/boot/dts/apple/t8122-j434.dts | 19 + arch/arm64/boot/dts/apple/t8122-j504.dts | 37 + arch/arm64/boot/dts/apple/t8122-j613.dts | 35 + arch/arm64/boot/dts/apple/t8122-j615.dts | 35 + arch/arm64/boot/dts/apple/t8122-jxxx.dtsi | 48 + arch/arm64/boot/dts/apple/t8122-pmgr.dtsi | 1149 ++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi | 32 + arch/arm64/boot/dts/apple/t8122.dtsi | 444 +++++++++ 10 files changed, 1823 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index 4eebcd85c90f..6fc3349a5842 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -91,3 +91,8 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8112-j413.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8112-j415.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8112-j473.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8112-j493.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j433.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j434.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j504.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j613.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8122-j615.dtb diff --git a/arch/arm64/boot/dts/apple/t8122-j433.dts b/arch/arm64/boot/dts= /apple/t8122-j433.dts new file mode 100644 index 000000000000..34205d173a9b --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122-j433.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iMac (24-inch, 2x USB-C, M3, 2023) + * + * target-type: J433 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8122.dtsi" +#include "t8122-usbpd-i2c.dtsi" +#include "t8122-jxxx.dtsi" + +/ { + compatible =3D "apple,j433", "apple,t8122", "apple,arm-platform"; + model =3D "Apple iMac (24-inch, 2x USB-C, M3, 2023)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8122-j434.dts b/arch/arm64/boot/dts= /apple/t8122-j434.dts new file mode 100644 index 000000000000..ead5afd77efb --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122-j434.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple iMac (24-inch, 4x USB-C, M3, 2023) + * + * target-type: J434 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8122.dtsi" +#include "t8122-usbpd-i2c.dtsi" +#include "t8122-jxxx.dtsi" + +/ { + compatible =3D "apple,j434", "apple,t8122", "apple,arm-platform"; + model =3D "Apple iMac (24-inch, 4x USB-C, M3, 2023)"; +}; diff --git a/arch/arm64/boot/dts/apple/t8122-j504.dts b/arch/arm64/boot/dts= /apple/t8122-j504.dts new file mode 100644 index 000000000000..464491b55b01 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122-j504.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Pro (14-inch, M3, 2023) + * + * target-type: J504 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8122.dtsi" +#include "t8122-usbpd-i2c.dtsi" +#include "t8122-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j504", "apple,t8122", "apple,arm-platform"; + model =3D "Apple MacBook Pro (14-inch, M3, 2023)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; + diff --git a/arch/arm64/boot/dts/apple/t8122-j613.dts b/arch/arm64/boot/dts= /apple/t8122-j613.dts new file mode 100644 index 000000000000..51894ea705e7 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122-j613.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Air (13-inch, M3, 2024) + * + * target-type: J613 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8122.dtsi" +#include "t8122-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j613", "apple,t8122", "apple,arm-platform"; + model =3D "Apple MacBook Air (13-inch, M3, 2024)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8122-j615.dts b/arch/arm64/boot/dts= /apple/t8122-j615.dts new file mode 100644 index 000000000000..2a1970c1bc90 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122-j615.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Air (15-inch, M3, 2024) + * + * target-type: J615 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8122.dtsi" +#include "t8122-jxxx.dtsi" +#include + +/ { + compatible =3D "apple,j615", "apple,t8122", "apple,arm-platform"; + model =3D "Apple MacBook Air (15-inch, M3, 2024)"; + + led-controller { + compatible =3D "pwm-leds"; + led-0 { + pwms =3D <&fpwm1 0 40000>; + label =3D "kbd_backlight"; + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + max-brightness =3D <255>; + default-state =3D "keep"; + }; + }; +}; + +&fpwm1 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi b/arch/arm64/boot/dt= s/apple/t8122-jxxx.dtsi new file mode 100644 index 000000000000..dd85f0c9fb1e --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple M3 MacBook Air/Pro and iMac (M3, 2023/2024) + * + * This file contains parts common to all Apple M3 devices using the t8122. + * + * target-type: J433, J434, J504, J613, J615 + * + * Copyright The Asahi Linux Contributors + */ + +/ { + aliases { + serial0 =3D &serial0; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0"; + + framebuffer0: framebuffer@0 { + compatible =3D "apple,simple-framebuffer", "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + power-domains =3D <&ps_disp_cpu>, <&ps_dptx_ext_phy>; + /* Format properties will be added by loader */ + status =3D "disabled"; + }; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + /* To be filled by loader */ + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0x2 0>; /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8122-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t8122-pmgr.dtsi new file mode 100644 index 000000000000..64093792e0ad --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122-pmgr.dtsi @@ -0,0 +1,1149 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for the Apple T8122 "M3" SoC + * + * Copyright The Asahi Linux Contributors + */ + +&pmgr { + ps_sbr: power-controller@100 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x100 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sbr"; + apple,always-on; /* Core device */ + }; + + ps_msg: power-controller@108 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msg"; + }; + + ps_aic: power-controller@110 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aic"; + apple,always-on; /* Core device */ + }; + + ps_dwi: power-controller@118 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dwi"; + }; + + ps_gpio: power-controller@120 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gpio"; + }; + + ps_pms_busif: power-controller@128 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x128 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_busif"; + apple,always-on; /* Core device */ + }; + + ps_pms: power-controller@130 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x130 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms"; + apple,always-on; /* Core device */ + }; + + ps_pms_fpwm0: power-controller@138 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm0"; + power-domains =3D <&ps_pms>; + }; + + ps_pms_fpwm1: power-controller@140 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm1"; + power-domains =3D <&ps_pms>; + }; + + ps_pms_fpwm2: power-controller@148 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm2"; + power-domains =3D <&ps_pms>; + }; + + ps_pms_fpwm3: power-controller@150 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm3"; + power-domains =3D <&ps_pms>; + }; + + ps_pms_fpwm4: power-controller@158 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_fpwm4"; + power-domains =3D <&ps_pms>; + }; + + ps_pms_c1ppt: power-controller@160 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x160 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_c1ppt"; + }; + + ps_soc_rc: power-controller@168 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_rc"; + }; + + ps_soc_dpe: power-controller@170 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x170 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "soc_dpe"; + apple,always-on; + }; + + ps_pmgr_soc_ocla: power-controller@178 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x178 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmgr_soc_ocla"; + power-domains =3D <&ps_pms>; + }; + + ps_ispsens0: power-controller@180 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x180 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens0"; + }; + + ps_ispsens1: power-controller@188 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x188 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens1"; + }; + + ps_ispsens2: power-controller@190 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x190 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens2"; + }; + + ps_ispsens3: power-controller@198 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x198 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ispsens3"; + }; + + ps_aft0: power-controller@1a8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aft0"; + }; + + ps_ioa0: power-controller@1b0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ioa0"; + apple,always-on; + }; + + ps_ap_tmm: power-controller@1b8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ap_tmm"; + }; + + ps_disp_sys: power-controller@1d8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_sys"; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_gfx: power-controller@1e0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "gfx"; + }; + + ps_isp_sys: power-controller@1e8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "isp_sys"; + }; + + ps_avd_sys: power-controller@1f0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "avd_sys"; + }; + + ps_jpg: power-controller@200 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x200 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "jpg"; + }; + + ps_disp_fe: power-controller@208 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x208 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_fe"; + power-domains =3D <&ps_disp_sys>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_sio_cpu: power-controller@210 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x210 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio_cpu"; + }; + + ps_fpwm0: power-controller@218 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x218 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm0"; + }; + + ps_fpwm1: power-controller@220 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x220 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm1"; + }; + + ps_fpwm2: power-controller@228 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x228 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "fpwm2"; + }; + + ps_i2c0: power-controller@230 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c0"; + }; + + ps_i2c1: power-controller@238 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x238 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c1"; + }; + + ps_i2c2: power-controller@240 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c2"; + }; + + ps_i2c3: power-controller@248 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x248 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c3"; + }; + + ps_i2c4: power-controller@250 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c4"; + }; + + ps_i2c5: power-controller@258 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x258 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c5"; + }; + + ps_i2c6: power-controller@260 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x260 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c6"; + }; + + ps_i2c7: power-controller@268 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x268 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c7"; + }; + + ps_i2c8: power-controller@270 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x270 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "i2c8"; + }; + + ps_spi_p: power-controller@278 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x278 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi_p"; + }; + + ps_uart_p: power-controller@280 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_p"; + }; + + ps_audio_p: power-controller@288 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x288 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "audio_p"; + }; + + ps_aes: power-controller@290 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "aes"; + }; + + ps_spi0: power-controller@298 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x298 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi0"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi1: power-controller@2a0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi1"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi2: power-controller@2a8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi2"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi3: power-controller@2b0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi3"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi4: power-controller@2b8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi4"; + power-domains =3D <&ps_spi_p>; + }; + + ps_spi5: power-controller@2c0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "spi5"; + power-domains =3D <&ps_spi_p>; + }; + + ps_qspi: power-controller@2c8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "qspi"; + power-domains =3D <&ps_spi_p>; + }; + + ps_uart_n: power-controller@2d0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart_n"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart0: power-controller@2d8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart0"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart1: power-controller@2e0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart1"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart2: power-controller@2e8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart2"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart3: power-controller@2f0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart3"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart4: power-controller@2f8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart4"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart5: power-controller@300 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart5"; + power-domains =3D <&ps_uart_p>; + }; + + ps_uart6: power-controller@308 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x308 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "uart6"; + power-domains =3D <&ps_uart_p>; + }; + + ps_sio_adma: power-controller@310 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x310 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sio_adma"; + power-domains =3D <&ps_fpwm0>; + }; + + ps_dpa0: power-controller@318 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x318 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa0"; + power-domains =3D <&ps_audio_p>; + }; + + ps_dcs0: power-controller@330 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x330 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs0"; + apple,always-on; + }; + + ps_dcs2: power-controller@338 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x338 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs2"; + apple,always-on; + }; + + ps_dcs1: power-controller@340 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x340 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs1"; + apple,always-on; + }; + + ps_dcs3: power-controller@348 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x348 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs3"; + apple,always-on; + }; + + ps_dcs4: power-controller@358 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x358 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs4"; + apple,always-on; + }; + + ps_dcs5: power-controller@360 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x360 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs5"; + apple,always-on; + }; + + ps_dcs6: power-controller@368 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x368 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs6"; + apple,always-on; + }; + + ps_dcs7: power-controller@370 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dcs7"; + apple,always-on; + }; + + ps_dpa1: power-controller@378 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x378 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa1"; + power-domains =3D <&ps_audio_p>; + }; + + ps_dpa2: power-controller@380 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa2"; + power-domains =3D <&ps_audio_p>; + }; + + ps_dpa3: power-controller@388 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x388 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa3"; + power-domains =3D <&ps_audio_p>; + }; + + ps_dpa4: power-controller@390 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dpa4"; + power-domains =3D <&ps_audio_p>; + }; + + ps_mca0: power-controller@398 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x398 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca0"; + power-domains =3D <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca1: power-controller@3a0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca1"; + power-domains =3D <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_mca2: power-controller@3a8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca2"; + power-domains =3D <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_trace_fab: power-controller@3b0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "trace_fab"; + }; + + ps_mca3: power-controller@3b8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "mca3"; + power-domains =3D <&ps_sio_adma>, <&ps_audio_p>; + }; + + ps_ioa1: power-controller@3c0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ioa1"; + apple,always-on; + }; + + ps_apcie: power-controller@3f0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie"; + }; + + ps_ans: power-controller@3f8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ans"; + }; + + ps_atc0_common: power-controller@400 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x400 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_common"; + }; + + ps_atc1_common: power-controller@408 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x408 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_common"; + }; + + ps_dispext_sys: power-controller@410 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x410 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext_sys"; + }; + + ps_venc_sys: power-controller@418 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x418 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_sys"; + }; + + ps_scodec: power-controller@420 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x420 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "scodec"; + }; + + ps_msr: power-controller@428 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x428 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr"; + power-domains =3D <&ps_aft0>; + }; + + ps_dptx_ext_phy: power-controller@430 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x430 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dptx_ext_phy"; + }; + + ps_ane_sys: power-controller@438 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x438 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "ane_sys"; + }; + + ps_apcie_gp: power-controller@440 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x440 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_gp"; + power-domains =3D <&ps_apcie>; + }; + + ps_apcie_st: power-controller@448 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x448 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_st"; + power-domains =3D <&ps_ans>, <&ps_apcie>; + }; + + ps_pmp: power-controller@450 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x450 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pmp"; + apple,always-on; + }; + + ps_pms_sram: power-controller@458 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x458 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "pms_sram"; + apple,always-on; + }; + + ps_atc0_pcie: power-controller@460 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x460 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_pcie"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_atc0_cio: power-controller@468 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x468 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio"; + power-domains =3D <&ps_atc0_common>; + }; + + ps_atc1_pcie: power-controller@470 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x470 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_pcie"; + power-domains =3D <&ps_atc1_common>; + }; + + ps_atc1_cio: power-controller@478 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x478 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio"; + power-domains =3D <&ps_atc1_common>; + }; + + ps_dispext_fe: power-controller@480 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x480 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext_fe"; + power-domains =3D <&ps_dispext_sys>; + }; + + ps_dispext_cpu: power-controller@488 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x488 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "dispext_cpu"; + power-domains =3D <&ps_dispext_fe>; + apple,min-state =3D <4>; + }; + + ps_scodec_stream: power-controller@490 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x490 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "scodec_stream"; + power-domains =3D <&ps_scodec>; + }; + + ps_msr_ase_core: power-controller@498 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x498 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "msr_ase_core"; + power-domains =3D <&ps_msr>; + }; + + ps_apcie_phy_sw: power-controller@4a0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "apcie_phy_sw"; + power-domains =3D <&ps_apcie_st>, <&ps_apcie_gp>; + }; + + ps_atc0_cio_pcie: power-controller@4a8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4a8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio_pcie"; + power-domains =3D <&ps_atc0_cio>; + }; + + ps_atc0_cio_usb: power-controller@4b0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_cio_usb"; + power-domains =3D <&ps_atc0_cio>; + }; + + ps_atc1_cio_pcie: power-controller@4b8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4b8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio_pcie"; + power-domains =3D <&ps_atc1_cio>; + }; + + ps_atc1_cio_usb: power-controller@4c0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x4c0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_cio_usb"; + power-domains =3D <&ps_atc1_cio>; + }; + + ps_sep: power-controller@c00 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc00 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "sep"; + apple,always-on; + }; + + ps_venc_dma: power-controller@8000 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_dma"; + power-domains =3D <&ps_venc_sys>; + }; + + ps_venc_pipe4: power-controller@8008 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8008 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe4"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_pipe5: power-controller@8010 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8010 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_pipe5"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_me0: power-controller@8018 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8018 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me0"; + power-domains =3D <&ps_venc_dma>; + }; + + ps_venc_me1: power-controller@8020 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8020 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "venc_me1"; + power-domains =3D <&ps_venc_me0>; + }; + + ps_disp_cpu: power-controller@10000 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x10000 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "disp_cpu"; + power-domains =3D <&ps_disp_fe>; + apple,min-state =3D <4>; + }; +}; + +&pmgr_mini { + + ps_debug_gated: power-controller@0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_gated"; + apple,always-on; + }; + + ps_nub_spmi0: power-controller@58 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x58 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi0"; + apple,always-on; + }; + + ps_nub_spmi1: power-controller@60 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi1"; + apple,always-on; + }; + + ps_nub_spmi2: power-controller@68 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x68 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi2"; + apple,always-on; + }; + + ps_nub_spmi_a0: power-controller@70 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x70 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spmi_a0"; + apple,always-on; + }; + + ps_nub_aon: power-controller@78 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x78 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_aon"; + apple,always-on; + }; + + ps_nub_spi0: power-controller@80 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x80 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_spi0"; + apple,always-on; + }; + + ps_nub_ocla: power-controller@88 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x88 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_ocla"; + apple,always-on; + }; + + ps_nub_gpio: power-controller@90 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x90 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_gpio"; + apple,always-on; + }; + + ps_nub_fabric: power-controller@98 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x98 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_fabric"; + apple,always-on; + }; + + ps_nub_sram: power-controller@a0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "nub_sram"; + apple,always-on; + }; + + ps_debug_switch: power-controller@a8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "debug_switch"; + apple,always-on; + }; + + ps_atc0_usb_aon: power-controller@b0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb_aon"; + }; + + ps_atc1_usb_aon: power-controller@b8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_usb_aon"; + }; + + ps_atc0_usb: power-controller@c0 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc0 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc0_usb"; + power-domains =3D <&ps_atc0_usb_aon>, <&ps_atc0_common>; + }; + + ps_atc1_usb: power-controller@c8 { + compatible =3D "apple,t8122-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc8 4>; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + label =3D "atc1_usb"; + power-domains =3D <&ps_atc1_usb_aon>, <&ps_atc1_common>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi b/arch/arm64/bo= ot/dts/apple/t8122-usbpd-i2c.dtsi new file mode 100644 index 000000000000..112c5199cabd --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple M3 MacBook Pro and iMac (M3, 2023) I2C based USB PD controller no= des + * + * This file contains nodes for t8122 devices using I2C based cd321x USB T= ype-C + * port controllers. The are used in the M3 MacBook Pro and iMacs but not = in the + * M3 Macbook Airs. + * + * target-type: J433, J434, J504 + * + * Copyright The Asahi Linux Contributors + */ + +&i2c0 { + status =3D "okay"; + + hpm0: usb-pd@38 { + compatible =3D "apple,cd321x"; + reg =3D <0x38>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <8 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; + + hpm1: usb-pd@3f { + compatible =3D "apple,cd321x"; + reg =3D <0x3f>; + interrupt-parent =3D <&pinctrl_ap>; + interrupts =3D <8 IRQ_TYPE_LEVEL_LOW>; + interrupt-names =3D "irq"; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8122.dtsi b/arch/arm64/boot/dts/app= le/t8122.dtsi new file mode 100644 index 000000000000..c6196225e96e --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8122.dtsi @@ -0,0 +1,444 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8122 "M3" SoC + * + * Other names: H15G + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include +#include + +/ { + compatible =3D "apple,t8122", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e0>; + }; + core1 { + cpu =3D <&cpu_e1>; + }; + core2 { + cpu =3D <&cpu_e2>; + }; + core3 { + cpu =3D <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p0>; + }; + core1 { + cpu =3D <&cpu_p1>; + }; + core2 { + cpu =3D <&cpu_p2>; + }; + core3 { + cpu =3D <&cpu_p3>; + }; + }; + }; + + cpu_e0: cpu@0 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x0>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e1: cpu@1 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x1>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e2: cpu@2 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x2>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_e3: cpu@3 { + compatible =3D "apple,sawtooth"; + device_type =3D "cpu"; + reg =3D <0x0 0x3>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_0>; + i-cache-size =3D <0x20000>; + d-cache-size =3D <0x10000>; + }; + + cpu_p0: cpu@10100 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10100>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p1: cpu@10101 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10101>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p2: cpu@10102 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10102>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + cpu_p3: cpu@10103 { + compatible =3D "apple,everest"; + device_type =3D "cpu"; + reg =3D <0x0 0x10103>; + enable-method =3D "spin-table"; + cpu-release-addr =3D <0 0>; /* To be filled by loader */ + next-level-cache =3D <&l2_cache_1>; + i-cache-size =3D <0x30000>; + d-cache-size =3D <0x20000>; + }; + + l2_cache_0: l2-cache-0 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x400000>; + }; + + l2_cache_1: l2-cache-1 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-unified; + cache-size =3D <0x1000000>; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + interrupts =3D , + , + , + ; + }; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + ranges; + nonposted-mmio; + /* Required to get >32-bit DMA via DARTs */ + dma-ranges =3D <0 0 0 0 0xffffffff 0xffffc000>; + + i2c0: i2c@235010000 { + compatible =3D "apple,t8122-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x35010000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c0_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c0>; + status =3D "disabled"; + }; + + i2c1: i2c@235014000 { + compatible =3D "apple,t8122-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x35014000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c1_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c1>; + status =3D "disabled"; + }; + + i2c2: i2c@235018000 { + compatible =3D "apple,t8122-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x35018000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c2_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c2>; + status =3D "disabled"; + }; + + i2c3: i2c@23501c000 { + compatible =3D "apple,t8122-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x3501c000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c3_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c3>; + status =3D "disabled"; + }; + + i2c4: i2c@235020000 { + compatible =3D "apple,t8122-i2c", "apple,t8103-i2c"; + reg =3D <0x2 0x35020000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + pinctrl-0 =3D <&i2c4_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + power-domains =3D <&ps_i2c4>; + status =3D "disabled"; + }; + + fpwm1: pwm@2a1044000 { + compatible =3D "apple,t8122-fpwm", "apple,s5l-fpwm"; + reg =3D <0x2 0xa1044000 0x0 0x4000>; + power-domains =3D <&ps_fpwm1>; + clocks =3D <&clkref>; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + serial0: serial@2a1200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x2 0xa1200000 0x0 0x1000>; + reg-io-width =3D <4>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + /* + * TODO: figure out the clocking properly, there may + * be a third selectable clock. + */ + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + power-domains =3D <&ps_uart0>; + status =3D "disabled"; + }; + + aic: interrupt-controller@2d1000000 { + compatible =3D "apple,t8122-aic3"; + #interrupt-cells =3D <3>; + interrupt-controller; + reg =3D <0x2 0xd1000000 0x0 0x184000>, + <0x2 0xd1040000 0x0 0x4>; + reg-names =3D "core", "event"; + power-domains =3D <&ps_aic>; + + affinities { + e-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3>; + }; + + p-core-pmu-affinity { + apple,fiq-index =3D ; + cpus =3D <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>; + }; + }; + }; + + pmgr: power-management@2d0700000 { + compatible =3D "apple,t8122-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x2 0xd0700000 0 0x14000>; + /* child nodes are added in t8122-pmgr.dtsi */ + }; + + pinctrl_ap: pinctrl@2c7100000 { + compatible =3D "apple,t8122-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x2 0xc7100000 0x0 0x100000>; + power-domains =3D <&ps_gpio>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_ap 0 0 224>; + apple,npins =3D <224>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + + i2c0_pins: i2c0-pins { + pinmux =3D , + ; + }; + + i2c1_pins: i2c1-pins { + pinmux =3D , + ; + }; + + i2c2_pins: i2c2-pins { + pinmux =3D , + ; + }; + + i2c3_pins: i2c3-pins { + pinmux =3D , + ; + }; + + i2c4_pins: i2c4-pins { + pinmux =3D , + ; + }; + + }; + + pinctrl_nub: pinctrl@2e41f0000 { + compatible =3D "apple,t8122-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x2 0xe41f0000 0x0 0x4000>; + power-domains =3D <&ps_nub_gpio>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_nub 0 0 32>; + apple,npins =3D <32>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pmgr_mini: power-management@2e4280000 { + compatible =3D "apple,t8122-pmgr", "apple,t8103-pmgr", "syscon", "simpl= e-mfd"; + #address-cells =3D <1>; + #size-cells =3D <1>; + reg =3D <0x2 0xe4280000 0 0x4000>; + /* child nodes are added in t8122-pmgr.dtsi */ + }; + + wdt: watchdog@2e42b0000 { + compatible =3D "apple,t8122-wdt", "apple,t8103-wdt"; + reg =3D <0x2 0xe42b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + pinctrl_smc: pinctrl@2ec820000 { + compatible =3D "apple,t8122-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x2 0xec820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_smc 0 0 18>; + apple,npins =3D <18>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@2f4824000 { + compatible =3D "apple,t8122-pinctrl", "apple,t8103-pinctrl"; + reg =3D <0x2 0xf4824000 0x0 0x4000>; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&pinctrl_aop 0 0 54>; + apple,npins =3D <54>; + + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + , + , + , + ; + }; + }; +}; + +#include "t8122-pmgr.dtsi" --=20 2.54.0