From nobody Mon May 11 01:05:44 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AD9CB379EEA; Wed, 6 May 2026 07:26:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778052375; cv=none; b=ZjaU+LHXVE6Ybw1nHT7/g4TXrEuzUhf7NnMh/qJZ3lXgAu2yxQ+JkkwCYGN6ku0tfGpOV3hlYhetvqwhbVPTFwhyvYSctSfss8pydSXVhgMn0hMAAm4cxZMVoRAHzE4sXNcbrlg0YTVFLSpNUhbTCk94dw5oaej9tIWnLd3bsQ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778052375; c=relaxed/simple; bh=7kododvTQ68yKTSDo3YpbRkIFBnTYQ7gfRla+bTGEck=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=FSHXNC9tVNbT1fg63mfxWZTR68WEMhIoc3C3dlpMAXQHQV3gzqZHIb5Xb/jwu47sg9+wS8BZDId6CGarzTl6bDscTKHQkBXNKkB5arN/bESgUi78hzG1KmoXZ3VonHOUCt7Qe8ZTsV8CPyW3Kl5wqd2rx7bwyU9ecuX8Z5Qylxg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=ooV9qgDT; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="ooV9qgDT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1778052372; x=1809588372; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=7kododvTQ68yKTSDo3YpbRkIFBnTYQ7gfRla+bTGEck=; b=ooV9qgDTKZYw752bLVpjY3pH0JoitpuIKODN0f9nI3il3lpm1ZRZoR6c NBHU69hiHnVtzhF5nd1PG23vpYYVwhqb4ymABwKoxmzz30hj2Nf2zXvH+ a+kla8ECy1o2umwU7F9Qpo8yFd0ZC3S8TmUryo6NCyYX/nx9a6Mvc2x0v u3wF1Ti2w3/OgNPF87hNz4TllyrnpvEbaK2N2xFhAdMOlZ9ndB8+meJ6M T4STKDeKDRSkb/T+EsuXKb6yOzg10X3rcKEteQSYCI5iwXX5+6+sBhEpg rfPlqxgdMwXcWpBghmLCoLgOjJKQgIrbwQvCREdAAWxJYOozjPQCgggw5 A==; X-CSE-ConnectionGUID: qz5Evn+OQfO8zCrhGrl+XA== X-CSE-MsgGUID: st7y93lxRreywRzRdtcX3g== X-IronPort-AV: E=Sophos;i="6.23,219,1770620400"; d="scan'208";a="56331557" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 06 May 2026 00:26:11 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 6 May 2026 00:26:11 -0700 Received: from DEN-DL-M70577.microsemi.net (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 6 May 2026 00:26:08 -0700 From: Daniel Machon Date: Wed, 6 May 2026 09:25:36 +0200 Subject: [PATCH net v2 1/4] net: sparx5: defer VCAP debugfs creation until after netdev registration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260506-misc-fixes-sparx5-lan969x-v2-1-fb236aa96908@microchip.com> References: <20260506-misc-fixes-sparx5-lan969x-v2-0-fb236aa96908@microchip.com> In-Reply-To: <20260506-misc-fixes-sparx5-lan969x-v2-0-fb236aa96908@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Steen Hegelund , , "Sebastian Andrzej Siewior" , Clark Williams , Steven Rostedt , Bjarni Jonasson , Lars Povlsen , Philipp Zabel , CC: , , , Steen Hegelund , X-Mailer: b4 0.14.3 Commit 3a95973e7c79 ("net: sparx5: move VCAP initialization to probe") moved sparx5_vcap_init() ahead of sparx5_register_netdevs() in probe. The VCAP init path ends by calling vcap_port_debugfs() for every port, which uses netdev_name(ndev) as the debugfs file name. At that point the netdevs have only been allocated, not registered, so dev->name still holds the "eth%d" template and netdev_name() returns "(unnamed net_device)". Every port tries to create the same file under vcaps/, producing a flood of warnings at boot: debugfs: '(unnamed net_device)' already exists in 'vcaps' debugfs: '(unnamed net_device)' already exists in 'vcaps' ... Move the debugfs setup into a new sparx5_debugfs() helper in sparx5_debugfs.c, invoked after sparx5_register_notifier_blocks() succeeds so the netdev names are finalized. sparx5_vcap_init() now only deals with VCAP state. The sparx5/ debugfs root is created in the new helper as well. Fixes: 3a95973e7c79 ("net: sparx5: move VCAP initialization to probe") Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/Makefile | 3 ++- .../net/ethernet/microchip/sparx5/sparx5_debugfs.c | 26 ++++++++++++++++++= ++++ .../net/ethernet/microchip/sparx5/sparx5_main.c | 4 ++-- .../net/ethernet/microchip/sparx5/sparx5_main.h | 7 ++++++ .../ethernet/microchip/sparx5/sparx5_vcap_impl.c | 6 ----- 5 files changed, 37 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/Makefile b/drivers/net/e= thernet/microchip/sparx5/Makefile index d447f9e84d92..eb5c81527f41 100644 --- a/drivers/net/ethernet/microchip/sparx5/Makefile +++ b/drivers/net/ethernet/microchip/sparx5/Makefile @@ -14,7 +14,8 @@ sparx5-switch-y :=3D sparx5_main.o sparx5_packet.o \ sparx5_psfp.o sparx5_mirror.o sparx5_regs.o =20 sparx5-switch-$(CONFIG_SPARX5_DCB) +=3D sparx5_dcb.o -sparx5-switch-$(CONFIG_DEBUG_FS) +=3D sparx5_vcap_debugfs.o +sparx5-switch-$(CONFIG_DEBUG_FS) +=3D sparx5_vcap_debugfs.o \ + sparx5_debugfs.o =20 sparx5-switch-$(CONFIG_LAN969X_SWITCH) +=3D lan969x/lan969x_regs.o \ lan969x/lan969x.o \ diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_debugfs.c b/drive= rs/net/ethernet/microchip/sparx5/sparx5_debugfs.c new file mode 100644 index 000000000000..f6cb1eeaab80 --- /dev/null +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_debugfs.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Microchip Sparx5 Switch driver debug filesystem support + * + * Copyright (c) 2026 Microchip Technology Inc. and its subsidiaries. + */ + +#include + +#include "sparx5_main.h" +#include "vcap_api_debugfs.h" + +void sparx5_debugfs(struct sparx5 *sparx5) +{ + const struct sparx5_consts *consts =3D sparx5->data->consts; + struct vcap_control *ctrl =3D sparx5->vcap_ctrl; + struct dentry *dir; + int idx; + + sparx5->debugfs_root =3D debugfs_create_dir("sparx5", NULL); + + dir =3D vcap_debugfs(sparx5->dev, sparx5->debugfs_root, ctrl); + for (idx =3D 0; idx < consts->n_ports; ++idx) + if (sparx5->ports[idx]) + vcap_port_debugfs(sparx5->dev, dir, ctrl, + sparx5->ports[idx]->ndev); +} diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/= net/ethernet/microchip/sparx5/sparx5_main.c index dad713e9ddd5..bec07560e6fe 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -820,8 +820,6 @@ static int mchp_sparx5_probe(struct platform_device *pd= ev) /* Default values, some from DT */ sparx5->coreclock =3D SPX5_CORE_CLOCK_DEFAULT; =20 - sparx5->debugfs_root =3D debugfs_create_dir("sparx5", NULL); - ports =3D of_get_child_by_name(np, "ethernet-ports"); if (!ports) { dev_err(sparx5->dev, "no ethernet-ports child node found\n"); @@ -1000,6 +998,8 @@ static int mchp_sparx5_probe(struct platform_device *p= dev) goto cleanup_netdevs; } =20 + sparx5_debugfs(sparx5); + goto cleanup_config; =20 cleanup_netdevs: diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/= net/ethernet/microchip/sparx5/sparx5_main.h index 6a745bb71b5c..d5e6644ff124 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -565,6 +565,13 @@ void sparx5_get_hwtimestamp(struct sparx5 *sparx5, int sparx5_vcap_init(struct sparx5 *sparx5); void sparx5_vcap_deinit(struct sparx5 *sparx5); =20 +/* sparx5_debugfs.c */ +#if defined(CONFIG_DEBUG_FS) +void sparx5_debugfs(struct sparx5 *sparx5); +#else +static inline void sparx5_debugfs(struct sparx5 *sparx5) {} +#endif + /* sparx5_pgid.c */ enum sparx5_pgid_type { SPX5_PGID_FREE, diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c b/dri= vers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c index 95b93e46a41d..dd446b3a9f20 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c @@ -2035,7 +2035,6 @@ int sparx5_vcap_init(struct sparx5 *sparx5) const struct sparx5_vcap_inst *cfg; struct vcap_control *ctrl; struct vcap_admin *admin; - struct dentry *dir; int err =3D 0, idx; =20 /* Create a VCAP control instance that owns the platform specific VCAP @@ -2074,11 +2073,6 @@ int sparx5_vcap_init(struct sparx5 *sparx5) sparx5_vcap_port_key_selection(sparx5, admin); list_add_tail(&admin->list, &ctrl->list); } - dir =3D vcap_debugfs(sparx5->dev, sparx5->debugfs_root, ctrl); - for (idx =3D 0; idx < consts->n_ports; ++idx) - if (sparx5->ports[idx]) - vcap_port_debugfs(sparx5->dev, dir, ctrl, - sparx5->ports[idx]->ndev); =20 return err; } --=20 2.34.1 From nobody Mon May 11 01:05:44 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A32636EAB0; Wed, 6 May 2026 07:26:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; 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d="scan'208";a="57105539" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2026 00:26:15 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex1.mchp-main.com (10.10.87.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.37; Wed, 6 May 2026 00:26:15 -0700 Received: from DEN-DL-M70577.microsemi.net (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 6 May 2026 00:26:11 -0700 From: Daniel Machon Date: Wed, 6 May 2026 09:25:37 +0200 Subject: [PATCH net v2 2/4] net: sparx5: fix sleep in atomic context in MAC table access Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260506-misc-fixes-sparx5-lan969x-v2-2-fb236aa96908@microchip.com> References: <20260506-misc-fixes-sparx5-lan969x-v2-0-fb236aa96908@microchip.com> In-Reply-To: <20260506-misc-fixes-sparx5-lan969x-v2-0-fb236aa96908@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Steen Hegelund , , "Sebastian Andrzej Siewior" , Clark Williams , Steven Rostedt , Bjarni Jonasson , Lars Povlsen , Philipp Zabel , CC: , , , Steen Hegelund , X-Mailer: b4 0.14.3 sparx5_set_rx_mode() runs with netif_addr_lock_bh held and iterates dev->mc via __dev_mc_sync(), which per address calls sparx5_mc_sync() / sparx5_mc_unsync() -> sparx5_mact_learn() / sparx5_mact_forget(). These take sparx5->lock, a mutex, and then poll the MAC access command register with readx_poll_timeout(). A mutex may block, which is not allowed from atomic context. Convert the driver to the new .ndo_set_rx_mode_async callback introduced in commit 3554b4345d85 ("net: introduce ndo_set_rx_mode_async and netdev_rx_mode_work"). The async callback is invoked from process context, so the mutex and sleeping completion poll can remain. Observed with CONFIG_PROVE_LOCKING, CONFIG_DEBUG_SPINLOCK, CONFIG_DEBUG_MUTEXES and CONFIG_DEBUG_ATOMIC_SLEEP enabled: BUG: sleeping function called from invalid context at kernel/locking/mute= x.c:591 in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 217, name: ip preempt_count: 201, expected: 0 Call trace: __might_resched+0x144/0x248 __might_sleep+0x48/0x7c __mutex_lock+0x74/0x850 mutex_lock_nested+0x24/0x30 sparx5_mact_learn+0x78/0x100 sparx5_mc_sync+0x40/0x54 __hw_addr_sync_dev+0xc4/0x170 sparx5_set_rx_mode+0x4c/0x58 __dev_set_rx_mode+0x64/0xa4 __dev_open+0x1ec/0x26c Fixes: b37a1bae742f ("net: sparx5: add mactable support") Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c b/driver= s/net/ethernet/microchip/sparx5/sparx5_netdev.c index 1d34af78166a..1061874c9edc 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c @@ -162,13 +162,15 @@ static int sparx5_port_stop(struct net_device *ndev) return 0; } =20 -static void sparx5_set_rx_mode(struct net_device *dev) +static void sparx5_set_rx_mode(struct net_device *dev, + struct netdev_hw_addr_list *uc, + struct netdev_hw_addr_list *mc) { struct sparx5_port *port =3D netdev_priv(dev); struct sparx5 *sparx5 =3D port->sparx5; =20 if (!test_bit(port->portno, sparx5->bridge_mask)) - __dev_mc_sync(dev, sparx5_mc_sync, sparx5_mc_unsync); + __hw_addr_sync_dev(mc, dev, sparx5_mc_sync, sparx5_mc_unsync); } =20 static int sparx5_port_get_phys_port_name(struct net_device *dev, @@ -249,7 +251,7 @@ static const struct net_device_ops sparx5_port_netdev_o= ps =3D { .ndo_open =3D sparx5_port_open, .ndo_stop =3D sparx5_port_stop, .ndo_start_xmit =3D sparx5_port_xmit_impl, - .ndo_set_rx_mode =3D sparx5_set_rx_mode, + .ndo_set_rx_mode_async =3D sparx5_set_rx_mode, .ndo_get_phys_port_name =3D sparx5_port_get_phys_port_name, .ndo_set_mac_address =3D sparx5_set_mac_address, .ndo_validate_addr =3D eth_validate_addr, --=20 2.34.1 From nobody Mon May 11 01:05:44 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5243137AA75; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260506-misc-fixes-sparx5-lan969x-v2-3-fb236aa96908@microchip.com> References: <20260506-misc-fixes-sparx5-lan969x-v2-0-fb236aa96908@microchip.com> In-Reply-To: <20260506-misc-fixes-sparx5-lan969x-v2-0-fb236aa96908@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Steen Hegelund , , "Sebastian Andrzej Siewior" , Clark Williams , Steven Rostedt , Bjarni Jonasson , Lars Povlsen , Philipp Zabel , CC: , , , Steen Hegelund , , Andrew Lunn X-Mailer: b4 0.14.3 The TSN SKUs in enum spx5_target_chiptype have incorrect IDs: SPX5_TARGET_CT_7546TSN =3D 0x47546, SPX5_TARGET_CT_7549TSN =3D 0x47549, SPX5_TARGET_CT_7552TSN =3D 0x47552, SPX5_TARGET_CT_7556TSN =3D 0x47556, SPX5_TARGET_CT_7558TSN =3D 0x47558, The value read back from the chip is GCB_CHIP_ID_PART_ID, which is a GENMASK(27, 12) field, i.e. at most 16 bits wide. It can never match these IDs, so probing a TSN part fails with a "Target not supported" error. Fix the enum to use the actual 16-bit part IDs returned by the hardware: 0x0546, 0x0549, 0x0552, 0x0556 and 0x0558. Reported-by: Andrew Lunn Fixes: 3cfa11bac9bb ("net: sparx5: add the basic sparx5 driver") Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/= net/ethernet/microchip/sparx5/sparx5_main.h index d5e6644ff124..078e02627394 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -31,11 +31,11 @@ enum spx5_target_chiptype { SPX5_TARGET_CT_7552 =3D 0x7552, /* SparX-5-128 Enterprise */ SPX5_TARGET_CT_7556 =3D 0x7556, /* SparX-5-160 Enterprise */ SPX5_TARGET_CT_7558 =3D 0x7558, /* SparX-5-200 Enterprise */ - SPX5_TARGET_CT_7546TSN =3D 0x47546, /* SparX-5-64i Industrial */ - SPX5_TARGET_CT_7549TSN =3D 0x47549, /* SparX-5-90i Industrial */ - SPX5_TARGET_CT_7552TSN =3D 0x47552, /* SparX-5-128i Industrial */ - SPX5_TARGET_CT_7556TSN =3D 0x47556, /* SparX-5-160i Industrial */ - SPX5_TARGET_CT_7558TSN =3D 0x47558, /* SparX-5-200i Industrial */ + SPX5_TARGET_CT_7546TSN =3D 0x0546, /* SparX-5-64i Industrial */ + SPX5_TARGET_CT_7549TSN =3D 0x0549, /* SparX-5-90i Industrial */ + SPX5_TARGET_CT_7552TSN =3D 0x0552, /* SparX-5-128i Industrial */ + SPX5_TARGET_CT_7556TSN =3D 0x0556, /* SparX-5-160i Industrial */ + SPX5_TARGET_CT_7558TSN =3D 0x0558, /* SparX-5-200i Industrial */ SPX5_TARGET_CT_LAN9694 =3D 0x9694, /* lan969x-40 */ SPX5_TARGET_CT_LAN9691VAO =3D 0x9691, /* lan969x-40-VAO */ SPX5_TARGET_CT_LAN9694TSN =3D 0x9695, /* lan969x-40-TSN */ --=20 2.34.1 From nobody Mon May 11 01:05:44 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A234C371046; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260506-misc-fixes-sparx5-lan969x-v2-4-fb236aa96908@microchip.com> References: <20260506-misc-fixes-sparx5-lan969x-v2-0-fb236aa96908@microchip.com> In-Reply-To: <20260506-misc-fixes-sparx5-lan969x-v2-0-fb236aa96908@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Steen Hegelund , , "Sebastian Andrzej Siewior" , Clark Williams , Steven Rostedt , Bjarni Jonasson , Lars Povlsen , Philipp Zabel , CC: , , , Steen Hegelund , , Andrew Lunn X-Mailer: b4 0.14.3 sparx5_port_init() only invokes sparx5_serdes_set() and the associated shadow-device enable and low-speed device switch for SGMII and QSGMII. On any port with a high-speed primary device (DEV5G/DEV10G/DEV25G) configured for 1000BASE-X the serdes is therefore left uninitialized, the DEV2G5 shadow is never enabled, and the port stays pointed at its high-speed device rather than the DEV2G5. The PCS1G block looks healthy in isolation, but no frames reach the link partner. Add 1000BASE-X to the check so the same three steps run. Note: the same issue might apply to 2500BASE-X, but that will, eventually, be addressed in a separate commit. Reported-by: Andrew Lunn Fixes: 946e7fd5053a ("net: sparx5: add port module support") Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/sparx5_port.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/= net/ethernet/microchip/sparx5/sparx5_port.c index 04bc8fffaf96..62c49893de3c 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c @@ -1128,7 +1128,8 @@ int sparx5_port_init(struct sparx5 *sparx5, DEV2G5_PCS1G_SD_CFG(port->portno)); =20 if (conf->portmode =3D=3D PHY_INTERFACE_MODE_QSGMII || - conf->portmode =3D=3D PHY_INTERFACE_MODE_SGMII) { + conf->portmode =3D=3D PHY_INTERFACE_MODE_SGMII || + conf->portmode =3D=3D PHY_INTERFACE_MODE_1000BASEX) { err =3D sparx5_serdes_set(sparx5, port, conf); if (err) return err; --=20 2.34.1