From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9EC848C3FA for ; Wed, 6 May 2026 18:23:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091842; cv=none; b=pI0xQ6PP4ID7wabs4c/YYlC+qGUijJCP0NlYMOAMusTB/1FVb/o0+FoHH3S5hLh8OsjvaquYoF6MomFWUWqhU5iFq+Pxqu52DJkPmh26H+natZVK/0Tooo4vMiVvLvgTiVgF9cXcX9O0yVB7nISsauOSXGJATgiHTpAEFJXKA5c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091842; c=relaxed/simple; bh=LIfdeYTBQzESHf0dap81X1vvmfJl+vklqFORmyoGYd8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hsGcECWoRAZvdjSbscElPrAb/Y2XVjT4OtGIQoe5fqUAMj5bPdyVUo+WP/6D9HYf7po80uJ9jDGa2fMD4m2fuDZce3t/CQ1IRlG6MdwpcRF7yPeoQXLANmQsgW5aksgy+9yPZIIxbSTJdW5e38V1vFRg41iZhZuQMt/EK+NfoFE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=VLk3MA0h; arc=none smtp.client-ip=209.85.128.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="VLk3MA0h" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-4891f625344so62235e9.0 for ; Wed, 06 May 2026 11:23:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091836; x=1778696636; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LdXx2gd2gTnToTt9XBiE+O899xdtsxweVQw+h4yD4a0=; b=VLk3MA0h7saapiSHbcNl5vFiqyC49U80iKUpnq6BXuWMeLT4pKExUFf/KFQ+JK6iYD 5qOsFIKjtlKu4I2ffa9LSzcXnfsGH1bdwTx2pbPKo1nizipZ8JW42qUrfHw8xbplAB5e 94ECfLi5QcWLfkEfG0GQcLZ7EqWa+ogCG9dbQ25KfJOYppfBNNTUszmBRll7EPS7X7db Nxvm/FvHstjSWDqbh3p46JZ6V+YtgMZPM/hO/mauuasgHG+u+eU0Y8/83V5yFlu68Gkj WOrd6IsP/Jc+phnUMMvUitstkBmNTLbglPbiIJkiszTUuiemRJ497jRQxLcpXAS7uh4h 1SsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091836; x=1778696636; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=LdXx2gd2gTnToTt9XBiE+O899xdtsxweVQw+h4yD4a0=; b=VM9//5lVYSaKs6XQE1/bztL2mONaDoH4FKICbfWiuQfmBt+FJXs5PoiijZeAMOIIb9 vco74uMYi85OaFKubTMX3ISJarZtOoZdSZzsMCFuKs1XbKRyqJd/oNJxHH5FQHPN6n5O xiRtumFJysnFv5MWOedEaYG3rCtmSNt+v1wJRUmNoKsEs6k/8fu077x95HZHGhFcdzyy btgcSSmlumXez+fogVNsMHLAUOWFixpprnB6gC+dX+Akb+xKzQ9evz4TFd5YsLRZ32MU AN4ngU3w1jLjTor+k23E7zE+bvsJnT0KtMdp3hJTD9N+fE8x5weQmL9S6vlThMweiReR KCKw== X-Forwarded-Encrypted: i=1; AFNElJ/1+mJ41auwkyows1f1GLf1uXPr7DUQFxqLHGMOw5TgNxk2i6VyMNz4LvFvkERfgrQ/50UDcQvby1Vsesc=@vger.kernel.org X-Gm-Message-State: AOJu0YzifoovDsD+K+zsRqpsP7R3RUggXHivZ0XbKpQxw/EDaCdmJSww aR3Qfk8/KEEHm7G/EQffsmNp80iHeFMJgxIn+fsOXU4P2oMdXWK8+WT+IZEzp4JjmPE= X-Gm-Gg: AeBDieuSWmfiZNWkc1QpRlVdpbhoiyTJ2FCy+SeQ5IuyzORRMQksRRXRLiiyu15lLdb 8VS6Rmv5cC27m1FGFM+8DLQsH9309mMAgV0h70KrwFf5bJdtSy9dSecFFYQIz5EWgNbqPT91AXW QVYPEZyst/ChW4HuacyOT8jCqxWnj1qxeoepVQ9FVx7PTJbJzF+ckWqUinWzzt7+AorK3/HVDTL RSsv28xJWyjHdd9P0Q1OAEBpfXEi0B4Fq/ostMxiwDuZEBbe7riuGNjiCMNx+5fsp5pGSbJ8A3U /ITWpgz3NbcS4bwAP7dkPXQ0JYljKPACtS7NzyuG6sFgc93ZKTZqtBFH01rS51Z57O8a7/+81yU /JwAU8CEt5XBO2bNN3oUcVnxfXl5BxML3lCO+uki6ou6/GpTDQblSnZAyySiBnKunn0jh4uloaD hP3HnZy+R5FZ0slrPsvHv7JWsjQWD7xtbpDBH60qeF5xRNHA== X-Received: by 2002:a05:600d:d:b0:48a:53cb:8604 with SMTP id 5b1f17b1804b1-48e522c0909mr52615305e9.14.1778091836305; Wed, 06 May 2026 11:23:56 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.23.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:23:55 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:39 +0100 Subject: [PATCH 01/13] media: imx355: Remove duplicated registers from the mode tables Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-1-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 A large number of registers are identical within all the modes. Move those to imx355_global_regs. Signed-off-by: Dave Stevenson Reviewed-by: Jacopo Mondi --- drivers/media/i2c/imx355.c | 314 +++--------------------------------------= ---- 1 file changed, 20 insertions(+), 294 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index f9ec13bb27d1..a694d4d742ae 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -226,6 +226,26 @@ static const struct imx355_reg imx355_global_regs[] = =3D { { 0x68b0, 0x00 }, { 0x3058, 0x00 }, { 0x305a, 0x00 }, + { 0x0112, 0x0a }, + { 0x0113, 0x0a }, + { 0x0114, 0x03 }, + { 0x0301, 0x05 }, + { 0x0303, 0x01 }, + { 0x0305, 0x02 }, + { 0x030d, 0x02 }, + { 0x0310, 0x00 }, + { 0x0220, 0x00 }, + { 0x0222, 0x01 }, + { 0x0820, 0x0b }, + { 0x0821, 0x40 }, + { 0x3088, 0x04 }, + { 0x6813, 0x02 }, + { 0x6835, 0x07 }, + { 0x6836, 0x01 }, + { 0x6837, 0x04 }, + { 0x684d, 0x07 }, + { 0x684e, 0x01 }, + { 0x684f, 0x04 }, }; =20 static const struct imx355_reg_list imx355_global_setting =3D { @@ -234,9 +254,6 @@ static const struct imx355_reg_list imx355_global_setti= ng =3D { }; =20 static const struct imx355_reg mode_3268x2448_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x0e }, { 0x0343, 0x58 }, { 0x0340, 0x0a }, @@ -249,8 +266,6 @@ static const struct imx355_reg mode_3268x2448_regs[] = =3D { { 0x0349, 0xcb }, { 0x034a, 0x09 }, { 0x034b, 0x97 }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -258,30 +273,11 @@ static const struct imx355_reg mode_3268x2448_regs[] = =3D { { 0x034d, 0xc4 }, { 0x034e, 0x09 }, { 0x034f, 0x90 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_3264x2448_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x0e }, { 0x0343, 0x58 }, { 0x0340, 0x0a }, @@ -294,8 +290,6 @@ static const struct imx355_reg mode_3264x2448_regs[] = =3D { { 0x0349, 0xc7 }, { 0x034a, 0x09 }, { 0x034b, 0x97 }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -303,30 +297,11 @@ static const struct imx355_reg mode_3264x2448_regs[] = =3D { { 0x034d, 0xc0 }, { 0x034e, 0x09 }, { 0x034f, 0x90 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_3280x2464_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x0e }, { 0x0343, 0x58 }, { 0x0340, 0x0a }, @@ -339,8 +314,6 @@ static const struct imx355_reg mode_3280x2464_regs[] = =3D { { 0x0349, 0xcf }, { 0x034a, 0x09 }, { 0x034b, 0x9f }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -348,30 +321,11 @@ static const struct imx355_reg mode_3280x2464_regs[] = =3D { { 0x034d, 0xd0 }, { 0x034e, 0x09 }, { 0x034f, 0xa0 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1940x1096_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x0e }, { 0x0343, 0x58 }, { 0x0340, 0x05 }, @@ -384,8 +338,6 @@ static const struct imx355_reg mode_1940x1096_regs[] = =3D { { 0x0349, 0x33 }, { 0x034a, 0x06 }, { 0x034b, 0xf3 }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -393,30 +345,11 @@ static const struct imx355_reg mode_1940x1096_regs[] = =3D { { 0x034d, 0x94 }, { 0x034e, 0x04 }, { 0x034f, 0x48 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1936x1096_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x0e }, { 0x0343, 0x58 }, { 0x0340, 0x05 }, @@ -429,8 +362,6 @@ static const struct imx355_reg mode_1936x1096_regs[] = =3D { { 0x0349, 0x2f }, { 0x034a, 0x06 }, { 0x034b, 0xf3 }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -438,30 +369,11 @@ static const struct imx355_reg mode_1936x1096_regs[] = =3D { { 0x034d, 0x90 }, { 0x034e, 0x04 }, { 0x034f, 0x48 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1924x1080_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x0e }, { 0x0343, 0x58 }, { 0x0340, 0x05 }, @@ -474,8 +386,6 @@ static const struct imx355_reg mode_1924x1080_regs[] = =3D { { 0x0349, 0x2b }, { 0x034a, 0x06 }, { 0x034b, 0xeb }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -483,30 +393,11 @@ static const struct imx355_reg mode_1924x1080_regs[] = =3D { { 0x034d, 0x84 }, { 0x034e, 0x04 }, { 0x034f, 0x38 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1920x1080_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x0e }, { 0x0343, 0x58 }, { 0x0340, 0x05 }, @@ -519,8 +410,6 @@ static const struct imx355_reg mode_1920x1080_regs[] = =3D { { 0x0349, 0x27 }, { 0x034a, 0x06 }, { 0x034b, 0xeb }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -528,30 +417,11 @@ static const struct imx355_reg mode_1920x1080_regs[] = =3D { { 0x034d, 0x80 }, { 0x034e, 0x04 }, { 0x034f, 0x38 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1640x1232_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x07 }, { 0x0343, 0x2c }, { 0x0340, 0x05 }, @@ -564,8 +434,6 @@ static const struct imx355_reg mode_1640x1232_regs[] = =3D { { 0x0349, 0xcf }, { 0x034a, 0x09 }, { 0x034b, 0x9f }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -573,30 +441,11 @@ static const struct imx355_reg mode_1640x1232_regs[] = =3D { { 0x034d, 0x68 }, { 0x034e, 0x04 }, { 0x034f, 0xd0 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1640x922_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x07 }, { 0x0343, 0x2c }, { 0x0340, 0x05 }, @@ -609,8 +458,6 @@ static const struct imx355_reg mode_1640x922_regs[] =3D= { { 0x0349, 0xcf }, { 0x034a, 0x08 }, { 0x034b, 0x63 }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -618,30 +465,11 @@ static const struct imx355_reg mode_1640x922_regs[] = =3D { { 0x034d, 0x68 }, { 0x034e, 0x03 }, { 0x034f, 0x9a }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1300x736_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x07 }, { 0x0343, 0x2c }, { 0x0340, 0x05 }, @@ -654,8 +482,6 @@ static const struct imx355_reg mode_1300x736_regs[] =3D= { { 0x0349, 0x7f }, { 0x034a, 0x07 }, { 0x034b, 0xaf }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -663,30 +489,11 @@ static const struct imx355_reg mode_1300x736_regs[] = =3D { { 0x034d, 0x14 }, { 0x034e, 0x02 }, { 0x034f, 0xe0 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1296x736_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x07 }, { 0x0343, 0x2c }, { 0x0340, 0x05 }, @@ -699,8 +506,6 @@ static const struct imx355_reg mode_1296x736_regs[] =3D= { { 0x0349, 0x77 }, { 0x034a, 0x07 }, { 0x034b, 0xaf }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -708,30 +513,11 @@ static const struct imx355_reg mode_1296x736_regs[] = =3D { { 0x034d, 0x10 }, { 0x034e, 0x02 }, { 0x034f, 0xe0 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1284x720_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x07 }, { 0x0343, 0x2c }, { 0x0340, 0x05 }, @@ -744,8 +530,6 @@ static const struct imx355_reg mode_1284x720_regs[] =3D= { { 0x0349, 0x6f }, { 0x034a, 0x07 }, { 0x034b, 0x9f }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -753,30 +537,11 @@ static const struct imx355_reg mode_1284x720_regs[] = =3D { { 0x034d, 0x04 }, { 0x034e, 0x02 }, { 0x034f, 0xd0 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_1280x720_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x07 }, { 0x0343, 0x2c }, { 0x0340, 0x05 }, @@ -789,8 +554,6 @@ static const struct imx355_reg mode_1280x720_regs[] =3D= { { 0x0349, 0x67 }, { 0x034a, 0x07 }, { 0x034b, 0x9f }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -798,30 +561,11 @@ static const struct imx355_reg mode_1280x720_regs[] = =3D { { 0x034d, 0x00 }, { 0x034e, 0x02 }, { 0x034f, 0xd0 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const struct imx355_reg mode_820x616_regs[] =3D { - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, { 0x0342, 0x0e }, { 0x0343, 0x58 }, { 0x0340, 0x02 }, @@ -834,8 +578,6 @@ static const struct imx355_reg mode_820x616_regs[] =3D { { 0x0349, 0xcf }, { 0x034a, 0x09 }, { 0x034b, 0x9f }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, { 0x0900, 0x01 }, { 0x0901, 0x44 }, { 0x0902, 0x00 }, @@ -843,24 +585,8 @@ static const struct imx355_reg mode_820x616_regs[] =3D= { { 0x034d, 0x34 }, { 0x034e, 0x02 }, { 0x034f, 0x68 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030b, 0x01 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, { 0x0700, 0x02 }, { 0x0701, 0x78 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, }; =20 static const char * const imx355_test_pattern_menu[] =3D { --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9504E4B8DF1 for ; Wed, 6 May 2026 18:23:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091840; cv=none; b=Li5c9N3qvRHN5mh0tmfCvCAHYX3jKX8B7BU6RQFaHb6wo5y3Xj0rSu77M5SqLHvn5xDzGuhu8cPIHJCmw/ocODTBaQdlMu5BTKwgRMI4CjT09wwfwm8fCCEPSRBqiVW/mapvt/7/DFNOjYbxqWD9cpEuTaxbmEHnBDZqSLKZJ4g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091840; c=relaxed/simple; bh=lYPMeTtJIh2seYp9KiFqg9l1hNCBdVMTsM9/3i6Rat8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=E5AUMpUKZQ0bu1OlMSlSz/cBKPstDwaE8awcOctQP0MfIWABRkawWNaKQzk1ngK7q+n34UrFcdeWeTNgwxpuTto1SnQEcPa0HIFji2D465EmhBK+w1WYviNV2DCUyzKd7zzaPVirERT3djPK2HB4J/GnUmwHrvEWnIhpDmOKtmQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=INGWob7r; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="INGWob7r" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-4852b81c73aso51609785e9.3 for ; Wed, 06 May 2026 11:23:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091837; x=1778696637; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VDZm8vEfumhsJUxXF2jDl4SATPQGfaZBNb3h0++AQlg=; b=INGWob7rc0LzhGywrtAwl6NgFt7XTl3bPbLDzHcq78gcqRSS4dlq8Hh9oTIujtOfRm Yh6zI2wBhaUqTKWI+TCnqqUOSUx4qnGWvDngr8ZYiuQdjgITAmSiYI55Qvd32IGdoAQd w9WieIWsTqz5GaVs5z0CxkasXf+Coa1Kl5dqginn+SqKWLufRK5CJT52ibR8csQXui8A AEHPcSPRW7MneAa9HPw4zdwkCyL36FVBlp8mjZZVOnHaGgRIxsUQnUR6ncJQt2EpIUKD ZErOWoaJ5ix5lreFQTQxYufqhUI1VI/fZ/Im+qV7n3EURMkwb4K8cDJQnPaZDBNjOWBq Hh9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091837; x=1778696637; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=VDZm8vEfumhsJUxXF2jDl4SATPQGfaZBNb3h0++AQlg=; b=YyvMrvB5FoZ/vJdvXjVOPajKJREhY/3d4PmuCY2E7cxrM4DqjLdB+cqvO89D/qJ7kb 77PmHRN2IfXrVQ+ljWYqAn4mkMv8d69S5aHywW6RubU4SEjqgHDcKOwbQR0xJ74yHqjI tGdzstl1ksd5/GnSLVF3LdjPkk2JaSWB6aFHL5iMLcEAZmOxdGEr0wjo+XxzjHhKwQPF lh+uGrRixbqy4ud9Rgz70npV0a8h6v8zfrsgy+LFIuaNel/p00WPJ6yPKo6HaBpz4uP0 uEAJsbeZN0cfIKNBHKA4BXEzf41da/n8aATcn0k8lAt1Ih2+81ejBYqCMBPcst+7HKl/ HJfw== X-Forwarded-Encrypted: i=1; AFNElJ/MdNCoG/VPUqAxUYIZNCq/cD+1m1PT9Ci5/hu+zX4KCGgWTgap0tNMvXGRKi1GPad5E6InDScXp6jNx4k=@vger.kernel.org X-Gm-Message-State: AOJu0Yw/PJ2ra4pLHDhDt8MjlZwlFVY6w+Jp1f9y/cIi1MGFHpT+34eN qy2eofu14ajxXemKJetUJzwPg7a1zJuXZAqYi+kGBa3pS3BCOjxNmCWlPoBjKpzMt7s= X-Gm-Gg: AeBDievbSrEsWmK4QdCl2vMlO+upZVqrKGE687b8x35yDWNoztCsrEFR6Mx6ToYYY4T A8YOGpBDrRVnJpOaDMOTDeNkC0Ca/wU/ZVogkcmQvI9AgHknB+YZGhnfpkaWDC8+YR3g9IYkI07 yViuSyto3xCDD/v5c6lz+eLCv7pt0wBnYF+zdxN0ik/0wWu4neb9PVlaUzZ0jeJDZJmKKhgEpo8 qKMkJsyC7XttobgZUmGu/FNDVL1hmqnupBQQkNjCJU6ayXdYyBe4QZIxPphOdPpWc/Yxn1NPzkr o2p9I4+toq8UhyFPjf2iGzDRbcYy531F8Lp83IQ4eXFGcbsTgN5XXZbbIwDfQh/zp3sxxTYdvzR /kK/5wDskW/0B4G09/Qrw5WgdsPhc6rL6tyfzmOuApEIY89te/HvqXabebnnFo9bQzTh4XWGT9/ U0oirKZeKaOjIidXgl+dg83CXZjul/dESJ7+Q= X-Received: by 2002:a05:600c:a111:b0:488:79a3:f04c with SMTP id 5b1f17b1804b1-48e51f46d1bmr59921395e9.27.1778091836977; Wed, 06 May 2026 11:23:56 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.23.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:23:56 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:40 +0100 Subject: [PATCH 02/13] media: imx355: Remove setting FRM_LENGTH_LINES in the mode regs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-2-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 Registers 0x0340 and 0x0341 (FRM_LENGTH_LINES) are already written from the set_ctrl(V4L2_CID_VBLANK) handler, so don't write them from the mode register list. Signed-off-by: Dave Stevenson Reviewed-by: Jacopo Mondi --- drivers/media/i2c/imx355.c | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index a694d4d742ae..8ea510218c7c 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -256,8 +256,6 @@ static const struct imx355_reg_list imx355_global_setti= ng =3D { static const struct imx355_reg mode_3268x2448_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0340, 0x0a }, - { 0x0341, 0x37 }, { 0x0344, 0x00 }, { 0x0345, 0x08 }, { 0x0346, 0x00 }, @@ -280,8 +278,6 @@ static const struct imx355_reg mode_3268x2448_regs[] = =3D { static const struct imx355_reg mode_3264x2448_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0340, 0x0a }, - { 0x0341, 0x37 }, { 0x0344, 0x00 }, { 0x0345, 0x08 }, { 0x0346, 0x00 }, @@ -304,8 +300,6 @@ static const struct imx355_reg mode_3264x2448_regs[] = =3D { static const struct imx355_reg mode_3280x2464_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0340, 0x0a }, - { 0x0341, 0x37 }, { 0x0344, 0x00 }, { 0x0345, 0x00 }, { 0x0346, 0x00 }, @@ -328,8 +322,6 @@ static const struct imx355_reg mode_3280x2464_regs[] = =3D { static const struct imx355_reg mode_1940x1096_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x02 }, { 0x0345, 0xa0 }, { 0x0346, 0x02 }, @@ -352,8 +344,6 @@ static const struct imx355_reg mode_1940x1096_regs[] = =3D { static const struct imx355_reg mode_1936x1096_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x02 }, { 0x0345, 0xa0 }, { 0x0346, 0x02 }, @@ -376,8 +366,6 @@ static const struct imx355_reg mode_1936x1096_regs[] = =3D { static const struct imx355_reg mode_1924x1080_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x02 }, { 0x0345, 0xa8 }, { 0x0346, 0x02 }, @@ -400,8 +388,6 @@ static const struct imx355_reg mode_1924x1080_regs[] = =3D { static const struct imx355_reg mode_1920x1080_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x02 }, { 0x0345, 0xa8 }, { 0x0346, 0x02 }, @@ -424,8 +410,6 @@ static const struct imx355_reg mode_1920x1080_regs[] = =3D { static const struct imx355_reg mode_1640x1232_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x00 }, { 0x0345, 0x00 }, { 0x0346, 0x00 }, @@ -448,8 +432,6 @@ static const struct imx355_reg mode_1640x1232_regs[] = =3D { static const struct imx355_reg mode_1640x922_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x00 }, { 0x0345, 0x00 }, { 0x0346, 0x01 }, @@ -472,8 +454,6 @@ static const struct imx355_reg mode_1640x922_regs[] =3D= { static const struct imx355_reg mode_1300x736_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x01 }, { 0x0345, 0x58 }, { 0x0346, 0x01 }, @@ -496,8 +476,6 @@ static const struct imx355_reg mode_1300x736_regs[] =3D= { static const struct imx355_reg mode_1296x736_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x01 }, { 0x0345, 0x58 }, { 0x0346, 0x01 }, @@ -520,8 +498,6 @@ static const struct imx355_reg mode_1296x736_regs[] =3D= { static const struct imx355_reg mode_1284x720_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x01 }, { 0x0345, 0x68 }, { 0x0346, 0x02 }, @@ -544,8 +520,6 @@ static const struct imx355_reg mode_1284x720_regs[] =3D= { static const struct imx355_reg mode_1280x720_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0340, 0x05 }, - { 0x0341, 0x1a }, { 0x0344, 0x01 }, { 0x0345, 0x68 }, { 0x0346, 0x02 }, @@ -568,8 +542,6 @@ static const struct imx355_reg mode_1280x720_regs[] =3D= { static const struct imx355_reg mode_820x616_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0340, 0x02 }, - { 0x0341, 0x8c }, { 0x0344, 0x00 }, { 0x0345, 0x00 }, { 0x0346, 0x00 }, --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C80B4BCABA for ; Wed, 6 May 2026 18:23:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091841; cv=none; b=idHF/8A1oCdUoXVi6YO/BM5tEOzFudBcizXlkSLC252uWLnzSliAI/D/mpIZdmJ3izrnHR1EPSuBBNMEeg9bihfLXWQ8Emf2hx/h6OvRc8qfg5BsVVCv4Drr2zL9Rd24Dv+IdnnNj0OfWpMVYJJ3a68Mht4ottgyoh4sfwHRlrQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091841; c=relaxed/simple; bh=nMxZJWXRnDgD43Ym7GG8iVNGW7Q2yrYU06E7kRyzgXc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GScLF3kfxk/DOcZSiYxNo1H77yWliIF2DuKesXtJsNvxQ8y249/+5M7aZdocfxu6uaaRDjLxdShp52cA+j8Mxr9mQXFEUldlba6IQ0yM5KGCzkD/ObXSY8t/QsqNFQg/zfwiBUm2tRLvzQF+n7LZVUkGurEjkjBizbcmzrW7NeM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=YgDfmjf/; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="YgDfmjf/" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so76057635e9.2 for ; Wed, 06 May 2026 11:23:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091838; x=1778696638; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PTmG4TheyujVIwA8IXh2Ny7XTEWWYA1UYh1rw2dfDn8=; b=YgDfmjf/YpaL9SBUlf1IGK/mWwZixtIWkZnWxuZHNU0QmOXWA6wWMSLPwYl+Mnq2fT J0DpDnMf2/5JRXSze0J4LP2lNTWhVzgg1XJy1i/SQNOIdwotq9ZkAZkZ0acc8zJKEBmb 5AoP5AZ/Fu+UfFC2gU1gWhOlGeM6DWhuDCEC+BVfJSwNJW7A6UTX4TaVjaYuB24KynTT 3FmSGwPsLdleuqy31jo4s6gXYou3iPBNE8BxPYY60+fjVfGcqsZ+r8vhIxPpuIy/Sz/h SpfXjJZvvjEMSTZEY3xPTrNKBM7lykzuwR6ws68HXBfU9EtIX1e6DzFrhDnTI++dV3+u 9KjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091838; x=1778696638; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=PTmG4TheyujVIwA8IXh2Ny7XTEWWYA1UYh1rw2dfDn8=; b=deypOIMjLeoP5L24Uhqp/WK+atHfseF+TrsbpjSocQ8oUdhou4BwzPKaIiI5vtKNib BFF4UMVSnhuy0QSZRnt7ApDBCPOVbmQDONBdwS5uQQ69Qi/BsgkWLIKyPP7eWtkPkQeB VM41LdWbWLOPHQUiZDdW8BnjPlk3A1+9fpLprC0sPqjrb/EmBEG29H+0AS67wiHmr+kH yB9I5fHKfpoaKpLFDdOz2RGLDOagd1KnYpN+80OOoQTEgJwmXLf1E/EjwcH8+v9MltKE UYwZsDR2xtn+QiZyatU6T4pHlF6QJg/EWR2LIOkOLlD5KNubs8s0dgqrN17DJ9YcOlDo FWvA== X-Forwarded-Encrypted: i=1; AFNElJ89PeuXmh9/nyPn5lBuEwzPNYbLSlN1UMBlXXtZr/pCdvB85ST52HWkubs6/8GlCOZzYMvDZ3X0eloQr2U=@vger.kernel.org X-Gm-Message-State: AOJu0Yxj9DLRbwKQl1moK0Toz/SCR0ripyJshNpybxE+evp2I3jCoghY CgvKIQI3dxPzuIPZdG2Polhvs2R7hVfnSD9aW0J7E3ZfRBxWayAeInjs/pFjmXc+kro= X-Gm-Gg: AeBDievUlrPx2UOuu8OWy0kKF/ndbP3yvJjtm6OxicsVLZsxZoWgI2XXNFXhBVtq6/N 2PQ/Lrza1ZNgx3RVF1wdKMogpDw7/Lxe6Tj2Uxrrg4pE8tSZ0Ay4ODBmZN/+U7juBToIfYApPQR fs/6NkWTtKpYZs9tJE79y/t7w/AnsMwwInY5HkNR0mvlgHbVNFCLIhLLwE7PEtivxzQqwbEViW+ qeA1h7hY/+eNy8+WgyGPbvujOyO5K3kvcdgVC1tCu+Gd2kc8yjjoubXEzQWiQj+BZxxPv8I7cv5 YxS6ybB/v1i8aQ7AQobi2VDN6N752iqDGO79rXe1n0uY/FEZGva29cTPubKY1Fy1p5I+AD0uGkQ jB5vpDUmJA8SlVnNmPiWqmyRAMLTFlOBRYiuyW9ayvxK61yvX8Us7NmLCwdZTMJBHVFziAToq7F bnddD0dAro3XuDVec4QYPLStmf X-Received: by 2002:a05:600c:17d0:b0:48e:526e:101a with SMTP id 5b1f17b1804b1-48e526e115bmr45169075e9.12.1778091837643; Wed, 06 May 2026 11:23:57 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.23.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:23:57 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:41 +0100 Subject: [PATCH 03/13] media: imx355: Programmatically set the crop parameters for each mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-3-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 Currently the cropping is set via register entries in the per mode register lists. Move those into the mode structure and set them programmatically. x_out_size and y_out_size are duplicates of width and height, but are retained in this patch for ease of review. Signed-off-by: Dave Stevenson --- drivers/media/i2c/imx355.c | 296 +++++++++++++++++++----------------------= ---- 1 file changed, 127 insertions(+), 169 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index 8ea510218c7c..6179fe74c897 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -34,6 +34,13 @@ #define IMX355_REG_FLL 0x0340 #define IMX355_FLL_MAX 0xffff =20 +#define IMX355_REG_X_ADD_START 0x0344 +#define IMX355_REG_Y_ADD_START 0x0346 +#define IMX355_REG_X_ADD_END 0x0348 +#define IMX355_REG_Y_ADD_END 0x034a +#define IMX355_REG_X_OUT_SIZE 0x034c +#define IMX355_REG_Y_OUT_SIZE 0x034e + /* Exposure control */ #define IMX355_REG_EXPOSURE 0x0202 #define IMX355_EXPOSURE_MIN 1 @@ -102,6 +109,13 @@ struct imx355_mode { =20 /* Default register values */ struct imx355_reg_list reg_list; + + u16 x_add_start; + u16 y_add_start; + u16 x_add_end; + u16 y_add_end; + u16 x_out_size; + u16 y_out_size; }; =20 struct imx355_clk_params { @@ -256,21 +270,9 @@ static const struct imx355_reg_list imx355_global_sett= ing =3D { static const struct imx355_reg mode_3268x2448_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0344, 0x00 }, - { 0x0345, 0x08 }, - { 0x0346, 0x00 }, - { 0x0347, 0x08 }, - { 0x0348, 0x0c }, - { 0x0349, 0xcb }, - { 0x034a, 0x09 }, - { 0x034b, 0x97 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, - { 0x034c, 0x0c }, - { 0x034d, 0xc4 }, - { 0x034e, 0x09 }, - { 0x034f, 0x90 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -278,21 +280,9 @@ static const struct imx355_reg mode_3268x2448_regs[] = =3D { static const struct imx355_reg mode_3264x2448_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0344, 0x00 }, - { 0x0345, 0x08 }, - { 0x0346, 0x00 }, - { 0x0347, 0x08 }, - { 0x0348, 0x0c }, - { 0x0349, 0xc7 }, - { 0x034a, 0x09 }, - { 0x034b, 0x97 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, - { 0x034c, 0x0c }, - { 0x034d, 0xc0 }, - { 0x034e, 0x09 }, - { 0x034f, 0x90 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -300,21 +290,9 @@ static const struct imx355_reg mode_3264x2448_regs[] = =3D { static const struct imx355_reg mode_3280x2464_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0344, 0x00 }, - { 0x0345, 0x00 }, - { 0x0346, 0x00 }, - { 0x0347, 0x00 }, - { 0x0348, 0x0c }, - { 0x0349, 0xcf }, - { 0x034a, 0x09 }, - { 0x034b, 0x9f }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, - { 0x034c, 0x0c }, - { 0x034d, 0xd0 }, - { 0x034e, 0x09 }, - { 0x034f, 0xa0 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -322,21 +300,9 @@ static const struct imx355_reg mode_3280x2464_regs[] = =3D { static const struct imx355_reg mode_1940x1096_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0344, 0x02 }, - { 0x0345, 0xa0 }, - { 0x0346, 0x02 }, - { 0x0347, 0xac }, - { 0x0348, 0x0a }, - { 0x0349, 0x33 }, - { 0x034a, 0x06 }, - { 0x034b, 0xf3 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, - { 0x034c, 0x07 }, - { 0x034d, 0x94 }, - { 0x034e, 0x04 }, - { 0x034f, 0x48 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -344,21 +310,9 @@ static const struct imx355_reg mode_1940x1096_regs[] = =3D { static const struct imx355_reg mode_1936x1096_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0344, 0x02 }, - { 0x0345, 0xa0 }, - { 0x0346, 0x02 }, - { 0x0347, 0xac }, - { 0x0348, 0x0a }, - { 0x0349, 0x2f }, - { 0x034a, 0x06 }, - { 0x034b, 0xf3 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, - { 0x034c, 0x07 }, - { 0x034d, 0x90 }, - { 0x034e, 0x04 }, - { 0x034f, 0x48 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -366,21 +320,9 @@ static const struct imx355_reg mode_1936x1096_regs[] = =3D { static const struct imx355_reg mode_1924x1080_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0344, 0x02 }, - { 0x0345, 0xa8 }, - { 0x0346, 0x02 }, - { 0x0347, 0xb4 }, - { 0x0348, 0x0a }, - { 0x0349, 0x2b }, - { 0x034a, 0x06 }, - { 0x034b, 0xeb }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, - { 0x034c, 0x07 }, - { 0x034d, 0x84 }, - { 0x034e, 0x04 }, - { 0x034f, 0x38 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -388,21 +330,9 @@ static const struct imx355_reg mode_1924x1080_regs[] = =3D { static const struct imx355_reg mode_1920x1080_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0344, 0x02 }, - { 0x0345, 0xa8 }, - { 0x0346, 0x02 }, - { 0x0347, 0xb4 }, - { 0x0348, 0x0a }, - { 0x0349, 0x27 }, - { 0x034a, 0x06 }, - { 0x034b, 0xeb }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, - { 0x034c, 0x07 }, - { 0x034d, 0x80 }, - { 0x034e, 0x04 }, - { 0x034f, 0x38 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -410,21 +340,9 @@ static const struct imx355_reg mode_1920x1080_regs[] = =3D { static const struct imx355_reg mode_1640x1232_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0344, 0x00 }, - { 0x0345, 0x00 }, - { 0x0346, 0x00 }, - { 0x0347, 0x00 }, - { 0x0348, 0x0c }, - { 0x0349, 0xcf }, - { 0x034a, 0x09 }, - { 0x034b, 0x9f }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, - { 0x034c, 0x06 }, - { 0x034d, 0x68 }, - { 0x034e, 0x04 }, - { 0x034f, 0xd0 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -432,21 +350,9 @@ static const struct imx355_reg mode_1640x1232_regs[] = =3D { static const struct imx355_reg mode_1640x922_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0344, 0x00 }, - { 0x0345, 0x00 }, - { 0x0346, 0x01 }, - { 0x0347, 0x30 }, - { 0x0348, 0x0c }, - { 0x0349, 0xcf }, - { 0x034a, 0x08 }, - { 0x034b, 0x63 }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, - { 0x034c, 0x06 }, - { 0x034d, 0x68 }, - { 0x034e, 0x03 }, - { 0x034f, 0x9a }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -454,21 +360,9 @@ static const struct imx355_reg mode_1640x922_regs[] = =3D { static const struct imx355_reg mode_1300x736_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0344, 0x01 }, - { 0x0345, 0x58 }, - { 0x0346, 0x01 }, - { 0x0347, 0xf0 }, - { 0x0348, 0x0b }, - { 0x0349, 0x7f }, - { 0x034a, 0x07 }, - { 0x034b, 0xaf }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, - { 0x034c, 0x05 }, - { 0x034d, 0x14 }, - { 0x034e, 0x02 }, - { 0x034f, 0xe0 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -476,21 +370,9 @@ static const struct imx355_reg mode_1300x736_regs[] = =3D { static const struct imx355_reg mode_1296x736_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0344, 0x01 }, - { 0x0345, 0x58 }, - { 0x0346, 0x01 }, - { 0x0347, 0xf0 }, - { 0x0348, 0x0b }, - { 0x0349, 0x77 }, - { 0x034a, 0x07 }, - { 0x034b, 0xaf }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, - { 0x034c, 0x05 }, - { 0x034d, 0x10 }, - { 0x034e, 0x02 }, - { 0x034f, 0xe0 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -498,21 +380,9 @@ static const struct imx355_reg mode_1296x736_regs[] = =3D { static const struct imx355_reg mode_1284x720_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0344, 0x01 }, - { 0x0345, 0x68 }, - { 0x0346, 0x02 }, - { 0x0347, 0x00 }, - { 0x0348, 0x0b }, - { 0x0349, 0x6f }, - { 0x034a, 0x07 }, - { 0x034b, 0x9f }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, - { 0x034c, 0x05 }, - { 0x034d, 0x04 }, - { 0x034e, 0x02 }, - { 0x034f, 0xd0 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -520,21 +390,9 @@ static const struct imx355_reg mode_1284x720_regs[] = =3D { static const struct imx355_reg mode_1280x720_regs[] =3D { { 0x0342, 0x07 }, { 0x0343, 0x2c }, - { 0x0344, 0x01 }, - { 0x0345, 0x68 }, - { 0x0346, 0x02 }, - { 0x0347, 0x00 }, - { 0x0348, 0x0b }, - { 0x0349, 0x67 }, - { 0x034a, 0x07 }, - { 0x034b, 0x9f }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, - { 0x034c, 0x05 }, - { 0x034d, 0x00 }, - { 0x034e, 0x02 }, - { 0x034f, 0xd0 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; @@ -542,21 +400,9 @@ static const struct imx355_reg mode_1280x720_regs[] = =3D { static const struct imx355_reg mode_820x616_regs[] =3D { { 0x0342, 0x0e }, { 0x0343, 0x58 }, - { 0x0344, 0x00 }, - { 0x0345, 0x00 }, - { 0x0346, 0x00 }, - { 0x0347, 0x00 }, - { 0x0348, 0x0c }, - { 0x0349, 0xcf }, - { 0x034a, 0x09 }, - { 0x034b, 0x9f }, { 0x0900, 0x01 }, { 0x0901, 0x44 }, { 0x0902, 0x00 }, - { 0x034c, 0x03 }, - { 0x034d, 0x34 }, - { 0x034e, 0x02 }, - { 0x034f, 0x68 }, { 0x0700, 0x02 }, { 0x0701, 0x78 }, }; @@ -590,6 +436,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_3280x2464_regs), .regs =3D mode_3280x2464_regs, }, + .x_add_start =3D 0x0000, + .y_add_start =3D 0x0000, + .x_add_end =3D 0x0ccf, + .y_add_end =3D 0x099f, + .x_out_size =3D 0x0cd0, + .y_out_size =3D 0x09a0, }, { .width =3D 3268, @@ -602,6 +454,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_3268x2448_regs), .regs =3D mode_3268x2448_regs, }, + .x_add_start =3D 0x0008, + .y_add_start =3D 0x0008, + .x_add_end =3D 0x0ccb, + .y_add_end =3D 0x997, + .x_out_size =3D 0x0cc4, + .y_out_size =3D 0x0990, }, { .width =3D 3264, @@ -614,6 +472,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_3264x2448_regs), .regs =3D mode_3264x2448_regs, }, + .x_add_start =3D 0x0008, + .y_add_start =3D 0x0008, + .x_add_end =3D 0x0cc7, + .y_add_end =3D 0x0997, + .x_out_size =3D 0x0cc0, + .y_out_size =3D 0x0990, }, { .width =3D 1940, @@ -626,6 +490,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1940x1096_regs), .regs =3D mode_1940x1096_regs, }, + .x_add_start =3D 0x02a0, + .y_add_start =3D 0x02ac, + .x_add_end =3D 0x0a33, + .y_add_end =3D 0x06f3, + .x_out_size =3D 0x0794, + .y_out_size =3D 0x0448, }, { .width =3D 1936, @@ -638,6 +508,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1936x1096_regs), .regs =3D mode_1936x1096_regs, }, + .x_add_start =3D 0x02a0, + .y_add_start =3D 0x02ac, + .x_add_end =3D 0x0a2f, + .y_add_end =3D 0x06f3, + .x_out_size =3D 0x0790, + .y_out_size =3D 0x0448, }, { .width =3D 1924, @@ -650,6 +526,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1924x1080_regs), .regs =3D mode_1924x1080_regs, }, + .x_add_start =3D 0x02a8, + .y_add_start =3D 0x02b4, + .x_add_end =3D 0x0a2b, + .y_add_end =3D 0x06eb, + .x_out_size =3D 0x0784, + .y_out_size =3D 0x0438, }, { .width =3D 1920, @@ -662,6 +544,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1920x1080_regs), .regs =3D mode_1920x1080_regs, }, + .x_add_start =3D 0x02a8, + .y_add_start =3D 0x02b4, + .x_add_end =3D 0x0a27, + .y_add_end =3D 0x06eb, + .x_out_size =3D 0x0780, + .y_out_size =3D 0x0438, }, { .width =3D 1640, @@ -674,6 +562,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1640x1232_regs), .regs =3D mode_1640x1232_regs, }, + .x_add_start =3D 0x0000, + .y_add_start =3D 0x0000, + .x_add_end =3D 0x0ccf, + .y_add_end =3D 0x099f, + .x_out_size =3D 0x0668, + .y_out_size =3D 0x04d0, }, { .width =3D 1640, @@ -686,6 +580,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1640x922_regs), .regs =3D mode_1640x922_regs, }, + .x_add_start =3D 0x0000, + .y_add_start =3D 0x0130, + .x_add_end =3D 0x0ccf, + .y_add_end =3D 0x0863, + .x_out_size =3D 0x0668, + .y_out_size =3D 0x039a, }, { .width =3D 1300, @@ -698,6 +598,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1300x736_regs), .regs =3D mode_1300x736_regs, }, + .x_add_start =3D 0x0158, + .y_add_start =3D 0x01f0, + .x_add_end =3D 0x0b7f, + .y_add_end =3D 0x07af, + .x_out_size =3D 0x0514, + .y_out_size =3D 0x02e0, }, { .width =3D 1296, @@ -710,6 +616,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1296x736_regs), .regs =3D mode_1296x736_regs, }, + .x_add_start =3D 0x0158, + .y_add_start =3D 0x01f0, + .x_add_end =3D 0x0b77, + .y_add_end =3D 0x07af, + .x_out_size =3D 0x0510, + .y_out_size =3D 0x02e0, }, { .width =3D 1284, @@ -722,6 +634,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1284x720_regs), .regs =3D mode_1284x720_regs, }, + .x_add_start =3D 0x0168, + .y_add_start =3D 0x0200, + .x_add_end =3D 0x0b6f, + .y_add_end =3D 0x079f, + .x_out_size =3D 0x0504, + .y_out_size =3D 0x02d0, }, { .width =3D 1280, @@ -734,6 +652,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_1280x720_regs), .regs =3D mode_1280x720_regs, }, + .x_add_start =3D 0x0168, + .y_add_start =3D 0x0200, + .x_add_end =3D 0x0b67, + .y_add_end =3D 0x079f, + .x_out_size =3D 0x0500, + .y_out_size =3D 0x02d0, }, { .width =3D 820, @@ -746,6 +670,12 @@ static const struct imx355_mode supported_modes[] =3D { .num_of_regs =3D ARRAY_SIZE(mode_820x616_regs), .regs =3D mode_820x616_regs, }, + .x_add_start =3D 0x0000, + .y_add_start =3D 0x0000, + .x_add_end =3D 0x0ccf, + .y_add_end =3D 0x099f, + .x_out_size =3D 0x0334, + .y_out_size =3D 0x0268, }, }; =20 @@ -1076,6 +1006,7 @@ imx355_set_pad_format(struct v4l2_subdev *sd, static int imx355_start_streaming(struct imx355 *imx355) { const struct imx355_reg_list *reg_list; + const struct imx355_mode *mode; int ret; =20 /* Global Setting */ @@ -1087,13 +1018,40 @@ static int imx355_start_streaming(struct imx355 *im= x355) } =20 /* Apply default values of current mode */ - reg_list =3D &imx355->cur_mode->reg_list; + mode =3D imx355->cur_mode; + reg_list =3D &mode->reg_list; ret =3D imx355_write_regs(imx355, reg_list->regs, reg_list->num_of_regs); if (ret) { dev_err(imx355->dev, "failed to set mode"); return ret; } =20 + /* Set readout crop and size registers */ + ret =3D imx355_write_reg(imx355, IMX355_REG_X_ADD_START, 2, + mode->x_add_start); + if (ret) + return ret; + ret =3D imx355_write_reg(imx355, IMX355_REG_Y_ADD_START, 2, + mode->y_add_start); + if (ret) + return ret; + ret =3D imx355_write_reg(imx355, IMX355_REG_X_ADD_END, 2, + mode->x_add_end); + if (ret) + return ret; + ret =3D imx355_write_reg(imx355, IMX355_REG_Y_ADD_END, 2, + mode->y_add_end); + if (ret) + return ret; + ret =3D imx355_write_reg(imx355, IMX355_REG_X_OUT_SIZE, 2, + mode->x_out_size); + if (ret) + return ret; + ret =3D imx355_write_reg(imx355, IMX355_REG_Y_OUT_SIZE, 2, + mode->y_out_size); + if (ret) + return ret; + /* Set PLL registers for the external clock frequency */ ret =3D imx355_write_reg(imx355, IMX355_REG_EXTCLK_FREQ, 2, imx355->clk_params->extclk_freq); --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0487A4BCAD8 for ; Wed, 6 May 2026 18:23:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091841; cv=none; b=kOilisYruqRTiISuKGWbMHX4b7krPCmtivf0I5dV6UNDFjc6K5Rl7jwI+hTMfSAo+g3pOIJCUSWVaCZ8OpAAbsA7LmLsG+4RfSJtYrB2uQD80Ry/QS59QUzCFxZBQ3i+4n5pIa1ja07+3tISIIC4y6aae7kHCJOzxAuGZxSDJvA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091841; c=relaxed/simple; bh=HhL9BPYWGTbEpdwe1+Oj9rZs/1DkUAcLY3/jKrhOTvE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=g7AafedJmEuUP7Px0L2eL60ijriXu1ZzH3ljKJ0d/a6j2ByIJrrAMqSvAzeRRzdAIGL5+W9w5PZE7afv/9B85YT7j/LJ3FOkf4Ek6Q6ciQ+Oh3fusKVcaQUjAlgTWzcsJSH/OCpO9BkRhfv9/rSkPAilerJRA0uX3evJzEG84kM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=JALX1p+4; arc=none smtp.client-ip=209.85.128.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="JALX1p+4" Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4891b0786beso44653025e9.1 for ; Wed, 06 May 2026 11:23:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091838; x=1778696638; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=x68EB9TiSDc8QZUmo+43apWUQi8sDiO4HaVGa3lIAeE=; b=JALX1p+4LJyleP5xAy6ukKbUehIrqs1tClgG8e6c7yYpRNf6lGNWU1Z2Svdthou9fc CIDCnf+OfkU+ARkZf77WwhG32n31WVRdiJQk8dLYSM5QY3MRTRmWEMMimZnbsKvzk5lk pD/IbFOzq4N0iteT3H+KOB5MmT1ltUg5wJ9ihyOUUckIADkmotemnFhR8cxmMUm4rXRv CpZlrnZVZZodeYilOXwwGaGOlOLUo47mZH/go/CLkW7EG7LTYysGb1nwKUh/8TMHtnXz jGSdlxlfBUvxV5+82p1NOCopp1ZfEsfdVERPOIeWz54XQPMbzTg2m59uRPSgzBBQabKX Fhzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091838; x=1778696638; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=x68EB9TiSDc8QZUmo+43apWUQi8sDiO4HaVGa3lIAeE=; b=H4D2am5XaBi2p1uZyf/wQVABubMx2AMlHeexZiKn09G9qTA3tFIuSbGoYNdWLs7NSo 5RjH82hG7t0OWn/Gc+6Lbt6mgEjyJIqaDG55h92OcALA64YZbptVPnKkgt8gHU5sIojt cCa3lVPmC58kIoxrWlbEe53rgA+TFi1PtlI9f9otta4b1tMvWa7GcS4jgE8haQ7i2qWc e6pad4cqHpg8lr6xeQ/vE6m4emmlm4bH64XQgIZW0xEL5B6HoAjpVpXu2zYTUP29NJgB G/PE39SMigRt6/HsJHH07du/lVSA+o2dhW6MbSnlqQRTvbJrHe0xlzD7RwQBX2wNcIuS wCJQ== X-Forwarded-Encrypted: i=1; AFNElJ8Dvki092AwIEltVBBE9IGoIFlTiJrQuqVvwlVMsvoLK2rOXwbop5JRCNW7tN/Jiz2xNPW1a3AZlSDOyxs=@vger.kernel.org X-Gm-Message-State: AOJu0YyGRLdFtUJ0mrhyYYzJv0eeTZhHpFlMPLHjhrlUf67X9XXqQdD9 XyWzUQ92Ct3h1JoLcEqqq541G+kwV+2D+Bt5CU4IjzscWfORDfZRuYgfkh5yuNGqRiI= X-Gm-Gg: AeBDiesctG8zIEv4kNGFkK/e1itTT6f7bJDml3IVwzRWKJmS2lhwufkvfUR5YRAmuDm dPXtVPah0zK7MCJoVnxeZSF9bPAOjv9sGFOHUketeWwvQHrsUJI2EhkDCd1J79g3Zgx3Wh9OrHE q1r94V8ePv8gqikyJ5Ec6gCkdMFxrH9bF7Z/jjCDgEpyeV6cOK8GWakgYpGQ/2ly66zLwNlTTrn MiJU2xPpMpddnI916vD56RCJQEIk7xYvI+LHm2jRec2osBMp3JrCxzIblUYz4o6MLMCRgbpxvQQ 5BgAQDHTSJcutCqzoDxDcXJhIqBHTMFmohxT7nkx4F0S7XM7jTqGT5hq2XnLZde7sNi876L0ErO o6cFqHATNgIvAfvc2UiYueoQXgsQGhg4+7kjUrvyyOGYqyfAv/opJMNPkHovFQr0ixqRUk3MVFT DdVOhVDpHcYU5xAfg+y0LokSzB X-Received: by 2002:a05:600c:6d7:b0:489:1d23:4524 with SMTP id 5b1f17b1804b1-48e51e0bc19mr49132215e9.5.1778091838526; Wed, 06 May 2026 11:23:58 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.23.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:23:57 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:42 +0100 Subject: [PATCH 04/13] media: imx355: Remove the duplication between width/height and x/y_out_size Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-4-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 The register settings x_out_size and y_out_size are just width and height, so drop the values. Signed-off-by: Dave Stevenson --- drivers/media/i2c/imx355.c | 34 ++-------------------------------- 1 file changed, 2 insertions(+), 32 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index 6179fe74c897..589bad6c58e4 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -114,8 +114,6 @@ struct imx355_mode { u16 y_add_start; u16 x_add_end; u16 y_add_end; - u16 x_out_size; - u16 y_out_size; }; =20 struct imx355_clk_params { @@ -440,8 +438,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0000, .x_add_end =3D 0x0ccf, .y_add_end =3D 0x099f, - .x_out_size =3D 0x0cd0, - .y_out_size =3D 0x09a0, }, { .width =3D 3268, @@ -458,8 +454,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0008, .x_add_end =3D 0x0ccb, .y_add_end =3D 0x997, - .x_out_size =3D 0x0cc4, - .y_out_size =3D 0x0990, }, { .width =3D 3264, @@ -476,8 +470,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0008, .x_add_end =3D 0x0cc7, .y_add_end =3D 0x0997, - .x_out_size =3D 0x0cc0, - .y_out_size =3D 0x0990, }, { .width =3D 1940, @@ -494,8 +486,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x02ac, .x_add_end =3D 0x0a33, .y_add_end =3D 0x06f3, - .x_out_size =3D 0x0794, - .y_out_size =3D 0x0448, }, { .width =3D 1936, @@ -512,8 +502,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x02ac, .x_add_end =3D 0x0a2f, .y_add_end =3D 0x06f3, - .x_out_size =3D 0x0790, - .y_out_size =3D 0x0448, }, { .width =3D 1924, @@ -530,8 +518,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x02b4, .x_add_end =3D 0x0a2b, .y_add_end =3D 0x06eb, - .x_out_size =3D 0x0784, - .y_out_size =3D 0x0438, }, { .width =3D 1920, @@ -548,8 +534,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x02b4, .x_add_end =3D 0x0a27, .y_add_end =3D 0x06eb, - .x_out_size =3D 0x0780, - .y_out_size =3D 0x0438, }, { .width =3D 1640, @@ -566,8 +550,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0000, .x_add_end =3D 0x0ccf, .y_add_end =3D 0x099f, - .x_out_size =3D 0x0668, - .y_out_size =3D 0x04d0, }, { .width =3D 1640, @@ -584,8 +566,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0130, .x_add_end =3D 0x0ccf, .y_add_end =3D 0x0863, - .x_out_size =3D 0x0668, - .y_out_size =3D 0x039a, }, { .width =3D 1300, @@ -602,8 +582,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x01f0, .x_add_end =3D 0x0b7f, .y_add_end =3D 0x07af, - .x_out_size =3D 0x0514, - .y_out_size =3D 0x02e0, }, { .width =3D 1296, @@ -620,8 +598,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x01f0, .x_add_end =3D 0x0b77, .y_add_end =3D 0x07af, - .x_out_size =3D 0x0510, - .y_out_size =3D 0x02e0, }, { .width =3D 1284, @@ -638,8 +614,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0200, .x_add_end =3D 0x0b6f, .y_add_end =3D 0x079f, - .x_out_size =3D 0x0504, - .y_out_size =3D 0x02d0, }, { .width =3D 1280, @@ -656,8 +630,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0200, .x_add_end =3D 0x0b67, .y_add_end =3D 0x079f, - .x_out_size =3D 0x0500, - .y_out_size =3D 0x02d0, }, { .width =3D 820, @@ -674,8 +646,6 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0000, .x_add_end =3D 0x0ccf, .y_add_end =3D 0x099f, - .x_out_size =3D 0x0334, - .y_out_size =3D 0x0268, }, }; =20 @@ -1044,11 +1014,11 @@ static int imx355_start_streaming(struct imx355 *im= x355) if (ret) return ret; ret =3D imx355_write_reg(imx355, IMX355_REG_X_OUT_SIZE, 2, - mode->x_out_size); + mode->width); if (ret) return ret; ret =3D imx355_write_reg(imx355, IMX355_REG_Y_OUT_SIZE, 2, - mode->y_out_size); + mode->height); if (ret) return ret; =20 --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D91D34C6EE3 for ; Wed, 6 May 2026 18:24:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091842; cv=none; b=CdBieRWOrIpoWv/sJPbRN0mrN7RzFREEOz9myHaHqwzKlNWIiExPlZdpi9yJDZKLqYupW7iF9gLUu+ba4ABf+E/U2nZOb7nnJMnlXVlEQ0dp5XlW0F/VybFpVjZqgrzzGc9GTkKjqnd1pmv9sSlHJNR8VjtW3CIFGMWKxW/tR6I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091842; c=relaxed/simple; bh=f6gIPNFF3ZGz6Dzi7iDBzYYDWPkgTeyPnawayseqnaE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gUTSommB/bKuk6OkkUQ3byf9F4DjkbgFJ2bRX2SjaM9FR9Z1qJ1PcjzEHi0VJzMbjvbuM/k4LGxipLwLu5WkuKhZjxKnavShLZouxV9Ggb/zn4EFAWYyG1iCiCOXTACoL7DBq6IfHyAsF2YqTfnQUb2miYktabuttKkLtaDocYo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=JO04K5dN; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="JO04K5dN" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso71488585e9.3 for ; Wed, 06 May 2026 11:24:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091839; x=1778696639; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=epOeXOJbCmT1H5jV/iuLaOOTzE2n5vMU5EsH3hJ6nfk=; b=JO04K5dNXASssIQ6yMJz/D7kQQA5sFoguuS5KdFcAVxu5gdqGY2d3CXZBsdDnruf0s tXDZGh6O4npIfvz6wTc2iRvnOdZfSdrQV7meET7EVJYokaMr8W1N4YDLek2PQFgfsiVp C/pnAaZJ7CA9uTEFvBfGVvmDWz5Iiik1faflPd+u4gG5nWvgYGUZz5o5Eyb0eo6ZLhRv 4QVf3EPoV4MbfluL356wttVXDPhHTJsnXYomsvHCSl9QUI7aLf/JXNkrdSR3a8UrLGoS gx+hNUvqxfZ1yPY6oc8yFsOXGs+0jNp0rfNu9XejVJ1YQYR04jpGZY6x4wroKLfogTxi SvLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091839; x=1778696639; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=epOeXOJbCmT1H5jV/iuLaOOTzE2n5vMU5EsH3hJ6nfk=; b=WT2gzU2yJv6ulADrKW8hPSwjKrEI1DVcNugGmQM/9t7nygD60q4LJ38ZAMwa5TlNp+ FX+PB5jgwxTBTAtfavjemo5lyDttFqWiHWSuFudtzN39uyE/NEhyp3vZBAQEjghBgBst vXZQBeT10n28UtXMadkHPOgESjn1Fj3Vq3Mp+3SwoWTjFYKFKhRFOsy0EqL0BfARmjM5 4rdHf28U5qpztQbPzzmtT0baJCWX0INY+NBfFkchXNoNGdERJjFEhYB/xQCyT7FVTi4J ogpOd0bQSPtfguucvikulGapbPvR63dk/NFfWptVUD5WB6wrC9OscaaRLyfhdsIkJcuR Wp1A== X-Forwarded-Encrypted: i=1; AFNElJ866m/vsxUBsNKP9zLayxxxvE+cs3/TOiDQtgxvEgCX6pz5tXInRolp3a5oE3OB16tHYAZz96lwfboUL0I=@vger.kernel.org X-Gm-Message-State: AOJu0Yy5HF+Esl/LhOJ6D4LXwTmNoALYNEi3bwFPiF91fj1Z5c/zN/5G Qd+UBZhz2TwprOgZrvNzqeyIaE5FrPK4mLryU5r3CKa9TyG7ByDrRJy6yUe7BEVaGSY= X-Gm-Gg: AeBDiessaHfwwn0mYccF5zIqWL3IbGZIeQ4eLjB3/2zz/6+qUG/T5Noo4Pr3ZLE5ALD yAu3mYm54I6unJjYHyUCqkkrvkFuwIjBtGp/3DBVmP1YfeuNOPgULvLRSaW4tPvpy9VDXXm0tP5 /g/FRpHzOwdshJ/E4fI726NuQw/+74dqEpt8Zc1wmXNZAIBnCnwEkDrkz19coHagYKjNwDioR77 q2/fuDlp/NsBJ2CoeK15qiRVJ22MVwC3nmaaPIAPHJ9lWaJn/v8BricYUfZqguCznR97rvzd11v Z1PTFn7aVmVquEfpOM4lb4Nv0ZQx+Di8f3BFt/ogZAlYGMfNWdBARpvdwyUsFLLBlI+dKkq/lcw xiSLcgunC4+tir6YytKFTQhDD42HFR9bvSUQ0/uv39NL/yx3PMU1ENcNzncw12KoomP/0edjGAZ x3Z7lNEzk9sOuY7+D2xngWRdw7 X-Received: by 2002:a05:600c:12d4:b0:488:9439:881a with SMTP id 5b1f17b1804b1-48e51e0bba9mr50399125e9.2.1778091839295; Wed, 06 May 2026 11:23:59 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.23.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:23:58 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:43 +0100 Subject: [PATCH 05/13] media: imx355: Set register LINE_LENGTH_PCK programmatically Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-5-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 The driver already has the LLP value stored in the mode structure, but also had the same value set via register writes in the mode's register list. Remove this duplication. This can't be implemented via a s_ctrl handler for V4L2_CID_HBLANK as __v4l2_ctrl_handler_setup doesn't call s_ctrl for read only controls. Signed-off-by: Dave Stevenson Reviewed-by: Jacopo Mondi --- --- drivers/media/i2c/imx355.c | 38 ++++++++++---------------------------- 1 file changed, 10 insertions(+), 28 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index 589bad6c58e4..56a82f37709e 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -34,6 +34,9 @@ #define IMX355_REG_FLL 0x0340 #define IMX355_FLL_MAX 0xffff =20 +#define IMX355_REG_LLP 0x0342 +#define IMX355_LLP_MAX 0xffff + #define IMX355_REG_X_ADD_START 0x0344 #define IMX355_REG_Y_ADD_START 0x0346 #define IMX355_REG_X_ADD_END 0x0348 @@ -266,8 +269,6 @@ static const struct imx355_reg_list imx355_global_setti= ng =3D { }; =20 static const struct imx355_reg mode_3268x2448_regs[] =3D { - { 0x0342, 0x0e }, - { 0x0343, 0x58 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -276,8 +277,6 @@ static const struct imx355_reg mode_3268x2448_regs[] = =3D { }; =20 static const struct imx355_reg mode_3264x2448_regs[] =3D { - { 0x0342, 0x0e }, - { 0x0343, 0x58 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -286,8 +285,6 @@ static const struct imx355_reg mode_3264x2448_regs[] = =3D { }; =20 static const struct imx355_reg mode_3280x2464_regs[] =3D { - { 0x0342, 0x0e }, - { 0x0343, 0x58 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -296,8 +293,6 @@ static const struct imx355_reg mode_3280x2464_regs[] = =3D { }; =20 static const struct imx355_reg mode_1940x1096_regs[] =3D { - { 0x0342, 0x0e }, - { 0x0343, 0x58 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -306,8 +301,6 @@ static const struct imx355_reg mode_1940x1096_regs[] = =3D { }; =20 static const struct imx355_reg mode_1936x1096_regs[] =3D { - { 0x0342, 0x0e }, - { 0x0343, 0x58 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -316,8 +309,6 @@ static const struct imx355_reg mode_1936x1096_regs[] = =3D { }; =20 static const struct imx355_reg mode_1924x1080_regs[] =3D { - { 0x0342, 0x0e }, - { 0x0343, 0x58 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -326,8 +317,6 @@ static const struct imx355_reg mode_1924x1080_regs[] = =3D { }; =20 static const struct imx355_reg mode_1920x1080_regs[] =3D { - { 0x0342, 0x0e }, - { 0x0343, 0x58 }, { 0x0900, 0x00 }, { 0x0901, 0x11 }, { 0x0902, 0x00 }, @@ -336,8 +325,6 @@ static const struct imx355_reg mode_1920x1080_regs[] = =3D { }; =20 static const struct imx355_reg mode_1640x1232_regs[] =3D { - { 0x0342, 0x07 }, - { 0x0343, 0x2c }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -346,8 +333,6 @@ static const struct imx355_reg mode_1640x1232_regs[] = =3D { }; =20 static const struct imx355_reg mode_1640x922_regs[] =3D { - { 0x0342, 0x07 }, - { 0x0343, 0x2c }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -356,8 +341,6 @@ static const struct imx355_reg mode_1640x922_regs[] =3D= { }; =20 static const struct imx355_reg mode_1300x736_regs[] =3D { - { 0x0342, 0x07 }, - { 0x0343, 0x2c }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -366,8 +349,6 @@ static const struct imx355_reg mode_1300x736_regs[] =3D= { }; =20 static const struct imx355_reg mode_1296x736_regs[] =3D { - { 0x0342, 0x07 }, - { 0x0343, 0x2c }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -376,8 +357,6 @@ static const struct imx355_reg mode_1296x736_regs[] =3D= { }; =20 static const struct imx355_reg mode_1284x720_regs[] =3D { - { 0x0342, 0x07 }, - { 0x0343, 0x2c }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -386,8 +365,6 @@ static const struct imx355_reg mode_1284x720_regs[] =3D= { }; =20 static const struct imx355_reg mode_1280x720_regs[] =3D { - { 0x0342, 0x07 }, - { 0x0343, 0x2c }, { 0x0900, 0x01 }, { 0x0901, 0x22 }, { 0x0902, 0x00 }, @@ -396,8 +373,6 @@ static const struct imx355_reg mode_1280x720_regs[] =3D= { }; =20 static const struct imx355_reg mode_820x616_regs[] =3D { - { 0x0342, 0x0e }, - { 0x0343, 0x58 }, { 0x0900, 0x01 }, { 0x0901, 0x44 }, { 0x0902, 0x00 }, @@ -1041,6 +1016,13 @@ static int imx355_start_streaming(struct imx355 *imx= 355) if (ret) return ret; =20 + /* set line length */ + ret =3D imx355_write_reg(imx355, IMX355_REG_LLP, + imx355->hblank->val + imx355->cur_mode->width, + 2); + if (ret) + return ret; + /* Apply customized values from user */ ret =3D __v4l2_ctrl_handler_setup(imx355->sd.ctrl_handler); if (ret) --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1CF44C0407 for ; Wed, 6 May 2026 18:24:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091844; cv=none; b=RgnGBEFfLBmjgQyyaovi8IP6ANgOvrnl+AfiFMTNizPBuNdWaw+d7gMWAwzrS1SqNBFbkIDJBuVEMRVJfcEX87cO/NygOzJhmscKTkpybjhMDab79JFTUe6caa8JjSZ6FTh9po7b01CIY16/1glnOcRr4qWtyqyIf3BFRFZoBsI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091844; c=relaxed/simple; bh=JQMQ/39taEOfXCuc3Xm8sCWj2KOUChdVR0RtTPLXBBw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=O0mf6VvG7pheBN4yaQaqksZb5lJruwVtLlt/WpuSeLKiqKIzPZkIrbdyEZMjAR7VYNsHPakFxTAV6dePSu1HBnVA0LyCeMdfMLP8bOwXrrW7gW5pdmr5sWcPy9wBoHWpoPmvJW8256tyRdtgXMHsitiSBIFalpRbw1UZiLuNG0A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=EepaC8oj; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="EepaC8oj" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48e56c1bf5dso5132215e9.3 for ; Wed, 06 May 2026 11:24:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091840; x=1778696640; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qVilxyTkiWhT086+MzFvYzbdD2S4USttkppXjLgMDLI=; b=EepaC8ojy2gQhjTWWGFWY2i6Awv83h/yT/0lNcLWKYSxZBLqLYs9+eo6nA1q/AxDEl o6LVTZHJiEsLCjzJ5xjIaP1qpXabnTjsWnxw9cCVrgOvC+7sJWHcQIwRLBuLeUz49E/I rlKkUfak/phFqW0q7xKXR75Ld68Do4cZHwXZfob2DVgXKJQY9KIn+p22ORHlI5l8s9UA VGvNd59f/Tgi0lMWzshOHZTJBlJgVuob2ta80E6zPAbSYmMyKk94IIyIvhkk/Y7H6r1b DPkGGEDSvGXIIvhr8u8mJ84fVIt/W8GuTAJ6yGFxU2KvwCcnxhPR/M2rwlxBt9/hSrWi ElHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091840; x=1778696640; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=qVilxyTkiWhT086+MzFvYzbdD2S4USttkppXjLgMDLI=; b=o8r3WC+hnHiWnwj0B44218DxbNTDTnTKy+fzjW6Dr0rGyxgfQeF5BEB+Tko1isACMe w7Kay/QvxD3ENbBjs3zAghedr/+t7XsATZCBywLN++JDsbOBhhkkPmNz8/jgnuQ6tb9z ivQ/OSVAHHrAMAV8Q+8G+29M+ovnksuHGzZp7r9CnSM//I3BXj1NGQd4tgEcN1Zd6dZf l3Bm915hPXOGs3FbWC1Sl42zgBOY/PLSYMaqCNfLhx4t36N5qPtvOc/EWRzpsKwS/jxM Rc+jUh6mg/4kFLysq9vEZMXj0+D/wc5HFp2+HLSnojaeApn6ae3NpDQtqhOPQgZGl4Ki Yieg== X-Forwarded-Encrypted: i=1; AFNElJ9Nd2vCtClw6EDnbkYcG9LNE5vGrxz5HJ+WCpTCwlWDW4TWfjzfl6SGHsw6TZ39xr0FIdb8s/K3aH78J2U=@vger.kernel.org X-Gm-Message-State: AOJu0YyIAi/j4M6gu3B8qTKYg+/+pMe3qt8aHBNZ+n/fi+mwKAyShpLG zF4CDH3LLKsrokbiGXsocd+Bj06V3ZiANWV+uKOU1z/GMZnwGAZ8YSR3sSJOCVgek/GNp1DYWV2 1bH/E X-Gm-Gg: AeBDievzSE2fQwfwKT2eVXIOiUlc0HJaqKbcGYeElx3T/OmUWpmRV7uaonCh9MlBnjJ f2Ed1SAa85p9Yw8RM6Keye+YuyI33cFhAQZlIn6B5bv7Ro+RMJmKMxc0Ovvq3geU+JqoWgQuGZn tv/KhSn730aewQgfDO2yCBHLtjQZ9/yreDb2eL7it5OaaAV9O9eYslNuset9R3ecBn5Yh2tpSTm 3VJCv/uHx2lRtre4v0EgTgz5OrC1d9NeJAZLbyp3PNheOP9mfre04KXBiY8mPqAwSzv/gbY/LCj nmy9N/g7f9iZT6eMoeWi3AmKXxuz/oiZ1wA6eb0o2uL0GileiK9Jb0bvuiSUgtu6MyO6PCDalQt +UTq49zkf+2PJ2jlxCCGStdj/jLOQCtYQxpVT8hMMXuAtDdgPj9KAg9efr8zjXapsEbbbUB4+nK b7XCyY2sg2F5k9yDczFxsP7/il X-Received: by 2002:a05:600c:4512:b0:48a:5339:ef0e with SMTP id 5b1f17b1804b1-48e51e0c7e3mr76385355e9.3.1778091840226; Wed, 06 May 2026 11:24:00 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.23.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:23:59 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:44 +0100 Subject: [PATCH 06/13] media: imx355: Set binning mode registers programmatically Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-6-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 Store the binning mode in the mode structure and set the registers based on that, rather than having the bare register writes spelled out for each mode. Signed-off-by: Dave Stevenson --- drivers/media/i2c/imx355.c | 73 ++++++++++++++++++++----------------------= ---- 1 file changed, 31 insertions(+), 42 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index 56a82f37709e..422454e529a7 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -73,6 +73,10 @@ #define IMX355_TEST_PATTERN_GRAY_COLOR_BARS 3 #define IMX355_TEST_PATTERN_PN9 4 =20 +#define IMX355_REG_BINNING_MODE 0x0900 +#define IMX355_REG_BINNING_TYPE 0x0901 +#define IMX355_REG_BINNING_WEIGHTING 0x0902 + /* Flip Control */ #define IMX355_REG_ORIENTATION 0x0101 =20 @@ -117,6 +121,7 @@ struct imx355_mode { u16 y_add_start; u16 x_add_end; u16 y_add_end; + u8 binning_mode; }; =20 struct imx355_clk_params { @@ -269,113 +274,71 @@ static const struct imx355_reg_list imx355_global_se= tting =3D { }; =20 static const struct imx355_reg mode_3268x2448_regs[] =3D { - { 0x0900, 0x00 }, - { 0x0901, 0x11 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_3264x2448_regs[] =3D { - { 0x0900, 0x00 }, - { 0x0901, 0x11 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_3280x2464_regs[] =3D { - { 0x0900, 0x00 }, - { 0x0901, 0x11 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1940x1096_regs[] =3D { - { 0x0900, 0x00 }, - { 0x0901, 0x11 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1936x1096_regs[] =3D { - { 0x0900, 0x00 }, - { 0x0901, 0x11 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1924x1080_regs[] =3D { - { 0x0900, 0x00 }, - { 0x0901, 0x11 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1920x1080_regs[] =3D { - { 0x0900, 0x00 }, - { 0x0901, 0x11 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1640x1232_regs[] =3D { - { 0x0900, 0x01 }, - { 0x0901, 0x22 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1640x922_regs[] =3D { - { 0x0900, 0x01 }, - { 0x0901, 0x22 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1300x736_regs[] =3D { - { 0x0900, 0x01 }, - { 0x0901, 0x22 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1296x736_regs[] =3D { - { 0x0900, 0x01 }, - { 0x0901, 0x22 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1284x720_regs[] =3D { - { 0x0900, 0x01 }, - { 0x0901, 0x22 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_1280x720_regs[] =3D { - { 0x0900, 0x01 }, - { 0x0901, 0x22 }, - { 0x0902, 0x00 }, { 0x0700, 0x00 }, { 0x0701, 0x10 }, }; =20 static const struct imx355_reg mode_820x616_regs[] =3D { - { 0x0900, 0x01 }, - { 0x0901, 0x44 }, - { 0x0902, 0x00 }, { 0x0700, 0x02 }, { 0x0701, 0x78 }, }; @@ -413,6 +376,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0000, .x_add_end =3D 0x0ccf, .y_add_end =3D 0x099f, + .binning_mode =3D 0x11, }, { .width =3D 3268, @@ -429,6 +393,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0008, .x_add_end =3D 0x0ccb, .y_add_end =3D 0x997, + .binning_mode =3D 0x11, }, { .width =3D 3264, @@ -445,6 +410,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0008, .x_add_end =3D 0x0cc7, .y_add_end =3D 0x0997, + .binning_mode =3D 0x11, }, { .width =3D 1940, @@ -461,6 +427,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x02ac, .x_add_end =3D 0x0a33, .y_add_end =3D 0x06f3, + .binning_mode =3D 0x11, }, { .width =3D 1936, @@ -477,6 +444,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x02ac, .x_add_end =3D 0x0a2f, .y_add_end =3D 0x06f3, + .binning_mode =3D 0x11, }, { .width =3D 1924, @@ -493,6 +461,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x02b4, .x_add_end =3D 0x0a2b, .y_add_end =3D 0x06eb, + .binning_mode =3D 0x11, }, { .width =3D 1920, @@ -509,6 +478,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x02b4, .x_add_end =3D 0x0a27, .y_add_end =3D 0x06eb, + .binning_mode =3D 0x11, }, { .width =3D 1640, @@ -525,6 +495,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0000, .x_add_end =3D 0x0ccf, .y_add_end =3D 0x099f, + .binning_mode =3D 0x22, }, { .width =3D 1640, @@ -541,6 +512,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0130, .x_add_end =3D 0x0ccf, .y_add_end =3D 0x0863, + .binning_mode =3D 0x22, }, { .width =3D 1300, @@ -557,6 +529,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x01f0, .x_add_end =3D 0x0b7f, .y_add_end =3D 0x07af, + .binning_mode =3D 0x22, }, { .width =3D 1296, @@ -573,6 +546,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x01f0, .x_add_end =3D 0x0b77, .y_add_end =3D 0x07af, + .binning_mode =3D 0x22, }, { .width =3D 1284, @@ -589,6 +563,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0200, .x_add_end =3D 0x0b6f, .y_add_end =3D 0x079f, + .binning_mode =3D 0x22, }, { .width =3D 1280, @@ -605,6 +580,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0200, .x_add_end =3D 0x0b67, .y_add_end =3D 0x079f, + .binning_mode =3D 0x22, }, { .width =3D 820, @@ -621,6 +597,7 @@ static const struct imx355_mode supported_modes[] =3D { .y_add_start =3D 0x0000, .x_add_end =3D 0x0ccf, .y_add_end =3D 0x099f, + .binning_mode =3D 0x44, }, }; =20 @@ -997,6 +974,18 @@ static int imx355_start_streaming(struct imx355 *imx35= 5) if (ret) return ret; =20 + ret =3D imx355_write_reg(imx355, IMX355_REG_BINNING_MODE, 1, + mode->binning_mode =3D=3D 0x11 ? 0x00 : 0x01); + if (ret) + return ret; + ret =3D imx355_write_reg(imx355, IMX355_REG_BINNING_TYPE, 1, + mode->binning_mode); + if (ret) + return ret; + ret =3D imx355_write_reg(imx355, IMX355_REG_BINNING_WEIGHTING, 1, 0x00); + if (ret) + return ret; + /* Set PLL registers for the external clock frequency */ ret =3D imx355_write_reg(imx355, IMX355_REG_EXTCLK_FREQ, 2, imx355->clk_params->extclk_freq); --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A15F4C041E for ; Wed, 6 May 2026 18:24:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091844; cv=none; b=tC8R8nlWKHJ9acDp6bkaHjKFItQPGuivr5nUpyCav01Eq/Fo18RMk+oZmyDOf0mv26gO+MP4JRSoWyRrIShERU72zoARINnzTko+ucxKTv8FnJzqFDpOZ5QVW9c+YOp0tT+gLbADtJZ17dyrBLj4b5j0L7Jc5RbrbfjcSvtKyiU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091844; c=relaxed/simple; bh=SfnupgvsaE+KntuR8wdm0hOaeampEppC/mVIP4AhNG8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lM1ZMWvVkYSoy02Omg6TLBJMEn0b/TkOdePYszZ1xNanX3lnvKOVMeZ10++2rQ/SZZywpMr1AD2C6L3Wn+uv2Pbb+7srBU4NQ9IHev618mIO3H4H1nEf2MUF6+tJXb9bdKlusICqmmAyhNLSOH9/+Y7pVYX7QdAEjPBkyVdGZOE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=Q/54O1Ww; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="Q/54O1Ww" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-488e1a8ac40so66952635e9.2 for ; Wed, 06 May 2026 11:24:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091841; x=1778696641; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=7ltSx+SbMYHd3qP17Hz/lMF6RjYMG0bZVxmlIIBtbk0=; b=Q/54O1Wwh1dr9RvIzsQ3E9eZlTC7BdpalXspZR9/ao00sRnaMRJGWcpuseM+pd8Y+B yYz5SsZ7shQyhsLNK3CNa2b7ujaZ52Eo09iaHDWV63RqzUPaKog1dZZ7YfxNn0c5tYiJ c2toBYeZkz9eB0IFTyZAVAivbJPQyY9DHxfS/pC9vIsqpeGuyWh/ACDLoQHh6BBPN6Ol LJz2YQ8e6/YDmXtTqgnshB6JgTithGCWO/eHqEYWEwLW3Djez2J42EWHZhEAoF3C3ceM OLkjPJ3drvDOoxIkrC+9AbBi05OjGZ41HMgL+jjWTa61uSRe9M8VYvDVMeBDbL1s9odi mJ7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091841; x=1778696641; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=7ltSx+SbMYHd3qP17Hz/lMF6RjYMG0bZVxmlIIBtbk0=; b=sz7ygbOtvaXOQKYfZ10IwCi9dOKJPvpeB3a9D366YiEZkFCPUaAv/0HPDFR8x7TUt4 WjTngP7mM5HzDlo7m0ig8ctFbNR76bSbU3A5ORmj6c+kjJUxTbsFp9Cqdjhr4eBNZVN1 BOS/XLxkn+VxAQig7+IvTNkY8LBaY3RWLbWdz7k4/8fh/rsGt6cZn7RouAqYmUNiy5vW TCiVuKPN3sO9O9bZSzwvZUmOjA6nmEXsNQtBUZnwzQsCKVIhbyHltLCis/RifeXUnVUz XFsYTP+9S9fPcIgA3OlggatnngApyMRRZoMtfxJCngVaq9LOc3O4M7oNmkIrAMqSEF/z CuSw== X-Forwarded-Encrypted: i=1; AFNElJ9VWruCSC6/ASJPh0EqivZOXPsU7VnnoKE/p7dECYmUyyn1D2vRChEj0m9xizJQTFpV0lXeVBiALteX7Xo=@vger.kernel.org X-Gm-Message-State: AOJu0Yw+gouw4K10DrR914+XRGEQJ0EUJiZOVvzvpbqEGjFTVzMZPto2 8DKBnKngc+H9eF+NbNOpCyiygoIaag6zVuSjwHwZ1BFoooAnE22wyGE7Bmfh18wjWsQ= X-Gm-Gg: AeBDievB35I6d3dTQJs506fBAo1XjLBhBCGxcYwoIpdNXkNynLkkRa664YFaNRGrdYZ kBYAZbT1XYpK1WV01W4BuWJG83KO4jGi/guW5QnQIChGJMwTCS+2bs+EydqardqZ15p8I1rEjNO ktk1dCm7hbnOO0BUGJxoEH7xemzQeOvSbBvB/MuJcz7kMcnLU9uwbrouO3tDqFjhC9cgjsD1Pw0 0s8m6DwwlRXtklHz8o0tKb2z3Mo4oCv2RiV7wcnjZQFfUHkWNAYH9Yfo8NnKmoVIuDGrpmhXIEg Lykbl2oHWL8DJIWsUAyqst1Ie5cI/zAlqgSh3IaGHD9zhmjob2RhJYA3Zu4iQZ/hU9NBxwhdhu4 2LE4z7nBf6p8XrLs2nf/tsiNocjE/m8aN4tinxGNZHDexrr28W6boQfirHZK87lzHZxVyAVXQc9 UVexMIzH8Q42f8Nh6l3FnjSHMRNamHSF3dok+fY88Zc5KRLg== X-Received: by 2002:a05:600c:3b96:b0:48a:66a8:9981 with SMTP id 5b1f17b1804b1-48e51f55272mr84367995e9.27.1778091840816; Wed, 06 May 2026 11:24:00 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.24.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:24:00 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:45 +0100 Subject: [PATCH 07/13] media: imx355: Remove link_freq_index from each mode as ununsed Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-7-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 The link_freq_index value in imx355_mode is unused, so remove it. Signed-off-by: Dave Stevenson Reviewed-by: Jacopo Mondi --- drivers/media/i2c/imx355.c | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index 422454e529a7..b0cddb614775 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -82,7 +82,6 @@ =20 /* default link frequency and external clock */ #define IMX355_LINK_FREQ_DEFAULT 360000000LL -#define IMX355_LINK_FREQ_INDEX 0 =20 /* number of data lanes */ #define IMX355_DATA_LANES 4 @@ -111,9 +110,6 @@ struct imx355_mode { /* H-timing */ u32 llp; =20 - /* index of link frequency */ - u32 link_freq_index; - /* Default register values */ struct imx355_reg_list reg_list; =20 @@ -367,7 +363,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 2615, .fll_min =3D 2615, .llp =3D 3672, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3280x2464_regs), .regs =3D mode_3280x2464_regs, @@ -384,7 +379,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 2615, .fll_min =3D 2615, .llp =3D 3672, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3268x2448_regs), .regs =3D mode_3268x2448_regs, @@ -401,7 +395,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 2615, .fll_min =3D 2615, .llp =3D 3672, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3264x2448_regs), .regs =3D mode_3264x2448_regs, @@ -418,7 +411,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 3672, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1940x1096_regs), .regs =3D mode_1940x1096_regs, @@ -435,7 +427,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 3672, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1936x1096_regs), .regs =3D mode_1936x1096_regs, @@ -452,7 +443,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 3672, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1924x1080_regs), .regs =3D mode_1924x1080_regs, @@ -469,7 +459,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 3672, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1920x1080_regs), .regs =3D mode_1920x1080_regs, @@ -486,7 +475,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 1836, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1640x1232_regs), .regs =3D mode_1640x1232_regs, @@ -503,7 +491,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 1836, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1640x922_regs), .regs =3D mode_1640x922_regs, @@ -520,7 +507,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 1836, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1300x736_regs), .regs =3D mode_1300x736_regs, @@ -537,7 +523,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 1836, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1296x736_regs), .regs =3D mode_1296x736_regs, @@ -554,7 +539,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 1836, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1284x720_regs), .regs =3D mode_1284x720_regs, @@ -571,7 +555,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 1306, .fll_min =3D 1306, .llp =3D 1836, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1280x720_regs), .regs =3D mode_1280x720_regs, @@ -588,7 +571,6 @@ static const struct imx355_mode supported_modes[] =3D { .fll_def =3D 652, .fll_min =3D 652, .llp =3D 3672, - .link_freq_index =3D IMX355_LINK_FREQ_INDEX, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_820x616_regs), .regs =3D mode_820x616_regs, --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 207C14C6F1B for ; Wed, 6 May 2026 18:24:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091845; cv=none; b=SECYL1G7F4HYJqpTv9j/PGUNWgwfRw32656pxgxF4zGm6kCVHr+ypZYKs3lidrfRT745TDg+SHMjU40V/jKe2+BtgHgdLzQBKiylmuTu8rok7TzPlPgAGV/Z4/HZtqAiKp8R8o1TChJ9qW82N8Uye6i5bBBldXvsksqaKFBr30Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091845; c=relaxed/simple; bh=MLu72cz+5Gp007g9Xg3WyYdjNUZB0VuTwaWfowljlX0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jgVuJv05t5jlIndr4APgbBaPSmCQQMbm7n0i3x547THdCOBPeYFvrJkaJYZdObpkOiKcgoRlNj0m9iOHdqWASpMYc4C/plYIpVJC4MHpe/wNpu14cO8E1iT+RzHgVwh+jNtsaV93ZiNYCVZ/vHL1mDh5KXidKHe1IvAeAJzIYJ0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=b8tyL31C; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="b8tyL31C" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so103612465e9.2 for ; Wed, 06 May 2026 11:24:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091841; x=1778696641; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=8qUVdoZMr7Z4Rh702+lrtus7snCe9UmMcHnN9XePVCM=; b=b8tyL31CYpORSWXiI9JUOjxX5RTgjtTNK09+fnxm+0XUgXO6yJeB0yI7G5ceU+baE2 jhBOBfZ58NOCPcFkjV3dnL++67XM3JbGphprD1KG8XpO99BAPHMCTLu6R6Bs+Qlhd1SQ uXrA+adpIIL9IjGSaoA+hrTveohfRgNnJUcBdCO9y7YH2UZ8emg5J6aOvSGnEXxWYgUP 0LP+4bravMsZ9YMDxCMoNzATgNKnpxbs586U+UJVrYRhBnjGP7KWtPswvu7uqdsDN5c1 rfOMz57YQP4auiJWPOibri1BFX5psFVg8NC/nk/3sgZg6oFRemhjbnb4S4M5em4JpMBM Z3IA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091841; x=1778696641; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=8qUVdoZMr7Z4Rh702+lrtus7snCe9UmMcHnN9XePVCM=; b=fsr9zalJXueh9h/7/kv3tL1QGWVpwGzVtyWc4PlU0G9vSseY2EDb6hSvhZZJ8ZGrbD MKQRgRlqkyDVpTaQt+y8CxPvO1dj7gwKw9JME0ffUv0vXksOHDkRzbXOrI/fbRkyj8/d Lkdeywfw7TBg6xLCfNLlm3ePDxQnIwuNaBEk3BST6PDrZUhadw2dIAy5pJBUhPLWyrX+ 57rMliD7zhZl0uzsy3lauITz53tiqxnO0jJJNEiQnU79co9NAKmYnCXIF2M99KY+z/NI 2kQpSbf9EJexaXZs6UgM+kn6REOmZGdOSaOHUdVtuIKn7ZCqsV/6WwtALP5Ix9euhX2u eXeQ== X-Forwarded-Encrypted: i=1; AFNElJ8ll7sImiXmCiMwF834T/tykIt9y2WzPK4lgKX2JRfuqsJ3ZZ0pJd73Z7wd4p7WC70gver44UWmHq1bvEs=@vger.kernel.org X-Gm-Message-State: AOJu0YzPkHjotY3aT97ZFIJtQTdTB7flex+INGD09Q9mn08hS8VLgUz0 1N9ZCZHWpbX1sUyfAdJixFHQEF9li+Bx1nJc9JQPSpYd01oMI/cFHVZsiEoeqkuJABg= X-Gm-Gg: AeBDiesOpuU2B36ijlozH93HjIqPL1J/7DzJKWnV80vsxV/n3tWtybSZEXuPP+3bBmE uZfQEO4U1FwS08Tw/JWcwaLs+1YJyrFh7duIe7lU2q+HKIdVIjLQ1B//3zKEPv7Kb9o5pIUkTRd 0jjY6+8WzlabhxcFsOiNAqOgIItrnNW/DiGET/zvuioLtdZXCrS909BoI/HHg6nEWr8GkbPATWO WUNNuYUEpb21nhWzoMWV7PflmzRBZrgxarPVXzQtq8wrlmdiW+Hnn1dXvSfXSgezkIxn8VbtkXu sZyq8Wqg3K1+IYqDGmFdM5vQIVFArFjrQmH1+qNAhdiBbVF60SaKoZYjA2E9wtaRADaUhL1WFX1 sEB7QxqIhZDDe5msaV8HdSBBcI88keCIz0lI71vfUlr9S00oZdTOiZjVzokSjAT76KO4CzUcH2L TJOpyKEKT79sC++lL84/lPjTBz X-Received: by 2002:a05:600c:354b:b0:488:ab26:8fe0 with SMTP id 5b1f17b1804b1-48e51f32bdemr79594435e9.15.1778091841546; Wed, 06 May 2026 11:24:01 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.24.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:24:01 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:46 +0100 Subject: [PATCH 08/13] media: imx355: pixel_rate never changes, so don't recompute Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-8-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 The pixel rate is always the same, so there is no need to try and recompute it in imx355_set_pad_format, and then no need to have the pointer to it stored. Signed-off-by: Dave Stevenson Reviewed-by: Jacopo Mondi --- drivers/media/i2c/imx355.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index b0cddb614775..12005bc40f36 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -161,7 +161,6 @@ struct imx355 { struct v4l2_ctrl_handler ctrl_handler; /* V4L2 Controls */ struct v4l2_ctrl *link_freq; - struct v4l2_ctrl *pixel_rate; struct v4l2_ctrl *vblank; struct v4l2_ctrl *hblank; struct v4l2_ctrl *exposure; @@ -860,7 +859,6 @@ imx355_set_pad_format(struct v4l2_subdev *sd, s32 vblank_def; s32 vblank_min; s64 h_blank; - u64 pixel_rate; u32 height; =20 mutex_lock(&imx355->mutex); @@ -881,9 +879,6 @@ imx355_set_pad_format(struct v4l2_subdev *sd, *framefmt =3D fmt->format; } else { imx355->cur_mode =3D mode; - pixel_rate =3D IMX355_LINK_FREQ_DEFAULT * 2 * 4; - do_div(pixel_rate, 10); - __v4l2_ctrl_s_ctrl_int64(imx355->pixel_rate, pixel_rate); /* Update limits and set FPS to default */ height =3D imx355->cur_mode->height; vblank_def =3D imx355->cur_mode->fll_def - height; @@ -1175,9 +1170,8 @@ static int imx355_init_controls(struct imx355 *imx355) pixel_rate =3D IMX355_LINK_FREQ_DEFAULT * 2 * 4; do_div(pixel_rate, 10); /* By default, PIXEL_RATE is read only */ - imx355->pixel_rate =3D v4l2_ctrl_new_std(ctrl_hdlr, &imx355_ctrl_ops, - V4L2_CID_PIXEL_RATE, pixel_rate, - pixel_rate, 1, pixel_rate); + v4l2_ctrl_new_std(ctrl_hdlr, &imx355_ctrl_ops, V4L2_CID_PIXEL_RATE, + pixel_rate, pixel_rate, 1, pixel_rate); =20 /* Initialize vblank/hblank/exposure parameters based on current mode */ mode =3D imx355->cur_mode; --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC1FD4C77B0 for ; Wed, 6 May 2026 18:24:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091846; cv=none; b=uDlHG3x4qfhLlL1BiV7DwctnI+7norkhIACp1rJPWwR2CN7grh70X0IkQAwAo+YmGT3VAZ7ox5Amcn6lyD4vz0CDNfHQTt/paVxt4vmCccROlABEGM2nZzwH7ADwPuHjjf06W1WOJo5+Kz4LqSA3UX6F2myj3EJPh8RcL096TxQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091846; c=relaxed/simple; bh=xmR9cjWdkx0/RjDNOl9sJ0HMQmryvHQRXlVtFmidLVk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KNTK0LfrCJXa7dPfAATYvJDVgPYFjdHRMgc/jqSRgYxvJxcRSizPOFwEPRgWi5rjSYGjTr92gb5qe5H8MdD2OqUXUUS0oSOeDjg5DV7rXXDCV9bJ/fscNYQ/bZZZrZXOjlnnRy7Nodyxh6Ky2r0LR/0Z2JZLgaWwAJ/Ok5Xpkcw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=laUNTrXG; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="laUNTrXG" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-488ab2db91aso80073875e9.3 for ; Wed, 06 May 2026 11:24:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091842; x=1778696642; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VScBt6o5JgEQ4/fHCZ+XmNlE5Z8Bh4ejGjVe8g1NSM8=; b=laUNTrXGD2bVrWlpyvcv4SDskuwqC27JkLejNLENogPxjEbmcWff8cxpvydn06KA5c 8MTyYObT4B4TLdsIa3XD95dsJITLgoK+4WLlvJvE3eSA7BLBS4QWQBLoh620VWUzbSUg 9jHdx6BH0N5GC1+0ePBMX3sHOJ4S4q8WHpVR12WfCD3U4IjaK+LVB/i5+t2mx5CuzHiH XxItFn+lttk/PZjEJmo+KW8acK9R6hbknLxx8wLLW3SlllhBHu/nXiKA5yHyAYpjZJnd iOebz8+DQOwXZSazo6CaIxnOSSwUvyVdeXE9ICzVqJfPMCwDjYZnjbd+wu8N7ekKTec3 H4jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091842; x=1778696642; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=VScBt6o5JgEQ4/fHCZ+XmNlE5Z8Bh4ejGjVe8g1NSM8=; b=L0aexi9ec/kZcnHrTt2fiMI8IRpNyfMvbUMyw4SdphrV0u/P0BMOeFqR4M7h+W2gD6 SyDUGfRzOPNLsA/jXxGYlyqEHvD+2U9K74NgLrDODP+Asfc6t5+dUnDtdi/jQvPJXRi9 GJUR1ZLjjyjgtyswVb4HnUaP19Op7cjtGnVWAChw7IAND4qi5oxx7XhWsAhd8TBF94cH TeZdptXqss2PPShVcIHWydQF4k4tE6IK0YuC5VnqY9Gze5zI8byZDM27ocU2eUGE2kW1 +S+/X69Y/KTW9kUCNg6aV0vMxRcZnllGxyYXJ8E+zutvGpSdxkpJnWeytohz0XEyIrSC akJg== X-Forwarded-Encrypted: i=1; AFNElJ/jgBPLxkhwlLhEyST5a9ja5161ysgTwREJ1Fh/ycej7B3r4bmAOGM3Ch/8yKjVQ3DqtEkhxh/+RQwsTFk=@vger.kernel.org X-Gm-Message-State: AOJu0YyU/XW374gz3vI07d6b61iWx/ao8XoUgFNt5KkDAqX1ChmrXmpV wuSzVAzKJEBt4ajhLWI+HP3bGKGChKbxgHqF8iUqgPaqajsC9n+WfEkj2krzYzhBWVc= X-Gm-Gg: AeBDietvJLK6+a6FEJ6P2vBIVRIYXOtl/yXOhsknSP+mQgjGjQqrPlJZuF/1UPUjz7W CB88SiJta83O31ZSQnzWaFvP9HcHhAazgmacI9LB7nyWdunrDgg3WMG5B8C4/gN5HH23OiuXyJ2 vrmdZsa35SzVFwwwkeiWVDlO42yzq5kEtKt2lCHYxswgjHVDouD27pGWYZLPzBte+wYnse+2Dx5 ljFcNQ+3YNaY2CY/mQU+bYg2lFUsXuREWqu/r6h50d/JmDwmQJE+4BT5It51piSRzqVnAVtYGvT BCW9fpcz7OJzJypHwPDVgIb8yP/+QLIGsQ96J0VDChhbbXIFfm677P8gCqDlhU0mj6Oj+eWiJ2H SvkIsQ8GJpWNjvQ4TSyVMsGV9VywRl2/JGhPGCgCuLdztQ81wBITlb2Nu7NPKjDaqP7A1M9EEXw ecCffkoEaszn3CdqI6OiOvGf7XDrrE4lW7tqo= X-Received: by 2002:a05:600c:3ba7:b0:48a:7772:c26b with SMTP id 5b1f17b1804b1-48e51f40884mr82775025e9.26.1778091842202; Wed, 06 May 2026 11:24:02 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.24.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:24:01 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:47 +0100 Subject: [PATCH 09/13] media: imx355: Remove redundant fll_min, and implement fixed offset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-9-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 fll_min (Frame Length Lines) is set to the same value as fll_def for all modes, which makes it redundant. The actual value is also erroneous as sensor works in all the defined modes with FLL set at the mode height + 20 lines, so set the vblank control minimum to 20 rather than varying it. This also improves the maximum frame rate achievable. Signed-off-by: Dave Stevenson Reviewed-by: Jacopo Mondi --- drivers/media/i2c/imx355.c | 27 +++++---------------------- 1 file changed, 5 insertions(+), 22 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index 12005bc40f36..5a3bfcd0f51c 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -33,6 +33,8 @@ /* V_TIMING internal */ #define IMX355_REG_FLL 0x0340 #define IMX355_FLL_MAX 0xffff +/* Number of lines above frame height that are required. */ +#define IMX355_FLL_OFFSET 20 =20 #define IMX355_REG_LLP 0x0342 #define IMX355_LLP_MAX 0xffff @@ -105,7 +107,6 @@ struct imx355_mode { =20 /* V-timing */ u32 fll_def; - u32 fll_min; =20 /* H-timing */ u32 llp; @@ -360,7 +361,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 3280, .height =3D 2464, .fll_def =3D 2615, - .fll_min =3D 2615, .llp =3D 3672, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3280x2464_regs), @@ -376,7 +376,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 3268, .height =3D 2448, .fll_def =3D 2615, - .fll_min =3D 2615, .llp =3D 3672, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3268x2448_regs), @@ -392,7 +391,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 3264, .height =3D 2448, .fll_def =3D 2615, - .fll_min =3D 2615, .llp =3D 3672, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3264x2448_regs), @@ -408,7 +406,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1940, .height =3D 1096, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 3672, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1940x1096_regs), @@ -424,7 +421,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1936, .height =3D 1096, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 3672, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1936x1096_regs), @@ -440,7 +436,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1924, .height =3D 1080, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 3672, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1924x1080_regs), @@ -456,7 +451,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1920, .height =3D 1080, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 3672, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1920x1080_regs), @@ -472,7 +466,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1640, .height =3D 1232, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 1836, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1640x1232_regs), @@ -488,7 +481,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1640, .height =3D 922, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 1836, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1640x922_regs), @@ -504,7 +496,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1300, .height =3D 736, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 1836, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1300x736_regs), @@ -520,7 +511,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1296, .height =3D 736, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 1836, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1296x736_regs), @@ -536,7 +526,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1284, .height =3D 720, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 1836, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1284x720_regs), @@ -552,7 +541,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1280, .height =3D 720, .fll_def =3D 1306, - .fll_min =3D 1306, .llp =3D 1836, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1280x720_regs), @@ -568,7 +556,6 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 820, .height =3D 616, .fll_def =3D 652, - .fll_min =3D 652, .llp =3D 3672, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_820x616_regs), @@ -857,7 +844,6 @@ imx355_set_pad_format(struct v4l2_subdev *sd, const struct imx355_mode *mode; struct v4l2_mbus_framefmt *framefmt; s32 vblank_def; - s32 vblank_min; s64 h_blank; u32 height; =20 @@ -882,10 +868,9 @@ imx355_set_pad_format(struct v4l2_subdev *sd, /* Update limits and set FPS to default */ height =3D imx355->cur_mode->height; vblank_def =3D imx355->cur_mode->fll_def - height; - vblank_min =3D imx355->cur_mode->fll_min - height; height =3D IMX355_FLL_MAX - height; - __v4l2_ctrl_modify_range(imx355->vblank, vblank_min, height, 1, - vblank_def); + __v4l2_ctrl_modify_range(imx355->vblank, IMX355_FLL_OFFSET, + height, 1, vblank_def); __v4l2_ctrl_s_ctrl(imx355->vblank, vblank_def); h_blank =3D mode->llp - imx355->cur_mode->width; /* @@ -1146,7 +1131,6 @@ static int imx355_init_controls(struct imx355 *imx355) struct v4l2_ctrl_handler *ctrl_hdlr; s64 exposure_max; s64 vblank_def; - s64 vblank_min; s64 hblank; u64 pixel_rate; const struct imx355_mode *mode; @@ -1176,9 +1160,8 @@ static int imx355_init_controls(struct imx355 *imx355) /* Initialize vblank/hblank/exposure parameters based on current mode */ mode =3D imx355->cur_mode; vblank_def =3D mode->fll_def - mode->height; - vblank_min =3D mode->fll_min - mode->height; imx355->vblank =3D v4l2_ctrl_new_std(ctrl_hdlr, &imx355_ctrl_ops, - V4L2_CID_VBLANK, vblank_min, + V4L2_CID_VBLANK, IMX355_FLL_OFFSET, IMX355_FLL_MAX - mode->height, 1, vblank_def); =20 --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B92D54BCABD for ; Wed, 6 May 2026 18:24:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091846; cv=none; b=GHcTsecCR5VHTbGwteH9p0opHVGnXaThSC568Wfd03rky9nApMk38QBZFMjDS1ia+5mHHU3Qo3t70iwLszOp/PmVBSVoXYCLXUe4k1SpOYYg+lG4qSRz2tDf8/sjrQrJx6R+PzG3t8/XMBUYxROKqDZj7IZAQc1F78VFyitPo9w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091846; c=relaxed/simple; bh=5rTqxxrXxuKRZeZ8cljm9KNLkFR9jV2eUD4Dy5C5uvU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=iO+wV0cgEQl9yBsKo2v+f6c/5YRkB3U5oCW2bh7n+dHFJQLIiwCB1Pri4uAa9Yyf1zoL5rWF8AAdpv+hsDDTRobSOs8czJAf52pu0mo4WaJ9dCKa5WuvyfU0q/UdJRXg6fgJ8OVfDktyoqDMyFYN+fRQtpHZx8U1ChrYkiVJpKo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=kOo5Orvx; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="kOo5Orvx" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso71489215e9.3 for ; Wed, 06 May 2026 11:24:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091843; x=1778696643; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ikJiy5dWqthQNFnGNxSlv0pQq/OSpUugZlZvhxfr4so=; b=kOo5Orvxa5MhDTX+UW+HfsVkmuiUnC9IHoFOP+m4pUKADClBnO/0BKMN2vYYheOZkE Z1Ss4lGdwuZE38UL2vxlOpGZQgZ/N48UsTclJ+v9a4aHRBi8gmPA41zsclf+GvDc5nVO pdiP++cDijZ5lgHvylymGObeRXeufHheZpQl79j+tE26HZUkQ/7pSzwmkxVlU7+MJzgT 6XLXHku7QhKNM10wCgBYilkQZQubcBTpr/zJgV0fSd6V2V0Co62GFQ8+trA6rquGWJ0l sYB0rzoGrtPAIH8QGr1EajSIRd7yuWT+yX+tRq93PlsmhSh89nKsCO137PkLNF24iHEm SDFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091843; x=1778696643; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=ikJiy5dWqthQNFnGNxSlv0pQq/OSpUugZlZvhxfr4so=; b=r+JcHiNn+zI1kXnV0nb3gIgYG0CVpFluAVWvSHZBwEe8gy6N/iwYrZjmgcYzyjf0we YDh9StkIkrM2n0U80aCtVEWo8mr1q1NjA6ihAmal0KpcIXvZa7F43YKLYeOZZHJpEcAV v3DmCTsZIgQJwou/JOPxvnHHo9bFECb/TAVQpedkspcGnsDKwFKveNfIEeL7j6W6IgNj 7M2jnoW1km3wr6qO1xKUwQXK8FOjqMp1nOUtCwPj8Mb08Q4t7yEQOnVy7Duo9YEsIT0h bEqbOrnL9el+eq6ri+kxLm4SK+avOrqq0z7KUy42JeCqnYhEDNA35+ZCg83KTOKVANcz 6M/A== X-Forwarded-Encrypted: i=1; AFNElJ/0gIBOC0oVGN0QLGwfijkRTtRv0OM9E0aGhvzPimFegxjykYdgZLAOLAfIJD2yGI9udo0JwkMsei8SOY8=@vger.kernel.org X-Gm-Message-State: AOJu0YxNGgp8FVLCPWF8rtJ89isSsBhV7XTQN44h67ovH2ucu4KKFUiw u1QPtoZoKIJHxVW7WL7dYnuomKrtj2JyTtICtsBrtk7GrumoNBdD9SBJcNEtZtIZDBbP+IMqURM Gku4+ X-Gm-Gg: AeBDietBJRARfETN8Gg/axjQUSUPFjOCuuMEwyUwE+X1/j7Mi9FSmWEX+M345GxPa2B HiUHpSAFNWpB66Obddvcs3mq9OXyDp+mxetR5wkBIvA4sS2SG4w7b2RV2Cos28RW7jc2ScPG/af nEL80uhAtvItCqacWUPEvPthznAS14aIdklt2OFclUpPb27NThJIK/BNxWs/v9NjBNavhqgd8LF wIdoD3VA+cwiqNtCju+/mlP0Y+hHFxVDwwHfkia2WJT1hiHT+cGsnkvZpEwTh2Kez17fheKHMaW mEnj8PbuHLodHSLvMHilu/5gBhHk8/kRcWdSfnvDkypASZryDF17LGLqWkbSDnNjsZmjg926AdK oGo1A1vvxE1iKXC5iv3VXtIgeCesXJD6q/nzDu2qHET2SEc1m5ys/b9zdqYgkAkp+dqrdGnSPFr d55w+IeCUuKyqZPUn17wLyBvz5 X-Received: by 2002:a05:600c:8b08:b0:48a:5501:7995 with SMTP id 5b1f17b1804b1-48e51f32ca9mr82587515e9.18.1778091843131; Wed, 06 May 2026 11:24:03 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.24.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:24:02 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:48 +0100 Subject: [PATCH 10/13] media: imx355: Add support for get_selection Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-10-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 Provide all the cropping information via get_selection. Signed-off-by: Dave Stevenson --- drivers/media/i2c/imx355.c | 58 ++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 58 insertions(+) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index 5a3bfcd0f51c..d8d7cc0ceab9 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -88,6 +88,11 @@ /* number of data lanes */ #define IMX355_DATA_LANES 4 =20 +#define IMX355_PIXEL_ARRAY_TOP 0 +#define IMX355_PIXEL_ARRAY_LEFT 0 +#define IMX355_PIXEL_ARRAY_WIDTH 3280 +#define IMX355_PIXEL_ARRAY_HEIGHT 2464 + struct imx355_reg { u16 address; u8 val; @@ -671,6 +676,7 @@ static int imx355_open(struct v4l2_subdev *sd, struct v= 4l2_subdev_fh *fh) struct imx355 *imx355 =3D to_imx355(sd); struct v4l2_mbus_framefmt *try_fmt =3D v4l2_subdev_state_get_format(fh->state, 0); + struct v4l2_rect *crop =3D v4l2_subdev_state_get_crop(fh->state, 0); =20 mutex_lock(&imx355->mutex); =20 @@ -680,6 +686,11 @@ static int imx355_open(struct v4l2_subdev *sd, struct = v4l2_subdev_fh *fh) try_fmt->code =3D imx355_get_format_code(imx355); try_fmt->field =3D V4L2_FIELD_NONE; =20 + crop->left =3D imx355->cur_mode->x_add_start; + crop->top =3D imx355->cur_mode->y_add_start; + crop->width =3D imx355->cur_mode->width; + crop->height =3D imx355->cur_mode->height; + mutex_unlock(&imx355->mutex); =20 return 0; @@ -886,6 +897,52 @@ imx355_set_pad_format(struct v4l2_subdev *sd, return 0; } =20 +static void +__imx355_get_pad_crop(struct imx355 *imx355, + struct v4l2_subdev_state *sd_state, unsigned int pad, + enum v4l2_subdev_format_whence which, struct v4l2_rect *r) +{ + switch (which) { + case V4L2_SUBDEV_FORMAT_TRY: + *r =3D *v4l2_subdev_state_get_crop(sd_state, pad); + break; + case V4L2_SUBDEV_FORMAT_ACTIVE: + r->left =3D imx355->cur_mode->x_add_start; + r->top =3D imx355->cur_mode->y_add_start; + r->width =3D imx355->cur_mode->width; + r->height =3D imx355->cur_mode->height; + break; + } +} + +static int imx355_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_selection *sel) +{ + switch (sel->target) { + case V4L2_SEL_TGT_CROP: + struct imx355 *imx355 =3D to_imx355(sd); + + mutex_lock(&imx355->mutex); + __imx355_get_pad_crop(imx355, sd_state, sel->pad, sel->which, + &sel->r); + mutex_unlock(&imx355->mutex); + + return 0; + case V4L2_SEL_TGT_CROP_DEFAULT: + case V4L2_SEL_TGT_CROP_BOUNDS: + case V4L2_SEL_TGT_NATIVE_SIZE: + sel->r.top =3D IMX355_PIXEL_ARRAY_TOP; + sel->r.left =3D IMX355_PIXEL_ARRAY_LEFT; + sel->r.width =3D IMX355_PIXEL_ARRAY_WIDTH; + sel->r.height =3D IMX355_PIXEL_ARRAY_HEIGHT; + + return 0; + } + + return -EINVAL; +} + /* Start streaming */ static int imx355_start_streaming(struct imx355 *imx355) { @@ -1062,6 +1119,7 @@ static const struct v4l2_subdev_pad_ops imx355_pad_op= s =3D { .get_fmt =3D imx355_get_pad_format, .set_fmt =3D imx355_set_pad_format, .enum_frame_size =3D imx355_enum_frame_size, + .get_selection =3D imx355_get_selection, }; =20 static const struct v4l2_subdev_ops imx355_subdev_ops =3D { --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65FAC4C77DC for ; Wed, 6 May 2026 18:24:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091847; cv=none; b=VlPh+D6j4O4gNkQIoJGEr6RLAb/S5uRKHEf27dyOeLQfbzoZYqh65JSCYn7/Fccz14iqikHxfvLw7mlBXjv5sNRG2kS5nd6BFat4Mn1Ultb17Y5pSHg+aHOnsS2p/DAzfL1FCWFVIGYAU3BXyFsu2QPFglFHFgXeEI+Fs+pz+/k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091847; c=relaxed/simple; bh=7W7RVLiT/cPIJPEX14Teeq7FzobBvaAWsNgWk7yrP2E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BOGNwxleqdVKMwICdIbeik5M2JIYu9Ib2WO3vuxM675mw8MJeOjS8Jt5TarXVVEV1K9vUUhkoBtyjOKtR507NE7t3XP9SjahVf9vNcZCIypBp4mIsumxWlsmorlbHxUfC58OilSvPeFazCVk/0432PaDqNcaHVaRmEgw8Wd9pnM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=apBk7XNs; arc=none smtp.client-ip=209.85.128.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="apBk7XNs" Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso71489325e9.3 for ; Wed, 06 May 2026 11:24:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091844; x=1778696644; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=dDClZC2IjbmOuh5R8s0gt872bmWKRv7G6HurlF5rhfg=; b=apBk7XNsfzHqZOJiLvBVbH2b/Uj5JHfKGG74fwLGHceQKLLH4DY349t6XbsD9cnri5 RS8jwVvdTgdZoPfpaFWy+2Qlf0e/Yl2RkIwBB7k+OQrPbrOx65XkOPRFkT7+HDEZ7Axv v/UUyhW1p/dCXRK9G6NM04AO9Z3soo2CHdZ0TIrVJUhZG/GktEYhe71Cf0IBjh1ZKRfx Qk8RRUZP4HzQd1EXJGJXusHz6eB5YIK+Ag8+T4Hqly1InmUzFsRCj0WDi1PrzoFd/Jd8 HRVo4y9QD01+tz8vWSj8ze+727Dz+sE3mkPaAiIP5ZhewDxqOJdXNdGdYf/LoNnLB0zb PFFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091844; x=1778696644; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=dDClZC2IjbmOuh5R8s0gt872bmWKRv7G6HurlF5rhfg=; b=fIQn29TWux6ndqQGcz9EAJluKlsrY6XyYVv3VplQKqrgpAeQyPpHTq4zB3LaDeLUJ1 NGRTl7Kn+4oQoyarRDn5QFuZBIIQtTlsytzG6BMadFtniAq+aN/qwmHiMlm9v2Fz0T6y ra7je2vkhA5W8hcUN3tF4dJTXXDTDmzTvHm8FKu970GSbPzZ2ITWoLUZqA5NlYYQRFHg Jt3a4uwkEUeaBxADGqJT1quM6OwTEue+zSZ/H5zvDbpLFx8JcpW0Ic21DE26nXDsH2OL WRihlTrPKszcOFh7DfA13x64RST+MbjYItzx2stLi3kaSr8FiZl/sfzqrTlPossW1s7U emCA== X-Forwarded-Encrypted: i=1; AFNElJ+tCS6cqmT4syGYDqzAmjsGPXyTYWcH6PkAd+ni4SDIT92Q7W5dNwrCwnqyvBPh9JmhhQT8o2lTf01drwo=@vger.kernel.org X-Gm-Message-State: AOJu0YzXolNik2ajs98E1jmok4653NxxBn61aABUaPWe+LM+TLkoCDLo XH+TqtybeDlz+9r4MHccynvTKUGLg0d8GOSL1AccPNOpSnayY6JO93U0YZ7JxTQ6oTM= X-Gm-Gg: AeBDiethfzlNhEwkxZCHo6YpNIXwr1k1rW79+j1pydD/7qCkLLvay3LB9xsWZBS/sUh 6Gb7mfF9WV6y+Np1We7E10dBERXpG9Kjqt+A6hzj3mqKGgCdlN9uqOE+eV7FaG3wVoPxS1at4YC P2qyiRJEwGOq/ZqEdIIhsJC4O77vBxff9Jxi/ZrA+6vdoUeGDrJoCY7MVc6OBZJ4ilXLdQ5l+CY 62+PlMG9PT2SBgRYOvtBOkzpkzC3Dfq5pwtM+43yM/eFKbgj3koHvPhTt+ixA3IXDWZ2bFoROoe 7rxK4m8UoS8alubEZdwDLdJ2BNjK8M/4B4YVdk+pndFfYMunn+CzzbrWpZl5Kg7vMzbGC2MOsA3 oel2XCepavM+Id+NU3FGVgJK4k2tP4ePoEfvNvYODKBwfjiKCiBAxQkkAfqYSetNGDfezeDC3DN V1oXgkEUf9RKl1OhMfbI9TYgTl X-Received: by 2002:a05:600c:a111:b0:48a:7b7b:c2b9 with SMTP id 5b1f17b1804b1-48e51e0bb44mr62499145e9.4.1778091843764; Wed, 06 May 2026 11:24:03 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.24.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:24:03 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:49 +0100 Subject: [PATCH 11/13] media: imx355: Use pm_runtime autosuspend_delay Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-11-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 Avoid powering the sensor up and down unnecessarily by using pm_runtime's autosuspend_delay feature. Signed-off-by: Dave Stevenson Reviewed-by: Jacopo Mondi --- drivers/media/i2c/imx355.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index d8d7cc0ceab9..c6fcd649c32a 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -1068,7 +1068,7 @@ static int imx355_set_stream(struct v4l2_subdev *sd, = int enable) goto err_rpm_put; } else { imx355_stop_streaming(imx355); - pm_runtime_put(imx355->dev); + pm_runtime_put_autosuspend(imx355->dev); } =20 /* vflip and hflip cannot change during streaming */ @@ -1080,7 +1080,7 @@ static int imx355_set_stream(struct v4l2_subdev *sd, = int enable) return ret; =20 err_rpm_put: - pm_runtime_put(imx355->dev); + pm_runtime_put_autosuspend(imx355->dev); err_unlock: mutex_unlock(&imx355->mutex); =20 @@ -1431,6 +1431,8 @@ static int imx355_probe(struct i2c_client *client) pm_runtime_set_active(imx355->dev); pm_runtime_enable(imx355->dev); pm_runtime_idle(imx355->dev); + pm_runtime_set_autosuspend_delay(imx355->dev, 1000); + pm_runtime_use_autosuspend(imx355->dev); =20 ret =3D v4l2_async_register_subdev_sensor(&imx355->sd); if (ret < 0) --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4EAEB4C8FFB for ; Wed, 6 May 2026 18:24:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091849; cv=none; b=drihXa9ws1kgfKXx38XVw8Xd+Gsddb1pctgjlMSkJZ6gLDdWS9+ojb6hOak6U6vF3DAZYbJ/Qj0Otrbqy4TZypckido03+d5CMJ4lbCyQOspJu+rQQGIERX1QbfERQApdAGKr3+AsDO6vA92t8Ihfzg2leLhMbRrZtKcLWW5WP0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091849; c=relaxed/simple; bh=KMhlkbqfdCnilTTnd9U3TjA7IhJxO0WD4MZTltfdMqQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tpTZYcQskaK/XHL3FYxMT/v5FroUgxkOCDA9jOVocpUkHh9a80v8iBQvZ2U06motiA9bFsPdq89eVHkZAW0Y/TNTq9o3G/Mpt4j5p/rM3BJe0t0kDTtJ7Ie49g0Xo+IUk9tV1fgDYwUFPv/ZsON12+s0kz8ijADK2SehNqlOO6k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=YDvs67Eh; arc=none smtp.client-ip=209.85.128.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="YDvs67Eh" Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-4891c00e7aeso58173685e9.2 for ; Wed, 06 May 2026 11:24:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091844; x=1778696644; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=gSREt9vX0rV4gxj+YQgSthqP+jSA+bvzqvQ40llR218=; b=YDvs67EhY5+KMGIdVAU+mnDg6woFj/0bfEjSZQwslGdfYR0wK6IvcmLDY51eSUmz7u +dsK04zP2u/IrgyoQCypLJMvVZ3URR9FxlrdDtpsYw3/hE7QzJM/BcAWNcqz23JXaqMS PYYAn+C/9O6QF4F6TdIFP+b7AxzHHaCAlCLY3SG7MDLHiHpGEbeBTrmAbZqhrzf14xBM G1E9iQKHICvWPHveF+gVTNY8RYFz/2zvwt2nrt1kzBfDkSBB4xmQLZkk1ixU5013P6hn Aeo1KkXBOr8zhkVFzynC9bmxZehXH1TDGmqhLjwRbiag0DPG1OUY3/V+00aQAEO9gTqx On5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091844; x=1778696644; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=gSREt9vX0rV4gxj+YQgSthqP+jSA+bvzqvQ40llR218=; b=ci4dI2uji549h8Al3xgjZtY0Ibgonp6NIwzZGpXTNRpwlmnyCWFfkcqS7RWARpReYB okJxBoyEMwQofnCiAdWh1V8ITvRD63PK7ECmceAt2uXzBLFrF1ucl0TRBNOVmLrYiNrQ 58+mnGZ21Fb+PkJ5pHnSztS6bWC46U8EQ5+SGcyGBDjRpU1exmk6EW+tZciQuG2Y9nyZ afIWYb6AS8SM0pQkLU0u3qlU9OpU3AvoKVpYJrNav0vr4FJIJ+lNJvoaEQvUgbk/zg5N PHcscSdV5DwV05ESsgIZd1riy9prvY6D0TAH+vYPggdwU0m4KUuQ89mT+actKEKY9+hq OXHQ== X-Forwarded-Encrypted: i=1; AFNElJ8t2PWGNhXOxNLr5cchqrMgHfV/oQFI32SRd/zlytvwsyknalnti+Tb0mQLtisAFXifeNMu7L/3c45sC+s=@vger.kernel.org X-Gm-Message-State: AOJu0YwfGszY6sjpbDivBC58zOxCVtb38Jd314jnidDorBT5rzmmbZ/n G0nqjPqSjJLJNNFE1A2RKE8YQSraefHG4/Jo0/+ObXBHI/l/XVXrPbj6E7nmt0ymPY8= X-Gm-Gg: AeBDieuEbqNOrtHVuQxuRo7WL2gU+MjIoETgJAK+WUT3sE6q1sG4xePEeXKj/Dt4BuK mi1vCIxgePk8Bw5VAopi8h5RY++CyUtAhGeL+Dyj2adY+LewsQki83d/BWDQT/Z7afFmBzFRncj 8Cpyp4ECh7VFtuuxpkrszDqAqyn6Zu1Ip/wyslgc5onHObFcwQF+/iR9Cv4zZFxq5nAmJi7uI/d 8nxTNjBrd8HyvUwQj7uP0MaUymePDInTVtAec/iLPFYOoveqGo3XIeFetpLEg4mTlEzuJ0qzuhG sAfBYyboL3+Gpv1nD7oV4YrfER5Z5pTOihxXKpFGK693opQ+k+08IIegrlaNJK3ErA28XwwNBtd dp56K+kOmwbqC+p3csST8cXaG/LASdpQEFvKzIBZ+b7NbtJBV3k7FreIcvlL2d9V6oJE8ptYsas c5XAFhS8n53to48e1pjvPMe381cLfzBZVnLbA= X-Received: by 2002:a05:600c:3548:b0:487:1108:48b8 with SMTP id 5b1f17b1804b1-48e51e0a60fmr79790895e9.2.1778091844493; Wed, 06 May 2026 11:24:04 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.24.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:24:04 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:50 +0100 Subject: [PATCH 12/13] media: imx355: Convert to new CCI register access helpers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-12-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 Use the new comon CCI register access helpers to replace the private register access helpers in the imx355 driver. Signed-off-by: Dave Stevenson --- drivers/media/i2c/Kconfig | 1 + drivers/media/i2c/imx355.c | 502 ++++++++++++++++++-----------------------= ---- 2 files changed, 196 insertions(+), 307 deletions(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 8f2ba4121586..38f23306722c 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -259,6 +259,7 @@ config VIDEO_IMX335 =20 config VIDEO_IMX355 tristate "Sony IMX355 sensor support" + select V4L2_CCI_I2C help This is a Video4Linux2 sensor driver for the Sony IMX355 camera. diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index c6fcd649c32a..d0e0e81d1e7c 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -9,78 +9,80 @@ #include #include #include +#include #include #include =20 +#include #include #include #include #include =20 -#define IMX355_REG_MODE_SELECT 0x0100 +#define IMX355_REG_MODE_SELECT CCI_REG8(0x0100) #define IMX355_MODE_STANDBY 0x00 #define IMX355_MODE_STREAMING 0x01 =20 /* Chip ID */ -#define IMX355_REG_CHIP_ID 0x0016 +#define IMX355_REG_CHIP_ID CCI_REG16(0x0016) #define IMX355_CHIP_ID 0x0355 =20 /* PLL registers that depend on the external clock frequency */ -#define IMX355_REG_EXTCLK_FREQ 0x0136 -#define IMX355_REG_PLL_VT_MUL 0x0306 -#define IMX355_REG_PLL_OP_MUL 0x030e +#define IMX355_REG_EXTCLK_FREQ CCI_REG16(0x0136) +#define IMX355_REG_PLL_VT_MUL CCI_REG16(0x0306) +#define IMX355_REG_PLL_OP_MUL CCI_REG16(0x030e) =20 /* V_TIMING internal */ -#define IMX355_REG_FLL 0x0340 +#define IMX355_REG_FLL CCI_REG16(0x0340) #define IMX355_FLL_MAX 0xffff /* Number of lines above frame height that are required. */ #define IMX355_FLL_OFFSET 20 =20 -#define IMX355_REG_LLP 0x0342 +#define IMX355_REG_LLP CCI_REG16(0x0342) #define IMX355_LLP_MAX 0xffff =20 -#define IMX355_REG_X_ADD_START 0x0344 -#define IMX355_REG_Y_ADD_START 0x0346 -#define IMX355_REG_X_ADD_END 0x0348 -#define IMX355_REG_Y_ADD_END 0x034a -#define IMX355_REG_X_OUT_SIZE 0x034c -#define IMX355_REG_Y_OUT_SIZE 0x034e +#define IMX355_REG_X_ADD_START CCI_REG16(0x0344) +#define IMX355_REG_Y_ADD_START CCI_REG16(0x0346) +#define IMX355_REG_X_ADD_END CCI_REG16(0x0348) +#define IMX355_REG_Y_ADD_END CCI_REG16(0x034a) +#define IMX355_REG_X_OUT_SIZE CCI_REG16(0x034c) +#define IMX355_REG_Y_OUT_SIZE CCI_REG16(0x034e) =20 /* Exposure control */ -#define IMX355_REG_EXPOSURE 0x0202 +#define IMX355_REG_EXPOSURE CCI_REG16(0x0202) #define IMX355_EXPOSURE_MIN 1 #define IMX355_EXPOSURE_STEP 1 #define IMX355_EXPOSURE_DEFAULT 0x0282 =20 /* Analog gain control */ -#define IMX355_REG_ANALOG_GAIN 0x0204 +#define IMX355_REG_ANALOG_GAIN CCI_REG16(0x0204) #define IMX355_ANA_GAIN_MIN 0 #define IMX355_ANA_GAIN_MAX 960 #define IMX355_ANA_GAIN_STEP 1 #define IMX355_ANA_GAIN_DEFAULT 0 =20 /* Digital gain control */ -#define IMX355_REG_DPGA_USE_GLOBAL_GAIN 0x3070 -#define IMX355_REG_DIG_GAIN_GLOBAL 0x020e +#define IMX355_REG_DPGA_USE_GLOBAL_GAIN CCI_REG8(0x3070) +#define IMX355_REG_DIG_GAIN_GLOBAL CCI_REG16(0x020e) #define IMX355_DGTL_GAIN_MIN 256 #define IMX355_DGTL_GAIN_MAX 4095 #define IMX355_DGTL_GAIN_STEP 1 #define IMX355_DGTL_GAIN_DEFAULT 256 =20 /* Test Pattern Control */ -#define IMX355_REG_TEST_PATTERN 0x0600 +#define IMX355_REG_TEST_PATTERN CCI_REG8(0x0600) #define IMX355_TEST_PATTERN_DISABLED 0 #define IMX355_TEST_PATTERN_SOLID_COLOR 1 #define IMX355_TEST_PATTERN_COLOR_BARS 2 #define IMX355_TEST_PATTERN_GRAY_COLOR_BARS 3 #define IMX355_TEST_PATTERN_PN9 4 =20 -#define IMX355_REG_BINNING_MODE 0x0900 -#define IMX355_REG_BINNING_TYPE 0x0901 -#define IMX355_REG_BINNING_WEIGHTING 0x0902 +#define IMX355_REG_BINNING_MODE CCI_REG8(0x0900) +#define IMX355_REG_BINNING_TYPE CCI_REG8(0x0901) +#define IMX355_REG_BINNING_WEIGHTING CCI_REG8(0x0902) =20 /* Flip Control */ -#define IMX355_REG_ORIENTATION 0x0101 +#define IMX355_REG_ORIENTATION CCI_REG8(0x0101) =20 /* default link frequency and external clock */ #define IMX355_LINK_FREQ_DEFAULT 360000000LL @@ -93,14 +95,9 @@ #define IMX355_PIXEL_ARRAY_WIDTH 3280 #define IMX355_PIXEL_ARRAY_HEIGHT 2464 =20 -struct imx355_reg { - u16 address; - u8 val; -}; - struct imx355_reg_list { u32 num_of_regs; - const struct imx355_reg *regs; + const struct cci_reg_sequence *regs; }; =20 /* Mode : resolution and related config&values */ @@ -160,6 +157,7 @@ struct imx355_hwcfg { struct imx355 { struct device *dev; struct clk *clk; + struct regmap *regmap; =20 struct v4l2_subdev sd; struct media_pad pad; @@ -196,152 +194,147 @@ static const struct regulator_bulk_data imx355_supp= lies[] =3D { { .supply =3D "dovdd" }, }; =20 -static const struct imx355_reg imx355_global_regs[] =3D { - { 0x304e, 0x03 }, - { 0x4348, 0x16 }, - { 0x4350, 0x19 }, - { 0x4408, 0x0a }, - { 0x440c, 0x0b }, - { 0x4411, 0x5f }, - { 0x4412, 0x2c }, - { 0x4623, 0x00 }, - { 0x462c, 0x0f }, - { 0x462d, 0x00 }, - { 0x462e, 0x00 }, - { 0x4684, 0x54 }, - { 0x480a, 0x07 }, - { 0x4908, 0x07 }, - { 0x4909, 0x07 }, - { 0x490d, 0x0a }, - { 0x491e, 0x0f }, - { 0x4921, 0x06 }, - { 0x4923, 0x28 }, - { 0x4924, 0x28 }, - { 0x4925, 0x29 }, - { 0x4926, 0x29 }, - { 0x4927, 0x1f }, - { 0x4928, 0x20 }, - { 0x4929, 0x20 }, - { 0x492a, 0x20 }, - { 0x492c, 0x05 }, - { 0x492d, 0x06 }, - { 0x492e, 0x06 }, - { 0x492f, 0x06 }, - { 0x4930, 0x03 }, - { 0x4931, 0x04 }, - { 0x4932, 0x04 }, - { 0x4933, 0x05 }, - { 0x595e, 0x01 }, - { 0x5963, 0x01 }, - { 0x3030, 0x01 }, - { 0x3031, 0x01 }, - { 0x3045, 0x01 }, - { 0x4010, 0x00 }, - { 0x4011, 0x00 }, - { 0x4012, 0x00 }, - { 0x4013, 0x01 }, - { 0x68a8, 0xfe }, - { 0x68a9, 0xff }, - { 0x6888, 0x00 }, - { 0x6889, 0x00 }, - { 0x68b0, 0x00 }, - { 0x3058, 0x00 }, - { 0x305a, 0x00 }, - { 0x0112, 0x0a }, - { 0x0113, 0x0a }, - { 0x0114, 0x03 }, - { 0x0301, 0x05 }, - { 0x0303, 0x01 }, - { 0x0305, 0x02 }, - { 0x030d, 0x02 }, - { 0x0310, 0x00 }, - { 0x0220, 0x00 }, - { 0x0222, 0x01 }, - { 0x0820, 0x0b }, - { 0x0821, 0x40 }, - { 0x3088, 0x04 }, - { 0x6813, 0x02 }, - { 0x6835, 0x07 }, - { 0x6836, 0x01 }, - { 0x6837, 0x04 }, - { 0x684d, 0x07 }, - { 0x684e, 0x01 }, - { 0x684f, 0x04 }, +static const struct cci_reg_sequence imx355_global_regs[] =3D { + { CCI_REG8(0x304e), 0x03 }, + { CCI_REG8(0x4348), 0x16 }, + { CCI_REG8(0x4350), 0x19 }, + { CCI_REG8(0x4408), 0x0a }, + { CCI_REG8(0x440c), 0x0b }, + { CCI_REG8(0x4411), 0x5f }, + { CCI_REG8(0x4412), 0x2c }, + { CCI_REG8(0x4623), 0x00 }, + { CCI_REG8(0x462c), 0x0f }, + { CCI_REG8(0x462d), 0x00 }, + { CCI_REG8(0x462e), 0x00 }, + { CCI_REG8(0x4684), 0x54 }, + { CCI_REG8(0x480a), 0x07 }, + { CCI_REG8(0x4908), 0x07 }, + { CCI_REG8(0x4909), 0x07 }, + { CCI_REG8(0x490d), 0x0a }, + { CCI_REG8(0x491e), 0x0f }, + { CCI_REG8(0x4921), 0x06 }, + { CCI_REG8(0x4923), 0x28 }, + { CCI_REG8(0x4924), 0x28 }, + { CCI_REG8(0x4925), 0x29 }, + { CCI_REG8(0x4926), 0x29 }, + { CCI_REG8(0x4927), 0x1f }, + { CCI_REG8(0x4928), 0x20 }, + { CCI_REG8(0x4929), 0x20 }, + { CCI_REG8(0x492a), 0x20 }, + { CCI_REG8(0x492c), 0x05 }, + { CCI_REG8(0x492d), 0x06 }, + { CCI_REG8(0x492e), 0x06 }, + { CCI_REG8(0x492f), 0x06 }, + { CCI_REG8(0x4930), 0x03 }, + { CCI_REG8(0x4931), 0x04 }, + { CCI_REG8(0x4932), 0x04 }, + { CCI_REG8(0x4933), 0x05 }, + { CCI_REG8(0x595e), 0x01 }, + { CCI_REG8(0x5963), 0x01 }, + { CCI_REG8(0x3030), 0x01 }, + { CCI_REG8(0x3031), 0x01 }, + { CCI_REG8(0x3045), 0x01 }, + { CCI_REG8(0x4010), 0x00 }, + { CCI_REG8(0x4011), 0x00 }, + { CCI_REG8(0x4012), 0x00 }, + { CCI_REG8(0x4013), 0x01 }, + { CCI_REG8(0x68a8), 0xfe }, + { CCI_REG8(0x68a9), 0xff }, + { CCI_REG8(0x6888), 0x00 }, + { CCI_REG8(0x6889), 0x00 }, + { CCI_REG8(0x68b0), 0x00 }, + { CCI_REG8(0x3058), 0x00 }, + { CCI_REG8(0x305a), 0x00 }, + { CCI_REG8(0x0112), 0x0a }, + { CCI_REG8(0x0113), 0x0a }, + { CCI_REG8(0x0114), 0x03 }, + { CCI_REG8(0x0301), 0x05 }, + { CCI_REG8(0x0303), 0x01 }, + { CCI_REG8(0x0305), 0x02 }, + { CCI_REG8(0x030d), 0x02 }, + { CCI_REG8(0x0310), 0x00 }, + { CCI_REG8(0x0220), 0x00 }, + { CCI_REG8(0x0222), 0x01 }, + { CCI_REG8(0x0820), 0x0b }, + { CCI_REG8(0x0821), 0x40 }, + { CCI_REG8(0x3088), 0x04 }, + { CCI_REG8(0x6813), 0x02 }, + { CCI_REG8(0x6835), 0x07 }, + { CCI_REG8(0x6836), 0x01 }, + { CCI_REG8(0x6837), 0x04 }, + { CCI_REG8(0x684d), 0x07 }, + { CCI_REG8(0x684e), 0x01 }, + { CCI_REG8(0x684f), 0x04 }, }; =20 -static const struct imx355_reg_list imx355_global_setting =3D { - .num_of_regs =3D ARRAY_SIZE(imx355_global_regs), - .regs =3D imx355_global_regs, +static const struct cci_reg_sequence mode_3268x2448_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_3268x2448_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_3264x2448_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_3264x2448_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_3280x2464_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_3280x2464_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1940x1096_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1940x1096_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1936x1096_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1936x1096_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1924x1080_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1924x1080_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1920x1080_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1920x1080_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1640x1232_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1640x1232_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1640x922_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1640x922_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1300x736_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1300x736_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1296x736_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1296x736_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1284x720_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1284x720_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, +static const struct cci_reg_sequence mode_1280x720_regs[] =3D { + { CCI_REG8(0x0700), 0x00 }, + { CCI_REG8(0x0701), 0x10 }, }; =20 -static const struct imx355_reg mode_1280x720_regs[] =3D { - { 0x0700, 0x00 }, - { 0x0701, 0x10 }, -}; - -static const struct imx355_reg mode_820x616_regs[] =3D { - { 0x0700, 0x02 }, - { 0x0701, 0x78 }, +static const struct cci_reg_sequence mode_820x616_regs[] =3D { + { CCI_REG8(0x0700), 0x02 }, + { CCI_REG8(0x0701), 0x78 }, }; =20 static const char * const imx355_test_pattern_menu[] =3D { @@ -598,78 +591,6 @@ static u32 imx355_get_format_code(struct imx355 *imx35= 5) return code; } =20 -/* Read registers up to 4 at a time */ -static int imx355_read_reg(struct imx355 *imx355, u16 reg, u32 len, u32 *v= al) -{ - struct i2c_client *client =3D v4l2_get_subdevdata(&imx355->sd); - struct i2c_msg msgs[2]; - u8 addr_buf[2]; - u8 data_buf[4] =3D { 0 }; - int ret; - - if (len > 4) - return -EINVAL; - - put_unaligned_be16(reg, addr_buf); - /* Write register address */ - msgs[0].addr =3D client->addr; - msgs[0].flags =3D 0; - msgs[0].len =3D ARRAY_SIZE(addr_buf); - msgs[0].buf =3D addr_buf; - - /* Read data from register */ - msgs[1].addr =3D client->addr; - msgs[1].flags =3D I2C_M_RD; - msgs[1].len =3D len; - msgs[1].buf =3D &data_buf[4 - len]; - - ret =3D i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); - if (ret !=3D ARRAY_SIZE(msgs)) - return -EIO; - - *val =3D get_unaligned_be32(data_buf); - - return 0; -} - -/* Write registers up to 4 at a time */ -static int imx355_write_reg(struct imx355 *imx355, u16 reg, u32 len, u32 v= al) -{ - struct i2c_client *client =3D v4l2_get_subdevdata(&imx355->sd); - u8 buf[6]; - - if (len > 4) - return -EINVAL; - - put_unaligned_be16(reg, buf); - put_unaligned_be32(val << (8 * (4 - len)), buf + 2); - if (i2c_master_send(client, buf, len + 2) !=3D len + 2) - return -EIO; - - return 0; -} - -/* Write a list of registers */ -static int imx355_write_regs(struct imx355 *imx355, - const struct imx355_reg *regs, u32 len) -{ - int ret; - u32 i; - - for (i =3D 0; i < len; i++) { - ret =3D imx355_write_reg(imx355, regs[i].address, 1, regs[i].val); - if (ret) { - dev_err_ratelimited(imx355->dev, - "write reg 0x%4.4x return err %d", - regs[i].address, ret); - - return ret; - } - } - - return 0; -} - /* Open sub-device */ static int imx355_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) { @@ -724,31 +645,31 @@ static int imx355_set_ctrl(struct v4l2_ctrl *ctrl) switch (ctrl->id) { case V4L2_CID_ANALOGUE_GAIN: /* Analog gain =3D 1024/(1024 - ctrl->val) times */ - ret =3D imx355_write_reg(imx355, IMX355_REG_ANALOG_GAIN, 2, - ctrl->val); + ret =3D cci_write(imx355->regmap, IMX355_REG_ANALOG_GAIN, + ctrl->val, NULL); break; case V4L2_CID_DIGITAL_GAIN: - ret =3D imx355_write_reg(imx355, IMX355_REG_DIG_GAIN_GLOBAL, 2, - ctrl->val); + ret =3D cci_write(imx355->regmap, IMX355_REG_DIG_GAIN_GLOBAL, + ctrl->val, NULL); break; case V4L2_CID_EXPOSURE: - ret =3D imx355_write_reg(imx355, IMX355_REG_EXPOSURE, 2, - ctrl->val); + ret =3D cci_write(imx355->regmap, IMX355_REG_EXPOSURE, + ctrl->val, NULL); break; case V4L2_CID_VBLANK: /* Update FLL that meets expected vertical blanking */ - ret =3D imx355_write_reg(imx355, IMX355_REG_FLL, 2, - imx355->cur_mode->height + ctrl->val); + ret =3D cci_write(imx355->regmap, IMX355_REG_FLL, + imx355->cur_mode->height + ctrl->val, NULL); break; case V4L2_CID_TEST_PATTERN: - ret =3D imx355_write_reg(imx355, IMX355_REG_TEST_PATTERN, - 2, ctrl->val); + ret =3D cci_write(imx355->regmap, IMX355_REG_TEST_PATTERN, + ctrl->val, NULL); break; case V4L2_CID_HFLIP: case V4L2_CID_VFLIP: - ret =3D imx355_write_reg(imx355, IMX355_REG_ORIENTATION, 1, - imx355->hflip->val | - imx355->vflip->val << 1); + ret =3D cci_write(imx355->regmap, IMX355_REG_ORIENTATION, + imx355->hflip->val | imx355->vflip->val << 1, + NULL); break; default: ret =3D -EINVAL; @@ -948,103 +869,64 @@ static int imx355_start_streaming(struct imx355 *imx= 355) { const struct imx355_reg_list *reg_list; const struct imx355_mode *mode; - int ret; + int ret =3D 0; =20 /* Global Setting */ - reg_list =3D &imx355_global_setting; - ret =3D imx355_write_regs(imx355, reg_list->regs, reg_list->num_of_regs); - if (ret) { - dev_err(imx355->dev, "failed to set global settings"); - return ret; - } + cci_multi_reg_write(imx355->regmap, imx355_global_regs, + ARRAY_SIZE(imx355_global_regs), &ret); =20 /* Apply default values of current mode */ mode =3D imx355->cur_mode; reg_list =3D &mode->reg_list; - ret =3D imx355_write_regs(imx355, reg_list->regs, reg_list->num_of_regs); - if (ret) { - dev_err(imx355->dev, "failed to set mode"); - return ret; - } + cci_multi_reg_write(imx355->regmap, reg_list->regs, + reg_list->num_of_regs, &ret); =20 /* Set readout crop and size registers */ - ret =3D imx355_write_reg(imx355, IMX355_REG_X_ADD_START, 2, - mode->x_add_start); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_Y_ADD_START, 2, - mode->y_add_start); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_X_ADD_END, 2, - mode->x_add_end); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_Y_ADD_END, 2, - mode->y_add_end); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_X_OUT_SIZE, 2, - mode->width); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_Y_OUT_SIZE, 2, - mode->height); - if (ret) - return ret; - - ret =3D imx355_write_reg(imx355, IMX355_REG_BINNING_MODE, 1, - mode->binning_mode =3D=3D 0x11 ? 0x00 : 0x01); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_BINNING_TYPE, 1, - mode->binning_mode); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_BINNING_WEIGHTING, 1, 0x00); - if (ret) - return ret; + cci_write(imx355->regmap, IMX355_REG_X_ADD_START, mode->x_add_start, + &ret); + cci_write(imx355->regmap, IMX355_REG_Y_ADD_START, mode->y_add_start, + &ret); + cci_write(imx355->regmap, IMX355_REG_X_ADD_END, mode->x_add_end, &ret); + cci_write(imx355->regmap, IMX355_REG_Y_ADD_END, mode->y_add_end, &ret); + cci_write(imx355->regmap, IMX355_REG_X_OUT_SIZE, mode->width, &ret); + cci_write(imx355->regmap, IMX355_REG_Y_OUT_SIZE, mode->height, &ret); + cci_write(imx355->regmap, IMX355_REG_BINNING_MODE, + mode->binning_mode =3D=3D 0x11 ? 0x00 : 0x01, &ret); + cci_write(imx355->regmap, IMX355_REG_BINNING_TYPE, mode->binning_mode, + &ret); + cci_write(imx355->regmap, IMX355_REG_BINNING_WEIGHTING, 0x00, &ret); =20 /* Set PLL registers for the external clock frequency */ - ret =3D imx355_write_reg(imx355, IMX355_REG_EXTCLK_FREQ, 2, - imx355->clk_params->extclk_freq); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_PLL_VT_MUL, 2, - imx355->clk_params->pll_vt_mpy); - if (ret) - return ret; - ret =3D imx355_write_reg(imx355, IMX355_REG_PLL_OP_MUL, 2, - imx355->clk_params->pll_op_mpy); - if (ret) - return ret; + cci_write(imx355->regmap, IMX355_REG_EXTCLK_FREQ, + imx355->clk_params->extclk_freq, &ret); + cci_write(imx355->regmap, IMX355_REG_PLL_VT_MUL, + imx355->clk_params->pll_vt_mpy, &ret); + cci_write(imx355->regmap, IMX355_REG_PLL_OP_MUL, + imx355->clk_params->pll_op_mpy, &ret); =20 /* set digital gain control to all color mode */ - ret =3D imx355_write_reg(imx355, IMX355_REG_DPGA_USE_GLOBAL_GAIN, 1, 1); - if (ret) - return ret; + cci_write(imx355->regmap, IMX355_REG_DPGA_USE_GLOBAL_GAIN, 1, &ret); =20 /* set line length */ - ret =3D imx355_write_reg(imx355, IMX355_REG_LLP, - imx355->hblank->val + imx355->cur_mode->width, - 2); - if (ret) - return ret; + cci_write(imx355->regmap, IMX355_REG_LLP, + imx355->hblank->val + imx355->cur_mode->width, &ret); =20 /* Apply customized values from user */ - ret =3D __v4l2_ctrl_handler_setup(imx355->sd.ctrl_handler); + __v4l2_ctrl_handler_setup(imx355->sd.ctrl_handler); if (ret) return ret; =20 - return imx355_write_reg(imx355, IMX355_REG_MODE_SELECT, - 1, IMX355_MODE_STREAMING); + cci_write(imx355->regmap, IMX355_REG_MODE_SELECT, IMX355_MODE_STREAMING, + &ret); + + return ret; } =20 /* Stop streaming */ static int imx355_stop_streaming(struct imx355 *imx355) { - return imx355_write_reg(imx355, IMX355_REG_MODE_SELECT, - 1, IMX355_MODE_STANDBY); + return cci_write(imx355->regmap, IMX355_REG_MODE_SELECT, + IMX355_MODE_STANDBY, NULL); } =20 static int imx355_set_stream(struct v4l2_subdev *sd, int enable) @@ -1091,14 +973,14 @@ static int imx355_set_stream(struct v4l2_subdev *sd,= int enable) static int imx355_identify_module(struct imx355 *imx355) { int ret; - u32 val; + u64 val; =20 - ret =3D imx355_read_reg(imx355, IMX355_REG_CHIP_ID, 2, &val); + ret =3D cci_read(imx355->regmap, IMX355_REG_CHIP_ID, &val, NULL); if (ret) return ret; =20 if (val !=3D IMX355_CHIP_ID) { - dev_err(imx355->dev, "chip id mismatch: %x!=3D%x", + dev_err(imx355->dev, "chip id mismatch: %x!=3D%llx", IMX355_CHIP_ID, val); return -EIO; } @@ -1345,6 +1227,12 @@ static int imx355_probe(struct i2c_client *client) =20 mutex_init(&imx355->mutex); =20 + imx355->regmap =3D devm_cci_regmap_init_i2c(client, 16); + if (IS_ERR(imx355->regmap)) { + dev_err(imx355->dev, "Unable to initialize I2C\n"); + return -ENODEV; + } + imx355->clk =3D devm_v4l2_sensor_clk_get(imx355->dev, NULL); if (IS_ERR(imx355->clk)) return dev_err_probe(imx355->dev, PTR_ERR(imx355->clk), --=20 2.34.1 From nobody Sun May 31 00:52:24 2026 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 813C74C6EF9 for ; Wed, 6 May 2026 18:24:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091850; cv=none; b=MFnwW/oSsJIRBdoD+H4ydP75cxl/FI/Izx3wdbNgoKs4miXPD4iYCNBR5J+klP50TWuVH4cygyuU57OW4DBy+RZLREObnqWvUOKk7dghrzVTaQXmm3tWFOteo9rJYoQdjb2ojC/bagnIhrza6whHsil/0AJBRCjSp+i9a62znJo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778091850; c=relaxed/simple; bh=LgZXwxnkssKH6vOPCvPwwV1bBZmH4E8jEazJBf5Jwuo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZQrWntVC8Yh0EXlUnctcHPAhaKi1X4+nVswo8y4Tg1RULq8EsprY1EDGSOBZ6zld3B0YXgCqtVluGke2sqB5Qvbhc1wCxssKgz4nDRgUyM9yqvKXloTT2mGyqbFhkC+/7BEM89qfwn5w+dIBpDKohBONE5VIjQ8XTCBhKlORpAM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=ZJHV7JUd; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="ZJHV7JUd" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-4891c00e7aeso58173785e9.2 for ; Wed, 06 May 2026 11:24:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1778091846; x=1778696646; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=v4rKFRpOU1f6FRgs4DjqIZwveQeNsarmHK5JrkPCLp0=; b=ZJHV7JUdlVkq7+cYd0R87zw8gWf51UnIpWhpo4i+iWUTa4a5F5ryMFQVZwABVqIWTy szdprd4tsxa6Bkuj1gkbPwbHamv/Y/Cb4j3aaJqYGQ7GG8WkIqaYvo6zPz0TCadpN14y 9mtdzwgkzIVpD89lKB30AnlakM9k1pgZrTLYBobRRI/0b04Zt9pFVqGzt755Ot6l1Sgd gZn4Kr9j03UHIutRJAzyordnUINz/OPsQmNFCaBOvmqDQI/XUpolEgLrtdclHyHitFyu bRsItjZX29URE7uvkNHldIn+9cAiN13VIzk6bPuUhWdWADMiDfpGt+HpJ+l7MaDLreVJ XIsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778091846; x=1778696646; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=v4rKFRpOU1f6FRgs4DjqIZwveQeNsarmHK5JrkPCLp0=; b=lGT+3IkCiOobLKObv81v43ycKkzcly1TPnKJzzLQnwFirr/Z19cgGVWAon1huhgox4 kqesrFORJdxlPIn8HV42P4yIH6V1PyXVe9Ohb7KliTW21mo6PNpUkQAm7rJd16nmfJjW qcqqCXBh4IzoKTDjZ/7udFKJ5Jq+78TFy49/ZOtzvgSEx11QZYtMxMOwgLS05ObIa6Vn E+vDibfomj0Np0HImyhx4mFdTEeBSSQg6aqKo7Hw3GQSyxJGolh5m3PpLUbdq+iBebRh 8DSdxS3f1fzZb39adRc+KPANG6GvDAG9b/w9ZQiw398xQIvHTVFXGFx8zhXjvH1tjW3n MS1A== X-Forwarded-Encrypted: i=1; AFNElJ9ceR1xWinhJh0uopluZDP6fsZUPy1zavd7Z+YJLOGzJrLyQwMgiIvqZ46zFrBFl9vtyGuaMgcXzh+8Rco=@vger.kernel.org X-Gm-Message-State: AOJu0Yyjo83ZHAkYPPbCiK0Uz2HVlHQGxUTY2TlkVF08TZk0Tv8QR33f tp2ry/RDvPxdeoVx+8ZEHvOXPQ0BgqKOBwL3P5ZqRnRhjCnazunXfAImNAz2YO5ftwM= X-Gm-Gg: AeBDieuHEZ/h2R0m2HeatS0KUzvifZVhXihWrbn3RKE6MpkdSwLve/mxP/X1wnTj+cP ZRms8nwpZUNlkGn2246nRs7lJP/I7n6AeVPRe26nrGG9OwtdMV1jWelR2+0EDQTV4gY7Mi680hh cy3SUu1SVaMZlm3r++85MrCLzAeVB+T+HA7/EdFjwzoLApH5OcMTUQ8F5FZZT3Sy+gJpFIMQPAK J44N0J0nibCqbpZdcs/Mgol8VJ8gEL6WML8bH9MGNuuhO4yTyImFO0cFqM7OveRaO0gg3UflDrK DgKlUQ1wJywVzgfYQ2xSj2i31HOCNIzlEcRWeL+o+47qNX8jz9W9azdmO9mQH7ugWVYZy9oy3TV 6KVRbPA0XjVz9grjXjSpyrN76xkDtaWU/IUnaLzfUkCuhjNvnNis9BDWTLPH33UMgaXEyzNtAZ3 wEu/qeoHN19g3zWCNG/PpTYp+d X-Received: by 2002:a05:600c:b8a:b0:48a:5333:811e with SMTP id 5b1f17b1804b1-48e51f2f91cmr76913375e9.15.1778091845795; Wed, 06 May 2026 11:24:05 -0700 (PDT) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-48e5313b023sm36165675e9.5.2026.05.06.11.24.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2026 11:24:04 -0700 (PDT) From: Dave Stevenson Date: Wed, 06 May 2026 19:23:51 +0100 Subject: [PATCH 13/13] media: imx355: Support 2 lane readout. Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-media-imx355-v1-13-660685030455@raspberrypi.com> References: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> In-Reply-To: <20260506-media-imx355-v1-0-660685030455@raspberrypi.com> To: Tianshu Qiu , Sakari Ailus , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, David Heidelberg , 20260414-imx355-24mhz-v1-1-9ae77bc6e7ec@ixit.cz, Dave Stevenson X-Mailer: b4 0.14.1 The sensor supports 2 or 4 lane readout, but the driver only allowed for 4 lanes. Add 2 lane support. The clock tree was set to use single PLL mode to feed both IOP (MIPI) and IVT (Pixel array). 2 lane mode supports a MIPI link frequency of up to 445MHz (890Mbit/s) cf 360MHz (720Mbit/s) for 4lane, but that requires switching to dual PLL mode as the rates can't be achieved with simple divisors. The LLP values are extended for each mode to account for the increased time per line over the MIPI link. Signed-off-by: Dave Stevenson --- drivers/media/i2c/imx355.c | 135 ++++++++++++++++++++++++++++-------------= ---- 1 file changed, 84 insertions(+), 51 deletions(-) diff --git a/drivers/media/i2c/imx355.c b/drivers/media/i2c/imx355.c index d0e0e81d1e7c..fa1d1c86d5b0 100644 --- a/drivers/media/i2c/imx355.c +++ b/drivers/media/i2c/imx355.c @@ -27,10 +27,13 @@ #define IMX355_REG_CHIP_ID CCI_REG16(0x0016) #define IMX355_CHIP_ID 0x0355 =20 +#define IMX355_REG_LANE_SEL CCI_REG8(0x0114) + /* PLL registers that depend on the external clock frequency */ #define IMX355_REG_EXTCLK_FREQ CCI_REG16(0x0136) #define IMX355_REG_PLL_VT_MUL CCI_REG16(0x0306) #define IMX355_REG_PLL_OP_MUL CCI_REG16(0x030e) +#define IMX355_REG_PLL_MODE CCI_REG8(0x0310) =20 /* V_TIMING internal */ #define IMX355_REG_FLL CCI_REG16(0x0340) @@ -77,6 +80,8 @@ #define IMX355_TEST_PATTERN_GRAY_COLOR_BARS 3 #define IMX355_TEST_PATTERN_PN9 4 =20 +#define IMX355_REG_REQ_LINK_BIT_RATE CCI_REG16(0x0820) + #define IMX355_REG_BINNING_MODE CCI_REG8(0x0900) #define IMX355_REG_BINNING_TYPE CCI_REG8(0x0901) #define IMX355_REG_BINNING_WEIGHTING CCI_REG8(0x0902) @@ -85,10 +90,10 @@ #define IMX355_REG_ORIENTATION CCI_REG8(0x0101) =20 /* default link frequency and external clock */ -#define IMX355_LINK_FREQ_DEFAULT 360000000LL +#define IMX355_LINK_FREQ_4LANE 360000000LL +#define IMX355_LINK_FREQ_2LANE 445000000LL =20 -/* number of data lanes */ -#define IMX355_DATA_LANES 4 +#define IMX355_PIXEL_RATE 288000000 =20 #define IMX355_PIXEL_ARRAY_TOP 0 #define IMX355_PIXEL_ARRAY_LEFT 0 @@ -110,8 +115,8 @@ struct imx355_mode { /* V-timing */ u32 fll_def; =20 - /* H-timing */ - u32 llp; + /* H-timing - values for 4 lane and 2 lane */ + u32 llp[2]; =20 /* Default register values */ struct imx355_reg_list reg_list; @@ -125,33 +130,38 @@ struct imx355_mode { =20 struct imx355_clk_params { u32 ext_clk; - u16 extclk_freq; /* External clock (MHz) in 8.8 fixed point) */ - u16 pll_vt_mpy; /* VT system PLL multiplier */ - u16 pll_op_mpy; /* OP system PLL multiplier */ + u16 extclk_freq; /* External clock (MHz) in 8.8 fixed point) */ + u16 pll_vt_mpy[2]; /* VT system PLL multiplier */ + u16 pll_op_mpy[2]; /* OP system PLL multiplier */ }; =20 /* - * All modes use the same PLL dividers (PREPLLCK_VT_DIV=3D2, PREPLLCK_OP_D= IV=3D2), - * so the multipliers are adjusted to produce the same VCO frequencies: - * VT VCO =3D 1152 MHz, OP VCO =3D 720 MHz + * For backwards compatibility, 4 lane mode uses the single PLL clock tree + * where only IOP matters. MIPI rate is 360Mhz (720Mbit/s), and pixel rate= is + * 288MPix/s. + * 2 lane mode has a maximum MIPI rate of 445MHz (890Mbit/s) which requires + * switching to dual PLL mode if the pixel rate is to be kept the same. + * + * Multipliers are specified separately for 4 lane and 2 lane modes. */ static const struct imx355_clk_params imx355_clk_params[] =3D { { .ext_clk =3D 19200000, - .extclk_freq =3D 0x1333, /* 19.2 MHz */ - .pll_vt_mpy =3D 120, /* 19.2 / 2 * 120 =3D 1152 MHz */ - .pll_op_mpy =3D 75, /* 19.2 / 2 * 75 =3D 720 MHz */ + .extclk_freq =3D 0x1333, + .pll_vt_mpy =3D { 0, 75 }, + .pll_op_mpy =3D { 75, 93 }, }, { .ext_clk =3D 24000000, - .extclk_freq =3D 0x1800, /* 24.0 MHz */ - .pll_vt_mpy =3D 96, /* 24.0 / 2 * 96 =3D 1152 MHz */ - .pll_op_mpy =3D 60, /* 24.0 / 2 * 60 =3D 720 MHz */ + .extclk_freq =3D 0x1800, + .pll_vt_mpy =3D { 0, 60 }, + .pll_op_mpy =3D { 60, 74 }, }, }; =20 struct imx355_hwcfg { unsigned long link_freq_bitmap; + unsigned int num_lanes; }; =20 struct imx355 { @@ -247,16 +257,12 @@ static const struct cci_reg_sequence imx355_global_re= gs[] =3D { { CCI_REG8(0x305a), 0x00 }, { CCI_REG8(0x0112), 0x0a }, { CCI_REG8(0x0113), 0x0a }, - { CCI_REG8(0x0114), 0x03 }, { CCI_REG8(0x0301), 0x05 }, { CCI_REG8(0x0303), 0x01 }, { CCI_REG8(0x0305), 0x02 }, { CCI_REG8(0x030d), 0x02 }, - { CCI_REG8(0x0310), 0x00 }, { CCI_REG8(0x0220), 0x00 }, { CCI_REG8(0x0222), 0x01 }, - { CCI_REG8(0x0820), 0x0b }, - { CCI_REG8(0x0821), 0x40 }, { CCI_REG8(0x3088), 0x04 }, { CCI_REG8(0x6813), 0x02 }, { CCI_REG8(0x6835), 0x07 }, @@ -349,17 +355,25 @@ static const char * const imx355_test_pattern_menu[] = =3D { * When adding more than the one below, make sure the disallowed ones will * actually be disabled in the LINK_FREQ control. */ -static const s64 link_freq_menu_items[] =3D { - IMX355_LINK_FREQ_DEFAULT, +static const s64 link_freq_menu_items_4lane[] =3D { + IMX355_LINK_FREQ_4LANE, }; =20 +static const s64 link_freq_menu_items_2lane[] =3D { + IMX355_LINK_FREQ_2LANE, +}; + +/* Avoid the two arrays getting out of sync */ +static_assert(ARRAY_SIZE(link_freq_menu_items_4lane) =3D=3D + ARRAY_SIZE(link_freq_menu_items_2lane)); + /* Mode configs */ static const struct imx355_mode supported_modes[] =3D { { .width =3D 3280, .height =3D 2464, .fll_def =3D 2615, - .llp =3D 3672, + .llp =3D { 3672, 5942 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3280x2464_regs), .regs =3D mode_3280x2464_regs, @@ -374,7 +388,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 3268, .height =3D 2448, .fll_def =3D 2615, - .llp =3D 3672, + .llp =3D { 3672, 5942 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3268x2448_regs), .regs =3D mode_3268x2448_regs, @@ -389,7 +403,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 3264, .height =3D 2448, .fll_def =3D 2615, - .llp =3D 3672, + .llp =3D { 3672, 5942 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_3264x2448_regs), .regs =3D mode_3264x2448_regs, @@ -404,7 +418,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1940, .height =3D 1096, .fll_def =3D 1306, - .llp =3D 3672, + .llp =3D { 3672, 5942 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1940x1096_regs), .regs =3D mode_1940x1096_regs, @@ -419,7 +433,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1936, .height =3D 1096, .fll_def =3D 1306, - .llp =3D 3672, + .llp =3D { 3672, 5942 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1936x1096_regs), .regs =3D mode_1936x1096_regs, @@ -434,7 +448,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1924, .height =3D 1080, .fll_def =3D 1306, - .llp =3D 3672, + .llp =3D { 3672, 5942 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1924x1080_regs), .regs =3D mode_1924x1080_regs, @@ -449,7 +463,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1920, .height =3D 1080, .fll_def =3D 1306, - .llp =3D 3672, + .llp =3D { 3672, 5942 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1920x1080_regs), .regs =3D mode_1920x1080_regs, @@ -464,7 +478,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1640, .height =3D 1232, .fll_def =3D 1306, - .llp =3D 1836, + .llp =3D { 1836, 2970 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1640x1232_regs), .regs =3D mode_1640x1232_regs, @@ -479,7 +493,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1640, .height =3D 922, .fll_def =3D 1306, - .llp =3D 1836, + .llp =3D { 1836, 2970 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1640x922_regs), .regs =3D mode_1640x922_regs, @@ -494,7 +508,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1300, .height =3D 736, .fll_def =3D 1306, - .llp =3D 1836, + .llp =3D { 1836, 2970 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1300x736_regs), .regs =3D mode_1300x736_regs, @@ -509,7 +523,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1296, .height =3D 736, .fll_def =3D 1306, - .llp =3D 1836, + .llp =3D { 1836, 2970 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1296x736_regs), .regs =3D mode_1296x736_regs, @@ -524,7 +538,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1284, .height =3D 720, .fll_def =3D 1306, - .llp =3D 1836, + .llp =3D { 1836, 2970 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1284x720_regs), .regs =3D mode_1284x720_regs, @@ -539,7 +553,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 1280, .height =3D 720, .fll_def =3D 1306, - .llp =3D 1836, + .llp =3D { 1836, 2970 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_1280x720_regs), .regs =3D mode_1280x720_regs, @@ -554,7 +568,7 @@ static const struct imx355_mode supported_modes[] =3D { .width =3D 820, .height =3D 616, .fll_def =3D 652, - .llp =3D 3672, + .llp =3D { 3672, 5942 }, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(mode_820x616_regs), .regs =3D mode_820x616_regs, @@ -804,7 +818,8 @@ imx355_set_pad_format(struct v4l2_subdev *sd, __v4l2_ctrl_modify_range(imx355->vblank, IMX355_FLL_OFFSET, height, 1, vblank_def); __v4l2_ctrl_s_ctrl(imx355->vblank, vblank_def); - h_blank =3D mode->llp - imx355->cur_mode->width; + h_blank =3D mode->llp[imx355->hwcfg->num_lanes =3D=3D 4 ? 0 : 1] - + imx355->cur_mode->width; /* * Currently hblank is not changeable. * So FPS control is done only by vblank. @@ -869,6 +884,7 @@ static int imx355_start_streaming(struct imx355 *imx355) { const struct imx355_reg_list *reg_list; const struct imx355_mode *mode; + int lane_idx =3D imx355->hwcfg->num_lanes =3D=3D 4 ? 0 : 1; int ret =3D 0; =20 /* Global Setting */ @@ -900,9 +916,19 @@ static int imx355_start_streaming(struct imx355 *imx35= 5) cci_write(imx355->regmap, IMX355_REG_EXTCLK_FREQ, imx355->clk_params->extclk_freq, &ret); cci_write(imx355->regmap, IMX355_REG_PLL_VT_MUL, - imx355->clk_params->pll_vt_mpy, &ret); + imx355->clk_params->pll_vt_mpy[lane_idx], &ret); cci_write(imx355->regmap, IMX355_REG_PLL_OP_MUL, - imx355->clk_params->pll_op_mpy, &ret); + imx355->clk_params->pll_op_mpy[lane_idx], &ret); + cci_write(imx355->regmap, IMX355_REG_PLL_MODE, lane_idx ? 0x01 : 0x00, + &ret); + + /* Set MIPI configuration */ + cci_write(imx355->regmap, IMX355_REG_LANE_SEL, + imx355->hwcfg->num_lanes - 1, &ret); + + cci_write(imx355->regmap, IMX355_REG_REQ_LINK_BIT_RATE, + (imx355->link_freq->qmenu_int[imx355->link_freq->val] * + imx355->hwcfg->num_lanes * 2) / 1000000, &ret); =20 /* set digital gain control to all color mode */ cci_write(imx355->regmap, IMX355_REG_DPGA_USE_GLOBAL_GAIN, 1, &ret); @@ -1072,8 +1098,8 @@ static int imx355_init_controls(struct imx355 *imx355) s64 exposure_max; s64 vblank_def; s64 hblank; - u64 pixel_rate; const struct imx355_mode *mode; + const s64 *link_freq_menu; u32 max; int ret; =20 @@ -1083,19 +1109,21 @@ static int imx355_init_controls(struct imx355 *imx3= 55) return ret; =20 ctrl_hdlr->lock =3D &imx355->mutex; - max =3D ARRAY_SIZE(link_freq_menu_items) - 1; + + link_freq_menu =3D imx355->hwcfg->num_lanes =3D=3D 4 ? + link_freq_menu_items_4lane : + link_freq_menu_items_2lane; + max =3D ARRAY_SIZE(link_freq_menu_items_4lane) - 1; imx355->link_freq =3D v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx355_ctrl_ops, V4L2_CID_LINK_FREQ, max, 0, - link_freq_menu_items); + link_freq_menu); if (imx355->link_freq) imx355->link_freq->flags |=3D V4L2_CTRL_FLAG_READ_ONLY; =20 - /* pixel_rate =3D link_freq * 2 * nr_of_lanes / bits_per_sample */ - pixel_rate =3D IMX355_LINK_FREQ_DEFAULT * 2 * 4; - do_div(pixel_rate, 10); /* By default, PIXEL_RATE is read only */ v4l2_ctrl_new_std(ctrl_hdlr, &imx355_ctrl_ops, V4L2_CID_PIXEL_RATE, - pixel_rate, pixel_rate, 1, pixel_rate); + IMX355_PIXEL_RATE, IMX355_PIXEL_RATE, 1, + IMX355_PIXEL_RATE); =20 /* Initialize vblank/hblank/exposure parameters based on current mode */ mode =3D imx355->cur_mode; @@ -1105,7 +1133,7 @@ static int imx355_init_controls(struct imx355 *imx355) IMX355_FLL_MAX - mode->height, 1, vblank_def); =20 - hblank =3D mode->llp - mode->width; + hblank =3D mode->llp[imx355->hwcfg->num_lanes =3D=3D 4 ? 0 : 1] - mode->w= idth; imx355->hblank =3D v4l2_ctrl_new_std(ctrl_hdlr, &imx355_ctrl_ops, V4L2_CID_HBLANK, hblank, hblank, 1, hblank); @@ -1192,13 +1220,18 @@ static struct imx355_hwcfg *imx355_get_hwcfg(struct= device *dev) if (!cfg) goto out_err; =20 - if (bus_cfg.bus.mipi_csi2.num_data_lanes !=3D IMX355_DATA_LANES) + if (bus_cfg.bus.mipi_csi2.num_data_lanes !=3D 2 && + bus_cfg.bus.mipi_csi2.num_data_lanes !=3D 4) goto out_err; =20 + cfg->num_lanes =3D bus_cfg.bus.mipi_csi2.num_data_lanes; + ret =3D v4l2_link_freq_to_bitmap(dev, bus_cfg.link_frequencies, bus_cfg.nr_of_link_frequencies, - link_freq_menu_items, - ARRAY_SIZE(link_freq_menu_items), + cfg->num_lanes =3D=3D 4 ? + link_freq_menu_items_4lane : + link_freq_menu_items_2lane, + ARRAY_SIZE(link_freq_menu_items_4lane), &cfg->link_freq_bitmap); if (ret) goto out_err; --=20 2.34.1