From nobody Sat Jun 13 16:27:12 2026 Received: from s106b.cyber-folks.pl (s106b.cyber-folks.pl [195.78.66.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D02D640DFB4; Wed, 6 May 2026 15:10:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.78.66.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778080260; cv=none; b=V8E8j4XQc+G49Gvuc4J0tvrSL3GfIokuW1eZdB3YwtozjOTdI3HcCz9Q90xF5P2hm0fMW+gtOw4OJ1/6CTZCxMlEsVeqJQP5VFGyZkz1w7Kb2J3vZ6E0WSVsVoFTq4kfBMGQuOrWegZxzZ1nNtKX4Oyv8hL477eCrSY7jAM8ukM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778080260; c=relaxed/simple; bh=qh9sEc57bKsGot5lE2/m8eNigSmNqLcdmef/IL3Fdfc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ljkC+p6Q34lf0krLOvBt59SL8w1bCwShNBDAa27bTTf67m8pEYzHwAdmlmbMlaR1Axfv02LWL8Lbr0PuEk44fmG5CXmD5t+SM3pj6J+cIH0uL0U8vQ/+EXzFR2hg5pyCwSOSCbzZgtBhtxXwldwnq/OIcJc8oN5Z3oG8FpMv0Z0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mmpsystems.pl; spf=pass smtp.mailfrom=mmpsystems.pl; dkim=pass (2048-bit key) header.d=mmpsystems.pl header.i=@mmpsystems.pl header.b=aupmFI8G; arc=none smtp.client-ip=195.78.66.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mmpsystems.pl Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mmpsystems.pl Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mmpsystems.pl header.i=@mmpsystems.pl header.b="aupmFI8G" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mmpsystems.pl; s=x; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=Qe8+erd3ATmRXcw/RE05XoQwx+r6eTzDQ+NZAClJ7ws=; b=aupmFI8GCa+7MruzjqPKwv7Gfb g3fnFfM/30mzXt3+HIIUayEVMnvsvkTVnUQc+RFoLD1rsgoGoX8Yo/9VFBh0ix3tSE0W5GGYal61Q 094lVI8BoxA6DFRv/7HgrwbdEWcPyjwd/wFeGlPwYUX0vTlo+GUUW3prR1AHzIQhBjmZwSQu3ssXm +XJz0T1Z/0nwXgUgbuAsUih8KjdWEZ2kqvZzdJzbYU5R81XRWf4CHb7Lkn3yyLH/3tVwoj+GO2w+g q2HWtix6JjBO7I5H4Hi8573B7HkGMzjOoi0kV26YNMxp+Vz1GGn9mWVLTl3N9gQvGXz1MBuxTRwRb eNXGdSiQ==; Received: from user-188-33-36-99.play-internet.pl ([188.33.36.99] helo=localhost) by s106.cyber-folks.pl with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKdti-00000003atJ-3FO5; Wed, 06 May 2026 17:10:50 +0200 From: Michal Piekos Date: Wed, 06 May 2026 17:10:26 +0200 Subject: [PATCH v4 1/4] dt-bindings: timer: allwinner,sun5i-a13-hstimer: add H616 and D1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-h616-t113s-hstimer-v4-1-591d425863d6@mmpsystems.pl> References: <20260506-h616-t113s-hstimer-v4-0-591d425863d6@mmpsystems.pl> In-Reply-To: <20260506-h616-t113s-hstimer-v4-0-591d425863d6@mmpsystems.pl> To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Michal Piekos , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Andre Przywara , Conor Dooley X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778080247; l=1635; i=michal.piekos@mmpsystems.pl; s=20260301; h=from:subject:message-id; bh=qh9sEc57bKsGot5lE2/m8eNigSmNqLcdmef/IL3Fdfc=; b=cPaaaYLo5ADrTcyLAT6CZyP+LM1sUg2xNixGvhiLKQyIIQNuR/nvMdpg41TJhY1tJnhYX5yOJ /lpcITM6KMCBl2DUeBuqVIpRh0yDBX+aW/u17cHbtrKETPqzsTDy9uS X-Developer-Key: i=michal.piekos@mmpsystems.pl; a=ed25519; pk=Aixyx03If7ZDamiKKN0lsa+0mtA+WjIuIf2ZQVYNBqg= X-Authenticated-Id: michal.piekos@mmpsystems.pl D1 is similar to existing sun5i, but with different register offsets. H616 uses same offsets as D1. Add allwinner,sun20i-d1-hstimer Add allwinner,sun50i-h616-hstimer with fallback to allwinner,sun20i-d1-hstimer Extend schema condition for interrupts to cover D1 compatible variant. Signed-off-by: Michal Piekos Acked-by: Conor Dooley --- .../devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml | 9 +++++= +++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hs= timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hs= timer.yaml index f1853daec2f9..3e2725c56995 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.y= aml +++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.y= aml @@ -15,9 +15,13 @@ properties: oneOf: - const: allwinner,sun5i-a13-hstimer - const: allwinner,sun7i-a20-hstimer + - const: allwinner,sun20i-d1-hstimer - items: - const: allwinner,sun6i-a31-hstimer - const: allwinner,sun7i-a20-hstimer + - items: + - const: allwinner,sun50i-h616-hstimer + - const: allwinner,sun20i-d1-hstimer =20 reg: maxItems: 1 @@ -45,7 +49,10 @@ required: if: properties: compatible: - const: allwinner,sun5i-a13-hstimer + anyOf: + - const: allwinner,sun5i-a13-hstimer + - contains: + const: allwinner,sun20i-d1-hstimer =20 then: properties: --=20 2.43.0 From nobody Sat Jun 13 16:27:12 2026 Received: from s106b.cyber-folks.pl (s106b.cyber-folks.pl [195.78.66.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A7958481AB1; Wed, 6 May 2026 15:10:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.78.66.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778080261; cv=none; b=HE7zSCDxYbO952rbv5XYu5PB8O/HFbhw3qCs5RAzPy5GUtGH3yAdKm6gLIJson9bX+lL4/4XszKVCzCnvvFBtaPTZAQR3H+C2sqMS11R+jJyoD1sDNVXoshG3tmZIrl241lMbDSYDVN50elkl3RqLANQgKFQjYVP734NkvlNAFo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778080261; c=relaxed/simple; bh=1L3rHOJVuAnpxzydteKfdfNTRtbJkFSx+Yr9EHtcqh8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gGMUTV+gh2qpGpMzO/WEEIDUmZxfonaBsV80l00YiFQrgcknLm4JeYyGV0hrq8GRAU7uldMUzERQ/BR933Q8+5a2swtQ4P0BxwWdeItwrJS3OO9f90q/GcfCOww8weyPzk9S3cBWQU2BRsUXC+sscN7Co9IGy/fb44DDKrXBlcQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mmpsystems.pl; spf=pass smtp.mailfrom=mmpsystems.pl; dkim=pass (2048-bit key) header.d=mmpsystems.pl header.i=@mmpsystems.pl header.b=HNxCjowt; arc=none smtp.client-ip=195.78.66.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mmpsystems.pl Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mmpsystems.pl Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mmpsystems.pl header.i=@mmpsystems.pl header.b="HNxCjowt" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mmpsystems.pl; s=x; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=0lyxdy796hLpUJj9EnQoEnVMUSThmvftMavjmWl7Rps=; b=HNxCjowtS+jyOLnrkhoLKyn2RQ QSeYES65TDO9yCZRCONAUZfE7SVgozgIxVdQ4FbohpTsb7NncTr+KshRz87IAPf6VXykUV/zyA/S4 QPdyPT5hafOJqgvhJX0YQvG2sZfLv+1hVViZx6+gd1mh/K3qI8+vWUX1Bli0C9/vxmmkQa1+vWRjd Y+WHFnq5twV74kw65ETzSo3vzgJG/KsUICQSPk3jmSNNXP5bt1CCpbYc+6KeXvY9yNsFJw3sV4pu0 PKKOdKNT13d7BHXqzXyVcSJS2COk1tp0j084ONyyibYnXfCZgojemCOsL509AkEPfIW0QydHd/9qa AZHm3/UA==; Received: from user-188-33-36-99.play-internet.pl ([188.33.36.99] helo=localhost) by s106.cyber-folks.pl with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKdtj-00000003auJ-2TuZ; Wed, 06 May 2026 17:10:51 +0200 From: Michal Piekos Date: Wed, 06 May 2026 17:10:27 +0200 Subject: [PATCH v4 2/4] clocksource/drivers/sun5i: add D1 hstimer support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-h616-t113s-hstimer-v4-2-591d425863d6@mmpsystems.pl> References: <20260506-h616-t113s-hstimer-v4-0-591d425863d6@mmpsystems.pl> In-Reply-To: <20260506-h616-t113s-hstimer-v4-0-591d425863d6@mmpsystems.pl> To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Michal Piekos , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Andre Przywara X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778080247; l=6812; i=michal.piekos@mmpsystems.pl; s=20260301; h=from:subject:message-id; bh=1L3rHOJVuAnpxzydteKfdfNTRtbJkFSx+Yr9EHtcqh8=; b=ThUGr/fA0GKCDHpJqpH/f1YPTRX2yF7Uy9hkseuGoDdPfl5DZh92BRjIJe9v2O/wQPNOguRfM aqw/LyAuenpD7pCkXLjpO4mtPPK1HZFNykQ693ptZxSD1KFmcb4XqqV X-Developer-Key: i=michal.piekos@mmpsystems.pl; a=ed25519; pk=Aixyx03If7ZDamiKKN0lsa+0mtA+WjIuIf2ZQVYNBqg= X-Authenticated-Id: michal.piekos@mmpsystems.pl D1 high speed timer differs from existing timer-sun5i by register base offset. Add sunxi quirks to handle D1 specific offset. Add D1 compatible string to OF match table. Signed-off-by: Michal Piekos --- drivers/clocksource/timer-sun5i.c | 84 ++++++++++++++++++++++++++++++-----= ---- 1 file changed, 65 insertions(+), 19 deletions(-) diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-= sun5i.c index f827d3f98f60..517c048a4870 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -18,21 +18,30 @@ #include #include =20 -#define TIMER_IRQ_EN_REG 0x00 +#define TIMER_IRQ_EN_REG 0x00 #define TIMER_IRQ_EN(val) BIT(val) -#define TIMER_IRQ_ST_REG 0x04 -#define TIMER_CTL_REG(val) (0x20 * (val) + 0x10) +#define TIMER_IRQ_ST_REG 0x04 +#define TIMER_CTL_REG(val, offset) (0x20 * (val) + 0x10 + (offset)) #define TIMER_CTL_ENABLE BIT(0) #define TIMER_CTL_RELOAD BIT(1) #define TIMER_CTL_CLK_PRES(val) (((val) & 0x7) << 4) #define TIMER_CTL_ONESHOT BIT(7) -#define TIMER_INTVAL_LO_REG(val) (0x20 * (val) + 0x14) -#define TIMER_INTVAL_HI_REG(val) (0x20 * (val) + 0x18) -#define TIMER_CNTVAL_LO_REG(val) (0x20 * (val) + 0x1c) -#define TIMER_CNTVAL_HI_REG(val) (0x20 * (val) + 0x20) +#define TIMER_INTVAL_LO_REG(val, offset) (0x20 * (val) + 0x14 + (offset)) +#define TIMER_INTVAL_HI_REG(val, offset) (0x20 * (val) + 0x18 + (offset)) +#define TIMER_CNTVAL_LO_REG(val, offset) (0x20 * (val) + 0x1c + (offset)) +#define TIMER_CNTVAL_HI_REG(val, offset) (0x20 * (val) + 0x20 + (offset)) =20 #define TIMER_SYNC_TICKS 3 =20 +/** + * struct sunxi_timer_quirks - Differences between SoC variants. + * + * @from_ctl_base_offset: offset applied from ctl register onwards + */ +struct sunxi_timer_quirks { + u32 from_ctl_base_offset; +}; + struct sun5i_timer { void __iomem *base; struct clk *clk; @@ -40,6 +49,7 @@ struct sun5i_timer { u32 ticks_per_jiffy; struct clocksource clksrc; struct clock_event_device clkevt; + const struct sunxi_timer_quirks *quirks; }; =20 #define nb_to_sun5i_timer(x) \ @@ -57,28 +67,36 @@ struct sun5i_timer { */ static void sun5i_clkevt_sync(struct sun5i_timer *ce) { - u32 old =3D readl(ce->base + TIMER_CNTVAL_LO_REG(1)); + u32 offset =3D ce->quirks->from_ctl_base_offset; + u32 old =3D readl(ce->base + TIMER_CNTVAL_LO_REG(1, offset)); =20 - while ((old - readl(ce->base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICK= S) + while ((old - readl(ce->base + TIMER_CNTVAL_LO_REG(1, offset))) < + TIMER_SYNC_TICKS) cpu_relax(); } =20 static void sun5i_clkevt_time_stop(struct sun5i_timer *ce, u8 timer) { - u32 val =3D readl(ce->base + TIMER_CTL_REG(timer)); - writel(val & ~TIMER_CTL_ENABLE, ce->base + TIMER_CTL_REG(timer)); + u32 offset =3D ce->quirks->from_ctl_base_offset; + u32 val =3D readl(ce->base + TIMER_CTL_REG(timer, offset)); + + writel(val & ~TIMER_CTL_ENABLE, + ce->base + TIMER_CTL_REG(timer, offset)); =20 sun5i_clkevt_sync(ce); } =20 static void sun5i_clkevt_time_setup(struct sun5i_timer *ce, u8 timer, u32 = delay) { - writel(delay, ce->base + TIMER_INTVAL_LO_REG(timer)); + u32 offset =3D ce->quirks->from_ctl_base_offset; + + writel(delay, ce->base + TIMER_INTVAL_LO_REG(timer, offset)); } =20 static void sun5i_clkevt_time_start(struct sun5i_timer *ce, u8 timer, bool= periodic) { - u32 val =3D readl(ce->base + TIMER_CTL_REG(timer)); + u32 offset =3D ce->quirks->from_ctl_base_offset; + u32 val =3D readl(ce->base + TIMER_CTL_REG(timer, offset)); =20 if (periodic) val &=3D ~TIMER_CTL_ONESHOT; @@ -86,7 +104,7 @@ static void sun5i_clkevt_time_start(struct sun5i_timer *= ce, u8 timer, bool perio val |=3D TIMER_CTL_ONESHOT; =20 writel(val | TIMER_CTL_ENABLE | TIMER_CTL_RELOAD, - ce->base + TIMER_CTL_REG(timer)); + ce->base + TIMER_CTL_REG(timer, offset)); } =20 static int sun5i_clkevt_shutdown(struct clock_event_device *clkevt) @@ -141,8 +159,9 @@ static irqreturn_t sun5i_timer_interrupt(int irq, void = *dev_id) static u64 sun5i_clksrc_read(struct clocksource *clksrc) { struct sun5i_timer *cs =3D clksrc_to_sun5i_timer(clksrc); + u32 offset =3D cs->quirks->from_ctl_base_offset; =20 - return ~readl(cs->base + TIMER_CNTVAL_LO_REG(1)); + return ~readl(cs->base + TIMER_CNTVAL_LO_REG(1, offset)); } =20 static int sun5i_rate_cb(struct notifier_block *nb, @@ -173,12 +192,13 @@ static int sun5i_setup_clocksource(struct platform_de= vice *pdev, unsigned long rate) { struct sun5i_timer *cs =3D platform_get_drvdata(pdev); + u32 offset =3D cs->quirks->from_ctl_base_offset; void __iomem *base =3D cs->base; int ret; =20 - writel(~0, base + TIMER_INTVAL_LO_REG(1)); + writel(~0, base + TIMER_INTVAL_LO_REG(1, offset)); writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD, - base + TIMER_CTL_REG(1)); + base + TIMER_CTL_REG(1, offset)); =20 cs->clksrc.name =3D pdev->dev.of_node->name; cs->clksrc.rating =3D 340; @@ -237,6 +257,7 @@ static int sun5i_setup_clockevent(struct platform_devic= e *pdev, =20 static int sun5i_timer_probe(struct platform_device *pdev) { + const struct sunxi_timer_quirks *quirks; struct device *dev =3D &pdev->dev; struct sun5i_timer *st; struct reset_control *rstc; @@ -273,11 +294,18 @@ static int sun5i_timer_probe(struct platform_device *= pdev) return -EINVAL; } =20 + quirks =3D of_device_get_match_data(&pdev->dev); + if (!quirks) { + dev_err(&pdev->dev, "Failed to determine the quirks to use\n"); + return -ENODEV; + } + st->base =3D timer_base; st->ticks_per_jiffy =3D DIV_ROUND_UP(rate, HZ); st->clk =3D clk; st->clk_rate_cb.notifier_call =3D sun5i_rate_cb; st->clk_rate_cb.next =3D NULL; + st->quirks =3D quirks; =20 ret =3D devm_clk_notifier_register(dev, clk, &st->clk_rate_cb); if (ret) { @@ -311,9 +339,27 @@ static void sun5i_timer_remove(struct platform_device = *pdev) clocksource_unregister(&st->clksrc); } =20 +static const struct sunxi_timer_quirks sun5i_sun7i_hstimer_quirks =3D { + .from_ctl_base_offset =3D 0x0, +}; + +static const struct sunxi_timer_quirks sun20i_d1_hstimer_quirks =3D { + .from_ctl_base_offset =3D 0x10, +}; + static const struct of_device_id sun5i_timer_of_match[] =3D { - { .compatible =3D "allwinner,sun5i-a13-hstimer" }, - { .compatible =3D "allwinner,sun7i-a20-hstimer" }, + { + .compatible =3D "allwinner,sun5i-a13-hstimer", + .data =3D &sun5i_sun7i_hstimer_quirks, + }, + { + .compatible =3D "allwinner,sun7i-a20-hstimer", + .data =3D &sun5i_sun7i_hstimer_quirks, + }, + { + .compatible =3D "allwinner,sun20i-d1-hstimer", + .data =3D &sun20i_d1_hstimer_quirks, + }, {}, }; MODULE_DEVICE_TABLE(of, sun5i_timer_of_match); --=20 2.43.0 From nobody Sat Jun 13 16:27:12 2026 Received: from s106b.cyber-folks.pl (s106b.cyber-folks.pl [195.78.66.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 324E448BD26; Wed, 6 May 2026 15:10:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.78.66.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778080259; cv=none; b=d5oSnfW6szc6T6ETf4cFWMi1zKKJ8md/eGCXV+ATYyzMraIHhQ0c1dp2dts6k05innZ6jc2iz8FHhEjyMkoZ9Z4tFwqvkLIfgVpwmZBhOGVhDp1LSiR+Ord1jATxXwiN7xZ42nsWoMf0/au1sYl+sNimd2azkasNLfnx/jrE6Bk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778080259; c=relaxed/simple; bh=AZ/Zmj6bxiVSpb1BJYvgfM1oOy31/LD1MQmu0NZTr2g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=d8+ydykkLsFerpKBym7PlA+cqz+H7JBTQVW5Ua00bbH/tuVY4Xo4vYHPAweoHMTq7JXuSpO00H5Pm1kBpsaFhNQfx/dX9a9bsRNBw/8+c3zeh8dBzxto9sYXPrjp4o3ZtcXYUC7U5dfP1bi5a9G2D6NA1/yu8eKe/TdP4ayZ/QM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mmpsystems.pl; spf=pass smtp.mailfrom=mmpsystems.pl; dkim=pass (2048-bit key) header.d=mmpsystems.pl header.i=@mmpsystems.pl header.b=Cr+OajGh; arc=none smtp.client-ip=195.78.66.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mmpsystems.pl Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mmpsystems.pl Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mmpsystems.pl header.i=@mmpsystems.pl header.b="Cr+OajGh" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mmpsystems.pl; s=x; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=MHxIIdNZP/GM1WNtCzRWtqkwrd59+f6pkF9jEZfKEuY=; b=Cr+OajGhME6QFoe1JJzLpRTjys m0ETy9kvLbFuTg2EnqTKIMvLbWrMucgorKW0l5tTJMTe22c4k8YCFIyZ5mAtuw+6Xbtx4XhhoFhzX YZAvgrJ+KnfpYXpLLVTshVQlC22WHIaybJFdRRp/TYCoBdNRHdjTQxxsNfmHXukFJT5rnoJZJAOTh xC/lierVURJcsYvms1lnXbls82B7cwa3TVYEGtfkE06AZS0M6VSfizZnxjOn3OD1EMeHnaE9/hMw9 NSlug8K6lrX2bEAG9nOYdMFQYsmbeJlOx5Pdwnej5LeCwUjoYTaAAbnTAC9qm3DGMFZUIHcL0K6iV 06iDcTiQ==; Received: from user-188-33-36-99.play-internet.pl ([188.33.36.99] helo=localhost) by s106.cyber-folks.pl with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKdtk-00000003auw-1Ieu; Wed, 06 May 2026 17:10:52 +0200 From: Michal Piekos Date: Wed, 06 May 2026 17:10:28 +0200 Subject: [PATCH v4 3/4] arm: dts: allwinner: d1s-t113: add hstimer node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-h616-t113s-hstimer-v4-3-591d425863d6@mmpsystems.pl> References: <20260506-h616-t113s-hstimer-v4-0-591d425863d6@mmpsystems.pl> In-Reply-To: <20260506-h616-t113s-hstimer-v4-0-591d425863d6@mmpsystems.pl> To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Michal Piekos , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Andre Przywara X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778080247; l=1181; i=michal.piekos@mmpsystems.pl; s=20260301; h=from:subject:message-id; bh=AZ/Zmj6bxiVSpb1BJYvgfM1oOy31/LD1MQmu0NZTr2g=; b=kb7ff0LSblEwP7boEqHpI9OtTFZiCNuH8u0t8A0njdqrV6Lz5l5dJh23PHQ/JF/GtFxBSbUhF mbe3BRl9p2UDcDQ9sViAGcsrcBaT96sqwdMaeA8OC1u6lDsPa5jw5kN X-Developer-Key: i=michal.piekos@mmpsystems.pl; a=ed25519; pk=Aixyx03If7ZDamiKKN0lsa+0mtA+WjIuIf2ZQVYNBqg= X-Authenticated-Id: michal.piekos@mmpsystems.pl Describe high speed timer block on Allwinner D1S-T113. Tested on LCPI-PC-T113/F113: - hstimer is registered as clocksource - switching clocksource at runtime works - after rating increase hstimer operates as a broadcast clockevent device Signed-off-by: Michal Piekos --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv= /boot/dts/allwinner/sunxi-d1s-t113.dtsi index 82cc85acccb1..a849b0380386 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -295,6 +295,15 @@ timer: timer@2050000 { clocks =3D <&dcxo>; }; =20 + hstimer@3008000 { + compatible =3D "allwinner,sun20i-d1-hstimer"; + reg =3D <0x03008000 0x1000>; + interrupts =3D , + ; + clocks =3D <&ccu CLK_BUS_HSTIMER>; + resets =3D <&ccu RST_BUS_HSTIMER>; + }; + wdt: watchdog@20500a0 { compatible =3D "allwinner,sun20i-d1-wdt-reset", "allwinner,sun20i-d1-wdt"; --=20 2.43.0 From nobody Sat Jun 13 16:27:12 2026 Received: from s106b.cyber-folks.pl (s106b.cyber-folks.pl [195.78.66.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BBCE2D63F8; Wed, 6 May 2026 15:10:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.78.66.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778080260; cv=none; b=HB8fmlnXor16X386IPW7J5ddGMRd8gFAzVJ5HamJTVrexec/qNMcRcwoAPczxbxX3apTZ0NlSlx1tSC6WsocpL6k/vy2Vb4Rw8NiPTgofq2tHXHzPGpEVKByjqpN8fndDY0gjbyb/QMlmIhxD5YvnKCpQwaU+bp2Ri4FmhR921U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778080260; c=relaxed/simple; bh=cCHCvUuPpHPu5/1mgf/ezZ1u0bRGr6TqCo7i9RhbRKk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ggyPHQFlx8KLOsElQ9S5JtDhhBPZ7V4xXVg4SV+XLj46VD0TpLM+gzlFfcSIIuVz3W6LfQppunBOSP2fO5BnlMp+uOWMUt/CVMX12R5jU9VJRP6436GVe3bIGDNVvA/BuKWY14PqxGcgW6ddhk9RsQSjT44Y+b3U0PJ8tszQxNQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mmpsystems.pl; spf=pass smtp.mailfrom=mmpsystems.pl; dkim=pass (2048-bit key) header.d=mmpsystems.pl header.i=@mmpsystems.pl header.b=taGCJg+4; arc=none smtp.client-ip=195.78.66.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=mmpsystems.pl Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mmpsystems.pl Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mmpsystems.pl header.i=@mmpsystems.pl header.b="taGCJg+4" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mmpsystems.pl; s=x; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=uNFzzd95mcTYhcO+wG3xMSmWT3vJi7xx2yg5IbFJlII=; b=taGCJg+4P02MpniCDPcIubfA1w NOEHJ7dt6xfUSyuW7VM5RKYK5msJBaLRIjZY27PWWEUPI0lOJeorgjzpKh77k9gFJUB+jFjGYeVXg QyyIqDiotcKedsEVmKqLi21R3DPwDmAGrraZSJvPdfsB32ftCbtV3EDF59TFWRZwFH59D9Qv2T5Ei gFqlhlaFiimxVTAF76ytqgf3G7QmY7CnKjqCDKPTTuQlu8l4PXSZbLlIGuvEeE9DckEpRgyr/WxVp aPaoYc+VeDfUhFQKktR3J+gLHpcFkS2d89z9olQweL5x0OpwjqjKrYkG5JVSYvD/NsARnNbWLegEQ 17FMsUbw==; Received: from user-188-33-36-99.play-internet.pl ([188.33.36.99] helo=localhost) by s106.cyber-folks.pl with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wKdtl-00000003avf-1ep8; Wed, 06 May 2026 17:10:53 +0200 From: Michal Piekos Date: Wed, 06 May 2026 17:10:29 +0200 Subject: [PATCH v4 4/4] arm64: dts: allwinner: h616: add hstimer node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260506-h616-t113s-hstimer-v4-4-591d425863d6@mmpsystems.pl> References: <20260506-h616-t113s-hstimer-v4-0-591d425863d6@mmpsystems.pl> In-Reply-To: <20260506-h616-t113s-hstimer-v4-0-591d425863d6@mmpsystems.pl> To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Michal Piekos , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, Andre Przywara X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778080247; l=1212; i=michal.piekos@mmpsystems.pl; s=20260301; h=from:subject:message-id; bh=cCHCvUuPpHPu5/1mgf/ezZ1u0bRGr6TqCo7i9RhbRKk=; b=YaIWpieKroR4LhBuwpwPUIEiVX/E0tev90OjSQlNoABbG8TFy7srK/mHFIZeen5eNfos4OV4h ts9YcBuwMO1BcfPgU3pyJzO93l/Vzq3Tf4uMJE0xeg+OIuRNJOcE0gW X-Developer-Key: i=michal.piekos@mmpsystems.pl; a=ed25519; pk=Aixyx03If7ZDamiKKN0lsa+0mtA+WjIuIf2ZQVYNBqg= X-Authenticated-Id: michal.piekos@mmpsystems.pl Describe high speed timer block on Allwinner H616. Tested on Orange Pi Zero 3: - hstimer is registered as clocksource - switching clocksource at runtime works - after rating increase hstimer operates as a broadcast clockevent device Signed-off-by: Michal Piekos --- arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-h616.dtsi index bf054869e78b..1356e5df2562 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -237,6 +237,16 @@ timer0: timer@3009000 { clocks =3D <&osc24M>; }; =20 + hstimer@3005000 { + compatible =3D "allwinner,sun50i-h616-hstimer", + "allwinner,sun20i-d1-hstimer"; + reg =3D <0x03005000 0x1000>; + interrupts =3D , + ; + clocks =3D <&ccu CLK_BUS_HSTIMER>; + resets =3D <&ccu RST_BUS_HSTIMER>; + }; + watchdog: watchdog@30090a0 { compatible =3D "allwinner,sun50i-h616-wdt", "allwinner,sun6i-a31-wdt"; --=20 2.43.0