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Tue, 05 May 2026 12:42:49 -0700 (PDT) Received: from hu-kriskura-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c8242bc1e7dsm23294a12.30.2026.05.05.12.42.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2026 12:42:48 -0700 (PDT) From: Krishna Kurapati To: Thinh Nguyen , Greg Kroah-Hartman , Neil Armstrong Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Krishna Kurapati Subject: [PATCH v2] usb: dwc3: qcom: Modify interrupt handling for eUSB2 Phy targets Date: Wed, 6 May 2026 01:12:42 +0530 Message-Id: <20260505194242.1947891-1-krishna.kurapati@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTA1MDE5MSBTYWx0ZWRfXyDHiJCu2BGjN pV8VRNnyFIvhbhc8KgHjr06J3LDrIcBOXA3fZ5ipvKmv3Dh0Vtr0Rq0dRxPXMxq5fl2jdpjDEDc MsvjJmOe8uivIshR/2wAz7to1MhtQEZOIxgfR4rvNeNEG2U9YSeo3azw2O3161SUweDTq87Fotw q3gmskQQYGfvfkDklZzhloyDpaAfEl5qoHZZGcCqf1cv9q2q6tNdjvHi553DVavGL2xEpqB3JuE 4wFDBF35yYSEwAt/2/BGVw7EXZmWHo5ksfewu/uGg8oXCaCr2Yr1FIfRS4kgF/slLEf6NNifBQV 9L4oQYfgjkmpgIUSuJuXFIBupQ8udQAk3sCY6ihezdgjxZKgE6cCo89kHYtlG+l/yfoHe9fgdjz S0YhVYrQ7+zsvhQB9kWVjX/BU5PknNDLRBP6rrgdQzlGMlITJY4AzsgJ534SWUMbimh9lcSEa0w ExJnzce9wJtRzehICmA== X-Proofpoint-GUID: YC0p17GgdbaFfICsQCuARHoDI_E7RjO- X-Proofpoint-ORIG-GUID: YC0p17GgdbaFfICsQCuARHoDI_E7RjO- X-Authority-Analysis: v=2.4 cv=b6KCJNGx c=1 sm=1 tr=0 ts=69fa483a cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=n47XyvxCgL2-tsnZnB4A:9 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-05_02,2026-04-30_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605050191 Content-Type: text/plain; charset="utf-8" eUSB2 targets handle wakeup interrupts differently depending on device speed when operating in host mode. According to the eUSB2 specification, remote wakeup signaling in host mode is detected via different data-line assertions based on the connected device speed. When a low-speed device is connected, the host repeater drives eD+ to logic '1' upon detecting a K-state on the USB lines during remote wakeup (eUSB2 specification, Section 5.5.14). When a full-speed or high-speed device is connected, the host repeater drives eD- to logic '1' upon detecting a K-state on the USB line during remote wakeup (eUSB2 specification, Sections 5.5.15 and 5.5.18). Since the eUSB2 PHY's "DP" and "DM" interrupt lines monitor the eD+ and eD- line states, configure the wakeup interrupts accordingly Signed-off-by: Krishna Kurapati --- Changes in v2: - Updated commit message - added supported eUSB2 targets Link to v1: https://lore.kernel.org/all/20260502095616.666938-1-krishna.kurapati@oss.qu= alcomm.com/ This patch was tested on Glymur. drivers/usb/dwc3/dwc3-qcom.c | 99 ++++++++++++++++++++++++++++++++---- 1 file changed, 90 insertions(+), 9 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index f43f73ac36ff..4fc0017c697c 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -60,6 +60,10 @@ static const u32 pwr_evnt_irq_stat_reg[DWC3_QCOM_MAX_POR= TS] =3D { 0x238, }; =20 +struct dwc3_qcom_platform_data { + bool uses_eusb2_phy; +}; + struct dwc3_qcom_port { int qusb2_phy_irq; int dp_hs_phy_irq; @@ -85,6 +89,7 @@ struct dwc3_qcom { struct icc_path *icc_path_apps; =20 enum usb_role current_role; + bool uses_eusb2_phy; }; =20 #define to_dwc3_qcom(d) container_of((d), struct dwc3_qcom, dwc) @@ -272,15 +277,21 @@ static void dwc3_qcom_disable_wakeup_irq(int irq) disable_irq_nosync(irq); } =20 -static void dwc3_qcom_disable_port_interrupts(struct dwc3_qcom_port *port) +static void dwc3_qcom_disable_port_interrupts(struct dwc3_qcom *qcom, int = i) { + struct dwc3_qcom_port *port =3D &qcom->ports[i]; + dwc3_qcom_disable_wakeup_irq(port->qusb2_phy_irq); =20 if (port->usb2_speed =3D=3D USB_SPEED_LOW) { - dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); + dwc3_qcom_disable_wakeup_irq(qcom->uses_eusb2_phy ? + port->dp_hs_phy_irq : + port->dm_hs_phy_irq); } else if ((port->usb2_speed =3D=3D USB_SPEED_HIGH) || (port->usb2_speed =3D=3D USB_SPEED_FULL)) { - dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); + dwc3_qcom_disable_wakeup_irq(qcom->uses_eusb2_phy ? + port->dm_hs_phy_irq : + port->dp_hs_phy_irq); } else { dwc3_qcom_disable_wakeup_irq(port->dp_hs_phy_irq); dwc3_qcom_disable_wakeup_irq(port->dm_hs_phy_irq); @@ -289,8 +300,10 @@ static void dwc3_qcom_disable_port_interrupts(struct d= wc3_qcom_port *port) dwc3_qcom_disable_wakeup_irq(port->ss_phy_irq); } =20 -static void dwc3_qcom_enable_port_interrupts(struct dwc3_qcom_port *port) +static void dwc3_qcom_enable_port_interrupts(struct dwc3_qcom *qcom, int i) { + struct dwc3_qcom_port *port =3D &qcom->ports[i]; + dwc3_qcom_enable_wakeup_irq(port->qusb2_phy_irq, 0); =20 /* @@ -303,11 +316,19 @@ static void dwc3_qcom_enable_port_interrupts(struct d= wc3_qcom_port *port) */ =20 if (port->usb2_speed =3D=3D USB_SPEED_LOW) { - dwc3_qcom_enable_wakeup_irq(port->dm_hs_phy_irq, + dwc3_qcom_enable_wakeup_irq(qcom->uses_eusb2_phy ? + port->dp_hs_phy_irq : + port->dm_hs_phy_irq, + qcom->uses_eusb2_phy ? + IRQ_TYPE_EDGE_RISING : IRQ_TYPE_EDGE_FALLING); } else if ((port->usb2_speed =3D=3D USB_SPEED_HIGH) || (port->usb2_speed =3D=3D USB_SPEED_FULL)) { - dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, + dwc3_qcom_enable_wakeup_irq(qcom->uses_eusb2_phy ? + port->dm_hs_phy_irq : + port->dp_hs_phy_irq, + qcom->uses_eusb2_phy ? + IRQ_TYPE_EDGE_RISING : IRQ_TYPE_EDGE_FALLING); } else { dwc3_qcom_enable_wakeup_irq(port->dp_hs_phy_irq, @@ -324,7 +345,7 @@ static void dwc3_qcom_disable_interrupts(struct dwc3_qc= om *qcom) int i; =20 for (i =3D 0; i < qcom->num_ports; i++) - dwc3_qcom_disable_port_interrupts(&qcom->ports[i]); + dwc3_qcom_disable_port_interrupts(qcom, i); } =20 static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) @@ -332,7 +353,7 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qco= m *qcom) int i; =20 for (i =3D 0; i < qcom->num_ports; i++) - dwc3_qcom_enable_port_interrupts(&qcom->ports[i]); + dwc3_qcom_enable_port_interrupts(qcom, i); } =20 static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) @@ -609,6 +630,7 @@ struct dwc3_glue_ops dwc3_qcom_glue_ops =3D { =20 static int dwc3_qcom_probe(struct platform_device *pdev) { + const struct dwc3_qcom_platform_data *pdata; struct dwc3_probe_data probe_data =3D {}; struct device *dev =3D &pdev->dev; struct dwc3_qcom *qcom; @@ -624,6 +646,10 @@ static int dwc3_qcom_probe(struct platform_device *pde= v) =20 qcom->dev =3D &pdev->dev; =20 + pdata =3D device_get_match_data(dev); + if (pdata) + qcom->uses_eusb2_phy =3D pdata->uses_eusb2_phy; + qcom->resets =3D devm_reset_control_array_get_optional_exclusive(dev); if (IS_ERR(qcom->resets)) { return dev_err_probe(&pdev->dev, PTR_ERR(qcom->resets), @@ -838,8 +864,63 @@ static const struct dev_pm_ops dwc3_qcom_dev_pm_ops = =3D { .prepare =3D pm_sleep_ptr(dwc3_qcom_prepare), }; =20 +static const struct dwc3_qcom_platform_data dwc3_qcom_pdata =3D { + .uses_eusb2_phy =3D false, +}; + +static const struct dwc3_qcom_platform_data dwc3_qcom_glymur_pdata =3D { + .uses_eusb2_phy =3D true, +}; + static const struct of_device_id dwc3_qcom_of_match[] =3D { - { .compatible =3D "qcom,snps-dwc3" }, + { + .compatible =3D "qcom,snps-dwc3", + .data =3D &dwc3_qcom_pdata, + }, + { + .compatible =3D "qcom,eliza-dwc3", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,glymur-dwc3", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,glymur-dwc3-mp", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,glymur-dwc3-mp", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,kaanapali-dwc3", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,milos-dwc3", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,sm8550-dwc3", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,sm8650-dwc3", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,sm8750-dwc3", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,x1e80100-dwc3", + .data =3D &dwc3_qcom_glymur_pdata, + }, + { + .compatible =3D "qcom,x1e80100-dwc3-mp", + .data =3D &dwc3_qcom_glymur_pdata, + }, { } }; MODULE_DEVICE_TABLE(of, dwc3_qcom_of_match); --=20 2.34.1