From nobody Sat Jun 13 20:23:16 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D11093A7835 for ; Tue, 5 May 2026 17:12:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001148; cv=none; b=cf8irdpgOMkpXZWiCTikqZoqimLS3VyYzvKEEfDcUONQKLFoHG/zy9DW32NthM1lqb6elSjmKCELht3fGRJWbHPeVAv3hRUSUBNLdWudDFPmxhpryaB/J2ScZJsyS5XF0COiBlBKFQu+Io5NL650uN5DXmZ2cI+zTk/v51iRmNQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001148; c=relaxed/simple; bh=ojh9eB98gYSMnvTUgSXMn2Zw0/ZSIkKVn/YDNliV2iM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GiOExhamrC14KQ7OqlD+ZJHo7OCZRnkYtBtKhMQ6BY2XddvZVxkWJcgA0MPkZLkt/bTsEjJCCzdyNPrDWnxY+FtIut5oz97OPdPGpcegUb6cHmI3K0KblX14O7ZpCrzN3ot3PUwilWOzRdK02woPVq1Y8up7q5+H2w9bJV+PJTY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=ztqPZS1Q; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="ztqPZS1Q" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=P0+N+OKN/kTVkUzotmztG3kumJS+495ukG6sbMOmjcY=; b=ztqPZS1QYDXHebO2xYBa4ILcpc VDzgwBuYXww8q80OfL9ezXMzItO2DNkbHnlB7kuTRK9elBGuSJMdTVnhzCCOA9fWyfvUjIl4N4oMG fJO7nZmhm7vjW6m8+xQXVXK+rk1fJO/YsmPMIiyNtKOr4EWlETUunO926LB8bVxDLxD3csQTbkbjO GhA52z+xeRuSDr2EtRxInMvHEp3Qe97s6SCws4RaRTr3CmMW399tSGfbPZ9aeVfNNpGybDdlm+Elg p5c7dRAJGcF4lLmy6iMnGxU8X3BvY1fSOyLt4aMANsOKYfZ/LRMAiyAe7N9j0q5bX7dHSLdhNSp+k /rcplN5A==; From: Heiko Stuebner To: heiko@sntech.de Cc: jonas@kwiboo.se, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/5] arm64: dts: rockchip: Add USB nodes for RK3528 Date: Tue, 5 May 2026 19:12:04 +0200 Message-ID: <20260505171208.3267387-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260505171208.3267387-1-heiko@sntech.de> References: <20260505171208.3267387-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman Rockchip RK3528 has one USB 3.0 DWC3 controller and oneUSB 2.0 EHCI/OHCI controller and uses an Innosilicon-USB2PHY for USB 2.0. The DWC3 controller additionally uses the Naneng Combo PHY for USB3. Add device tree nodes to describe these USB controllers along with the USB 2.0 PHYs. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 77 ++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts= /rockchip/rk3528.dtsi index 806b8109f67d..8823df18f66e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -336,6 +336,30 @@ pcie_intc: legacy-interrupt-controller { }; }; =20 + usb_host0_xhci: usb@fe500000 { + compatible =3D "rockchip,rk3528-dwc3", "snps,dwc3"; + reg =3D <0x0 0xfe500000 0x0 0x400000>; + clocks =3D <&cru CLK_REF_USB3OTG>, + <&cru CLK_SUSPEND_USB3OTG>, + <&cru ACLK_USB3OTG>; + clock-names =3D "ref_clk", "suspend_clk", "bus_clk"; + interrupts =3D ; + power-domains =3D <&power RK3528_PD_VPU>; + resets =3D <&cru SRST_A_USB3OTG>; + dr_mode =3D "otg"; + phy_type =3D "utmi_wide"; + snps,dis_enblslpm_quirk; + snps,dis_rxdet_inp3_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + status =3D "disabled"; + }; + gic: interrupt-controller@fed01000 { compatible =3D "arm,gic-400"; reg =3D <0x0 0xfed01000 0 0x1000>, @@ -349,6 +373,30 @@ gic: interrupt-controller@fed01000 { #interrupt-cells =3D <3>; }; =20 + usb_host0_ehci: usb@ff100000 { + compatible =3D "generic-ehci"; + reg =3D <0x0 0xff100000 0x0 0x40000>; + clocks =3D <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>, + <&usb2phy>; + interrupts =3D ; + phys =3D <&usb2phy_host>; + phy-names =3D "usb"; + power-domains =3D <&power RK3528_PD_VO>; + status =3D "disabled"; + }; + + usb_host0_ohci: usb@ff140000 { + compatible =3D "generic-ohci"; + reg =3D <0x0 0xff140000 0x0 0x40000>; + clocks =3D <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>, + <&usb2phy>; + interrupts =3D ; + phys =3D <&usb2phy_host>; + phy-names =3D "usb"; + power-domains =3D <&power RK3528_PD_VO>; + status =3D "disabled"; + }; + qos_crypto_a: qos@ff200000 { compatible =3D "rockchip,rk3528-qos", "syscon"; reg =3D <0x0 0xff200000 0x0 0x20>; @@ -1273,6 +1321,35 @@ combphy: phy@ffdc0000 { rockchip,pipe-phy-grf =3D <&pipe_phy_grf>; status =3D "disabled"; }; + + usb2phy: usb2phy@ffdf0000 { + compatible =3D "rockchip,rk3528-usb2phy"; + reg =3D <0x0 0xffdf0000 0x0 0x10000>; + clocks =3D <&cru CLK_REF_USBPHY>, <&cru PCLK_USBPHY>; + clock-names =3D "phyclk", "pclk"; + #clock-cells =3D <0>; + clock-output-names =3D "clk_usbphy_480m"; + power-domains =3D <&power RK3528_PD_VO>; + rockchip,usbgrf =3D <&vo_grf>; + status =3D "disabled"; + + usb2phy_otg: otg-port { + interrupts =3D , + , + ; + interrupt-names =3D "otg-bvalid", "otg-id", + "linestate"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + + usb2phy_host: host-port { + interrupts =3D ; + interrupt-names =3D "linestate"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + }; }; }; =20 --=20 2.47.3 From nobody Sat Jun 13 20:23:16 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65DD2366806 for ; Tue, 5 May 2026 17:12:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001148; cv=none; b=MttcZAu08Y3vhb3EQ6NOJCI+G88PgaOJv8ovLAa2f3qLPypM5SFu5qes9glcwrocJJMDsG0mSVBaKC6l7kKQOouce7VezUQQ1GtYLBjxHJ7fIVGNIplkNFqEO40f/L07FZsHu7fc6bAFXUIm0fc17pLxfnAVQyIxSNfuuwehNTU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001148; c=relaxed/simple; bh=f2TzS/zd90zaDz/paoQjIthIZm3oWqWrnC3sISilE6I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bK3zr/XUl/diDilqLAic6GDta9Y3xALMv3kBzlexrDRDzCjXQK3mfStRoYz3CX2KEuEX5jVRHaf8JqfUz1j++V2pgy3aLT4OUYKBLzkFLve+hEnMHwoqXSAsFHfIgr4zS7VkkdopB7cOAkVAfMXfEdjimEFx2hlcrsN5XsjZbPg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=nAT0Mu0e; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="nAT0Mu0e" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=tjyFB79RpcRjwJrLC2R/43QIEVjrqdz4xXxzes5h0Bk=; b=nAT0Mu0eL+/BMnEYCG2N/vHxgI FpVTJuolg7aG1Bko6fJjzUkAEA/vaGp94bKYMWcorxPTktEucqyHh5y1leCaiBfViDdixAhcn6QYM siNTsjCqgl6N/QKOwrJU8Pst924+tR7Q4m8v49ztqeNJcSgjtQWctBw0bAMDbCEBzwlxJvozw4z9N yCrknh9H7BrFIpgZHQy02GFx+YZZpTJFKlCKu2Tk7L8e69N92YEp7yuuIVRd6BkL5dFKrX6rAvk3/ gnQE0VI3GwU2sWGVlICtiH/LzJnlVKctRMgUW+bwQIzHjZhAGMPPaf10ca+j3O63fWOyZykM5WWLp 6Pr+DKrQ==; From: Heiko Stuebner To: heiko@sntech.de Cc: jonas@kwiboo.se, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/5] arm64: dts: rockchip: Enable USB 2.0 ports on Radxa E20C Date: Tue, 5 May 2026 19:12:05 +0200 Message-ID: <20260505171208.3267387-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260505171208.3267387-1-heiko@sntech.de> References: <20260505171208.3267387-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman The Radxa E20C has one USB2.0 Type-A HOST port and one USB2.0 Type-C OTG port. Add support for using the USB 2.0 ports on Radxa E20C. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm6= 4/boot/dts/rockchip/rk3528-radxa-e20c.dts index b32452756155..6fb7e624bb04 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts @@ -134,6 +134,18 @@ vcc5v0_sys: regulator-5v0-vcc-sys { regulator-max-microvolt =3D <5000000>; }; =20 + vcc5v0_usb20: regulator-5v0-vcc-usb20 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_en>; + regulator-name =3D "vcc5v0_usb20"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; + vccio_sd: regulator-vccio-sd { compatible =3D "regulator-gpio"; gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; @@ -273,6 +285,12 @@ sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb { + usb_host_en: usb-host-en { + rockchip,pins =3D <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; =20 &pwm1 { @@ -320,3 +338,33 @@ &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; status =3D "okay"; }; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +&usb_host0_xhci { + extcon =3D <&usb2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; + snps,dis_u2_susphy_quirk; + status =3D "okay"; +}; + +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + phy-supply =3D <&vcc5v0_usb20>; + status =3D "okay"; +}; + +&usb2phy_otg { + status =3D "okay"; +}; --=20 2.47.3 From nobody Sat Jun 13 20:23:16 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 546F948C8C0 for ; Tue, 5 May 2026 17:12:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001148; cv=none; b=NFAcrH0pl9sQlU6o7ghho8pD7TK4loQba6hFSJTRhZM8TyLPaID1z9E6czwtqwRvEKc7QUjT0v5C6riJ3WojRqGHoWxPGdQU05UYR0eaQNIOVvUVI1OuLVcqvAJ9AcoByAVrSFjlo8Y9UBqprUFOKl6jpfAuwJSf6Ud7zkrPyDo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001148; c=relaxed/simple; bh=FR+PvpOu7SGvraeDWlTcHC94TEWDxbc9/hyNEhc1Vm4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=snyj5fCi3KFxXFqMwzTNvurDqEdO/3EgxY5CrYBr+ZP7fhC0VStypIKL9luJcnwqqLDlKJua4ETc6ZZ6HLLywPYmA8alJF1elqBYVL3ub+jYMUlKXwRxNEB1AGp1RU0dMMdsuROSnTcxOZS6edATFHgTlo6Ym8WXt7g7d4hCZBU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=O8/sNvnP; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="O8/sNvnP" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=I+abTBmbB8/piaQpd4nBLbfx6uLiJ0tuzxThZfR9Zig=; b=O8/sNvnPsRvzC3YGkftsWhmo+m g/3I65a2RulhRWVWE4WwNqhVwBAEZ/lDewGFA79BAcTC4ef2G1Fe/zyfbowvBiJRmmkxL4lAWNahA MufFMRzx0UgHQXbCJ2J20nY9XGCAe2YBYIzopZPbB6tE3KcWalXQOIO2ZQaoBl6pSQUbXtrhONWvn kDEbXmKvaFuZdFp0N3siftFEhvGVcqlZppiFnqTZJC23sbNWzrlqEq3OiInis4AygP/C7wL+yR9ja cqz9iF/g0hXvsnpsjiGutXFpn6w2jC1eMRai42ERAW/oY8Ocd67aL3TVkYp3zX8r1DIHjfIo8JyfQ 4W8saUwQ==; From: Heiko Stuebner To: heiko@sntech.de Cc: jonas@kwiboo.se, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/5] arm64: dts: rockchip: Enable USB ports on Radxa ROCK 2A/2F Date: Tue, 5 May 2026 19:12:06 +0200 Message-ID: <20260505171208.3267387-4-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260505171208.3267387-1-heiko@sntech.de> References: <20260505171208.3267387-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman The ROCK 2A has three USB 2.0 Type-A HOST ports behind an onboard USB hub, and one USB 3.0 Type-A port. And the ROCK 2F has two USB 2.0 Type-A HOST ports behind an onboard USB hub, and one USB 2.0 Type-C OTG port. Add support for using the USB ports on Radxa ROCK 2A/2F. The onboard USB hub handles OHCI so only the EHCI controller is enabled. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi | 17 +++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts | 13 +++++++++++++ arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts | 13 +++++++++++++ 3 files changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2.dtsi index aedc7ee9ee46..501a91f4c23e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2.dtsi @@ -166,6 +166,10 @@ rfkill { }; }; =20 +&combphy { + status =3D "okay"; +}; + &cpu0 { cpu-supply =3D <&vdd_arm>; }; @@ -291,3 +295,16 @@ &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; status =3D "okay"; }; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + phy-supply =3D <&vcc5v0_usb20>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2a.dts index 0b696d49b71f..e23ad1763bc8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2a.dts @@ -79,3 +79,16 @@ usb_otg_en: usb-otg-en { }; }; }; + +&usb_host0_xhci { + dr_mode =3D "host"; + extcon =3D <&usb2phy>; + phys =3D <&usb2phy_otg>, <&combphy PHY_TYPE_USB3>; + phy-names =3D "usb2-phy", "usb3-phy"; + status =3D "okay"; +}; + +&usb2phy_otg { + phy-supply =3D <&vcc5v0_usb30_otg>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts b/arch/arm64/b= oot/dts/rockchip/rk3528-rock-2f.dts index 3e2b9b685cb2..e15cae28dde2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-rock-2f.dts @@ -8,3 +8,16 @@ / { model =3D "Radxa ROCK 2F"; compatible =3D "radxa,rock-2f", "rockchip,rk3528"; }; + +&usb_host0_xhci { + extcon =3D <&usb2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; + snps,dis_u2_susphy_quirk; + status =3D "okay"; +}; + +&usb2phy_otg { + status =3D "okay"; +}; --=20 2.47.3 From nobody Sat Jun 13 20:23:16 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3EB79492507 for ; Tue, 5 May 2026 17:12:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001149; cv=none; b=mtj0CK62QxJmPojljD1C5ECtag7ps4GUBqwiRPtEKC3JUzFTZo2Mc2Eee5U4sFCO/IB9jmePr1z2NlhtRhKGKEJavRX3T5S9+V0eA2shBjZ1q38juEquig3fPEe3dTflCqAmpPR7mnSRwG2mNi9c35Dm0UfnHw6Kq8g11i2r5Ps= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001149; c=relaxed/simple; bh=+8l7Ce3x6T4oBhnYQ1/rUpaYqrpS8WoP1Kuf3BLJkc4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nzsWHDnfSVPBcbUUsdsFhByrGquBqc+sU3/q4tXRY8fr4MTEVxhqrcDaU820pQKRFbdUkzUSJPGTVF5btMKhAjyPr3t/c8M3qxZBYgZfZ0MV+egTKaeAFsGifUpC822vmrGFmYOQgTfqNS/tAO45t9VRhcVg6oyK6hJFfLLm4qY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=M+TyBoi5; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="M+TyBoi5" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=UQYb9cx7Qy9HM2zG1blx8dDESq371LLINBDgwuG2XgM=; b=M+TyBoi5RbYqE5X3+oLFHJXzIf kHSu1/BoxKyQlALWb7jDAN3l9PENbcTjYVK/3qH5yE3aJIbJzLnQCB+MJsImcoEImhc4BoZP+5RxT +W2lS5fJ6pdkKbQpLO0sW7FzO2qUrowP41pqq6bWIhRHdDG4n1ek0+oWmGFjISZSzec+dg3DL/Sqy d0y7nJLK25DmIaXZiquXSizgjTeX1/RJARU3gHdQ/RnTda5SX4JkLXs0trXPEqBswvPGUrEixTQbO 1J8idjx6VG/3p4SzWmA+QeBvA3Bz3rQMrjm2zoCsv1txIXG7s2qq1M9sw9uUUzDhR1JutWOnIJM7D 00qnKENA==; From: Heiko Stuebner To: heiko@sntech.de Cc: jonas@kwiboo.se, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/5] arm64: dts: rockchip: Enable USB 2.0 ports on ArmSoM Sige1 Date: Tue, 5 May 2026 19:12:07 +0200 Message-ID: <20260505171208.3267387-5-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260505171208.3267387-1-heiko@sntech.de> References: <20260505171208.3267387-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman The ArmSoM Sige1 has two USB 2.0 Type-A HOST ports behind an onboard USB hub, and one USB 2.0 Type-C OTG port. Add support for using the USB 2.0 ports on ArmSoM Sige1. The onboard USB hub handles OHCI so only the EHCI controller is enabled. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3528-armsom-sige1.dts | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-armsom-sige1.dts index c41af8fc0c8d..e15a4b2a1208 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts @@ -480,3 +480,27 @@ bluetooth { vddio-supply =3D <&vcc_1v8>; }; }; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_xhci { + extcon =3D <&usb2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; + status =3D "okay"; +}; + +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + status =3D "okay"; +}; + +&usb2phy_otg { + status =3D "okay"; +}; --=20 2.47.3 From nobody Sat Jun 13 20:23:16 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65E6242188D for ; Tue, 5 May 2026 17:12:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001149; cv=none; b=be58DTDXBSmDfiYeFAtvNg3tS0ZghqIE0AFCoabyZVBXrzjFMWnxGNaM6DakgSgFaAY3+sjUAmA5NUwGwEf43xW5agGeXtB8mhlDiQOiPdJUiDRuAGiS+kD0/MrnNUaZPl35FpAZIxkeYvpsn8VKapLnDQxfxfJDlewbQWpvPnY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778001149; c=relaxed/simple; bh=Z+Vs4Pd1P/i2wOXSHAfBVe/hRVI8KYcAp93mI7d4TzA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Tc/2zYh3eOBPQuok8i+6Rc268jssCzARhUvWq+ljjC5Rzyp2vfx1XVngEbyESpYBVdr4svsEjnvP3g84ILjPmjCkcCAtH7zSVtkwmyKFqoOXRe8JFEfkzXKPTjZd5SXJwdMYf8zhtaXESftUX7VR6tcySK8oA8mXT6XDrCcKLaQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=xIANv0Ii; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="xIANv0Ii" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=WQzBRtevGp9SDQQk5hM9qSxUDKCpE9SbnE/lz5huCdI=; b=xIANv0IiSz/GsIMmfjdhlBADgC Cvpb9cYAqR8JmFzPuwUNIZ9AHPLi2c1cXLxoZeNhCChQe68zci9GADsNEgqPWfOvjRnJtTAKyWifW Zp8SBaFobf3kbEkcG1oZQJPOyzXERlOzgoGH+BbRau6b1Bp3GQHCmHgPO+b7tVJ1qq8nQof7XA0ru ShiY4lnggK/5Qb85kjCGuJi8B42zNG6YorDx9r+fNwYkd1ZwDe6nAo5mAIEN+dWr3ShkBTVKgRpqF +uwqCcf0q6uSIKTYCBbUDLSv6xcNOiR4BCXK0cYlwjNV9PGRMq+tiEivVBIasezVzrum7eR7zo4OY UDHRlg7A==; From: Heiko Stuebner To: heiko@sntech.de Cc: jonas@kwiboo.se, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5] arm64: dts: rockchip: Enable USB 2.0 ports on NanoPi Zero2 Date: Tue, 5 May 2026 19:12:08 +0200 Message-ID: <20260505171208.3267387-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260505171208.3267387-1-heiko@sntech.de> References: <20260505171208.3267387-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jonas Karlman The NanoPi Zero2 has one USB 2.0 Type-A HOST port and one USB 2.0 Type-C OTG port. Add support for using the USB 2.0 ports on NanoPi Zero2. Signed-off-by: Jonas Karlman Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-nanopi-zero2.dts index 9f683033c5f3..cd5c75433fa9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts @@ -338,3 +338,33 @@ &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; status =3D "okay"; }; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +&usb_host0_xhci { + extcon =3D <&usb2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; + snps,dis_u2_susphy_quirk; + status =3D "okay"; +}; + +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + phy-supply =3D <&usb2_host_5v>; + status =3D "okay"; +}; + +&usb2phy_otg { + status =3D "okay"; +}; --=20 2.47.3