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[211.75.127.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b9cae59f62sm114565335ad.70.2026.05.04.18.37.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2026 18:37:37 -0700 (PDT) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id C3E5C4163B79; Tue, 5 May 2026 09:37:34 +0800 (CST) From: Cheng Ming Lin To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v10 1/3] dt-bindings: mtd: nand: Add nand-randomizer property Date: Tue, 5 May 2026 09:34:51 +0800 Message-Id: <20260505013453.980249-2-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260505013453.980249-1-linchengming884@gmail.com> References: <20260505013453.980249-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin Add the 'nand-randomizer' property to control the data randomizer feature. This is used to improve data reliability by reducing cell-to-cell interference. Depending on the hardware architecture, this property is designed to be generic and can apply to either the NAND chip's internal randomizer or the hardware randomizer engine embedded in the NAND host controller. This property is defined as a uint32 enum (0 or 1) instead of a simple boolean. This design choice explicitly supports the "not present" case. If the property is omitted, the driver will not interfere and will leave the randomizer in its current state (e.g., as already configured by the bootloader or hardware default). Signed-off-by: Cheng Ming Lin Reviewed-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/mtd/nand-chip.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/nand-chip.yaml b/Documen= tation/devicetree/bindings/mtd/nand-chip.yaml index 8800d1d07..effdc4f99 100644 --- a/Documentation/devicetree/bindings/mtd/nand-chip.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-chip.yaml @@ -23,6 +23,15 @@ properties: description: Contains the chip-select IDs. =20 + nand-randomizer: + description: | + Control the data randomizer feature. + 0: Disable randomizer. + 1: Enable randomizer. + If absent, the current hardware state is left unchanged. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + required: - reg =20 --=20 2.25.1 From nobody Wed Jun 10 08:12:30 2026 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82D0D348453 for ; Tue, 5 May 2026 01:37:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777945059; cv=none; b=lisSlegFTaJwjSyWBtNY0BTePgn4OWKRydMPcN78GRJ09FWKNowh6tQ18yabgPlIBHTlPusdJ25M3nKCFADnfL3to/WZSVQpZxH8LHfHHD9rbokAElOhISSkIgAiwbKI2h/jAbnP1zG4SofgMcuYu2pSlGH7U2lLl66BV1fBloc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777945059; c=relaxed/simple; bh=D0bTdvdTCm27EjO74DkzZDQRGni5mOw6oHjXGNcLnY8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=sAlyIrn7irmRJqQy/Qyzuj6TmVZxn4/eHEQjSD49h8EBjmyTblsMNATCQuUFM9WUb9OJQlFDyu6zjYRWSst7ZEn921+pj2YPhYzriUoj6Mn0N/J1yhrKS4XoP5M7u60cTS/8N1EErDvMRADVllq7phmgDkxiZ+nO3duoCuHW2+8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=pkLaSlOp; arc=none smtp.client-ip=209.85.214.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="pkLaSlOp" Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-2ba4efedbeaso2646435ad.1 for ; Mon, 04 May 2026 18:37:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1777945058; x=1778549858; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gjrHxUF0jl2CZOESmwQoL3r7trIxfKHjRfBdfvvWu+U=; b=pkLaSlOpIkXEbTsFJIBZxUQ6bZWuWmdQyN173Mbc+XOhci0nU7viJgGPI+Q5mThyea oyOUJcksdvpZMwnXdT8Au+4mBMjAVc5P1DfzvizJwoftAGijeHZemrvv1ClqHCncqzTE 9gyADe3DbzAvIUQZMiZgaL8uFIaxAGPFSMjVnUmJb1Q3ljCN25vebu2qgQY3zbZ6cEBe CcIb7vALQKNbk4Nb/dWe13jHRInW5IXXBjtwwtt4VAoefR7AAygtx2Kf6+HVWC8KPs4c uee3Nwe3K4wapRSoEahKfC5un2lCh3LBkL9XwliWHpzrOBPorIO4XXdjvFVgx1pLR/O+ hcJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777945058; x=1778549858; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=gjrHxUF0jl2CZOESmwQoL3r7trIxfKHjRfBdfvvWu+U=; b=Enz8KHmvf2wd8rXPUm3+yLWMsIeImnBD8sqVumPpOEVuvVpysqq1k3MxJic9wDrV+k o6MCFOaQUYtmXLIvcpfyVS6rM2h/O45fjwtVOf9B3sO8LvQVf7XpPqi52U95AJPHAV73 pXYBkd1+rMn5bUUUxzTXPxhQOY5UNmvoTXcZAidudCaNyMOz9vNEw22EGcaNy2vmSk0j b0YupFhWvIbw+L+5sm9srqKORJt48wJRrFqBbUUnfUp7F1ydyXR9qXMyIT+SMHHSaU6Q ClNy0q2rVdMG2IbPrcVKWDMn+LPnU5YBALhgo3f+SYBD3Y0ZBQb7nBEo98p/lUPf3Fo7 VSJQ== X-Forwarded-Encrypted: i=1; AFNElJ/6wwmCuG5EgpVHX2BIr0rBevX9D23HWm0L5w87y6GTRAaOrh58nA1RHBxcjzHGmM8QYiv4vA8D59T7Mnk=@vger.kernel.org X-Gm-Message-State: AOJu0YzAxygdch16iUwiP/b7thGTMrDNJZiGCiDVSKSuMsjn5lyBoXWC cn9LYQ4WLkuOF9iLJo3ESgfxff0Mt+79tkkIukSuUvGjuMl9QuynBbE9 X-Gm-Gg: AeBDieuAmJRaQtWp8uyC1xNBi0iIS8x1fJSBCpGFndysT/TnWXye1fHWnOBoUR6aZuJ UBWORN2etJIFS5vg0R64vfGK8IuEY0TnBGHil4CO/5Nz+IJfMi/sgCXU6QUxqEK4pfe+nF9Zj8A 0U/axnCKvFtUbK3uR+avaY8T1EYwxWBRbH8dmPmx3alCJGyqSVnOBnNhCWAjsnpbwzFd6VM5hKO lxNubvUpLbVipQFsu6WgfVYWgr9KoEDhV6UXqXwxWU5q9J28MM7iCqZRfsJ2SRPJsL2QcaXmL7+ lxVQF0oPq2DOC9V9G4BitujuglI9B3A1MMehh3fawEiRmhrFCDxt5fM9WxifjdySmV7ykC4U500 +A7k4wGjXDJ5UXoDacPKIhnjnjY08GLuWntMQ7cAXytf0WPfYJve/k4+Obv+/wdCdImjHfIBNH3 voODAXgJJvVvJ8IXM38+0U8SBtUzHPIoeo8Lc0K/oBdkLEDf9u6YJsjb6O X-Received: by 2002:a17:903:2ecc:b0:2ba:15ff:345d with SMTP id d9443c01a7336-2ba15ff376cmr79860945ad.35.1777945057671; Mon, 04 May 2026 18:37:37 -0700 (PDT) Received: from twhmp6px (mxsmtp211.mxic.com.tw. [211.75.127.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b9cae5cc52sm121946995ad.78.2026.05.04.18.37.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2026 18:37:37 -0700 (PDT) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id C90604163B7C; Tue, 5 May 2026 09:37:34 +0800 (CST) From: Cheng Ming Lin To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v10 2/3] mtd: spi-nand: Add support for randomizer Date: Tue, 5 May 2026 09:34:52 +0800 Message-Id: <20260505013453.980249-3-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260505013453.980249-1-linchengming884@gmail.com> References: <20260505013453.980249-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin This patch adds support for the randomizer feature. It introduces a 'set_randomizer' callback in 'struct spinand_info' and 'struct spinand_device'. If a driver implements this callback, the core will invoke it during device initialization (spinand_init) to enable or disable the randomizer feature based on the device tree configuration. Signed-off-by: Cheng Ming Lin --- drivers/mtd/nand/spi/core.c | 20 ++++++++++++++++++++ include/linux/mtd/spinand.h | 9 +++++++++ 2 files changed, 29 insertions(+) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 8aa3753aa..78557e48f 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -1307,6 +1307,22 @@ static int spinand_create_dirmaps(struct spinand_dev= ice *spinand) return 0; } =20 +static int spinand_randomizer_init(struct spinand_device *spinand) +{ + struct device_node *np =3D spinand->spimem->spi->dev.of_node; + u32 rand_val; + int ret; + + if (!spinand->set_randomizer) + return 0; + + ret =3D of_property_read_u32(np, "nand-randomizer", &rand_val); + if (ret) + return 0; + + return spinand->set_randomizer(spinand, rand_val); +} + static const struct nand_ops spinand_ops =3D { .erase =3D spinand_erase, .markbad =3D spinand_markbad, @@ -1594,6 +1610,7 @@ int spinand_match_and_init(struct spinand_device *spi= nand, spinand->user_otp =3D &table[i].user_otp; spinand->read_retries =3D table[i].read_retries; spinand->set_read_retry =3D table[i].set_read_retry; + spinand->set_randomizer =3D table[i].set_randomizer; =20 /* I/O variants selection with single-spi SDR commands */ =20 @@ -1881,6 +1898,9 @@ static int spinand_init(struct spinand_device *spinan= d) * ECC initialization must have happened previously. */ spinand_cont_read_init(spinand); + ret =3D spinand_randomizer_init(spinand); + if (ret) + goto err_cleanup_nanddev; =20 mtd->_read_oob =3D spinand_mtd_read; mtd->_write_oob =3D spinand_mtd_write; diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 58abd306e..9ec45b727 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -585,6 +585,7 @@ enum spinand_bus_interface { * @user_otp: SPI NAND user OTP info. * @read_retries: the number of read retry modes supported * @set_read_retry: enable/disable read retry for data recovery + * @set_randomizer: enable/disable randomizer support * * Each SPI NAND manufacturer driver should have a spinand_info table * describing all the chips supported by the driver. @@ -613,6 +614,8 @@ struct spinand_info { unsigned int read_retries; int (*set_read_retry)(struct spinand_device *spinand, unsigned int read_retry); + int (*set_randomizer)(struct spinand_device *spinand, + bool enable); }; =20 #define SPINAND_ID(__method, ...) \ @@ -669,6 +672,9 @@ struct spinand_info { .read_retries =3D __read_retries, \ .set_read_retry =3D __set_read_retry =20 +#define SPINAND_RANDOMIZER(__set_randomizer) \ + .set_randomizer =3D __set_randomizer + #define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants, \ __flags, ...) \ { \ @@ -754,6 +760,7 @@ struct spinand_mem_ops { * @user_otp: SPI NAND user OTP info. * @read_retries: the number of read retry modes supported * @set_read_retry: Enable/disable the read retry feature + * @set_randomizer: Enable/disable the randomizer feature */ struct spinand_device { struct nand_device base; @@ -787,6 +794,8 @@ struct spinand_device { bool cont_read_possible; int (*set_cont_read)(struct spinand_device *spinand, bool enable); + int (*set_randomizer)(struct spinand_device *spinand, + bool enable); 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[211.75.127.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-839679c8629sm196721b3a.36.2026.05.04.18.37.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 May 2026 18:37:37 -0700 (PDT) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id CE32C4163B7D; Tue, 5 May 2026 09:37:34 +0800 (CST) From: Cheng Ming Lin To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v10 3/3] mtd: spi-nand: macronix: Enable randomizer support Date: Tue, 5 May 2026 09:34:53 +0800 Message-Id: <20260505013453.980249-4-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260505013453.980249-1-linchengming884@gmail.com> References: <20260505013453.980249-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin Implement the 'set_randomizer' callback for Macronix SPI NAND chips. The randomizer is enabled by setting bit 1 of the Configuration Register (address 0x10). This patch adds support for the following chips: - MX35LFxG24AD series - MX35UFxG24AD series When the randomizer is enabled, data is scrambled internally during program operations and automatically descrambled during read operations. This helps reduce bit errors caused by program disturbance. Please refer to the following link for randomizer feature: Link: https://www.mxic.com.tw/Lists/ApplicationNote/Attachments/2151/AN1051= V1-The%20Introduction%20of%20Randomizer%20Feature%20on%20MX30xFxG28AD_MX35x= FxG24AD.pdf Signed-off-by: Cheng Ming Lin --- drivers/mtd/nand/spi/macronix.c | 38 ++++++++++++++++++++++++--------- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macroni= x.c index 67cafa1bb..7dfcc34e9 100644 --- a/drivers/mtd/nand/spi/macronix.c +++ b/drivers/mtd/nand/spi/macronix.c @@ -14,6 +14,8 @@ #define MACRONIX_ECCSR_BF_LAST_PAGE(eccsr) FIELD_GET(GENMASK(3, 0), eccsr) #define MACRONIX_ECCSR_BF_ACCUMULATED_PAGES(eccsr) FIELD_GET(GENMASK(7, 4)= , eccsr) #define MACRONIX_CFG_CONT_READ BIT(2) +#define MACRONIX_CFG_RANDOMIZER_EN BIT(1) +#define MACRONIX_FEATURE_ADDR_RANDOMIZER 0x10 #define MACRONIX_FEATURE_ADDR_READ_RETRY 0x70 #define MACRONIX_NUM_READ_RETRY_MODES 5 =20 @@ -170,6 +172,12 @@ static int macronix_set_read_retry(struct spinand_devi= ce *spinand, return spi_mem_exec_op(spinand->spimem, &op); } =20 +static int macronix_set_randomizer(struct spinand_device *spinand, bool en= able) +{ + return spinand_write_reg_op(spinand, MACRONIX_FEATURE_ADDR_RANDOMIZER, + enable ? MACRONIX_CFG_RANDOMIZER_EN : 0); +} + static const struct spinand_info macronix_spinand_table[] =3D { SPINAND_INFO("MX35LF1GE4AB", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12), @@ -231,7 +239,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF2G24AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), @@ -243,7 +252,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_PROG_PLANE_SELECT_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF2G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x64, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -254,7 +264,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF4G24AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 2, 1, 1), @@ -266,7 +277,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_PROG_PLANE_SELECT_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF4G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x75, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -277,7 +289,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX31LF1GE4BC", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), @@ -327,7 +340,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF4G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xf5, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -340,7 +354,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF4GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb7, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -381,7 +396,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF2G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xe4, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -394,7 +410,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF2GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa6, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -444,7 +461,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF1GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x96, 0x03), NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), --=20 2.25.1