From nobody Sun Jun 14 02:37:15 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97BE33DF011; Mon, 4 May 2026 14:44:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777905844; cv=none; b=AXhgXh2xRem/GkKvQFkSEVLbWw63/ZHFyRJum+FuFMO/HJx+Pd8UbPiHjFk3OQJW6A6Q/Q40yLvHSltI5gl/BrIxA81510Ga8KmhRUuHoT6/c0OzXg+6ycJDKayNHWdcmsRsmUz4EXx9b6ZuPm8EZg3urrrYg5c/AC0/CkErUXk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777905844; c=relaxed/simple; bh=7kododvTQ68yKTSDo3YpbRkIFBnTYQ7gfRla+bTGEck=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=HpjfxMLpUhbItjSKDz3FWlUy12Xzela02Dmpg+z2eanzukNPuXhgWO28m6iQh82zZ+fpUJwH9pwB27BX8psGQgjyuQAy/Ia/Z3IhVoNoSCbBLDpHkDuCeOkhvejdcb8x2eWYchUW1ZCSC48O5v5BZ5L+tk1J3UDfkBMnADix2bc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=SS9+gYGc; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="SS9+gYGc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1777905842; x=1809441842; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=7kododvTQ68yKTSDo3YpbRkIFBnTYQ7gfRla+bTGEck=; b=SS9+gYGctxMGki4ihPmqubub3bFfXM7UsE2kfOowV0lYqqsokm7O/kcG W5i3GQ4sNafao6qbbCdMNGxQ1xjqFmUQxg1OXGZRc3Xgt951XPJADdN/H qWGcVRqaj0eHvcWfvgx3J+d30rctupYT1+MJ4PcsBcfnvAzESY+Nm3h74 aGm63pTa4iozphC46WYu948Ww9vQqTU+bJNqntwK6LXflagrCP9oGXvex YNFRHKy7g+2/RCZF7IpBGNfbhGg4lTdVmenHiLAO8ct1zxgNrx6cK3n6E LRBJty4kWmcuFwxOPK6TX+elODKFTUYMDJdqeCDCgdJ6TYi/WduJCpvHV Q==; X-CSE-ConnectionGUID: 7uQDdU03S3GOFdMVRa3EAA== X-CSE-MsgGUID: vi0Vgd5cTEiICpPW0xbVMg== X-IronPort-AV: E=Sophos;i="6.23,215,1770620400"; d="scan'208";a="56221892" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 May 2026 07:44:01 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.37; Mon, 4 May 2026 07:44:01 -0700 Received: from DEN-DL-M70577.microsemi.net (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 4 May 2026 07:43:57 -0700 From: Daniel Machon Date: Mon, 4 May 2026 16:43:42 +0200 Subject: [PATCH net 1/4] net: sparx5: defer VCAP debugfs creation until after netdev registration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260504-misc-fixes-sparx5-lan969x-v1-1-6604306b5743@microchip.com> References: <20260504-misc-fixes-sparx5-lan969x-v1-0-6604306b5743@microchip.com> In-Reply-To: <20260504-misc-fixes-sparx5-lan969x-v1-0-6604306b5743@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Steen Hegelund , , "Sebastian Andrzej Siewior" , Clark Williams , Steven Rostedt , Bjarni Jonasson , Lars Povlsen , Philipp Zabel CC: , , , Steen Hegelund , X-Mailer: b4 0.14.3 Commit 3a95973e7c79 ("net: sparx5: move VCAP initialization to probe") moved sparx5_vcap_init() ahead of sparx5_register_netdevs() in probe. The VCAP init path ends by calling vcap_port_debugfs() for every port, which uses netdev_name(ndev) as the debugfs file name. At that point the netdevs have only been allocated, not registered, so dev->name still holds the "eth%d" template and netdev_name() returns "(unnamed net_device)". Every port tries to create the same file under vcaps/, producing a flood of warnings at boot: debugfs: '(unnamed net_device)' already exists in 'vcaps' debugfs: '(unnamed net_device)' already exists in 'vcaps' ... Move the debugfs setup into a new sparx5_debugfs() helper in sparx5_debugfs.c, invoked after sparx5_register_notifier_blocks() succeeds so the netdev names are finalized. sparx5_vcap_init() now only deals with VCAP state. The sparx5/ debugfs root is created in the new helper as well. Fixes: 3a95973e7c79 ("net: sparx5: move VCAP initialization to probe") Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/Makefile | 3 ++- .../net/ethernet/microchip/sparx5/sparx5_debugfs.c | 26 ++++++++++++++++++= ++++ .../net/ethernet/microchip/sparx5/sparx5_main.c | 4 ++-- .../net/ethernet/microchip/sparx5/sparx5_main.h | 7 ++++++ .../ethernet/microchip/sparx5/sparx5_vcap_impl.c | 6 ----- 5 files changed, 37 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/Makefile b/drivers/net/e= thernet/microchip/sparx5/Makefile index d447f9e84d92..eb5c81527f41 100644 --- a/drivers/net/ethernet/microchip/sparx5/Makefile +++ b/drivers/net/ethernet/microchip/sparx5/Makefile @@ -14,7 +14,8 @@ sparx5-switch-y :=3D sparx5_main.o sparx5_packet.o \ sparx5_psfp.o sparx5_mirror.o sparx5_regs.o =20 sparx5-switch-$(CONFIG_SPARX5_DCB) +=3D sparx5_dcb.o -sparx5-switch-$(CONFIG_DEBUG_FS) +=3D sparx5_vcap_debugfs.o +sparx5-switch-$(CONFIG_DEBUG_FS) +=3D sparx5_vcap_debugfs.o \ + sparx5_debugfs.o =20 sparx5-switch-$(CONFIG_LAN969X_SWITCH) +=3D lan969x/lan969x_regs.o \ lan969x/lan969x.o \ diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_debugfs.c b/drive= rs/net/ethernet/microchip/sparx5/sparx5_debugfs.c new file mode 100644 index 000000000000..f6cb1eeaab80 --- /dev/null +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_debugfs.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Microchip Sparx5 Switch driver debug filesystem support + * + * Copyright (c) 2026 Microchip Technology Inc. and its subsidiaries. + */ + +#include + +#include "sparx5_main.h" +#include "vcap_api_debugfs.h" + +void sparx5_debugfs(struct sparx5 *sparx5) +{ + const struct sparx5_consts *consts =3D sparx5->data->consts; + struct vcap_control *ctrl =3D sparx5->vcap_ctrl; + struct dentry *dir; + int idx; + + sparx5->debugfs_root =3D debugfs_create_dir("sparx5", NULL); + + dir =3D vcap_debugfs(sparx5->dev, sparx5->debugfs_root, ctrl); + for (idx =3D 0; idx < consts->n_ports; ++idx) + if (sparx5->ports[idx]) + vcap_port_debugfs(sparx5->dev, dir, ctrl, + sparx5->ports[idx]->ndev); +} diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/= net/ethernet/microchip/sparx5/sparx5_main.c index dad713e9ddd5..bec07560e6fe 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -820,8 +820,6 @@ static int mchp_sparx5_probe(struct platform_device *pd= ev) /* Default values, some from DT */ sparx5->coreclock =3D SPX5_CORE_CLOCK_DEFAULT; =20 - sparx5->debugfs_root =3D debugfs_create_dir("sparx5", NULL); - ports =3D of_get_child_by_name(np, "ethernet-ports"); if (!ports) { dev_err(sparx5->dev, "no ethernet-ports child node found\n"); @@ -1000,6 +998,8 @@ static int mchp_sparx5_probe(struct platform_device *p= dev) goto cleanup_netdevs; } =20 + sparx5_debugfs(sparx5); + goto cleanup_config; =20 cleanup_netdevs: diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/= net/ethernet/microchip/sparx5/sparx5_main.h index 6a745bb71b5c..d5e6644ff124 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -565,6 +565,13 @@ void sparx5_get_hwtimestamp(struct sparx5 *sparx5, int sparx5_vcap_init(struct sparx5 *sparx5); void sparx5_vcap_deinit(struct sparx5 *sparx5); =20 +/* sparx5_debugfs.c */ +#if defined(CONFIG_DEBUG_FS) +void sparx5_debugfs(struct sparx5 *sparx5); +#else +static inline void sparx5_debugfs(struct sparx5 *sparx5) {} +#endif + /* sparx5_pgid.c */ enum sparx5_pgid_type { SPX5_PGID_FREE, diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c b/dri= vers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c index 95b93e46a41d..dd446b3a9f20 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c @@ -2035,7 +2035,6 @@ int sparx5_vcap_init(struct sparx5 *sparx5) const struct sparx5_vcap_inst *cfg; struct vcap_control *ctrl; struct vcap_admin *admin; - struct dentry *dir; int err =3D 0, idx; =20 /* Create a VCAP control instance that owns the platform specific VCAP @@ -2074,11 +2073,6 @@ int sparx5_vcap_init(struct sparx5 *sparx5) sparx5_vcap_port_key_selection(sparx5, admin); list_add_tail(&admin->list, &ctrl->list); } - dir =3D vcap_debugfs(sparx5->dev, sparx5->debugfs_root, ctrl); - for (idx =3D 0; idx < consts->n_ports; ++idx) - if (sparx5->ports[idx]) - vcap_port_debugfs(sparx5->dev, dir, ctrl, - sparx5->ports[idx]->ndev); =20 return err; } --=20 2.34.1 From nobody Sun Jun 14 02:37:15 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 219F43DFC8F; Mon, 4 May 2026 14:44:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; 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d="scan'208";a="224242092" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 04 May 2026 07:44:05 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 4 May 2026 07:44:04 -0700 Received: from DEN-DL-M70577.microsemi.net (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 4 May 2026 07:44:01 -0700 From: Daniel Machon Date: Mon, 4 May 2026 16:43:43 +0200 Subject: [PATCH net 2/4] net: sparx5: fix sleep in atomic context in MAC table access Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260504-misc-fixes-sparx5-lan969x-v1-2-6604306b5743@microchip.com> References: <20260504-misc-fixes-sparx5-lan969x-v1-0-6604306b5743@microchip.com> In-Reply-To: <20260504-misc-fixes-sparx5-lan969x-v1-0-6604306b5743@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Steen Hegelund , , "Sebastian Andrzej Siewior" , Clark Williams , Steven Rostedt , Bjarni Jonasson , Lars Povlsen , Philipp Zabel CC: , , , Steen Hegelund , X-Mailer: b4 0.14.3 sparx5_mact_learn() is called from .ndo_set_rx_mode with netif_addr_lock_bh held, but takes sparx5->lock which is a mutex. A mutex may block, which is not allowed from atomic context. Convert sparx5->lock to a spinlock, switch the hardware completion poll to readx_poll_timeout_atomic(), and use spin_lock_bh() since no caller runs in hardirq context. Observed with CONFIG_PROVE_LOCKING, CONFIG_DEBUG_SPINLOCK, CONFIG_DEBUG_MUTEXES and CONFIG_DEBUG_ATOMIC_SLEEP enabled: BUG: sleeping function called from invalid context at kernel/locking/mute= x.c:591 in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 217, name: ip preempt_count: 201, expected: 0 Call trace: __might_resched+0x144/0x248 __might_sleep+0x48/0x7c __mutex_lock+0x74/0x850 mutex_lock_nested+0x24/0x30 sparx5_mact_learn+0x78/0x100 sparx5_mc_sync+0x40/0x54 __hw_addr_sync_dev+0xc4/0x170 sparx5_set_rx_mode+0x4c/0x58 __dev_set_rx_mode+0x64/0xa4 __dev_open+0x1ec/0x26c Fixes: b37a1bae742f ("net: sparx5: add mactable support") Signed-off-by: Daniel Machon --- .../ethernet/microchip/sparx5/sparx5_mactable.c | 24 +++++++++++-------= ---- .../net/ethernet/microchip/sparx5/sparx5_main.h | 2 +- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c b/driv= ers/net/ethernet/microchip/sparx5/sparx5_mactable.c index 2bf9c5f64151..0797cfa32916 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c @@ -50,7 +50,7 @@ static int sparx5_mact_wait_for_completion(struct sparx5 = *sparx5) { u32 val; =20 - return readx_poll_timeout(sparx5_mact_get_status, + return readx_poll_timeout_atomic(sparx5_mact_get_status, sparx5, val, LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_GET(val) =3D=3D 0, TABLE_UPDATE_SLEEP_US, TABLE_UPDATE_TIMEOUT_US); @@ -92,7 +92,7 @@ int sparx5_mact_learn(struct sparx5 *sparx5, int pgid, addr =3D pgid - consts->n_ports; } =20 - mutex_lock(&sparx5->lock); + spin_lock_bh(&sparx5->lock); =20 sparx5_mact_select(sparx5, mac, vid); =20 @@ -111,7 +111,7 @@ int sparx5_mact_learn(struct sparx5 *sparx5, int pgid, =20 ret =3D sparx5_mact_wait_for_completion(sparx5); =20 - mutex_unlock(&sparx5->lock); + spin_unlock_bh(&sparx5->lock); =20 return ret; } @@ -164,7 +164,7 @@ bool sparx5_mact_getnext(struct sparx5 *sparx5, u32 cfg2; int ret; =20 - mutex_lock(&sparx5->lock); + spin_lock_bh(&sparx5->lock); =20 sparx5_mact_select(sparx5, mac, *vid); =20 @@ -183,7 +183,7 @@ bool sparx5_mact_getnext(struct sparx5 *sparx5, *pcfg2 =3D cfg2; } =20 - mutex_unlock(&sparx5->lock); + spin_unlock_bh(&sparx5->lock); =20 return ret =3D=3D 0; } @@ -194,7 +194,7 @@ int sparx5_mact_find(struct sparx5 *sparx5, int ret; u32 cfg2; =20 - mutex_lock(&sparx5->lock); + spin_lock_bh(&sparx5->lock); =20 sparx5_mact_select(sparx5, mac, vid); =20 @@ -212,7 +212,7 @@ int sparx5_mact_find(struct sparx5 *sparx5, ret =3D -ENOENT; } =20 - mutex_unlock(&sparx5->lock); + spin_unlock_bh(&sparx5->lock); =20 return ret; } @@ -222,7 +222,7 @@ int sparx5_mact_forget(struct sparx5 *sparx5, { int ret; =20 - mutex_lock(&sparx5->lock); + spin_lock_bh(&sparx5->lock); =20 sparx5_mact_select(sparx5, mac, vid); =20 @@ -233,7 +233,7 @@ int sparx5_mact_forget(struct sparx5 *sparx5, =20 ret =3D sparx5_mact_wait_for_completion(sparx5); =20 - mutex_unlock(&sparx5->lock); + spin_unlock_bh(&sparx5->lock); =20 return ret; } @@ -440,7 +440,7 @@ static void sparx5_mact_pull_work(struct work_struct *w= ork) vid =3D 0; memset(mac, 0, sizeof(mac)); do { - mutex_lock(&sparx5->lock); + spin_lock_bh(&sparx5->lock); sparx5_mact_select(sparx5, mac, vid); spx5_wr(LRN_SCAN_NEXT_CFG_SCAN_NEXT_UNTIL_FOUND_ENA_SET(1), sparx5, LRN_SCAN_NEXT_CFG); @@ -451,7 +451,7 @@ static void sparx5_mact_pull_work(struct work_struct *w= ork) ret =3D sparx5_mact_wait_for_completion(sparx5); if (ret =3D=3D 0) ret =3D sparx5_mact_get(sparx5, mac, &vid, &cfg2); - mutex_unlock(&sparx5->lock); + spin_unlock_bh(&sparx5->lock); if (ret =3D=3D 0) sparx5_mact_handle_entry(sparx5, mac, vid, cfg2); } while (ret =3D=3D 0); @@ -493,7 +493,7 @@ int sparx5_mact_init(struct sparx5 *sparx5) { char queue_name[32]; =20 - mutex_init(&sparx5->lock); + spin_lock_init(&sparx5->lock); =20 /* Flush MAC table */ spx5_wr(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_SET(MAC_CMD_CLEAR_ALL) | diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/= net/ethernet/microchip/sparx5/sparx5_main.h index d5e6644ff124..8ef4050ceecc 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -373,7 +373,7 @@ struct sparx5 { u32 features; void __iomem *regs[NUM_TARGETS]; int port_count; - struct mutex lock; /* MAC reg lock */ + spinlock_t lock; /* MAC reg lock */ /* port structures are in net device */ struct sparx5_port *ports[SPX5_PORTS]; enum sparx5_core_clockfreq coreclock; --=20 2.34.1 From nobody Sun Jun 14 02:37:15 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C5573E0249; Mon, 4 May 2026 14:44:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777905851; cv=none; b=Y9HhK3aPeUf7OVn0lm6o4fSlr8KFgkgB9AFpPFzuTnaVTeswPM5VWImjMUMPYde3oKrmB2kyx8LbfDBJM9bG9d3Caiqt6nnQxfMqyVlryhrCY55mtW50coH0NoAznRsRqb7Gfor3cih4ReB1tRNUJeDG0IlnQrsPYiH/7qfvqDk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Steen Hegelund , , "Sebastian Andrzej Siewior" , Clark Williams , Steven Rostedt , Bjarni Jonasson , Lars Povlsen , Philipp Zabel CC: , , , Steen Hegelund , , Andrew Lunn X-Mailer: b4 0.14.3 The TSN SKUs in enum spx5_target_chiptype have incorrect IDs: SPX5_TARGET_CT_7546TSN =3D 0x47546, SPX5_TARGET_CT_7549TSN =3D 0x47549, SPX5_TARGET_CT_7552TSN =3D 0x47552, SPX5_TARGET_CT_7556TSN =3D 0x47556, SPX5_TARGET_CT_7558TSN =3D 0x47558, The value read back from the chip is GCB_CHIP_ID_PART_ID, which is a GENMASK(27, 12) field, i.e. at most 16 bits wide. It can never match these IDs, so probing a TSN part fails with a "Target not supported" error. Fix the enum to use the actual 16-bit part IDs returned by the hardware: 0x0546, 0x0549, 0x0552, 0x0556 and 0x0558. Reported-by: Andrew Lunn Fixes: 3cfa11bac9bb ("net: sparx5: add the basic sparx5 driver") Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/= net/ethernet/microchip/sparx5/sparx5_main.h index 8ef4050ceecc..70ca707b5ce4 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -31,11 +31,11 @@ enum spx5_target_chiptype { SPX5_TARGET_CT_7552 =3D 0x7552, /* SparX-5-128 Enterprise */ SPX5_TARGET_CT_7556 =3D 0x7556, /* SparX-5-160 Enterprise */ SPX5_TARGET_CT_7558 =3D 0x7558, /* SparX-5-200 Enterprise */ - SPX5_TARGET_CT_7546TSN =3D 0x47546, /* SparX-5-64i Industrial */ - SPX5_TARGET_CT_7549TSN =3D 0x47549, /* SparX-5-90i Industrial */ - SPX5_TARGET_CT_7552TSN =3D 0x47552, /* SparX-5-128i Industrial */ - SPX5_TARGET_CT_7556TSN =3D 0x47556, /* SparX-5-160i Industrial */ - SPX5_TARGET_CT_7558TSN =3D 0x47558, /* SparX-5-200i Industrial */ + SPX5_TARGET_CT_7546TSN =3D 0x0546, /* SparX-5-64i Industrial */ + SPX5_TARGET_CT_7549TSN =3D 0x0549, /* SparX-5-90i Industrial */ + SPX5_TARGET_CT_7552TSN =3D 0x0552, /* SparX-5-128i Industrial */ + SPX5_TARGET_CT_7556TSN =3D 0x0556, /* SparX-5-160i Industrial */ + SPX5_TARGET_CT_7558TSN =3D 0x0558, /* SparX-5-200i Industrial */ SPX5_TARGET_CT_LAN9694 =3D 0x9694, /* lan969x-40 */ SPX5_TARGET_CT_LAN9691VAO =3D 0x9691, /* lan969x-40-VAO */ SPX5_TARGET_CT_LAN9694TSN =3D 0x9695, /* lan969x-40-TSN */ --=20 2.34.1 From nobody Sun Jun 14 02:37:15 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D90713E0C59; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260504-misc-fixes-sparx5-lan969x-v1-4-6604306b5743@microchip.com> References: <20260504-misc-fixes-sparx5-lan969x-v1-0-6604306b5743@microchip.com> In-Reply-To: <20260504-misc-fixes-sparx5-lan969x-v1-0-6604306b5743@microchip.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Steen Hegelund , , "Sebastian Andrzej Siewior" , Clark Williams , Steven Rostedt , Bjarni Jonasson , Lars Povlsen , Philipp Zabel CC: , , , Steen Hegelund , , Andrew Lunn X-Mailer: b4 0.14.3 sparx5_port_init() only invokes sparx5_serdes_set() and the associated shadow-device enable and low-speed device switch for SGMII and QSGMII. On any port with a high-speed primary device (DEV5G/DEV10G/DEV25G) configured for 1000BASE-X the serdes is therefore left uninitialized, the DEV2G5 shadow is never enabled, and the port stays pointed at its high-speed device rather than the DEV2G5. The PCS1G block looks healthy in isolation, but no frames reach the link partner. Add 1000BASE-X to the check so the same three steps run. Reported-by: Andrew Lunn Fixes: 946e7fd5053a ("net: sparx5: add port module support") Signed-off-by: Daniel Machon --- drivers/net/ethernet/microchip/sparx5/sparx5_port.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/= net/ethernet/microchip/sparx5/sparx5_port.c index 04bc8fffaf96..62c49893de3c 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c @@ -1128,7 +1128,8 @@ int sparx5_port_init(struct sparx5 *sparx5, DEV2G5_PCS1G_SD_CFG(port->portno)); =20 if (conf->portmode =3D=3D PHY_INTERFACE_MODE_QSGMII || - conf->portmode =3D=3D PHY_INTERFACE_MODE_SGMII) { + conf->portmode =3D=3D PHY_INTERFACE_MODE_SGMII || + conf->portmode =3D=3D PHY_INTERFACE_MODE_1000BASEX) { err =3D sparx5_serdes_set(sparx5, port, conf); if (err) return err; --=20 2.34.1