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Peter Anvin" , Thomas Huth , Sean Christopherson Subject: [PATCH v4 1/8] x86/runtime-const: Introduce runtime_const_mask_32() Date: Thu, 30 Apr 2026 09:47:23 +0000 Message-ID: <20260430094730.31624-2-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260430094730.31624-1-kprateek.nayak@amd.com> References: <20260430094730.31624-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001508:EE_|BY5PR12MB4164:EE_ X-MS-Office365-Filtering-Correlation-Id: bb15d2f0-59d5-448e-fdb8-08dea69d9d6e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700016|376014|7416014|13003099007|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: HrI+Qz/UaBQw/cIMYpjOzt9QXh79Pk66Rbmk/Sd2HnnTaf7+8emiyYqhZBEXmeqmmRclHpUFYtojBgJmyoafwAYNCuhhhBSeR5YtAVAZZYc8EE1eR3ViBUx/vld0adY5rdpjLTCPB79+0xAsuZcuHsMb5co4syRf1+YfqBmm+GgFEwCrSKb2DcniJTLzBDH2JxbigXHXRF/C65gO9G7pGZRgcqB7xtZ8pvp5dlbhNmm6M2u5sDL68DGj78W3+MZXRK0soG2yivl8EE9Z1wdadIEo+gtFPKwhpjbj5cmhlb3hm2+cY2cYGz655sQ9i/XMl2B3zqT7ayP2iHPwrV6fUTYxfDDBOIMaY784pZ1DcFf1oibzRwljvcSH1k/B1Lcr7U+7Ax60ydf9vWiZrOeM910MxY5au/ytAb+aVPHZazsXg6q0xWukCEkGEJOYMvH7rBZXAOMVnx9P3v57C9nSRZ7F4mYUFN6ADvYVJZpj/lgCFjNdT6UAi51gdIgj+bpbdm/zXeVkbj1jNFRxbUag+izYHAx1CfoqDLEAYAfJ4G80A6WArN48QA7ymffFJAw0jlSlFjOkJUYRNAj8aMjdsA0HJBXXC1tucdcON7n07zMYOMLpt7+Pu969CVBFWjdqTEO0Yp5BObmAWdq717IrILMdWz1it+FNir3ZDcHBhEGhjANwgsH878/MHNfsMIkv6ixhUpxuQSlcR4deirmwdNoBEBZ5E7Tp5dFWOd+sVIw= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700016)(376014)(7416014)(13003099007)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zG1pbYHHtqqPtsI6A0/Ib3m0GKzLF1IKSUloTvflUjZJAT79xytmFQBsseNtLOxfPpVICT0Hkfqc4z3aAJJJOa17jiP/LpEn3SYPC30dYrImo3ctdy0An4tHPPGcaqkT2kro9qU0VCIiTmYlN7l1+/Js2XQxLWiJSHpM3IpDz4mpYUg8IaHfh80WGiM+wegraydX2IP6pr8qrAr/6rLk4MvRMBABhFPY7AKG3eYHndvJ6DFgWkQ1t9ydXmsQtwcFG9JBVyhjbmripLR0/8nQ+IRcXLjhWvr5jUoWhcrJIzQ0WIvl3/JEfnGkJm+IgU3C/EyIhoKHszEq9wneQQEx5Q9wui7fYcFjqKY6SW573qo/JPq+xWX4aG+zjCzXShK331vtOCzTOuTm5hYSWXTsKjR+cgez+Y+SlJeoSW4IBx+deSmzsXlNQobCc87IvUHK X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2026 09:48:21.3886 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bb15d2f0-59d5-448e-fdb8-08dea69d9d6e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001508.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4164 Content-Type: text/plain; charset="utf-8" From: Peter Zijlstra Futex hash computation requires a mask operation with read-only after init data that will be converted to a runtime constant in the subsequent commit. Introduce runtime_const_mask_32 to further optimize the mask operation in the futex hash computation hot path. [ prateek: Broke off the x86 chunk, commit message. ] Link: https://patch.msgid.link/20260227161841.GH606826@noisy.programming.ki= cks-ass.net Not-yet-signed-off-by: Peter Zijlstra Signed-off-by: K Prateek Nayak --- changelog v3..v4: o No changes. --- arch/x86/include/asm/runtime-const.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/x86/include/asm/runtime-const.h b/arch/x86/include/asm/ru= ntime-const.h index 4cd94fdcb45e2..b13f7036c1c9b 100644 --- a/arch/x86/include/asm/runtime-const.h +++ b/arch/x86/include/asm/runtime-const.h @@ -41,6 +41,15 @@ :"+r" (__ret)); \ __ret; }) =20 +#define runtime_const_mask_32(val, sym) ({ \ + typeof(0u+(val)) __ret =3D (val); \ + asm_inline("and $0x12345678, %k0\n1:\n" \ + ".pushsection runtime_mask_" #sym ",\"a\"\n\t"\ + ".long 1b - 4 - .\n" \ + ".popsection" \ + : "+r" (__ret)); \ + __ret; }) + #define runtime_const_init(type, sym) do { \ extern s32 __start_runtime_##type##_##sym[]; \ extern s32 __stop_runtime_##type##_##sym[]; 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charset="utf-8" The current scheme to directly patch the kernel text for runtime constants runs into the following issue with futex adapted to using runtime constants on arm64: Unable to handle kernel write to read-only memory at virtual address ... The pc points to the *p assignment in the following call chain: futex_init() runtime_const_init(shift, __futex_shift) __runtime_fixup_shift() *p =3D cpu_to_le32(insn); which suggests that core_initcall() is too late to patch the kernel text directly unlike the "d_hash_shift" which is initialized during vfs_caches_init_early() before the protections are in place. Use aarch64_insn_patch_text_nosync() to patch the runtime constants instead of doing it directly to allow runtime_const_init() slightly later into the boot. Since aarch64_insn_patch_text_nosync() calls caches_clean_inval_pou() internally, __runtime_fixup_caches() ends up being redundant. runtime_const_init() are rare and the overheads of multiple calls to caches_clean_inval_pou() instead of batching them together should be negligible in practice. The cpu_to_le32() conversion of instruction isn't necessary since it is handled later in the aarch64_insn_patch_text_nosync() call-chain: aarch64_insn_patch_text_nosync(addr, insn) aarch64_insn_write(addr, insn) __aarch64_insn_write(addr, cpu_to_le32(insn)) Sashiko noted that aarch64_insn_patch_text_nosync() does not expect a lm_alias() address and Catalin suggested it is safe to drop the lm_alias() for runtime patching since the kernel text is readable. The address passed to fixup function is interpreted as a __le32 and dereferenced as is to read the opcode at the patch site. No functional changes are intended. Signed-off-by: K Prateek Nayak Reviewed-by: Catalin Marinas --- changelog v3..v4: o Dropped the lm_alias() and use the patch location as is for aarch64_insn_patch_text_nosync(). (Sashiko, Catalin) --- arch/arm64/include/asm/runtime-const.h | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/arch/arm64/include/asm/runtime-const.h b/arch/arm64/include/as= m/runtime-const.h index c3dbd3ae68f69..838145bc289d2 100644 --- a/arch/arm64/include/asm/runtime-const.h +++ b/arch/arm64/include/asm/runtime-const.h @@ -7,6 +7,7 @@ #endif =20 #include +#include =20 /* Sigh. You can still run arm64 in BE mode */ #include @@ -50,34 +51,26 @@ static inline void __runtime_fixup_16(__le32 *p, unsign= ed int val) u32 insn =3D le32_to_cpu(*p); insn &=3D 0xffe0001f; insn |=3D (val & 0xffff) << 5; - *p =3D cpu_to_le32(insn); -} - -static inline void __runtime_fixup_caches(void *where, unsigned int insns) -{ - unsigned long va =3D (unsigned long)where; - caches_clean_inval_pou(va, va + 4*insns); + aarch64_insn_patch_text_nosync(p, insn); } =20 static inline void __runtime_fixup_ptr(void *where, unsigned long val) { - __le32 *p =3D lm_alias(where); + __le32 *p =3D where; __runtime_fixup_16(p, val); __runtime_fixup_16(p+1, val >> 16); __runtime_fixup_16(p+2, val >> 32); __runtime_fixup_16(p+3, val >> 48); - __runtime_fixup_caches(where, 4); } =20 /* Immediate value is 6 bits starting at bit #16 */ static inline void __runtime_fixup_shift(void *where, unsigned long val) { - __le32 *p =3D lm_alias(where); + __le32 *p =3D where; u32 insn =3D le32_to_cpu(*p); insn &=3D 0xffc0ffff; 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charset="utf-8" Futex hash computation requires a mask operation with read-only after init data that will be converted to a runtime constant in the subsequent commit. Introduce runtime_const_mask_32 to further optimize the mask operation in the futex hash computation hot path. GCC generates a: movz w1, #lo16, lsl #0 // w1 =3D bits [15:0] movk w1, #hi16, lsl #16 // w1 =3D full 32-bit value and w0, w0, w1 // w0 =3D w0 & w1 pattern to tackle arbitrary 32-bit masks and the same was also suggested by Claude which is implemented here. The final (__ret & mask) operation is intentiaonally placed outside of asm block to allow compilers to further optimize it if possible. __runtime_fixup_ptr() already patches a "movz, + movk lsl #16" sequence which has been reused to patch the same sequence for __runtime_fixup_mask(). Assisted-by: Claude:claude-sonnet-4-5 Signed-off-by: K Prateek Nayak Reviewed-by: Catalin Marinas --- changelog v3..v4: o Reverted back to using __ret as the macro variable to prevent collision with local varaibles at callsite. (Sashiko) o Separated out the & operation to prevent any confusion with operator precedence id "val" is an expression. (Sashiko) --- arch/arm64/include/asm/runtime-const.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/include/asm/runtime-const.h b/arch/arm64/include/as= m/runtime-const.h index 838145bc289d2..1db4faac8c373 100644 --- a/arch/arm64/include/asm/runtime-const.h +++ b/arch/arm64/include/asm/runtime-const.h @@ -36,6 +36,18 @@ :"r" (0u+(val))); \ __ret; }) =20 +#define runtime_const_mask_32(val, sym) ({ \ + unsigned long __ret; \ + asm_inline("1:\t" \ + "movz %w0, #0xcdef\n\t" \ + "movk %w0, #0x89ab, lsl #16\n\t" \ + ".pushsection runtime_mask_" #sym ",\"a\"\n\t" \ + ".long 1b - .\n\t" \ + ".popsection" \ + :"=3Dr" (__ret)); \ + __ret &=3D val; /* Allow compiler to optimize & op. */ \ + __ret; }) + #define runtime_const_init(type, sym) do { \ extern s32 __start_runtime_##type##_##sym[]; \ extern s32 __stop_runtime_##type##_##sym[]; \ @@ -73,6 +85,13 @@ static inline void __runtime_fixup_shift(void *where, un= signed long val) aarch64_insn_patch_text_nosync(p, insn); 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charset="utf-8" Define the placeholder used for lui + addi[w] patching sequence as RUNTIME_MAGIC and use that instead of open coding the constants in the inline assembly. No functional changes intended. Suggested-by: Guo Ren Signed-off-by: K Prateek Nayak --- changelog v3..v4: o New patch based on suggestions from Guo. (Thank you!) --- arch/riscv/include/asm/runtime-const.h | 38 ++++++++++++++------------ 1 file changed, 20 insertions(+), 18 deletions(-) diff --git a/arch/riscv/include/asm/runtime-const.h b/arch/riscv/include/as= m/runtime-const.h index 900db0a103d05..1ce02605d2e43 100644 --- a/arch/riscv/include/asm/runtime-const.h +++ b/arch/riscv/include/asm/runtime-const.h @@ -15,21 +15,23 @@ =20 #include =20 +#define RUNTIME_MAGIC __ASM_STR(0x89ABCDEF) + #ifdef CONFIG_32BIT -#define runtime_const_ptr(sym) \ -({ \ - typeof(sym) __ret; \ - asm_inline(".option push\n\t" \ - ".option norvc\n\t" \ - "1:\t" \ - "lui %[__ret],0x89abd\n\t" \ - "addi %[__ret],%[__ret],-0x211\n\t" \ - ".option pop\n\t" \ - ".pushsection runtime_ptr_" #sym ",\"a\"\n\t" \ - ".long 1b - .\n\t" \ - ".popsection" \ - : [__ret] "=3Dr" (__ret)); \ - __ret; \ +#define runtime_const_ptr(sym) \ +({ \ + typeof(sym) __ret; \ + asm_inline(".option push\n\t" \ + ".option norvc\n\t" \ + "1:\t" \ + "lui %[__ret], %%hi(" RUNTIME_MAGIC ")\n\t" \ + "addi %[__ret],%[__ret], %%lo(" RUNTIME_MAGIC ")\n\t" \ + ".option pop\n\t" \ + ".pushsection runtime_ptr_" #sym ",\"a\"\n\t" \ + ".long 1b - .\n\t" \ + ".popsection" \ + : [__ret] "=3Dr" (__ret)); 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charset="utf-8" Futex hash computation requires a mask operation with read-only after init data that will be converted to a runtime constant in the subsequent commit. Introduce runtime_const_mask_32 to further optimize the mask operation in the futex hash computation hot path. GCC generates a: lui a0, 0x12346 # upper; +0x800 then >>12 for correct rounding addi a0, a0, 0x678 # lower 12 bits and a1, a1, a0 # a1 =3D a1 & a0 pattern to tackle arbitrary 32-bit masks and the same was also suggested by Claude which is implemented here. The final (__ret & val) operation is intentionally placed outside of asm block to allow compilers to further optimize it if possible. __runtime_fixup_ptr() already patches a "lui + addi" sequence which has been reused to patch the same sequence for __runtime_fixup_mask(). Assisted-by: Claude:claude-sonnet-4-5 Signed-off-by: K Prateek Nayak --- changelog v3..v4: o Reverted back to using __ret as the macro variable to prevent collision with local varaibles at callsite. (Sashiko) o Separated out the & operation to prevent any confusion with operator precedence id "val" is an expression. (Sashiko) --- arch/riscv/include/asm/runtime-const.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/riscv/include/asm/runtime-const.h b/arch/riscv/include/as= m/runtime-const.h index 1ce02605d2e43..684641cb0fe82 100644 --- a/arch/riscv/include/asm/runtime-const.h +++ b/arch/riscv/include/asm/runtime-const.h @@ -159,6 +159,23 @@ __ret; \ }) =20 +#define runtime_const_mask_32(val, sym) \ +({ \ + u32 __ret; \ + asm_inline(".option push\n\t" \ + ".option norvc\n\t" \ + "1:\t" \ + "lui %[__ret], %%hi(" RUNTIME_MAGIC ")\n\t" \ + "addi %[__ret],%[__ret], %%lo(" RUNTIME_MAGIC ")\n\t" \ + ".option pop\n\t" \ + ".pushsection runtime_mask_" #sym ",\"a\"\n\t" \ + ".long 1b - .\n\t" \ + ".popsection" \ + : [__ret] "=3Dr" (__ret)); \ + __ret &=3D val; /* Allow compiler to optimize & operation. */ \ + __ret; \ +}) + #define runtime_const_init(type, sym) do { \ extern s32 __start_runtime_##type##_##sym[]; \ extern s32 __stop_runtime_##type##_##sym[]; \ @@ -262,6 +279,12 @@ static inline void __runtime_fixup_shift(void *where, = unsigned long val) mutex_unlock(&text_mutex); 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charset="utf-8" Futex hash computation requires a mask operation with read-only after init data that will be converted to a runtime constant in the subsequent commit. Introduce runtime_const_mask_32 to further optimize the mask operation in the futex hash computation hot path. GCC generates a: nilf %r1, to tackle arbitrary 32-bit masks and the same is implemented here. Immediate patching pattern for __runtime_fixup_mask() has been adopted from __runtime_fixup_ptr(). Acked-by: Heiko Carstens Signed-off-by: K Prateek Nayak --- changelog v3..v4: o No changes. --- arch/s390/include/asm/runtime-const.h | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/s390/include/asm/runtime-const.h b/arch/s390/include/asm/= runtime-const.h index 17878b1d048cf..7b71156031ecb 100644 --- a/arch/s390/include/asm/runtime-const.h +++ b/arch/s390/include/asm/runtime-const.h @@ -33,6 +33,20 @@ __ret; \ }) =20 +#define runtime_const_mask_32(val, sym) \ +({ \ + unsigned int __ret =3D (val); \ + \ + asm_inline( \ + "0: nilf %[__ret],12\n" \ + ".pushsection runtime_mask_" #sym ",\"a\"\n" \ + ".long 0b - .\n" \ + ".popsection" \ + : [__ret] "+d" (__ret) \ + : : "cc"); \ + __ret; \ +}) + #define runtime_const_init(type, sym) do { \ extern s32 __start_runtime_##type##_##sym[]; \ extern s32 __stop_runtime_##type##_##sym[]; \ @@ -43,12 +57,12 @@ __stop_runtime_##type##_##sym); \ } while (0) =20 -/* 32-bit immediate for iihf and iilf in bits in I2 field */ static inline void __runtime_fixup_32(u32 *p, unsigned int val) { s390_kernel_write(p, &val, sizeof(val)); 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charset="utf-8" From: Peter Zijlstra Add a dummy runtime_const_mask_32() for all the architectures that do not support runtime-const. Link: https://patch.msgid.link/20260227161841.GH606826@noisy.programming.ki= cks-ass.net Not-yet-signed-off-by: Peter Zijlstra Signed-off-by: K Prateek Nayak --- changelog v3..v4: o No changes. --- include/asm-generic/runtime-const.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/asm-generic/runtime-const.h b/include/asm-generic/runt= ime-const.h index 6704994595145..03e6e3e02401e 100644 --- a/include/asm-generic/runtime-const.h +++ b/include/asm-generic/runtime-const.h @@ -10,6 +10,7 @@ */ #define runtime_const_ptr(sym) (sym) #define runtime_const_shift_right_32(val, sym) ((u32)(val)>>(sym)) +#define runtime_const_mask_32(val, sym) ((u32)(val)&(sym)) #define runtime_const_init(type,sym) do { } while (0) =20 #endif --=20 2.34.1 From nobody Thu Jun 11 12:16:36 2026 Received: from SN4PR0501CU005.outbound.protection.outlook.com (mail-southcentralusazon11011039.outbound.protection.outlook.com [40.93.194.39]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA8CA3A75A1; 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Thu, 30 Apr 2026 04:50:22 -0500 From: K Prateek Nayak To: Thomas Gleixner , Ingo Molnar , "Peter Zijlstra" , Sebastian Andrzej Siewior , Borislav Petkov , Dave Hansen , , Catalin Marinas , Will Deacon , Paul Walmsley , Palmer Dabbelt , Albert Ou , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , "Arnd Bergmann" , Guo Ren CC: Darren Hart , Davidlohr Bueso , =?UTF-8?q?Andr=C3=A9=20Almeida?= , , , , , , K Prateek Nayak , "H. Peter Anvin" , Thomas Huth , Sean Christopherson , Jisheng Zhang , Alexandre Ghiti , Charlie Jenkins , Charles Mirabile , "Christian Borntraeger" , Sven Schnelle Subject: [PATCH v4 8/8] futex: Use runtime constants for __futex_hash() hot path Date: Thu, 30 Apr 2026 09:47:30 +0000 Message-ID: <20260430094730.31624-9-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260430094730.31624-1-kprateek.nayak@amd.com> References: <20260430094730.31624-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM2PEPF00003FC8:EE_|PH8PR12MB7304:EE_ X-MS-Office365-Filtering-Correlation-Id: 18efc1ad-5752-4777-09fc-08dea69deb1c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|7416014|376014|82310400026|1800799024|22082099003|56012099003|18002099003|13003099007|921020; X-Microsoft-Antispam-Message-Info: vfCzn0of+eSGpF9ucSwW1ql4FmGh6H1EIkzxcP8bi0lluB62XBT8y1nDXrjLHgiv1ABq+6Y74/2a0NRe1LlbyWuJQonp7rbkzuzPTxtSeO5akcEVg2j4DTAgW6y4x6CreheXreyCzpQ+y8oFIel6KIoqNfCRK/VejPOTVwCWd0ilFq2MzhhB+6LF4WCm8kKemlMLz5i2zuo7WtWC2t2jsfREZ4lX9YWU28Z7tTXDMPq83XH3e3StzXeommEJmP3pCRXjwKa1NZpZEBpi7S7zvNo2fQj2Idv8IKMFZgx1S21mA0QLNA7fmqjEO+bbde9muxrgY2O+iHCqqfYIXcGUqXi7O6NsxSpI8XJAKiwR0dv6RkZO6zrGxHeeT/v3fEUwpWO0pXhQ/CsoefPufApeCaMT7F+cshGBsTFaCfCW2sviCGYum603xPcLNcOGDGwzc4aravw/xbwsQDr3Ki8dWv7NdRT3+Wk47C0WwT6JKmaMaRnMvoDIXfOw4iVfse7Qg224QgVac8zaL0+wFWQjLo6C3+aRIVOpoyh4IxCpCSmWSVQgfn36/NWKzwxpW3AcGWyY5PEF0S/zlvFZA+QEAQWIAFwgctHBI2GV0eWuyeDcfEZ4Uv126vN3qsFp5BmXMua0vaSUDvhNll50/tdptoR1YDsceHPgAHd6l1Nr/QRWd463EAN9C69BLngac00Re51wWocEuFBECWfiom0/8pPr9WeHHjIldZY0v1p5wb4pvOgeadDyLMy8awSK+PO3/SGAW4C6uAadMUAD4GWReg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(7416014)(376014)(82310400026)(1800799024)(22082099003)(56012099003)(18002099003)(13003099007)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ETTEpFS3Ha6S5K96x42sRzM1jMqYiBiRLLmbiw5PZGeyQ0E7uzdd5qf/lDRM8pJ75+5bttPM2i8/BK6sbUe0YHLrtZqO56SwWYoZro+AnT8vJEnTZQXK6slAl6++msoNDkI1ZfUCsg4iaFb1Ikb9JH7nTDuUoduBTvzq0C2voCnfVQCFRi3Dc+6edx8DuS+7obiTnvs6T5RvQH/tTYc2MRl/9dCdxc5/gXX0RXaS08aLOK/c5ZaqDlO0YrmaRUakG8rFFB+seb+bFfxBl5YIu19bWMGIxz0VEnCkbVjbXVl+fPcZB+FSE1SLpoGNB2EKEqCJwMDk2A/z+JPy1i1OKLGb7+3fw5z9+bDsyaWnMKUGHr2h+yua5L0tlCaxXVaNhZfmJMTDYyUSP/bnkrdCPPwbp/FTIB0Qm3lMnSWp9mW8SjTDKrWSqG59st8IXAr5 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2026 09:50:31.6989 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 18efc1ad-5752-4777-09fc-08dea69deb1c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM2PEPF00003FC8.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7304 Content-Type: text/plain; charset="utf-8" From: Peter Zijlstra Runtime constify the read-only after init data __futex_shift(shift_32), __futex_mask(mask_32), and __futex_queues(ptr) used in __futex_hash() hot path to avoid referencing global variable. This also allows __futex_queues to be allocated dynamically to "nr_node_ids" slots instead of reserving config dependent MAX_NUMNODES (1 << CONFIG_NODES_SHIFT) worth of slots upfront. Runtime constants are initialized before their first access and runtime_const_init() provides necessary barrier to ensure subsequent accesses are not reordered against their initialization. No functional changes intended. [ prateek: Dynamically allocate __futex_queues, mark the global data __ro_after_init since they are constified after futex_init(). ] Link: https://patch.msgid.link/20260227161841.GH606826@noisy.programming.ki= cks-ass.net Reported-by: Sebastian Andrzej Siewior # MAX_NUMNOD= ES bloat Not-yet-signed-off-by: Peter Zijlstra Signed-off-by: K Prateek Nayak --- changelog v3..v4: o Added a small note on runtime_const_init() in the commit log based on the concerns highlighted by Sashiko. No changes to the diff. --- include/asm-generic/vmlinux.lds.h | 5 +++- kernel/futex/core.c | 42 +++++++++++++++++-------------- 2 files changed, 27 insertions(+), 20 deletions(-) diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinu= x.lds.h index 60c8c22fd3e44..e80987d8016cc 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -970,7 +970,10 @@ RUNTIME_CONST(ptr, __dentry_cache) \ RUNTIME_CONST(ptr, __names_cache) \ RUNTIME_CONST(ptr, __filp_cache) \ - RUNTIME_CONST(ptr, __bfilp_cache) + RUNTIME_CONST(ptr, __bfilp_cache) \ + RUNTIME_CONST(shift, __futex_shift) \ + RUNTIME_CONST(mask, __futex_mask) \ + RUNTIME_CONST(ptr, __futex_queues) =20 /* Alignment must be consistent with (kunit_suite *) in include/kunit/test= .h */ #define KUNIT_TABLE() \ diff --git a/kernel/futex/core.c b/kernel/futex/core.c index ff2a4fb2993f0..73eade7184dc2 100644 --- a/kernel/futex/core.c +++ b/kernel/futex/core.c @@ -45,23 +45,19 @@ #include #include =20 +#include + #include "futex.h" #include "../locking/rtmutex_common.h" =20 -/* - * The base of the bucket array and its size are always used together - * (after initialization only in futex_hash()), so ensure that they - * reside in the same cacheline. - */ -static struct { - unsigned long hashmask; - unsigned int hashshift; - struct futex_hash_bucket *queues[MAX_NUMNODES]; -} __futex_data __read_mostly __aligned(2*sizeof(long)); +static u32 __futex_mask __ro_after_init; +static u32 __futex_shift __ro_after_init; +static struct futex_hash_bucket **__futex_queues __ro_after_init; =20 -#define futex_hashmask (__futex_data.hashmask) -#define futex_hashshift (__futex_data.hashshift) -#define futex_queues (__futex_data.queues) +static __always_inline struct futex_hash_bucket **futex_queues(void) +{ + return runtime_const_ptr(__futex_queues); +} =20 struct futex_private_hash { int state; @@ -439,14 +435,14 @@ __futex_hash(union futex_key *key, struct futex_priva= te_hash *fph) * NOTE: this isn't perfectly uniform, but it is fast and * handles sparse node masks. */ - node =3D (hash >> futex_hashshift) % nr_node_ids; + node =3D runtime_const_shift_right_32(hash, __futex_shift) % nr_node_ids; if (!node_possible(node)) { node =3D find_next_bit_wrap(node_possible_map.bits, nr_node_ids, node); } } =20 - return &futex_queues[node][hash & futex_hashmask]; + return &futex_queues()[node][runtime_const_mask_32(hash, __futex_mask)]; } =20 /** @@ -1916,7 +1912,7 @@ int futex_hash_allocate_default(void) * 16 <=3D threads * 4 <=3D global hash size */ buckets =3D roundup_pow_of_two(4 * threads); - buckets =3D clamp(buckets, 16, futex_hashmask + 1); + buckets =3D clamp(buckets, 16, __futex_mask + 1); =20 if (current_buckets >=3D buckets) return 0; @@ -1986,10 +1982,19 @@ static int __init futex_init(void) hashsize =3D max(4, hashsize); hashsize =3D roundup_pow_of_two(hashsize); #endif - futex_hashshift =3D ilog2(hashsize); + __futex_mask =3D hashsize - 1; + __futex_shift =3D ilog2(hashsize); size =3D sizeof(struct futex_hash_bucket) * hashsize; order =3D get_order(size); =20 + __futex_queues =3D kcalloc(nr_node_ids, sizeof(*__futex_queues), GFP_KERN= EL); + + runtime_const_init(shift, __futex_shift); + runtime_const_init(mask, __futex_mask); + runtime_const_init(ptr, __futex_queues); + + BUG_ON(!futex_queues()); + for_each_node(n) { struct futex_hash_bucket *table; =20 @@ -2003,10 +2008,9 @@ static int __init futex_init(void) for (i =3D 0; i < hashsize; i++) futex_hash_bucket_init(&table[i], NULL); =20 - futex_queues[n] =3D table; + futex_queues()[n] =3D table; } =20 - futex_hashmask =3D hashsize - 1; pr_info("futex hash table entries: %lu (%lu bytes on %d NUMA nodes, total= %lu KiB, %s).\n", hashsize, size, num_possible_nodes(), size * num_possible_nodes() / 1024, order > MAX_PAGE_ORDER ? "vmalloc" : "linear"); --=20 2.34.1