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Wed, 29 Apr 2026 22:45:13 -0700 (PDT) Received: from hu-priyjain-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c7fd64f21cbsm3955231a12.19.2026.04.29.22.45.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2026 22:45:13 -0700 (PDT) From: Priyansh Jain To: Amit Kucheria , Thara Gopinath , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba Cc: linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, manaf.pallikunhi@oss.qualcomm.com, Priyansh Jain Subject: [PATCH 1/2] thermal: qcom: tsens: atomic temperature read with hardware-guided retries Date: Thu, 30 Apr 2026 11:14:20 +0530 Message-ID: <20260430054422.2461150-2-priyansh.jain@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260430054422.2461150-1-priyansh.jain@oss.qualcomm.com> References: <20260430054422.2461150-1-priyansh.jain@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: YOoU8MacziasNlVl25q34g_CZMvlsN1Q X-Authority-Analysis: v=2.4 cv=A4dc+aWG c=1 sm=1 tr=0 ts=69f2ec6b cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=X5CxAMeF2Cgji5W92k0A:9 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-ORIG-GUID: YOoU8MacziasNlVl25q34g_CZMvlsN1Q X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDMwMDA1MyBTYWx0ZWRfX+VnQXvbFQ+fV q8tpK4Am8dSueROpQCtK06D2dcTdJjVikiY0l9Kv/03KMKls/ExMb0jWHpx8QBsYQhHRx/ms1k3 gRmDDiBzZcjXbFmW1dcMNg8FlX5HephGXV+3jdIflbgXFymK1XWoE8vQexpcGTlWMNyRIL7wqRj pmZlvxAhWvE7y9K99+J5PJcpZdT6X3kU9Nnr1a84Jd/WhtyuayNcVHhAj/vtHn3Uj4Y85PKcmF7 2fNVVYFX3lhPqMUlsKa68CEM3KAWXoTQneiVst0+VAtbRWdtjvBwZ2P3/11nfKkMw4nDUQWFySN gNNEVYWFbh4EROe7ySQ0ECrotkTeqBD/L9Depc6/ablnPjMwjGNQdAzuUhRIlya6CA8neToIDYP O202yjAOM93Pl+n9JnKiGt/fgLbk+y7klrCHG9wq8NuZW2qQkzX1f9XJDzjYX5/G/hGH82qpB37 nxqcu+t3GfxF8vEwEXA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-30_01,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604300053 Content-Type: text/plain; charset="utf-8" The existing TSENS temperature read logic polls the valid bit and then reads the temperature register. When temperature reads are triggered at very short intervals, this can race with hardware updates and allow the temperature field to be read while it is still being updated. In this case, the valid bit may already be asserted even though the temperature value is transitioning, resulting in an incorrect reading. Hardware programming guidelines require the temperature value and the valid bit to be sampled atomically in the same read transaction. A reading is considered valid only if the valid bit is observed set in that same sample. The guidelines further specify that software should attempt the temperature read up to three times to account for transient update windows. If none of the attempts observe a valid sample, a stable fallback value must be returned: if the first and second samples match, the second value is returned; otherwise, if the second and third samples match, the third value is returned. Update the TSENS sensor read logic to implement atomic sampling along with the recommended retry-and-compare fallback behavior. This removes the race window and ensures deterministic temperature values in accordance with hardware requirements. Signed-off-by: Priyansh Jain --- drivers/thermal/qcom/tsens-v1.c | 6 +- drivers/thermal/qcom/tsens-v2.c | 6 +- drivers/thermal/qcom/tsens.c | 118 +++++++++++++++++++++----------- drivers/thermal/qcom/tsens.h | 22 ++---- 4 files changed, 91 insertions(+), 61 deletions(-) diff --git a/drivers/thermal/qcom/tsens-v1.c b/drivers/thermal/qcom/tsens-v= 1.c index faa5d00788ca..2e0a01348c48 100644 --- a/drivers/thermal/qcom/tsens-v1.c +++ b/drivers/thermal/qcom/tsens-v1.c @@ -77,6 +77,9 @@ static struct tsens_features tsens_v1_feat =3D { .max_sensors =3D 11, .trip_min_temp =3D -40000, .trip_max_temp =3D 120000, + .valid_bit =3D BIT(14), + .last_temp_mask =3D 0x3FF, + .last_temp_resolution =3D 9, }; =20 static struct tsens_features tsens_v1_no_rpm_feat =3D { @@ -132,8 +135,7 @@ static const struct reg_field tsens_v1_regfields[MAX_RE= GFIELDS] =3D { /* NO CRITICAL INTERRUPT SUPPORT on v1 */ =20 /* Sn_STATUS */ - REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 9), - REG_FIELD_FOR_EACH_SENSOR11(VALID, TM_Sn_STATUS_OFF, 14, 14), + REG_FIELD_FOR_EACH_SENSOR11(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 14), /* xxx_STATUS bits: 1 =3D=3D threshold violated */ REG_FIELD_FOR_EACH_SENSOR11(MIN_STATUS, TM_Sn_STATUS_OFF, 10, 10), REG_FIELD_FOR_EACH_SENSOR11(LOWER_STATUS, TM_Sn_STATUS_OFF, 11, 11), diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v= 2.c index 8d9698ea3ec4..814147735ba5 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -56,6 +56,9 @@ static struct tsens_features tsens_v2_feat =3D { .max_sensors =3D 16, .trip_min_temp =3D -40000, .trip_max_temp =3D 120000, + .valid_bit =3D BIT(21), + .last_temp_mask =3D 0xFFF, + .last_temp_resolution =3D 11, }; =20 static struct tsens_features ipq8074_feat =3D { @@ -125,8 +128,7 @@ static const struct reg_field tsens_v2_regfields[MAX_RE= GFIELDS] =3D { [WDOG_BARK_COUNT] =3D REG_FIELD(TM_WDOG_LOG_OFF, 0, 7), =20 /* Sn_STATUS */ - REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 11), - REG_FIELD_FOR_EACH_SENSOR16(VALID, TM_Sn_STATUS_OFF, 21, 21), + REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 21), /* xxx_STATUS bits: 1 =3D=3D threshold violated */ REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS, TM_Sn_STATUS_OFF, 16, 16), REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS, TM_Sn_STATUS_OFF, 17, 17), diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c index a2422ebee816..15392a17ef41 100644 --- a/drivers/thermal/qcom/tsens.c +++ b/drivers/thermal/qcom/tsens.c @@ -315,10 +315,66 @@ static inline int code_to_degc(u32 adc_code, const st= ruct tsens_sensor *s) return degc; } =20 +static inline enum tsens_ver tsens_version(struct tsens_priv *priv) +{ + return priv->feat->ver_major; +} + +/** + * tsens_read_temp - To read temperature from hw in deciCelsius. + * @s: Pointer to sensor struct + * @field: Index into regmap_field array pointing to temperature data + * @temp: temperature in deciCelsius to be read from hardware + * + * This function handles temperature returned in ADC code or deciCelsius + * depending on IP version. + * + * Return: 0 on success, a negative errno will be returned in error cases + */ +static int tsens_read_temp(const struct tsens_sensor *s, int field, int *t= emp) +{ + struct tsens_priv *priv =3D s->priv; + int temp_val[3] =3D {0}; + unsigned int status =3D 0; + int ret =3D 0, i; + int max_retry =3D 3; + + ret =3D regmap_field_read(priv->rf[field], &status); + if (ret) + return ret; + + /* VER_0 doesn't have VALID bit */ + if (tsens_version(priv) =3D=3D VER_0) { + *temp =3D status; + return ret; + } + + for (i =3D 0; i < max_retry; i++) { + temp_val[i] =3D status & priv->feat->last_temp_mask; + if (status & priv->feat->valid_bit) { + *temp =3D temp_val[i]; + return ret; + } + ret =3D regmap_field_read(priv->rf[field], &status); + if (ret) + return ret; + } + + if (temp_val[0] =3D=3D temp_val[1]) + *temp =3D temp_val[1]; + else if (temp_val[1] =3D=3D temp_val[2]) + *temp =3D temp_val[2]; + else + return -EAGAIN; + + return ret; +} + /** * tsens_hw_to_mC - Return sign-extended temperature in mCelsius. * @s: Pointer to sensor struct * @field: Index into regmap_field array pointing to temperature data + * @temp: temperature in milliCelsius to be read from hardware * * This function handles temperature returned in ADC code or deciCelsius * depending on IP version. @@ -326,19 +382,12 @@ static inline int code_to_degc(u32 adc_code, const st= ruct tsens_sensor *s) * Return: Temperature in milliCelsius on success, a negative errno will * be returned in error cases */ -static int tsens_hw_to_mC(const struct tsens_sensor *s, int field) +static int tsens_hw_to_mC(const struct tsens_sensor *s, int temp) { struct tsens_priv *priv =3D s->priv; u32 resolution; - u32 temp =3D 0; - int ret; =20 - resolution =3D priv->fields[LAST_TEMP_0].msb - - priv->fields[LAST_TEMP_0].lsb; - - ret =3D regmap_field_read(priv->rf[field], &temp); - if (ret) - return ret; + resolution =3D priv->feat->last_temp_resolution; =20 /* Convert temperature from ADC code to milliCelsius */ if (priv->feat->adc) @@ -370,11 +419,6 @@ static int tsens_mC_to_hw(const struct tsens_sensor *s= , int temp) return temp / 100; } =20 -static inline enum tsens_ver tsens_version(struct tsens_priv *priv) -{ - return priv->feat->ver_major; -} - static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id, enum tsens_irq_type irq_type, bool enable) { @@ -514,8 +558,12 @@ static int tsens_read_irq_state(struct tsens_priv *pri= v, u32 hw_id, &d->crit_irq_mask); if (ret) return ret; - - d->crit_thresh =3D tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id); + ret =3D regmap_field_read(priv->rf[CRIT_THRESH_0 + hw_id], &d->crit_thre= sh); + if (ret) + return ret; + d->crit_thresh =3D tsens_hw_to_mC(s, d->crit_thresh); + if (ret) + return ret; } else { /* No mask register on older TSENS */ d->up_irq_mask =3D 0; @@ -524,9 +572,14 @@ static int tsens_read_irq_state(struct tsens_priv *pri= v, u32 hw_id, d->crit_irq_mask =3D 0; d->crit_thresh =3D 0; } - - d->up_thresh =3D tsens_hw_to_mC(s, UP_THRESH_0 + hw_id); - d->low_thresh =3D tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id); + ret =3D regmap_field_read(priv->rf[UP_THRESH_0 + hw_id], &d->up_thresh); + if (ret) + return ret; + d->up_thresh =3D tsens_hw_to_mC(s, d->up_thresh); + ret =3D regmap_field_read(priv->rf[LOW_THRESH_0 + hw_id], &d->low_thresh); + if (ret) + return ret; + d->low_thresh =3D tsens_hw_to_mC(s, d->low_thresh); =20 dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u|%u) | clr(%u|%u|%u) | mask(%u= |%u|%u)\n", hw_id, __func__, @@ -750,33 +803,16 @@ static void tsens_disable_irq(struct tsens_priv *priv) =20 int get_temp_tsens_valid(const struct tsens_sensor *s, int *temp) { - struct tsens_priv *priv =3D s->priv; + int ret; int hw_id =3D s->hw_id; u32 temp_idx =3D LAST_TEMP_0 + hw_id; - u32 valid_idx =3D VALID_0 + hw_id; - u32 valid; - int ret; - - /* VER_0 doesn't have VALID bit */ - if (tsens_version(priv) =3D=3D VER_0) - goto get_temp; =20 - /* Valid bit is 0 for 6 AHB clock cycles. - * At 19.2MHz, 1 AHB clock is ~60ns. - * We should enter this loop very, very rarely. - * Wait 1 us since it's the min of poll_timeout macro. - * Old value was 400 ns. - */ - ret =3D regmap_field_read_poll_timeout(priv->rf[valid_idx], valid, - valid, 1, 20 * USEC_PER_MSEC); - if (ret) - return ret; + ret =3D tsens_read_temp(s, temp_idx, temp); =20 -get_temp: - /* Valid bit is set, OK to read the temperature */ - *temp =3D tsens_hw_to_mC(s, temp_idx); + if (!ret) + *temp =3D tsens_hw_to_mC(s, *temp); =20 - return 0; + return ret; } =20 int get_temp_common(const struct tsens_sensor *s, int *temp) diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 2a7afa4c899b..f346557b0a8a 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -194,22 +194,6 @@ enum regfield_ids { LAST_TEMP_13, LAST_TEMP_14, LAST_TEMP_15, - VALID_0, /* VALID reading or not */ - VALID_1, - VALID_2, - VALID_3, - VALID_4, - VALID_5, - VALID_6, - VALID_7, - VALID_8, - VALID_9, - VALID_10, - VALID_11, - VALID_12, - VALID_13, - VALID_14, - VALID_15, LOWER_STATUS_0, /* LOWER threshold violated */ LOWER_STATUS_1, LOWER_STATUS_2, @@ -511,6 +495,9 @@ enum regfield_ids { * @max_sensors: maximum sensors supported by this version of the IP * @trip_min_temp: minimum trip temperature supported by this version of t= he IP * @trip_max_temp: maximum trip temperature supported by this version of t= he IP + * @valid_bit: validate if read temperature is valid or not? + * @last_temp_mask: mask register for last temperature + * @last_temp_resolution: last temperarure sign bit resolution */ struct tsens_features { unsigned int ver_major; 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba Cc: linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, manaf.pallikunhi@oss.qualcomm.com, Priyansh Jain Subject: [PATCH 2/2] thermal: qcom: tsens: widen temperature limits to match hardware range Date: Thu, 30 Apr 2026 11:14:21 +0530 Message-ID: <20260430054422.2461150-3-priyansh.jain@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260430054422.2461150-1-priyansh.jain@oss.qualcomm.com> References: <20260430054422.2461150-1-priyansh.jain@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: _ha78T1XvXYXhh178op72MUUuJ1IW9X_ X-Proofpoint-GUID: _ha78T1XvXYXhh178op72MUUuJ1IW9X_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDMwMDA1MyBTYWx0ZWRfX1Mv9dLCeEJ8Q BypLt+4/Rk4ta4tE/Px8pjGGeMjCh9WIRraIarU8GFD7N0H5Azc7+GmLseO7jK23RoW7YbBuKtX DXXuSp8e7+NSTluXLXlxWboAFhOEVCk9bJkcKG/f13R8d1gx+K0WKnnN1OiXkmTd5u9w0xWrxn1 cPUrECws9p7xds+HUfr6uV2XPj8zEdQKHfSooHu8h4Jafa6B3TLY4sXARuROJMw+mkwhHDnF9rc 1xcx9X/uEQ/LvhjCGNUdEZOYG+yhIvmPvJrbo6N0fPEG2Gdv4dLSyYnQlsp5+CNd7167l9P1prX yfd39xCFahZewe/k+DOFXXCtjIR633s2NUKwAs7L5P7WWFakcqEfgQ/UPJo4gcOXHIJW57AAJa3 NLtO5Swf6DOdT2N8pxBqc9SKoAq2YQ3sx/IyXAmbMYKeW3N4fK4scJsXykNo07kz1HIh9J7zN/+ n7+vkBpH+Gt6vJr8NTA== X-Authority-Analysis: v=2.4 cv=Fpo1OWrq c=1 sm=1 tr=0 ts=69f2ec71 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=7FrdJh-Z1z6zKSyd9LYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-30_01,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 suspectscore=0 malwarescore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604300053 The TSENS v2 software driver currently clamps trip_min_temp and trip_max_temp to -40=C2=B0C and 120=C2=B0C respectively. However, the TSENS v2 hardware temperature threshold registers support a wider programmable range from -204=C2=B0C to +204=C2=B0C. On newer chipsets using TSENS v2, devices may legitimately operate beyond the existing software limits (for example, up to 130=C2=B0C). When a trip temperature is programmed outside the software clamped range, it is constrained to 120=C2=B0C on the upper end or -40=C2=B0C on the lower end. If the actual temperature continues to exceed this clamped limit, the threshold is immediately violated again, which can result in a continuous interrupt storm. Expand the TSENS v2 software trip temperature limits to match the full hardware supported range (-204=C2=B0C to +204=C2=B0C). This avoids repeated threshold reprogramming and ensures correct trip handling on TSENS v2 based platforms. Signed-off-by: Priyansh Jain --- drivers/thermal/qcom/tsens-v2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v= 2.c index 814147735ba5..3bd654c8dd6e 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -54,8 +54,8 @@ static struct tsens_features tsens_v2_feat =3D { .adc =3D 0, .srot_split =3D 1, .max_sensors =3D 16, - .trip_min_temp =3D -40000, - .trip_max_temp =3D 120000, + .trip_min_temp =3D -204000, + .trip_max_temp =3D 204000, .valid_bit =3D BIT(21), .last_temp_mask =3D 0xFFF, .last_temp_resolution =3D 11, --=20 2.43.0