From nobody Tue Jun 16 20:39:02 2026 Received: from ultrarisc.com (unknown [218.76.62.146]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C8CCA3B635B; Wed, 29 Apr 2026 09:05:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=218.76.62.146 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777453542; cv=none; b=jtZCCf2Np2R5gRbeoYrDM9u7vLuC/wmBLjTZXu3qyb0tAxSbAKhXazovZQPwfsSznaLl4QplGUsRz/tOQO1E4+Ndm6+MSZR/BlBVTXxjEmDc+qUHye85St7iRTNECAwRMhGIE7fFn/bmh2oJwDGx9bZlOAH/gmbpymiFrrg+ISk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777453542; c=relaxed/simple; bh=wAQP+sx727xXQnIObEdZzfFVpnb7D4WO3GVRhswul/M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nWS2wapDMdfJnE1oyj9ObcJwFW8mtm0TNL8knA0DLJFESYDG0FMGl9DM6t3FLKz99L9qpflHA1w/iT7PRo29cUe9eUGQlviM9MAoqnkKOwH2op9pWbfRWn49YncJfIgHbZCvbDThlDI3jBS2YKQOWPfJQCLFocEyRtRNkFs7hN8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ultrarisc.com; spf=none smtp.mailfrom=ultrarisc.com; dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com header.b=F5Ylgi3T; arc=none smtp.client-ip=218.76.62.146 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ultrarisc.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=ultrarisc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com header.b="F5Ylgi3T" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ultrarisc.com; s=dkim; h=Received:From:Date:Subject: MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id: References:In-Reply-To:To:Cc; bh=FnpYgmI4IXJfeFt3b31k6g1C+jKERLb RnA9mX5P+fmo=; b=F5Ylgi3TNn3F5w5R+O85uzhU5KsNTuBcO9v6aEMiDabJsc3 FkNN4lJ5csm/9YgAAU9L4u62skBTyaMm9y3L9mdVDtbFXJonZ14m4G9JxFF4Sa37 j7eYVIrEqvhGusRF+dTT+u4Vqo8fGidh39oj9IYXDMLXs0RO9lWFabUfD30g= Received: from [127.0.0.1] (unknown [192.168.100.1]) by localhost.localdomain (Coremail) with SMTP id AQAAfwAnYUL1yfFp_SQDAA--.1731S3; Wed, 29 Apr 2026 17:05:58 +0800 (CST) From: Jia Wang Date: Wed, 29 Apr 2026 17:05:13 +0800 Subject: [PATCH v6 1/4] serial: 8250_dwlib: move DesignWare register definitions to header Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-ultrarisc-serial-v6-1-b2c852e0c4c3@ultrarisc.com> References: <20260429-ultrarisc-serial-v6-0-b2c852e0c4c3@ultrarisc.com> In-Reply-To: <20260429-ultrarisc-serial-v6-0-b2c852e0c4c3@ultrarisc.com> To: =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Greg Kroah-Hartman , Jiri Slaby , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Jia Wang X-Mailer: b4 0.15-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1777453513; l=7310; i=wangjia@ultrarisc.com; s=20260309; h=from:subject:message-id; bh=wAQP+sx727xXQnIObEdZzfFVpnb7D4WO3GVRhswul/M=; b=J52S5ko2ezy1DlbGl1RsHsaAtUxQNAO55mPsiTUOgZ+A7FiTBndQ36/G2k8cWpH8NSG2W36Kq zJ0p6P6EbjYDMkQQ7Sn4GbAhnp/0bubYPZdgpeUfp4XPCrprj90RZKw X-Developer-Key: i=wangjia@ultrarisc.com; a=ed25519; pk=XvYkrelqJIIzobY7j+nIg8rsfv5kzaOzuc1UPhd087U= X-CM-TRANSID: AQAAfwAnYUL1yfFp_SQDAA--.1731S3 X-Coremail-Antispam: 1UD129KBjvJXoW3WF48Gw1UCr1Dur45JF1UKFg_yoW3XF4kpF 1FkFZ8tF1qya13W34xtFW3tr4xXFWxGw1I9ry3W3yDtF48A34ktFyYvFW3tr4DWryrArWU XF1UAw4Y9a4I9r7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: pzdqwylld63zxwud2x1vfou0bp/1tbiAQAKEWnti78ACwA-se Move the DW_UART_* register offsets and CPR bit/field definitions from 8250_dwlib.c into 8250_dwlib.h so they can be shared by 8250_dw and 8250_dwlib users. Add an include guard for 8250_dwlib.h. Signed-off-by: Jia Wang Reviewed-by: Andy Shevchenko Reviewed-by: Ilpo J=C3=A4rvinen --- drivers/tty/serial/8250/8250_dw.c | 11 ------ drivers/tty/serial/8250/8250_dwlib.c | 49 -------------------------- drivers/tty/serial/8250/8250_dwlib.h | 67 ++++++++++++++++++++++++++++++++= ++++ 3 files changed, 67 insertions(+), 60 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index 94beadb4024d..467755bf0092 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -34,22 +34,11 @@ =20 #include "8250_dwlib.h" =20 -/* Offsets for the DesignWare specific registers */ -#define DW_UART_USR 0x1f /* UART Status Register */ -#define DW_UART_DMASA 0xa8 /* DMA Software Ack */ - #define OCTEON_UART_USR 0x27 /* UART Status Register */ =20 #define RZN1_UART_TDMACR 0x10c /* DMA Control Register Transmit Mode */ #define RZN1_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */ =20 -/* DesignWare specific register fields */ -#define DW_UART_IIR_IID GENMASK(3, 0) - -#define DW_UART_MCR_SIRE BIT(6) - -#define DW_UART_USR_BUSY BIT(0) - /* Renesas specific register fields */ #define RZN1_UART_xDMACR_DMA_EN BIT(0) #define RZN1_UART_xDMACR_1_WORD_BURST (0 << 1) diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250= /8250_dwlib.c index b055d89cfb39..8859e66d2d71 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -13,55 +13,6 @@ =20 #include "8250_dwlib.h" =20 -/* Offsets for the DesignWare specific registers */ -#define DW_UART_TCR 0xac /* Transceiver Control Register (RS485) */ -#define DW_UART_DE_EN 0xb0 /* Driver Output Enable Register */ -#define DW_UART_RE_EN 0xb4 /* Receiver Output Enable Register */ -#define DW_UART_DLF 0xc0 /* Divisor Latch Fraction Register */ -#define DW_UART_RAR 0xc4 /* Receive Address Register */ -#define DW_UART_TAR 0xc8 /* Transmit Address Register */ -#define DW_UART_LCR_EXT 0xcc /* Line Extended Control Register */ -#define DW_UART_CPR 0xf4 /* Component Parameter Register */ -#define DW_UART_UCV 0xf8 /* UART Component Version */ - -/* Receive / Transmit Address Register bits */ -#define DW_UART_ADDR_MASK GENMASK(7, 0) - -/* Line Status Register bits */ -#define DW_UART_LSR_ADDR_RCVD BIT(8) - -/* Transceiver Control Register bits */ -#define DW_UART_TCR_RS485_EN BIT(0) -#define DW_UART_TCR_RE_POL BIT(1) -#define DW_UART_TCR_DE_POL BIT(2) -#define DW_UART_TCR_XFER_MODE GENMASK(4, 3) -#define DW_UART_TCR_XFER_MODE_DE_DURING_RE FIELD_PREP(DW_UART_TCR_XFER_MOD= E, 0) -#define DW_UART_TCR_XFER_MODE_SW_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE= , 1) -#define DW_UART_TCR_XFER_MODE_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, = 2) - -/* Line Extended Control Register bits */ -#define DW_UART_LCR_EXT_DLS_E BIT(0) -#define DW_UART_LCR_EXT_ADDR_MATCH BIT(1) -#define DW_UART_LCR_EXT_SEND_ADDR BIT(2) -#define DW_UART_LCR_EXT_TRANSMIT_MODE BIT(3) - -/* Component Parameter Register bits */ -#define DW_UART_CPR_ABP_DATA_WIDTH GENMASK(1, 0) -#define DW_UART_CPR_AFCE_MODE BIT(4) -#define DW_UART_CPR_THRE_MODE BIT(5) -#define DW_UART_CPR_SIR_MODE BIT(6) -#define DW_UART_CPR_SIR_LP_MODE BIT(7) -#define DW_UART_CPR_ADDITIONAL_FEATURES BIT(8) -#define DW_UART_CPR_FIFO_ACCESS BIT(9) -#define DW_UART_CPR_FIFO_STAT BIT(10) -#define DW_UART_CPR_SHADOW BIT(11) -#define DW_UART_CPR_ENCODED_PARMS BIT(12) -#define DW_UART_CPR_DMA_EXTRA BIT(13) -#define DW_UART_CPR_FIFO_MODE GENMASK(23, 16) - -/* Helper for FIFO size calculation */ -#define DW_UART_CPR_FIFO_SIZE(a) (FIELD_GET(DW_UART_CPR_FIFO_MODE, (a)) * = 16) - /* * divisor =3D div(I) + div(F) * "I" means integer, "F" means fractional diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250= /8250_dwlib.h index 7dd2a8e7b780..2f26f9ecacbe 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -1,11 +1,76 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* Synopsys DesignWare 8250 library header file. */ =20 +#ifndef _SERIAL_8250_DWLIB_H_ +#define _SERIAL_8250_DWLIB_H_ + +#include +#include #include #include =20 #include "8250.h" =20 +/* Offsets for the DesignWare specific registers */ +#define DW_UART_USR 0x1f /* UART Status Register */ +#define DW_UART_DMASA 0xa8 /* DMA Software Ack */ +#define DW_UART_TCR 0xac /* Transceiver Control Register (RS485) */ +#define DW_UART_DE_EN 0xb0 /* Driver Output Enable Register */ +#define DW_UART_RE_EN 0xb4 /* Receiver Output Enable Register */ +#define DW_UART_DLF 0xc0 /* Divisor Latch Fraction Register */ +#define DW_UART_RAR 0xc4 /* Receive Address Register */ +#define DW_UART_TAR 0xc8 /* Transmit Address Register */ +#define DW_UART_LCR_EXT 0xcc /* Line Extended Control Register */ +#define DW_UART_CPR 0xf4 /* Component Parameter Register */ +#define DW_UART_UCV 0xf8 /* UART Component Version */ + +/* Interrupt ID Register bits */ +#define DW_UART_IIR_IID GENMASK(3, 0) + +/* Modem Control Register bits */ +#define DW_UART_MCR_SIRE BIT(6) + +/* Line Status Register bits */ +#define DW_UART_LSR_ADDR_RCVD BIT(8) + +/* UART Status Register bits */ +#define DW_UART_USR_BUSY BIT(0) + +/* Transceiver Control Register bits */ +#define DW_UART_TCR_RS485_EN BIT(0) +#define DW_UART_TCR_RE_POL BIT(1) +#define DW_UART_TCR_DE_POL BIT(2) +#define DW_UART_TCR_XFER_MODE GENMASK(4, 3) +#define DW_UART_TCR_XFER_MODE_DE_DURING_RE FIELD_PREP(DW_UART_TCR_XFER_MOD= E, 0) +#define DW_UART_TCR_XFER_MODE_SW_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE= , 1) +#define DW_UART_TCR_XFER_MODE_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, = 2) + +/* Receive / Transmit Address Register bits */ +#define DW_UART_ADDR_MASK GENMASK(7, 0) + +/* Line Extended Control Register bits */ +#define DW_UART_LCR_EXT_DLS_E BIT(0) +#define DW_UART_LCR_EXT_ADDR_MATCH BIT(1) +#define DW_UART_LCR_EXT_SEND_ADDR BIT(2) +#define DW_UART_LCR_EXT_TRANSMIT_MODE BIT(3) + +/* Component Parameter Register bits */ +#define DW_UART_CPR_ABP_DATA_WIDTH GENMASK(1, 0) +#define DW_UART_CPR_AFCE_MODE BIT(4) +#define DW_UART_CPR_THRE_MODE BIT(5) +#define DW_UART_CPR_SIR_MODE BIT(6) +#define DW_UART_CPR_SIR_LP_MODE BIT(7) +#define DW_UART_CPR_ADDITIONAL_FEATURES BIT(8) +#define DW_UART_CPR_FIFO_ACCESS BIT(9) +#define DW_UART_CPR_FIFO_STAT BIT(10) +#define DW_UART_CPR_SHADOW BIT(11) +#define DW_UART_CPR_ENCODED_PARMS BIT(12) +#define DW_UART_CPR_DMA_EXTRA BIT(13) +#define DW_UART_CPR_FIFO_MODE GENMASK(23, 16) + +/* Helper for FIFO size calculation */ +#define DW_UART_CPR_FIFO_SIZE(a) (FIELD_GET(DW_UART_CPR_FIFO_MODE, (a)) * = 16) + struct dw8250_port_data { /* Port properties */ int line; @@ -38,3 +103,5 @@ static inline void dw8250_writel_ext(struct uart_port *p= , int offset, u32 reg) else writel(reg, p->membase + offset); } + +#endif /* _SERIAL_8250_DWLIB_H_ */ --=20 2.34.1 From nobody Tue Jun 16 20:39:02 2026 Received: from ultrarisc.com (unknown [218.76.62.146]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 00AB93A9015; Wed, 29 Apr 2026 09:05:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=218.76.62.146 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777453540; cv=none; b=IDyFl+HieUN6lFHyD74va7qJuVlKmJc3cou9m6ApEhk5xh/KGDsZPfuYaoshrzHAfeut1ZPT9aUs66rvrGp51iS1gYoqS6SW08CmDuk8bo3kBGKNV0fdvAkh07F1sOu0cE8EeIBSVWpJb0vQQEWLV1+UoTZxMrqYjRmLQj69GLs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777453540; c=relaxed/simple; bh=Yk54Cwui4NyzISBwTNrGewLTMBC258yufC94tSuMGz0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RjXJLhHI8IMWaOReBy12nTbE4B/NcaBEYuKPqWReFdpJJI02ZW1bve66rwlgjdox+8SswYVr43/cd/YogykSWMccFQLhKsRgqHvyEKdMHNBivwfl28tMsxym+2HGxgAwGAM3mijw3dUZ8ygI8F0lnSV0brgUn3bMo7cdMi1ZGUE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ultrarisc.com; spf=none smtp.mailfrom=ultrarisc.com; dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com header.b=jsRxyQlQ; arc=none smtp.client-ip=218.76.62.146 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ultrarisc.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=ultrarisc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com header.b="jsRxyQlQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ultrarisc.com; s=dkim; h=Received:From:Date:Subject: MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id: References:In-Reply-To:To:Cc; bh=MhdY4otkQDeu9JhXT6dgKmzO640veuR iZlGBWDtVC3I=; b=jsRxyQlQlTXso1huCEJ0g3R7HhZOc3LKL0jOXeoebyL0SyG K2E7MJzRDWVHn43DSr3oQeGejV19idB/1mQEr/9U/mb5NBGG1Y16BmzSNmLP4h3V Jf46pjwA8k0IA4WbngnJOo8bVH/Yp6qzUJ+bDaMMdEH6vKk1BASVJI6ImkVg= Received: from [127.0.0.1] (unknown [192.168.100.1]) by localhost.localdomain (Coremail) with SMTP id AQAAfwAnYUL1yfFp_SQDAA--.1731S4; Wed, 29 Apr 2026 17:06:00 +0800 (CST) From: Jia Wang Date: Wed, 29 Apr 2026 17:05:14 +0800 Subject: [PATCH v6 2/4] serial: 8250_dw: build Renesas RZN1 CPR value from DW_UART_CPR_* definitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-ultrarisc-serial-v6-2-b2c852e0c4c3@ultrarisc.com> References: <20260429-ultrarisc-serial-v6-0-b2c852e0c4c3@ultrarisc.com> In-Reply-To: <20260429-ultrarisc-serial-v6-0-b2c852e0c4c3@ultrarisc.com> To: =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Greg Kroah-Hartman , Jiri Slaby , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Jia Wang X-Mailer: b4 0.15-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1777453513; l=2418; i=wangjia@ultrarisc.com; s=20260309; h=from:subject:message-id; bh=Yk54Cwui4NyzISBwTNrGewLTMBC258yufC94tSuMGz0=; b=uaZ5tyDAcAZj91ZBbydsuquaNhHfRuyyMUeRd4tr1euJSXEmmCix+dofGFMVqwh4MYXIeVXLN 7mAa64R5sVNCeWgvgVc3JILaJ6mpYyyNLw+u/XX1QQBbwOjgrzzs5Kq X-Developer-Key: i=wangjia@ultrarisc.com; a=ed25519; pk=XvYkrelqJIIzobY7j+nIg8rsfv5kzaOzuc1UPhd087U= X-CM-TRANSID: AQAAfwAnYUL1yfFp_SQDAA--.1731S4 X-Coremail-Antispam: 1UD129KBjvJXoW7KF17ur43ArWxXrW8tFy3twb_yoW5Jr4xpr s0kr4qvr1Y93Z3W34IkrWjvF4Sga15Ga4IkF9rG3sxtFnIyr1ktws0vFy3trZrJFWFvrW5 GF17Zw15ua4jkrUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: pzdqwylld63zxwud2x1vfou0bp/1tbiAQAKEWnti78ACwBBsg Replace the magic CPR value for Renesas RZ/N1 with a composition using DW_UART_CPR_* bit/field definitions and FIELD_PREP_CONST(). Introduce a helper macro to convert a FIFO size (bytes) into the CPR FIFO_MODE field value, with BUILD_BUG_ON_ZERO() checks for alignment and bounds. Use it to replace the literal FIFO_MODE values in the RZN1. Signed-off-by: Jia Wang Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 10 +++++++++- drivers/tty/serial/8250/8250_dwlib.h | 8 +++++++- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index 467755bf0092..480f82d89856 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -937,7 +937,15 @@ static const struct dw8250_platform_data dw8250_armada= _38x_data =3D { =20 static const struct dw8250_platform_data dw8250_renesas_rzn1_data =3D { .usr_reg =3D DW_UART_USR, - .cpr_value =3D 0x00012f32, + .cpr_value =3D FIELD_PREP_CONST(DW_UART_CPR_ABP_DATA_WIDTH, 2) | + DW_UART_CPR_AFCE_MODE | + DW_UART_CPR_THRE_MODE | + DW_UART_CPR_ADDITIONAL_FEATURES | + DW_UART_CPR_FIFO_ACCESS | + DW_UART_CPR_FIFO_STAT | + DW_UART_CPR_SHADOW | + DW_UART_CPR_DMA_EXTRA | + DW_UART_CPR_FIFO_MODE_FROM_SIZE(16), .quirks =3D DW_UART_QUIRK_CPR_VALUE | DW_UART_QUIRK_IS_DMA_FC, }; =20 diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250= /8250_dwlib.h index 2f26f9ecacbe..1fe52332e774 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -6,6 +6,7 @@ =20 #include #include +#include #include #include =20 @@ -68,8 +69,13 @@ #define DW_UART_CPR_DMA_EXTRA BIT(13) #define DW_UART_CPR_FIFO_MODE GENMASK(23, 16) =20 -/* Helper for FIFO size calculation */ +/* Helpers for FIFO size calculation */ #define DW_UART_CPR_FIFO_SIZE(a) (FIELD_GET(DW_UART_CPR_FIFO_MODE, (a)) * = 16) +#define DW_UART_CPR_FIFO_MODE_FROM_SIZE(size) \ + (FIELD_PREP_CONST(DW_UART_CPR_FIFO_MODE, \ + BUILD_BUG_ON_ZERO((size) > 2048) + \ + BUILD_BUG_ON_ZERO((size) % 16) + \ + ((size) / 16))) =20 struct dw8250_port_data { /* Port properties */ --=20 2.34.1 From nobody Tue Jun 16 20:39:02 2026 Received: from ultrarisc.com (unknown [218.76.62.146]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C8DB93B8BD1; Wed, 29 Apr 2026 09:05:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=218.76.62.146 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777453541; cv=none; b=QChE0j7EmXCfszultbHwDn8+LlM48DxGFo3a27AV1ridohTtGRLRvMyDPcWxk6JWKTsk9TXvqbSK1FKg/eDOM4+N/0Xmkmq7zgUbUvaGRXYbxBke4tgGeaPle17XVgwU5LJoq8T8JK1/R/WHaJrWL6ps/40go6o6REhRoaR9djE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777453541; c=relaxed/simple; bh=UM+lFNrgifN7fqIi+jkH4mF0Wg7FNah97Kz637clMys=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=iZBlW35l+flVpciAlgoMQ6nOD/G5OOItzR7o2t4ybRJNg861tLDpYZshQtdCQx52SkSsABnTA60OaOLGggGV0lH1sei9J5c34KtX7rQZGQ7na1p/bLRev+euUa0lRr8l4fjPk0YLbZL9uiMSjvhkxHEQquD2/CA6VcbZu9yZDC8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ultrarisc.com; spf=none smtp.mailfrom=ultrarisc.com; dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com header.b=h7NNuXc7; arc=none smtp.client-ip=218.76.62.146 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ultrarisc.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=ultrarisc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com header.b="h7NNuXc7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ultrarisc.com; s=dkim; h=Received:From:Date:Subject: MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id: References:In-Reply-To:To:Cc; bh=lB1UgtFHXbVOx+AQxMlqFDIEAITd7xj JFJmJMxntCx8=; b=h7NNuXc7PjvURVKKJjMp5Y/JMwtCumI24v9wJ18O13erNT9 y88dGP+c2/UPFhPhcVgeY51iap10jdbYZ7KDa+DVkCrczBKsPe5GAp1j1TkzFo0d O7r0JT+p9Z4UiVFh9fyO4+WgJUS6IxDwcNXe6uSnGFkZ/75eMy2mTaQ2j0BE= Received: from [127.0.0.1] (unknown [192.168.100.1]) by localhost.localdomain (Coremail) with SMTP id AQAAfwAnYUL1yfFp_SQDAA--.1731S5; Wed, 29 Apr 2026 17:06:09 +0800 (CST) From: Jia Wang Date: Wed, 29 Apr 2026 17:05:15 +0800 Subject: [PATCH v6 3/4] dt-bindings: serial: snps-dw-apb-uart: Add UltraRISC DP1000 UART Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-ultrarisc-serial-v6-3-b2c852e0c4c3@ultrarisc.com> References: <20260429-ultrarisc-serial-v6-0-b2c852e0c4c3@ultrarisc.com> In-Reply-To: <20260429-ultrarisc-serial-v6-0-b2c852e0c4c3@ultrarisc.com> To: =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Greg Kroah-Hartman , Jiri Slaby , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Jia Wang , Conor Dooley X-Mailer: b4 0.15-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1777453513; l=940; i=wangjia@ultrarisc.com; s=20260309; h=from:subject:message-id; bh=UM+lFNrgifN7fqIi+jkH4mF0Wg7FNah97Kz637clMys=; b=1PYrpzZnVIOhDd14Q7k78cw7/LtnU6UJi8bdpLNM33qgx+FyKh9B9rzarOWw/4AbM2cGr8Crc NTKjRR/nHPECSk88VIH4RV7zYx6B+oVwD7DMQQ91ADDnY0pVZ17AO0p X-Developer-Key: i=wangjia@ultrarisc.com; a=ed25519; pk=XvYkrelqJIIzobY7j+nIg8rsfv5kzaOzuc1UPhd087U= X-CM-TRANSID: AQAAfwAnYUL1yfFp_SQDAA--.1731S5 X-Coremail-Antispam: 1UD129KBjvdXoWrKF1UuFW5XrW5GF1UWr1DAwb_yoWfZrg_C3 97uayqvr43AFWFva1DAF4xJr4fZF47WFs5urn8tF1kC34DZay5KFyktr90yw1rJr1fZr4f Cr9akrWqkrsxGjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUUUUUUU X-CM-SenderInfo: pzdqwylld63zxwud2x1vfou0bp/1tbiAQAKEWnti78ACwBDsi UltraRISC DP1000 integrates a Synopsys DesignWare APB UART, but it does not provide the standard CPR and UCV registers. Signed-off-by: Jia Wang Acked-by: Conor Dooley --- Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml= b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 685c1eceb782..49f51b002879 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -78,6 +78,7 @@ properties: - starfive,jh7100-hsuart - starfive,jh7100-uart - starfive,jh7110-uart + - ultrarisc,dp1000-uart - const: snps,dw-apb-uart - const: snps,dw-apb-uart =20 --=20 2.34.1 From nobody Tue Jun 16 20:39:02 2026 Received: from ultrarisc.com (unknown [218.76.62.146]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BF14C3A544A; Wed, 29 Apr 2026 09:05:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=218.76.62.146 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777453541; cv=none; b=mmYqEbcWAuApZky2zrZvlT6y/Z70iVBW3JgYuef28tyet4wZrIVc0OXRSb8YvLv34KfrOq0mAKYvAt2tb2h+rrisDOmRQuqE2buAY51rJ0JBWdP8COcMV+tpgHoedHI5SQf3YvD0Jk9CDtEmGDw/QSYS3JgkCxBQ9J5dDpYcSrk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777453541; c=relaxed/simple; bh=+dtQ3f+XBoxv3HZDucz50ukJ2U/SQ+5U7lcx9cpy2/w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kxwXuZcme6XRIFGDGEZNcSBVvg/VCrfGGFCty6ts3+gYOjqvHoEjp5DWJvGeO4xUk3X9RlwspiqzWylBe8+KGjntbNgVk4lgeGJZs52+TXR16WrVWGAc6+IjGDxpB1EGA9yi9OcZ4lLJoZCqSDBrkbSKPqK28boSMzWgHOQzfY4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ultrarisc.com; spf=none smtp.mailfrom=ultrarisc.com; dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com header.b=ePM4MGVp; arc=none smtp.client-ip=218.76.62.146 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ultrarisc.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=ultrarisc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ultrarisc.com header.i=@ultrarisc.com header.b="ePM4MGVp" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ultrarisc.com; s=dkim; h=Received:From:Date:Subject: MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id: References:In-Reply-To:To:Cc; bh=W6qFc8IOjX0c5M+yiuQoc29Iohko0me 7jng1y1x4BCM=; b=ePM4MGVpf9924uFeoKwkWH6Sw4vL3/gPeI1GfCL12EStSbP mLaA4gHrT+tyEcROYfbFJQoPrdeNMIRZ+L2VmlKximQqTpTATymifgNMpnxvFwsg HO//ddNKLQe7M8nRj50l8F4ogjZwl1Zz2lohXr6s6j7x1laOBto2z/5+B+/A= Received: from [127.0.0.1] (unknown [192.168.100.1]) by localhost.localdomain (Coremail) with SMTP id AQAAfwAnYUL1yfFp_SQDAA--.1731S6; Wed, 29 Apr 2026 17:06:10 +0800 (CST) From: Jia Wang Date: Wed, 29 Apr 2026 17:05:16 +0800 Subject: [PATCH v6 4/4] serial: 8250_dw: Use a fixed CPR value for UltraRISC DP1000 UART Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-ultrarisc-serial-v6-4-b2c852e0c4c3@ultrarisc.com> References: <20260429-ultrarisc-serial-v6-0-b2c852e0c4c3@ultrarisc.com> In-Reply-To: <20260429-ultrarisc-serial-v6-0-b2c852e0c4c3@ultrarisc.com> To: =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Andy Shevchenko , Greg Kroah-Hartman , Jiri Slaby , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Jia Wang X-Mailer: b4 0.15-dev X-Developer-Signature: v=1; a=ed25519-sha256; t=1777453513; l=1792; i=wangjia@ultrarisc.com; s=20260309; h=from:subject:message-id; bh=+dtQ3f+XBoxv3HZDucz50ukJ2U/SQ+5U7lcx9cpy2/w=; b=hlZOX7ivuGaWLXDlOUGfAVrfPDA/0UViH6Qo0xE/YJCj8zdY3mqBetMt+L+KVGHX55O4+9kXC WHeiqaHbiOGCCSPoE3AsOgVveCcG2C3+pmFb3OdBPuQdRiqthSkXBQh X-Developer-Key: i=wangjia@ultrarisc.com; a=ed25519; pk=XvYkrelqJIIzobY7j+nIg8rsfv5kzaOzuc1UPhd087U= X-CM-TRANSID: AQAAfwAnYUL1yfFp_SQDAA--.1731S6 X-Coremail-Antispam: 1UD129KBjvJXoW7tw1kXw4fWry5Gw18AryfXrb_yoW8Cr4fpF 47GrZ0vFySgF4Yg3WIy3WvvFZ7ua17Zry2k3srK347tFn8tFyUJrnakrWay3ZIgFySqw1a yF1Y9rW7Aa18Za7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: pzdqwylld63zxwud2x1vfou0bp/1tbiAQAKEWnti78ACwBFsk The UltraRISC DP1000 UART does not provide the standard CPR register used by 8250_dw to discover port capabilities. Provide a fixed CPR value for the DP1000-specific compatible so the driver can configure the port correctly. Signed-off-by: Jia Wang Reviewed-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_dw.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/82= 50_dw.c index 480f82d89856..55e40c10f46a 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -959,6 +959,15 @@ static const struct dw8250_platform_data dw8250_intc10= ee =3D { .quirks =3D DW_UART_QUIRK_IER_KICK, }; =20 +static const struct dw8250_platform_data dw8250_ultrarisc_dp1000_data =3D { + .usr_reg =3D DW_UART_USR, + .cpr_value =3D FIELD_PREP_CONST(DW_UART_CPR_ABP_DATA_WIDTH, 2) | + DW_UART_CPR_THRE_MODE | + DW_UART_CPR_DMA_EXTRA | + DW_UART_CPR_FIFO_MODE_FROM_SIZE(32), + .quirks =3D DW_UART_QUIRK_CPR_VALUE, +}; + static const struct of_device_id dw8250_of_match[] =3D { { .compatible =3D "snps,dw-apb-uart", .data =3D &dw8250_dw_apb }, { .compatible =3D "cavium,octeon-3860-uart", .data =3D &dw8250_octeon_386= 0_data }, @@ -966,6 +975,7 @@ static const struct of_device_id dw8250_of_match[] =3D { { .compatible =3D "renesas,rzn1-uart", .data =3D &dw8250_renesas_rzn1_dat= a }, { .compatible =3D "sophgo,sg2044-uart", .data =3D &dw8250_skip_set_rate_d= ata }, { .compatible =3D "starfive,jh7100-uart", .data =3D &dw8250_skip_set_rate= _data }, + { .compatible =3D "ultrarisc,dp1000-uart", .data =3D &dw8250_ultrarisc_dp= 1000_data }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, dw8250_of_match); --=20 2.34.1