From nobody Tue Jun 16 19:36:09 2026 Received: from todd.t-8ch.de (todd.t-8ch.de [159.69.126.157]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A23E5377EDD; Wed, 29 Apr 2026 15:20:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=159.69.126.157 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777476060; cv=none; b=KTDltuLHtmN9NuFV7ScDX0dV8ba2R+tks10Veg02MSbbE6M5z/fFh83aqUhTTmpqb8KhsYEkAtpYVdHd+Jk5V9CaAQxwpmJn+bFclQC/2pSurl62VcyA21yOeNq+aR0Zj+ATBE18QMiJsk4pyBVw8thEvtHIPFTiQEwGS2Dw0sY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777476060; c=relaxed/simple; bh=5YHDyoKfepxGA177YHbFKRFumgjEQ0JvgrvMBMlHaSU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=VdBc5egu3SeDpN6PtGfrsRIATsaaGsrw2UJOB5rEHrEdPddyaNqkHxVfljmA1u11xaSWWXO1zrb3U5mZDtXGe906UohpNMBysevdR5IQaQKH0alOJQJ7e4L6xar7cwYKt4AbFLqaEOeXpfVpnF6XCroiiSbsrcaR4fJ7AgW3l0Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=weissschuh.net; spf=pass smtp.mailfrom=weissschuh.net; dkim=pass (1024-bit key) header.d=weissschuh.net header.i=@weissschuh.net header.b=Mpwio60F; arc=none smtp.client-ip=159.69.126.157 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=weissschuh.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=weissschuh.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=weissschuh.net header.i=@weissschuh.net header.b="Mpwio60F" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=weissschuh.net; s=mail; t=1777476052; bh=5YHDyoKfepxGA177YHbFKRFumgjEQ0JvgrvMBMlHaSU=; h=From:Date:Subject:To:Cc:From; b=Mpwio60Fov17FKo+mkmi7WU02uH0J5FCvaCmcdKrZSKfzSy4cHkLlQiCW90QnV+dx bgiAblqUeB3ansDLUGDQiX0jzecE8jyIdJPRnIWBJiIzgj315UHJkYOLzkQgjtDhEq ws+vdPEq1le6fNanfk+DKHTO6zsZq+BryizhgLv4= From: =?utf-8?q?Thomas_Wei=C3=9Fschuh?= Date: Wed, 29 Apr 2026 17:20:45 +0200 Subject: [PATCH v2] tools/nolibc: add support for OpenRISC / or1k Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-nolibc-openrisc-v2-1-8d7d7a2f3fec@weissschuh.net> X-B4-Tracking: v=1; b=H4sIAAAAAAAC/2WNyw6CMBBFf8XM2hqmPCKu/A/Doq2DHWNa0gHUE P5dQHcuT3LuuRMIJSaB026CRCMLx7CA3u/AeRNupPi6MOhMV1mBpQrxwdap2FFILE4ZNLZGV2B LJSyrLlHLr614ab4sg72T69fManiWPqb3djni6v3q+vhXH1GhynOb13VWFqatzk9iEXF+8IdAP TTzPH8AAyc3nMUAAAA= X-Change-ID: 20260415-nolibc-openrisc-a1ab91c41fe5 To: Willy Tarreau , Jonas Bonn , Stefan Kristiansson , Stafford Horne Cc: linux-openrisc@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Thomas_Wei=C3=9Fschuh?= X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777476052; l=13731; i=linux@weissschuh.net; s=20221212; h=from:subject:message-id; bh=5YHDyoKfepxGA177YHbFKRFumgjEQ0JvgrvMBMlHaSU=; b=rBOQrDSb6zh0MC4cweY6+ot1Df+5FWcAdK3ar9gFy7y1jsZHwOGKpaFIryXILTY54F9AjeCxI 7uzT3lnOo70AcPHuKg0fBCbxTYyFVN5W92wbPKe4SPZJiT1JfcN5cYT X-Developer-Key: i=linux@weissschuh.net; a=ed25519; pk=KcycQgFPX2wGR5azS7RhpBqedglOZVgRPfdFSPB1LNw= Add support for OpenRISC / or1k to nolibc. _start() uses the same wrapper construct as in arch-sh.h. libgcc is necessary as OpenRISC is missing 64-bit multiplication. Signed-off-by: Thomas Wei=C3=9Fschuh Acked-by: Stafford Horne Acked-by: Willy Tarreau --- Changes in v2: - Drop useless l.nop from __nolibc_syscallX(). - Use the delay slot after l.jal _start_c. - Fix some typos. - Use a single register variable for system call number and return. - Use 'r1' register name over non-idiomatic 'sp' alias. - Link to v1: https://patch.msgid.link/20260428-nolibc-openrisc-v1-1-33b399= 054af6@weissschuh.net --- tools/include/nolibc/Makefile | 2 +- tools/include/nolibc/arch-openrisc.h | 160 +++++++++++++++++++++= ++++ tools/include/nolibc/arch.h | 2 + tools/testing/selftests/nolibc/Makefile.nolibc | 5 + tools/testing/selftests/nolibc/run-tests.sh | 4 +- 5 files changed, 171 insertions(+), 2 deletions(-) diff --git a/tools/include/nolibc/Makefile b/tools/include/nolibc/Makefile index 872c318f50d4..2cb4d610fe53 100644 --- a/tools/include/nolibc/Makefile +++ b/tools/include/nolibc/Makefile @@ -17,7 +17,7 @@ endif # it defaults to this nolibc directory. OUTPUT ?=3D $(CURDIR)/ =20 -architectures :=3D arm arm64 loongarch m68k mips powerpc riscv s390 sh spa= rc x86 +architectures :=3D arm arm64 loongarch m68k mips openrisc powerpc riscv s3= 90 sh sparc x86 arch_files :=3D arch.h $(addsuffix .h, $(addprefix arch-, $(architectures)= )) all_files :=3D \ alloca.h \ diff --git a/tools/include/nolibc/arch-openrisc.h b/tools/include/nolibc/ar= ch-openrisc.h new file mode 100644 index 000000000000..5ef82fd9cc64 --- /dev/null +++ b/tools/include/nolibc/arch-openrisc.h @@ -0,0 +1,160 @@ +/* SPDX-License-Identifier: LGPL-2.1 OR MIT */ +/* + * OpenRISC specific definitions for NOLIBC + * Copyright (C) 2026 Thomas Wei=C3=9Fschuh + */ + +#ifndef _NOLIBC_ARCH_OPENRISC_H +#define _NOLIBC_ARCH_OPENRISC_H + +#include "compiler.h" +#include "crt.h" + +/* + * Syscalls for OpenRISC: + * - syscall number is passed in r11 + * - arguments are in r3, r4, r5, r6, r7, r8 + * - the system call is performed by calling l.sys 1 + * - syscall return value is in r11 + */ + +#define _NOLIBC_SYSCALL_CLOBBERLIST \ + "r12", "r13", "r15", "r17", "r19", "r21", "r23", "r25", "r27", "r29", "r3= 1", "memory" + +#define __nolibc_syscall0(num) = \ +({ = \ + register long _num __asm__ ("r11") =3D (num); \ + \ + __asm__ volatile ( \ + "l.sys 1\n" \ + : "+r"(_num) \ + : \ + : "r3", "r4", "r5", "r6", "r7", "r8", \ + _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _num; \ +}) + +#define __nolibc_syscall1(num, arg1) = \ +({ = \ + register long _num __asm__ ("r11") =3D (num); \ + register long _arg1 __asm__ ("r3") =3D (long)(arg1); \ + \ + __asm__ volatile ( \ + "l.sys 1\n" \ + : "+r"(_num) \ + : "r"(_arg1) \ + : "r4", "r5", "r6", "r7", "r8", _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _num; \ +}) + +#define __nolibc_syscall2(num, arg1, arg2) = \ +({ = \ + register long _num __asm__ ("r11") =3D (num); \ + register long _arg1 __asm__ ("r3") =3D (long)(arg1); \ + register long _arg2 __asm__ ("r4") =3D (long)(arg2); \ + \ + __asm__ volatile ( \ + "l.sys 1\n" \ + : "+r"(_num) \ + : "r"(_arg1), "r"(_arg2) \ + : "r5", "r6", "r7", "r8", _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _num; \ +}) + +#define __nolibc_syscall3(num, arg1, arg2, arg3) = \ +({ = \ + register long _num __asm__ ("r11") =3D (num); \ + register long _arg1 __asm__ ("r3") =3D (long)(arg1); \ + register long _arg2 __asm__ ("r4") =3D (long)(arg2); \ + register long _arg3 __asm__ ("r5") =3D (long)(arg3); \ + \ + __asm__ volatile ( \ + "l.sys 1\n" \ + : "+r"(_num) \ + : "r"(_arg1), "r"(_arg2), "r"(_arg3) \ + : "r6", "r7", "r8", _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _num; \ +}) + +#define __nolibc_syscall4(num, arg1, arg2, arg3, arg4) = \ +({ = \ + register long _num __asm__ ("r11") =3D (num); \ + register long _arg1 __asm__ ("r3") =3D (long)(arg1); \ + register long _arg2 __asm__ ("r4") =3D (long)(arg2); \ + register long _arg3 __asm__ ("r5") =3D (long)(arg3); \ + register long _arg4 __asm__ ("r6") =3D (long)(arg4); \ + \ + __asm__ volatile ( \ + "l.sys 1\n" \ + : "+r"(_num) \ + : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4) \ + : "r7", "r8", _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _num; \ +}) + +#define __nolibc_syscall5(num, arg1, arg2, arg3, arg4, arg5) = \ +({ = \ + register long _num __asm__ ("r11") =3D (num); \ + register long _arg1 __asm__ ("r3") =3D (long)(arg1); \ + register long _arg2 __asm__ ("r4") =3D (long)(arg2); \ + register long _arg3 __asm__ ("r5") =3D (long)(arg3); \ + register long _arg4 __asm__ ("r6") =3D (long)(arg4); \ + register long _arg5 __asm__ ("r7") =3D (long)(arg5); \ + \ + __asm__ volatile ( \ + "l.sys 1\n" \ + : "+r"(_num) \ + : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5) \ + : "r8", _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _num; \ +}) + +#define __nolibc_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) = \ +({ = \ + register long _num __asm__ ("r11") =3D (num); \ + register long _arg1 __asm__ ("r3") =3D (long)(arg1); \ + register long _arg2 __asm__ ("r4") =3D (long)(arg2); \ + register long _arg3 __asm__ ("r5") =3D (long)(arg3); \ + register long _arg4 __asm__ ("r6") =3D (long)(arg4); \ + register long _arg5 __asm__ ("r7") =3D (long)(arg5); \ + register long _arg6 __asm__ ("r8") =3D (long)(arg6); \ + \ + __asm__ volatile ( \ + "l.sys 1\n" \ + : "+r"(_num) \ + : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \ + "r"(_arg6) \ + : _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _num; \ +}) + +#ifndef NOLIBC_NO_RUNTIME +/* startup code */ +void _start_wrapper(void); +void __attribute__((weak,noreturn)) +__nolibc_entrypoint __nolibc_no_stack_protector +_start_wrapper(void) +{ + __asm__ volatile ( + ".global _start\n" /* The C function will have a prologue, = */ + ".type _start, @function\n" /* corrupting "sp/r1" = */ + ".weak _start\n" + "_start:\n" + + "l.jal _start_c\n" /* transfer to c runtime = */ + "l.or r3,r1,r1\n" /* save stack pointer to r3, as arg1 of _st= art_c */ + + ".size _start, .-_start\n" + ); + __nolibc_entrypoint_epilogue(); +} +#endif /* NOLIBC_NO_RUNTIME */ + +#endif /* _NOLIBC_ARCH_OPENRISC_H */ diff --git a/tools/include/nolibc/arch.h b/tools/include/nolibc/arch.h index a3adaf433f2c..55009dcafe9e 100644 --- a/tools/include/nolibc/arch.h +++ b/tools/include/nolibc/arch.h @@ -28,6 +28,8 @@ #include "arch-m68k.h" #elif defined(__sh__) #include "arch-sh.h" +#elif defined(__or1k__) +#include "arch-openrisc.h" #else #error Unsupported Architecture #endif diff --git a/tools/testing/selftests/nolibc/Makefile.nolibc b/tools/testing= /selftests/nolibc/Makefile.nolibc index f30bc68470cc..91f5a284f4e6 100644 --- a/tools/testing/selftests/nolibc/Makefile.nolibc +++ b/tools/testing/selftests/nolibc/Makefile.nolibc @@ -92,6 +92,7 @@ IMAGE_sparc32 =3D arch/sparc/boot/image IMAGE_sparc64 =3D arch/sparc/boot/image IMAGE_m68k =3D vmlinux IMAGE_sh4 =3D arch/sh/boot/zImage +IMAGE_openrisc =3D vmlinux IMAGE =3D $(objtree)/$(IMAGE_$(XARCH)) IMAGE_NAME =3D $(notdir $(IMAGE)) =20 @@ -121,6 +122,7 @@ DEFCONFIG_sparc32 =3D sparc32_defconfig DEFCONFIG_sparc64 =3D sparc64_defconfig DEFCONFIG_m68k =3D virt_defconfig DEFCONFIG_sh4 =3D rts7751r2dplus_defconfig +DEFCONFIG_openrisc =3D virt_defconfig DEFCONFIG =3D $(DEFCONFIG_$(XARCH)) =20 EXTRACONFIG_x32 =3D -e CONFIG_X86_X32_ABI @@ -159,6 +161,7 @@ QEMU_ARCH_sparc32 =3D sparc QEMU_ARCH_sparc64 =3D sparc64 QEMU_ARCH_m68k =3D m68k QEMU_ARCH_sh4 =3D sh4 +QEMU_ARCH_openrisc =3D or1k QEMU_ARCH =3D $(QEMU_ARCH_$(XARCH)) =20 QEMU_ARCH_USER_ppc64le =3D ppc64le @@ -199,6 +202,7 @@ QEMU_ARGS_sparc32 =3D -M SS-5 -m 256M -append "conso= le=3DttyS0,115200 panic=3D-1 $( QEMU_ARGS_sparc64 =3D -M sun4u -append "console=3DttyS0,115200 panic=3D= -1 $(TEST:%=3DNOLIBC_TEST=3D%)" QEMU_ARGS_m68k =3D -M virt -append "console=3DttyGF0,115200 panic=3D= -1 $(TEST:%=3DNOLIBC_TEST=3D%)" QEMU_ARGS_sh4 =3D -M r2d -serial file:/dev/stdout -append "console= =3DttySC1,115200 panic=3D-1 $(TEST:%=3DNOLIBC_TEST=3D%)" +QEMU_ARGS_openrisc =3D -M virt -m 512M -append "console=3DttyS0 panic=3D= -1 $(TEST:%=3DNOLIBC_TEST=3D%)" QEMU_ARGS =3D -m 1G $(QEMU_ARGS_$(XARCH)) $(QEMU_ARGS_BIOS) $(Q= EMU_ARGS_EXTRA) =20 # OUTPUT is only set when run from the main makefile, otherwise @@ -233,6 +237,7 @@ CFLAGS_XARCH =3D $(CFLAGS_$(XARCH)) endif =20 LDLIBS_ppc =3D $(if $(LLVM),,-lgcc) +LDLIBS_openrisc =3D $(if $(LLVM),,-lgcc) LDLIBS =3D $(LDLIBS_$(XARCH)) =20 include Makefile.include diff --git a/tools/testing/selftests/nolibc/run-tests.sh b/tools/testing/se= lftests/nolibc/run-tests.sh index cd439096fdf3..c25ee4be2df4 100755 --- a/tools/testing/selftests/nolibc/run-tests.sh +++ b/tools/testing/selftests/nolibc/run-tests.sh @@ -21,6 +21,7 @@ all_archs=3D( i386 x86_64 x32 arm64 arm armthumb mips32le mips32be mipsn32le mipsn32be mips64le mips64be + openrisc ppc ppc64 ppc64le riscv32 riscv64 s390x @@ -107,6 +108,7 @@ crosstool_arch() { case "$1" in arm64) echo aarch64;; armthumb) echo arm;; + openrisc) echo or1k;; ppc) echo powerpc;; ppc64) echo powerpc64;; ppc64le) echo powerpc64;; @@ -185,7 +187,7 @@ test_arch() { exit 1 esac printf '%-15s' "$arch:" - if [ "$arch" =3D "m68k" -o "$arch" =3D "sh4" ] && [ "$llvm" =3D "1" ]; th= en + if [ "$arch" =3D "m68k" -o "$arch" =3D "sh4" -o "$arch" =3D "openrisc" ] = && [ "$llvm" =3D "1" ]; then echo "Unsupported configuration" return fi --- base-commit: 8bf37d924968cf26ab95f644c981a28086e372af change-id: 20260415-nolibc-openrisc-a1ab91c41fe5 Best regards, -- =20 Thomas Wei=C3=9Fschuh