From nobody Tue Jun 16 19:36:41 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 630F33F65F3 for ; Wed, 29 Apr 2026 12:10:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777464614; cv=none; b=iPwk3EXDFeZCiGXWKRq0wJ5FfjKqOU/E4PeiOyyfILEeCMG711jOeZ1rU3U9uW/FtRU/jgvkDIutlS6EEE8BZPDbIhxlfL8aEpYiS8LB79D/KqWB5VEkVBzIgA7GfXKLmhjPGH8C9O0KVau3WhW4GmmIkQgnoph9xAmmc3xRrec= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777464614; c=relaxed/simple; bh=e1mNfJVMrQvFN+132sOoDtdxsQf+liabKFNyhMRf7K4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BptwD59yZtz1vrql/8NMrRNC5rS7VPZZi8ejHhhcHJo/U2jqVnm8XjEfWIvR+SmKvWyVwpy0NE8iLJH+ehk0XbLSy9v7iJeri6JCk7kUckDCaD8go0ANOKmafxcEEjmw7Bhy8756pEdUMPyZIjHcFQPGkQG37K8l8BQN9HNnHkM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=jJuwTs3R; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=NBXAHSnu; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="jJuwTs3R"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="NBXAHSnu" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63T8pmB3901591 for ; Wed, 29 Apr 2026 12:10:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= K5VYqWyL8EBcZs4JPz7OexZZaBJ3OqjvR0j4KdfUB0M=; b=jJuwTs3R29ccbMvq YZW7O6+ITHkdEIR+5gJFrgeos1WOGIgcB4ZGymmXW9c1AJ7TKqT74XoMDJtzbpX4 gCtltNBbn+KNv8PkMhEdaiAUvEOxhWbv+SB0C67YLC9leTew8tzp58uWL2cy8hLa KP4WLDlYaB8qDRje+5EYvN/w1+GO3MUEVXL6B59B234QmeXWNR0RnQAJQbBCPlgb mKUzYZpZgJSsTrR4aTnUAdmVIh2GOTyNJwtlb+FrjfyAdbUN9gjDDmFDEuM7XGOk 52ptUnvsx3GQmW2E7o8r3QLQADiMS9fSreh9mqsjh8oSr64Xq0fIvfsojixAElS7 iu7yuQ== Received: from mail-pl1-f199.google.com (mail-pl1-f199.google.com [209.85.214.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dubq9hkrb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 29 Apr 2026 12:10:12 +0000 (GMT) Received: by mail-pl1-f199.google.com with SMTP id d9443c01a7336-2b454cac322so118124855ad.2 for ; Wed, 29 Apr 2026 05:10:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1777464612; x=1778069412; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=K5VYqWyL8EBcZs4JPz7OexZZaBJ3OqjvR0j4KdfUB0M=; b=NBXAHSnu8++Hshz363IQa5llpOgR08Se+IbnmXTP6zdDwu/4Qmc27wwT0/ZNgfcvtf lPUzrPJGa22c43CNKuD2mCQSmDVVCJiTz1KLKp36OprzdIGQmTUQyUzq0XNo100RrueU 3r3dyQpJ8ZbF1RsjP1F+HwW9ITyBtZ51hqOaUFUI0OinkBNQnOD4li5jWqIhgk0B7SE+ tw/BOGVFdi5ZLZ9GyBieMjXiVob3SOPv7sW3jQOOfyOe0q3et1UwUUW6E745GVWaWF4C O0yUoxNbT1wFqznKMV9JXCdUoDON+TFV1b/6s6T/nrOkB4p2c1dpvRc8RWriZLhEPo7e Wo4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777464612; x=1778069412; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=K5VYqWyL8EBcZs4JPz7OexZZaBJ3OqjvR0j4KdfUB0M=; b=rep3zJxqCHha2dKGeBGx8HCMN6DKEGGOl3AvwXe5loGSHaHxW+Jq1Eg9kpiQ1BntzQ mubVQmf9ofXhbZVfzP/0xCiBfIFpHnknJezbi3u8191U/L4bPsoVSTiBlHKkRiGD9bIv 3Q1x83KV4tUc6u/wKljawok0yj1DZ2LGEDbYjocm1NGJZ3IFbJ7YjK/FFRrnekzoborX yHjqJuADp47x/33CkiXfnRatNTijc5PPxBD23l1N4R4ckZBqY4WYVB22odTYpIOmiexb 1xDSEicoqqz8KGa5OhgKhuKSJuszFJkc6iOcrdk/zELR55+hWFYnnY7IDGl6xSbg524u zHSw== X-Forwarded-Encrypted: i=1; AFNElJ+NoNE9/KVVRUrifC4tNFkjkce6sQ6sm5na5zHVIp5L5jpyDfbuGlxqEWb3MpsjH1sCZEjHgj1xZ1LBARE=@vger.kernel.org X-Gm-Message-State: AOJu0YwgFPwHz946B8sZAe3ncmqhpSfudYMUSl1chX9gI8lxLDFY5c7E RhXxO7a4FYKVHkGCJGTwLRlRCnWv8VTV5yx22wG3DENABwDv/IzXl5zRKH3EkDsF1hvin3ttGxB 3pg8bJHjIMuBgDvpNnRgSHPGQunzJvHK3sCdnY12bad/tB1MTaXObT1UZcvmoKKg0gqFPvYjJiy E= X-Gm-Gg: AeBDievEiNQtqM0uhQJoYmXsCjxq7zp4QfVYxkBr5oBY8EEPrxclTUTT23WUru0rQ7S +G+UqRATiOJZq/6TlI3mt5FSVsUyrhgwotJJYX5n3HzqKWzBHZVyvfnL1FQp1sG7D2Y0SF/R9fc vhnNkhaZ3mDhgy2o6V0/pfuwAbneN6Ypd17xOalNfioHbE43UQg5luuUzXY6xPQfPIm8Z3HhZfc 2IXMPDUfQFIf+52gb3leJymiVrTYBn/Is3NyQHbKW5Scdi6QEYCI4qA3ifHIaZxxyejNMmsnzde bH+sLYpJIuFroC00s+Qts9DZjJiRHHK9xc9e7l9EqbkhANbs6zIULR9P+x0EbalzBtPDTNlUuaz FgA0qh1qlp6xphacZfUnBsQ1v4LrU9nSrsQYmeNlO86MguDV9dHozunH+Z4Bq169OMMevBw== X-Received: by 2002:a17:903:2ac3:b0:2b0:6e4a:32d0 with SMTP id d9443c01a7336-2b97c4998d6mr75872785ad.35.1777464611518; Wed, 29 Apr 2026 05:10:11 -0700 (PDT) X-Received: by 2002:a17:903:2ac3:b0:2b0:6e4a:32d0 with SMTP id d9443c01a7336-2b97c4998d6mr75872395ad.35.1777464610980; Wed, 29 Apr 2026 05:10:10 -0700 (PDT) Received: from hu-dikshita-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b9887ad80bsm21482765ad.37.2026.04.29.05.10.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2026 05:10:10 -0700 (PDT) From: Dikshita Agarwal Date: Wed, 29 Apr 2026 17:39:47 +0530 Subject: [PATCH v4 1/3] media: iris: Switch to hardware mode after firmware boot Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-kodiak-gen2-support-v4-v4-1-1b607d13f9b8@oss.qualcomm.com> References: <20260429-kodiak-gen2-support-v4-v4-0-1b607d13f9b8@oss.qualcomm.com> In-Reply-To: <20260429-kodiak-gen2-support-v4-v4-0-1b607d13f9b8@oss.qualcomm.com> To: Vikash Garodia , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Vishnu Reddy , Hans Verkuil Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Dikshita Agarwal , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777464602; l=9744; i=dikshita.agarwal@oss.qualcomm.com; s=20240917; h=from:subject:message-id; bh=JnRla0VsUZ/m4SMTAiNGlJE2/J9PWBAkwn4jEyoUzLM=; b=bvFmLnl+bYtJzYLm0cAoIeItSW0BSNujxrUWukBcSI5J4M/l/xaF7KlLfuZpJv9iySHDDWhgO xdcbuseg9hCCs/wfplam0o2X0IJYW3Yfl9p9yHR+ivp4VnUcNAkaO2E X-Developer-Key: i=dikshita.agarwal@oss.qualcomm.com; a=ed25519; pk=EEvKY6Ar1OI5SWf44FJ1Ebo1KuQEVbbf5UNPO+UHVhM= X-Proofpoint-GUID: kSFrbCU7r7E_k0K-4dpO1f1kSn1h4HqV X-Proofpoint-ORIG-GUID: kSFrbCU7r7E_k0K-4dpO1f1kSn1h4HqV X-Authority-Analysis: v=2.4 cv=Wak8rUhX c=1 sm=1 tr=0 ts=69f1f524 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=8QxTX33zP25rWUhdfb4A:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI5MDEyMyBTYWx0ZWRfX4L/yVovI6yRb mrp52rDiTzu1ED03GkA0lDNAIhsBw3OHI51RdB3ayIKpB2D+eNoQ/kNNr/A2nKs1KwCKKH5EzrM ryPuJ4aI9R1ElESQflucaxQtgsiRjJu/7HT9ofsz7UjaGWeOkV9AvzavdRySHvcKcXq1IM3KgOL amdt6w4rgoOb3ql1uNB8sbKRqJ38gWW965Niz244bJo2+O1KNyKRtQRsu+g+xrG171+ipFahsNm vlUUny/GBgYCJiCcF+dRmaSoqHQZS+3vZWUaSeC/koKH4Sbqdxl2U8OWtrWt+EJmpiXIvt7ezrQ s0HvRhtAWnFJVhCwGUodq8HtEr70d90ZNB8j1EGdZlYAYCW7LAL9ceMCkkQN5m6AeKMkiW3kMIj CEosevQSgr9SMh1YO6fwqK7YBtsCONVbe/qKn/eEhAK18wc+3gERl6+J3prKF/pCSPXrvJZfi6l h/+W0C6iZt8kvJDOe4w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-28_05,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 suspectscore=0 spamscore=0 clxscore=1015 bulkscore=0 impostorscore=0 adultscore=0 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604290123 From: Vikash Garodia Currently the driver switches the vcodec GDSC to hardware (HW) mode before firmware load and boot sequence. GDSC can be powered off, keeping in hw mode, thereby the vcodec registers programmed in TrustZone (TZ) carry default (reset) values. Move the transition to HW mode after firmware load and boot sequence. The bug was exposed with driver configuring different stream ids to different devices via iommu-map. With registers carrying reset values, VPU would not generate desired stream-id, thereby leading to SMMU fault. The efuse tells us which hardware blocks are actually present. If efuse status is disabled for a block, the driver will skip powering it on or resetting it. otherwise the driver will perform the necessary resets and then switch that block into hardware mode. This makes sure we only touch hardware that really exists and is enabled on the silicon. Fixes: dde659d37036 ("media: iris: Introduce vpu ops for vpu4 with necessar= y hooks") Co-developed-by: Vishnu Reddy Signed-off-by: Vishnu Reddy Signed-off-by: Vikash Garodia Reviewed-by: Dikshita Agarwal Reviewed-by: Dmitry Baryshkov Signed-off-by: Dikshita Agarwal --- drivers/media/platform/qcom/iris/iris_core.c | 4 ++++ drivers/media/platform/qcom/iris/iris_hfi_common.c | 4 ++++ drivers/media/platform/qcom/iris/iris_vpu2.c | 1 + drivers/media/platform/qcom/iris/iris_vpu3x.c | 9 +++----- drivers/media/platform/qcom/iris/iris_vpu4x.c | 24 ++++++++++++------= ---- drivers/media/platform/qcom/iris/iris_vpu_common.c | 16 +++++++++------ drivers/media/platform/qcom/iris/iris_vpu_common.h | 3 +++ 7 files changed, 38 insertions(+), 23 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_core.c b/drivers/media/p= latform/qcom/iris/iris_core.c index e6141012cd3dda7e029a5659dcb3048a23cdc150..1f326f696d08014f5ebfeb0b99c= fed70665fd6ab 100644 --- a/drivers/media/platform/qcom/iris/iris_core.c +++ b/drivers/media/platform/qcom/iris/iris_core.c @@ -74,6 +74,10 @@ int iris_core_init(struct iris_core *core) if (ret) goto error_unload_fw; =20 + ret =3D iris_vpu_switch_to_hwmode(core); + if (ret) + goto error_unload_fw; + ret =3D iris_hfi_core_init(core); if (ret) goto error_unload_fw; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_common.c b/drivers/m= edia/platform/qcom/iris/iris_hfi_common.c index ad8e4ecb86052d0c4ec9338b2874293494471bc2..8769ec61f11769e004945063381= d9baddb302b06 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_common.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_common.c @@ -159,6 +159,10 @@ int iris_hfi_pm_resume(struct iris_core *core) if (ret) goto err_suspend_hw; =20 + ret =3D iris_vpu_switch_to_hwmode(core); + if (ret) + goto err_suspend_hw; + ret =3D ops->sys_interframe_powercollapse(core); if (ret) goto err_suspend_hw; diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/p= latform/qcom/iris/iris_vpu2.c index 9c103a2e4e4eafee101a8a9b168fdc8ca76e277d..01ef40f3895743b3784464e2d5b= a2de1aeca5a4a 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c @@ -44,4 +44,5 @@ const struct vpu_ops iris_vpu2_ops =3D { .power_off_controller =3D iris_vpu_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu2_calc_freq, + .set_hwmode =3D iris_vpu_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu3x.c b/drivers/media/= platform/qcom/iris/iris_vpu3x.c index fe4423b951b1e9e31d06dffc69d18071cc985731..3dad47be78b58f6cd5ed6f333b3= 376571a04dbf0 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu3x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu3x.c @@ -234,14 +234,8 @@ static int iris_vpu35_power_on_hw(struct iris_core *co= re) if (ret) goto err_disable_hw_free_clk; =20 - ret =3D dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER= _DOMAIN], true); - if (ret) - goto err_disable_hw_clk; - return 0; =20 -err_disable_hw_clk: - iris_disable_unprepare_clock(core, IRIS_HW_CLK); err_disable_hw_free_clk: iris_disable_unprepare_clock(core, IRIS_HW_FREERUN_CLK); err_disable_axi_clk: @@ -266,6 +260,7 @@ const struct vpu_ops iris_vpu3_ops =3D { .power_off_controller =3D iris_vpu_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; =20 const struct vpu_ops iris_vpu33_ops =3D { @@ -274,6 +269,7 @@ const struct vpu_ops iris_vpu33_ops =3D { .power_off_controller =3D iris_vpu33_power_off_controller, .power_on_controller =3D iris_vpu_power_on_controller, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; =20 const struct vpu_ops iris_vpu35_ops =3D { @@ -283,4 +279,5 @@ const struct vpu_ops iris_vpu35_ops =3D { .power_on_controller =3D iris_vpu35_vpu4x_power_on_controller, .program_bootup_registers =3D iris_vpu35_vpu4x_program_bootup_registers, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu4x.c b/drivers/media/= platform/qcom/iris/iris_vpu4x.c index a8db02ce5c5ec583c4027166b34ce51d3d683b4e..02e100a4045fced33d7a3545b63= 2cc5f0955233f 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu4x.c +++ b/drivers/media/platform/qcom/iris/iris_vpu4x.c @@ -252,21 +252,10 @@ static int iris_vpu4x_power_on_hardware(struct iris_c= ore *core) ret =3D iris_vpu4x_power_on_apv(core); if (ret) goto disable_hw_clocks; - - iris_vpu4x_ahb_sync_reset_apv(core); } =20 - iris_vpu4x_ahb_sync_reset_hardware(core); - - ret =3D iris_vpu4x_genpd_set_hwmode(core, true, efuse_value); - if (ret) - goto disable_apv_power_domain; - return 0; =20 -disable_apv_power_domain: - if (!(efuse_value & DISABLE_VIDEO_APV_BIT)) - iris_vpu4x_power_off_apv(core); disable_hw_clocks: iris_vpu4x_disable_hardware_clocks(core, efuse_value); disable_vpp1_power_domain: @@ -359,6 +348,18 @@ static void iris_vpu4x_power_off_hardware(struct iris_= core *core) iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWE= R_DOMAIN]); } =20 +static int iris_vpu4x_set_hwmode(struct iris_core *core) +{ + u32 efuse_value =3D readl(core->reg_base + WRAPPER_EFUSE_MONITOR); + + if (!(efuse_value & DISABLE_VIDEO_APV_BIT)) + iris_vpu4x_ahb_sync_reset_apv(core); + + iris_vpu4x_ahb_sync_reset_hardware(core); + + return iris_vpu4x_genpd_set_hwmode(core, true, efuse_value); +} + const struct vpu_ops iris_vpu4x_ops =3D { .power_off_hw =3D iris_vpu4x_power_off_hardware, .power_on_hw =3D iris_vpu4x_power_on_hardware, @@ -366,4 +367,5 @@ const struct vpu_ops iris_vpu4x_ops =3D { .power_on_controller =3D iris_vpu35_vpu4x_power_on_controller, .program_bootup_registers =3D iris_vpu35_vpu4x_program_bootup_registers, .calc_freq =3D iris_vpu3x_vpu4x_calculate_frequency, + .set_hwmode =3D iris_vpu4x_set_hwmode, }; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.c index c6cfc1d9fd9ec5a8f69462188a03aa5cb4e1cee9..7bba3b6209c2061dce72facab7c= 2b58d6b3bb9b9 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -292,14 +292,8 @@ int iris_vpu_power_on_hw(struct iris_core *core) if (ret && ret !=3D -ENOENT) goto err_disable_hw_clock; =20 - ret =3D dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER= _DOMAIN], true); - if (ret) - goto err_disable_hw_ahb_clock; - return 0; =20 -err_disable_hw_ahb_clock: - iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); err_disable_hw_clock: iris_disable_unprepare_clock(core, IRIS_HW_CLK); err_disable_power: @@ -308,6 +302,16 @@ int iris_vpu_power_on_hw(struct iris_core *core) return ret; } =20 +int iris_vpu_set_hwmode(struct iris_core *core) +{ + return dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_= DOMAIN], true); +} + +int iris_vpu_switch_to_hwmode(struct iris_core *core) +{ + return core->iris_platform_data->vpu_ops->set_hwmode(core); +} + int iris_vpu35_vpu4x_power_off_controller(struct iris_core *core) { u32 clk_rst_tbl_size =3D core->iris_platform_data->clk_rst_tbl_size; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.h index 07728c4c72b64bd15f4e4fdfdce90a5d4d6e9d3e..09799a375c1426d808ab5ea4fdf= cac3a203e15b3 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h @@ -21,6 +21,7 @@ struct vpu_ops { int (*power_on_controller)(struct iris_core *core); void (*program_bootup_registers)(struct iris_core *core); u64 (*calc_freq)(struct iris_inst *inst, size_t data_size); + int (*set_hwmode)(struct iris_core *core); }; =20 int iris_vpu_boot_firmware(struct iris_core *core); @@ -30,6 +31,8 @@ int iris_vpu_watchdog(struct iris_core *core, u32 intr_st= atus); int iris_vpu_prepare_pc(struct iris_core *core); int iris_vpu_power_on_controller(struct iris_core *core); int iris_vpu_power_on_hw(struct iris_core *core); +int iris_vpu_set_hwmode(struct iris_core *core); +int iris_vpu_switch_to_hwmode(struct iris_core *core); int iris_vpu_power_on(struct iris_core *core); int iris_vpu_power_off_controller(struct iris_core *core); void iris_vpu_power_off_hw(struct iris_core *core); --=20 2.34.1 From nobody Tue Jun 16 19:36:41 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 894803F7860 for ; Wed, 29 Apr 2026 12:10:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777464618; cv=none; b=tSNms7kstUV4mRX0c3vsgR8s1RVj7ZjwnPP60bvYOuVg8a2elDNoLjqHRsezQPyEKl3m11AVTwUGOFcBAy7oZ0NfhuQwU6KAeyNtZd0q/du7xMVrEfE7MilHJN/zTaMnYRZbYOmQY0MUmAx4zmvKbRHiWRJW2OiW405UBhE70iQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777464618; c=relaxed/simple; bh=qxvKX9/kALOOQ0fCmKsBP9ieR1fADfuvVGl6xKY/RII=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GFWLuyIrK2QDf+1jx/W1jWF49q14bGiUIoBfQ9nUPiKUpuCbnvzFxuxbv+ytTJyEeh8Z5UMLv8rEzahKt2Cxo5vWf/FWhCCJy9yK844Zo05qPo1sIz3X8+340vctTfbGGo0PkwfRj+D4KWS/QGnnJ/kKTQJ9mR/aER8coHjUZK0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=lI2BBOK2; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=FtxGM3LH; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="lI2BBOK2"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="FtxGM3LH" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63T8ppOo3752485 for ; Wed, 29 Apr 2026 12:10:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= MVJEwmzv8LNtLor1XkUcdHcBKYnBZzXeL7Dsfo+fVDM=; b=lI2BBOK2MRxnEoc+ yAbH6NZV/hY4cyltHgSoJYiNYeQF8Kpxu5SCElpVVpTtbccIuZyhhYLQci/cBICf yDAJJmX/G95GkwRRGtVG5zG5BFjVURBlIDLj7BddkgigSer7FsLBMdaDoNeDE9ej n8kZoBfvrEE6CIBW0PcF86uGtEN/aIZvxk5wrZcQ/+kfQieaZJu75tkRsKiM8Sqo 03fvUkClrFMP13MTGuvnqoO9iR6HG5HFebnGGu45NoOJ7YGdnNL6zbIXlq0H3/2K CDXauNVq//mRx0KBLcUtPUyzOrUGRqc8GFAjVZlsVbZRj332GWF/p6SzKuVbtfzU PqFCpw== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4duch1hedu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 29 Apr 2026 12:10:16 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-2b2d83e7461so216360035ad.3 for ; Wed, 29 Apr 2026 05:10:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1777464616; x=1778069416; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=MVJEwmzv8LNtLor1XkUcdHcBKYnBZzXeL7Dsfo+fVDM=; b=FtxGM3LHtNXl/TjGyT8azvP9+5oULrqr+sr+UjDBb9VL2PShNr5X3YTSVEYc0MUpng YqKKRMddcEdqwHEFRt7GfX3gC9LIgPgQvJ4Pj5bfcj9FTyuaG7dnSVup3fXWiJqDr1ae pSbj8HA9TyT8yxru45rwU78i8fdm9P2PVkbsrb2Ch+75glj+JEYBMRZvlbAB37xokGR2 WiFUHd66yXrdE86bTqvtbJEOR8Xi6kHnq2eDrbQSXgcGkvNKtJgUJUELfFEBeEnM9QB+ /Bo7vprbref0m3CKo8zMqeBOIPy+/taHP+CFO2cz2Fgw310k7SLe16tli1HkloZhuzI2 ifZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777464616; x=1778069416; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=MVJEwmzv8LNtLor1XkUcdHcBKYnBZzXeL7Dsfo+fVDM=; b=Rzfx5Xa4OmQsAeI9mt6kFMNv1LtRUaDHsOUf84961EGUuJ/khnxYInKqabshfHFUnI 4aov3FL5jLHbw7T3BkCvx67F5l2ona3nk+P7EXL41q6sedfn8WYxc2aDFI41sFg0T4mn /ygtXnCYOneryxqThOU7XjAicThqgsNAJUC8T1f5MuFAO3ZMTa6FfgI9i9bX3gYsxJAC zxP7gPoJb+L3CbStn3wJY7zHisZZIMfq4DXVHyVoSst4ezdvfHWOPqg5NnGCCbN/B1j/ 7irPPrWdvLBE/5VsnnUwGFKc0NJ8mh7VGVO0JK6MRrYxmIqnrikixIlp4VvaaIwdA8To dLmg== X-Forwarded-Encrypted: i=1; AFNElJ+g975gX7NEGKsxoSquqAdG3tEZeBRcx397K5QYXe+dtRC6IttRsG4ME2latDGqlvclQ0F6h65/+HV45Eg=@vger.kernel.org X-Gm-Message-State: AOJu0Yx7g+hzXIDN2m1kntWoroh+bOSQmjhJneSMHTNFOXDqzFA5jVVl x9l7g7URZxDYyxQtsM8gXRB7hdoXV/lhZeUmMYOZRT0bu5iVh6rQivZD8wJd4vGDDy2tVb9i4co Nb8fvI27lggrGkc1CMrtObhEOlwh4NbiHFwb/wAY/4E7O6G6F45VR/LLKcRThOowuKn0= X-Gm-Gg: AeBDieuS2mBFhSvom7lz0WBFzI/Soe8NtVPX6N3UGbEsqT8jCcyQ/qg6imC26zPB5ia SB2tIVXVizdZfYaMyFDeb1PdyU2CZr8aZvw/05YQWu2p6haRe8hzB3s+QDYa4h4dbzB1qLIuQUt umEzjOE2+FWAlGG/TNoiNa/fiptxT2dwu4827uB7A9zksUhcLAb1tn6wuoL8tzAwFPMJeg/Buv4 HFV7TQ61AY+FpHYOZ4hSCyAVaWzLL8dGdyEfEsnArt9ifC1RkrOPsNr9ecUMOhROzBpISSwGNh0 ch0E+PtOsBL4pWr/YV/cLXMeWvNicCgWjNbWVTYOEjkr9e7Q/D78kwSMAN5Aef7cp23xVdwrTg3 dhII45Ec/0i1Psve3TZaiaPizxNbB75twa+h1yY21p9PHiT7RfdrAHXQNZNvBSsSF6TYV4Q== X-Received: by 2002:a17:902:da81:b0:2b0:62dd:3a80 with SMTP id d9443c01a7336-2b97c4396e6mr79811765ad.17.1777464615574; Wed, 29 Apr 2026 05:10:15 -0700 (PDT) X-Received: by 2002:a17:902:da81:b0:2b0:62dd:3a80 with SMTP id d9443c01a7336-2b97c4396e6mr79811255ad.17.1777464615073; Wed, 29 Apr 2026 05:10:15 -0700 (PDT) Received: from hu-dikshita-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b9887ad80bsm21482765ad.37.2026.04.29.05.10.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2026 05:10:14 -0700 (PDT) From: Dikshita Agarwal Date: Wed, 29 Apr 2026 17:39:48 +0530 Subject: [PATCH v4 2/3] media: iris: Initialize HFI ops after firmware load in core init Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-kodiak-gen2-support-v4-v4-2-1b607d13f9b8@oss.qualcomm.com> References: <20260429-kodiak-gen2-support-v4-v4-0-1b607d13f9b8@oss.qualcomm.com> In-Reply-To: <20260429-kodiak-gen2-support-v4-v4-0-1b607d13f9b8@oss.qualcomm.com> To: Vikash Garodia , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Vishnu Reddy , Hans Verkuil Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Dikshita Agarwal , Bryan O'Donoghue , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777464602; l=1693; i=dikshita.agarwal@oss.qualcomm.com; s=20240917; h=from:subject:message-id; bh=qxvKX9/kALOOQ0fCmKsBP9ieR1fADfuvVGl6xKY/RII=; b=icFsHTnkuMqij49OkB0PaxhZHrYqYSdtIfHezOdrneZBbYa34AXuESTEV/BoDVcx7qxnsU0Uw FVKum5/FkXbAQ0z4ddCe+ohzU91V1VHhM64zsAdBkZ3jZjuF1r8iqEq X-Developer-Key: i=dikshita.agarwal@oss.qualcomm.com; a=ed25519; pk=EEvKY6Ar1OI5SWf44FJ1Ebo1KuQEVbbf5UNPO+UHVhM= X-Authority-Analysis: v=2.4 cv=arGCzyZV c=1 sm=1 tr=0 ts=69f1f528 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=u1mmxsKKFvk7TXqck8YA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI5MDEyMyBTYWx0ZWRfX99EIifxGFLgv WJV90VixPOYl28d0PoMQiatmO8dGsBlfK9AGNf1Y7OvWtq098/oa7CecC8ob8P2Su1FcXRekOc9 kDMBU3np3S4I9LIpNMGQy9Gojuggt4o/O2juTy11wgj31WdPzWT4RpOpSl1aVwF9IgepWRzBhpP jfbpjKAqDHchTU5X61SthKCIH7fetqBKfikPGkfUPWAP2eOT+m22HX+AXcwJj5dXSoOHRXBx87e GUEbVlDghl42a7TM08cZWRIDD0p3RGGAc7B0j3Et6oYGJgv/X6dl2qFWPhO1OdS/fppFmN1camc er/QuJefm5yHMPqZmRp2JDs64EEWgcmE2Ae0rFj/CYFLLmqydREU6WIU2pCDjEL89uSMXlyfJVe rZVFRAMkPHUip6qf0GC1TmoJuxs44PQz1nTus6nD7UcEPHnUDfOKWnfCeSTP9i25ICfxUT92llJ sQ6JoqRe0gKjKiXSKEw== X-Proofpoint-GUID: PqBSxul3K6IAKZCKnyxWzw5ZmNpjvjnL X-Proofpoint-ORIG-GUID: PqBSxul3K6IAKZCKnyxWzw5ZmNpjvjnL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-28_05,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 clxscore=1015 adultscore=0 impostorscore=0 spamscore=0 suspectscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604290123 The HFI sys ops were previously initialized in probe() but, we don't have firmware loaded at probe time. Since HFI is tightly coupled to firmware, initialize the HFI sys ops after firmware has been successfully loaded and booted. Reviewed-by: Bryan O'Donoghue Reviewed-by: Dmitry Baryshkov Signed-off-by: Dikshita Agarwal --- drivers/media/platform/qcom/iris/iris_core.c | 2 ++ drivers/media/platform/qcom/iris/iris_probe.c | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_core.c b/drivers/media/p= latform/qcom/iris/iris_core.c index 1f326f696d08014f5ebfeb0b99cfed70665fd6ab..52bf56e517f91e98569ee029861= 83971266e1c76 100644 --- a/drivers/media/platform/qcom/iris/iris_core.c +++ b/drivers/media/platform/qcom/iris/iris_core.c @@ -78,6 +78,8 @@ int iris_core_init(struct iris_core *core) if (ret) goto error_unload_fw; =20 + core->iris_firmware_data->init_hfi_ops(core); + ret =3D iris_hfi_core_init(core); if (ret) goto error_unload_fw; diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index d36f0c0e785b7de0e3527e0a824942db0fb79133..dbc15edc602b72fdec8bb2d8d36= 23676afee728c 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -266,7 +266,6 @@ static int iris_probe(struct platform_device *pdev) disable_irq_nosync(core->irq); =20 iris_init_ops(core); - core->iris_firmware_data->init_hfi_ops(core); =20 ret =3D iris_init_resources(core); if (ret) --=20 2.34.1 From nobody Tue Jun 16 19:36:41 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDC793F54C3 for ; Wed, 29 Apr 2026 12:10:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777464624; cv=none; b=glL1oxh2O5Eo2Gh+Ub7XAP5AQinGp9V5F9i9V114ZRrjE4jmeTnGzloSqdPZUZ7JuQf8jgTXMbyPz6fHVZeyOy6jZAYlX0za87VlFLJUpe69nMje3rFZK3CDR/oYQsMcCI0hQhM8aY+NXofHRyJZgls9DPGOcd8rNunTEDatP0E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777464624; c=relaxed/simple; bh=h2UUzucsk8OgUDX50TWQh+BW9hjfBqU2K+t7j/0DKFk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YZO9yA0DRT8L725wWk+35JENE4/uoIoxJFlImAonk+B1WWKtixl6aDXsP8+ns3d7H0bDtyq0DSctu4CNY0q/89MTfCHL41aShD21ajYcFIaTUlJnRvY6h5rmsxOnyberD21AOI+yq2hpKUKIhXMHOkP3dEKDTqWs143qScLb/Hw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=H/vmKR2A; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=bxNJH5Jg; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="H/vmKR2A"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="bxNJH5Jg" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63T8pqqC1641530 for ; Wed, 29 Apr 2026 12:10:21 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= LgZYPVV8q4Eq1ime62mL1tZaVZiXr7zsQre0dpby7oU=; b=H/vmKR2AqbsSVhUp pXndmWUN6ECtckR3t6vnYtHbmb6S5ge6c04rlJuVDr2B5/KW9hpzOurMtPNHvKYZ iQD2US9JYbJkWJ4BPsgneQUin/SO0D2inKypToTTmNjCtjp/ccPK03o3uZMHotkC L8u5nTBdXwWNkaMV0Vta9LkUJyUQLDzcEomJe6bX8VAqwOz/aNqwfQJ25E1qVC5y tOgOz2P8Xnvsw7hCLdnvHT+sOfqqazQCXtoJzQHwQ9N37KxnSGFPW2erF60DKvbj A2ABC28YQieWTEBqmBwOlUrLW6OdPK880ZawrgQKJk2TiEmy+vyPZBu6VQq0a2Ur 7mh9kA== Received: from mail-pl1-f197.google.com (mail-pl1-f197.google.com [209.85.214.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ducj81ecu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 29 Apr 2026 12:10:20 +0000 (GMT) Received: by mail-pl1-f197.google.com with SMTP id d9443c01a7336-2b24611696eso84717915ad.3 for ; Wed, 29 Apr 2026 05:10:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1777464620; x=1778069420; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LgZYPVV8q4Eq1ime62mL1tZaVZiXr7zsQre0dpby7oU=; b=bxNJH5JgFjHSPvSiV+WUIVSlF6dybRXagsMbj77EazGw32CsfQIx6VIQ7cMCJaHLWY fyYhFIxzSw6Qeby21Pwj8KVb8zdUqQG/aFEOnfYaxEr7UFgluyfK8j9/6It79NCJsg6n QRFuYvbcurqTVzU6JA2X0qcB15AeSVqmdbmcL4Znt8e4TMFWpjg+jrLIIrS+oyQfX8Uw MqvrE9xLsmQ97IlXxb5AO3Tf7WMixR/VU3pMJ44FGGNEgkLfTYz7jDxvuDAG7vV9v9iF QAaHxRMCUGjlt8yS/7tyttrLwVMMp0euIjhVNlUp89t1C+BoYa9wxWkbPLW5OkVk0OMi 5MUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777464620; x=1778069420; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=LgZYPVV8q4Eq1ime62mL1tZaVZiXr7zsQre0dpby7oU=; b=qVJEQlkzKxl0QwjuUaM7X4q2o4N2RWt5KtuF6gHn/7klJThkA9cBREl/vIuEwhF3ad OtHG/1gDn5mprG4qJ7CKD0aLKqsifmvITE9/ZNnsu8+Ai/nVhoi/eId9Mi9/culDNPT9 0tPNpSgZ7109X1eQHyE9Ffo6b5oN1SWfBThkYULoOC3YDBtdBfCQooZtGVdiLYuJCeV9 imjFRiitYmq0xkXr46h8F5ZCHbMLV1dnG/yfBXyNY4WaC9Tb6q1KZ62S1nJFAhRJQTbq ON+jwQXfKvqOeWTQ68fMA6a1d4PLUlFRgJlyWfzLK5HTz8c03IojJnjkz5PuKI9gkmG8 WwDQ== X-Forwarded-Encrypted: i=1; AFNElJ/zDdsJamgoz7Wxh0afTLlWK814ikhwWTXNyTtUQTvThJxZIGc6Q7NqiYfC3X3gRP2b6nOnhf4zx2pbFQo=@vger.kernel.org X-Gm-Message-State: AOJu0YykUSDHm81yhlpuo54+Yqbht3YxPZ+Krn35lxBJiGSaZEyCMoD+ v0GHUJWpLma3A2emQ1CygR8ii4ZiclDlfJ2a/KPHr8HQp3J/oV2OlzIBZWSMmCpHvU2HjYMTdDJ qOY1zmLcrt2QDio17J9QQJVkASpfPJuPZuUwIldefSmBFVs1WBVee7uTkQXZL0B+dhHk= X-Gm-Gg: AeBDieu7Ign4Gj7Lw1NI2D+1HGwSzKDH1CE1jenZVBEVrAtHSdoXzoZzHs9QxZ+G+0o My3HEIcjVLbIARRsgiELRytcMk++IWbTAcT+S7miTUXNrJ+eASjRmofXwZeHwo93046mZe7bNlE zz8YZplmi1++Hl2/95wCgwBs9Ukht1/YeKDza2NQru44+Hd0OXc9/Ckhm5dYRE+XS3MDBFtzyZJ eQ/jaTP+YZMTzArBJ+WQfoM9UOTvYhXLH7v0upBKFhcykOFGeLWIw8/NRWDvRGOYxpFX0pEotPu B1Ol2WuQ8G3yNpmlQhdYD2ep5lfuqtn2OQkVX6QA6wBDQB3k6Y4uCfuHWvEZf/mHgas3Cgztvy6 JxHHWWmRKI4oLbwnIf2I9OKYNxjobphwHFgSy8FckEpYtxG4VskEOK5RSYBv3sm2ZCGJYEw== X-Received: by 2002:a17:903:ac7:b0:2b0:60b2:4f8 with SMTP id d9443c01a7336-2b97c41dec2mr73613525ad.15.1777464619553; Wed, 29 Apr 2026 05:10:19 -0700 (PDT) X-Received: by 2002:a17:903:ac7:b0:2b0:60b2:4f8 with SMTP id d9443c01a7336-2b97c41dec2mr73613165ad.15.1777464619025; Wed, 29 Apr 2026 05:10:19 -0700 (PDT) Received: from hu-dikshita-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b9887ad80bsm21482765ad.37.2026.04.29.05.10.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2026 05:10:18 -0700 (PDT) From: Dikshita Agarwal Date: Wed, 29 Apr 2026 17:39:49 +0530 Subject: [PATCH v4 3/3] media: iris: Add Gen2 firmware autodetect and fallback Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-kodiak-gen2-support-v4-v4-3-1b607d13f9b8@oss.qualcomm.com> References: <20260429-kodiak-gen2-support-v4-v4-0-1b607d13f9b8@oss.qualcomm.com> In-Reply-To: <20260429-kodiak-gen2-support-v4-v4-0-1b607d13f9b8@oss.qualcomm.com> To: Vikash Garodia , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Vishnu Reddy , Hans Verkuil Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Dikshita Agarwal , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777464602; l=12649; i=dikshita.agarwal@oss.qualcomm.com; s=20240917; h=from:subject:message-id; bh=h2UUzucsk8OgUDX50TWQh+BW9hjfBqU2K+t7j/0DKFk=; b=C+J7Hz9oSbYBu1FAiaHadHYGvZO7TxcjoWUNjmsdNnZLSyepIpKzd4H+LRcThB1NF+8spAOdJ Xy3iTIbJu2rBfM2q/tOWqW61M2TKofj+DgeUwzcXEPmmqRgffeRj5tD X-Developer-Key: i=dikshita.agarwal@oss.qualcomm.com; a=ed25519; pk=EEvKY6Ar1OI5SWf44FJ1Ebo1KuQEVbbf5UNPO+UHVhM= X-Proofpoint-ORIG-GUID: 3F-iqRNO5b_HYJeFQK2MYORR3HWHe1Tf X-Authority-Analysis: v=2.4 cv=RI6D2Yi+ c=1 sm=1 tr=0 ts=69f1f52c cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=AJYS51BlHv6FyquiitgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-GUID: 3F-iqRNO5b_HYJeFQK2MYORR3HWHe1Tf X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI5MDEyMyBTYWx0ZWRfXwmVEw3QNg7xm xKOk/MPTFMxF9hUIjDx/dmQFXtAhoWWeWW2af0av3IHPeweFr0L5IAjip6zbqzYejrAvoBiFKOx kvixOrsGWo6Drt6AvW7Qtx+hkie3qP6KKiFT63ECogpbEA4DhcJeuWSD4gjAuRZan8RJ1BrLNkX O4/Ttq/0MchcbRCzctx3svuIbf/OfxOXIXMDFuCVOUvumqZ5p5e/sTnSgNq+Na60MrlGWF7pNBb y+r+U/i9w2wxcjSvm9k8wa8gnDFnfMeds68HqAiovGHwhlueh++WgBBLwtl1OH4FQsqissjGsp2 TkrP1QpKv5isNgdFyYUoLSfHn6bSFtqv6OIuy32xmWJn0Rqm5Gao0e9ishGAtqTVtZmJg4SIFIu bUrm7rQsiG3xpzSPaLuHAb8pBrm2KYxLXJK4q46r5B6f6ej0GURpvJO43MywcfZJlN2Qyptghd0 dRB5OT7sxydgKTd4vow== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-28_05,2026-04-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 impostorscore=0 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604290123 Some Iris platforms support both Gen1 and Gen2 HFI firmware images. Update the firmware loading logic to handle this generically by preferring Gen2 when available, while safely falling back to Gen1 when required. The firmware loading logic is updated with the following priority: 1. Device Tree (`firmware-name`): If specified, load unconditionally. 2. Gen2 default : If no DT override exists, select the Gen2 firmware descriptor when present and attempt to load the corresponding firmware image. 3. Gen1 Fallback: If loading the Gen2 firmware fails and a Gen1 descriptor is available, retry with the Gen1 firmware image. When a platform provides both Gen1 and Gen2 firmware descriptors and the firmware is loaded via a DT override, the driver detects the firmware generation at runtime before authentication by inspecting the firmware data. The firmware is classified as Gen2 if the QC_IMAGE_VERSION_STRING starts with "vfw" or matches the "video-firmware.N.M" format with N >=3D 2. If a Gen1 firmware image is detected in this case, the driver switches to the Gen1 firmware descriptor and associated platform data so that the correct HFI implementation is used. This change makes firmware generation detection platform=E2=80=91agnostic, preserves DT overrides, prefers newer Gen2 firmware when available, and maintains compatibility with platforms that only support Gen1. Co-developed-by: Dmitry Baryshkov Signed-off-by: Dmitry Baryshkov Signed-off-by: Dikshita Agarwal --- drivers/media/platform/qcom/iris/iris_firmware.c | 105 +++++++++++++++++= ---- .../platform/qcom/iris/iris_platform_common.h | 6 +- .../media/platform/qcom/iris/iris_platform_vpu2.c | 11 ++- .../media/platform/qcom/iris/iris_platform_vpu3x.c | 8 +- drivers/media/platform/qcom/iris/iris_probe.c | 4 - drivers/media/platform/qcom/iris/iris_vidc.c | 3 + 6 files changed, 105 insertions(+), 32 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_firmware.c b/drivers/med= ia/platform/qcom/iris/iris_firmware.c index 1a476146d7580849d7b68c7c15dd7f82f89a680b..64a2170bf538a6d291b3d909f55= 63408a3a75e50 100644 --- a/drivers/media/platform/qcom/iris/iris_firmware.c +++ b/drivers/media/platform/qcom/iris/iris_firmware.c @@ -16,20 +16,95 @@ =20 #define MAX_FIRMWARE_NAME_SIZE 128 =20 -static int iris_load_fw_to_memory(struct iris_core *core, const char *fw_n= ame) +/* Detect Gen2 firmware by scanning the blob for: + * QC_IMAGE_VERSION_STRING=3D + * and then checking: + * - version starts with "vfw", OR + * - version matches "video-firmware.N.M" with N >=3D 2 + */ + +static bool iris_detect_gen2_from_fwdata(const u8 *data, size_t size) +{ + const char *marker =3D "QC_IMAGE_VERSION_STRING=3D"; + const size_t mlen =3D strlen(marker); + int major =3D 0, minor =3D 0; + char version_buf[64]; + size_t max; + + max =3D (size > mlen) ? size - mlen : 0; + for (size_t i =3D 0; i < max; i++) { + if (!memcmp(data + i, marker, mlen)) { + const char *found =3D (const char *)(data + i + mlen); + + strscpy(version_buf, found, sizeof(version_buf)); + if (!strncmp(version_buf, "vfw", 3)) + return true; + if (sscanf(version_buf, "video-firmware.%d.%d", &major, &minor) =3D=3D = 2 && + major >=3D 2) + return true; + break; + } + } + + return false; +} + +static const struct firmware *iris_detect_firmware(struct iris_core *core, + const char **fw_name) +{ + const struct firmware *firmware; + bool has_both_gens; + int ret; + + *fw_name =3D NULL; + if (core->iris_platform_data->firmware_desc_gen2) + core->iris_firmware_desc =3D core->iris_platform_data->firmware_desc_gen= 2; + else if (core->iris_platform_data->firmware_desc_gen1) + core->iris_firmware_desc =3D core->iris_platform_data->firmware_desc_gen= 1; + else + return ERR_PTR(-EINVAL); + + has_both_gens =3D core->iris_platform_data->firmware_desc_gen2 && + core->iris_platform_data->firmware_desc_gen1; + + ret =3D of_property_read_string_index(dev_of_node(core->dev), "firmware-n= ame", 0, fw_name); + if (ret) { + *fw_name =3D core->iris_firmware_desc->fwname; + ret =3D request_firmware(&firmware, *fw_name, core->dev); + if (ret && has_both_gens) { + core->iris_firmware_desc =3D core->iris_platform_data->firmware_desc_ge= n1; + *fw_name =3D core->iris_firmware_desc->fwname; + ret =3D request_firmware(&firmware, *fw_name, core->dev); + } + + return ret ? ERR_PTR(ret) : firmware; + } + + ret =3D request_firmware(&firmware, *fw_name, core->dev); + if (ret) + return ERR_PTR(ret); + + if (has_both_gens && + !iris_detect_gen2_from_fwdata((const u8 *)firmware->data, firmware->s= ize)) { + dev_info(core->dev, "Gen1 FW detected in %s\n", *fw_name); + core->iris_firmware_desc =3D core->iris_platform_data->firmware_desc_gen= 1; + } + + return firmware; +} + +static int iris_load_fw_to_memory(struct iris_core *core) { const struct firmware *firmware =3D NULL; struct device *dev =3D core->dev; struct resource res; phys_addr_t mem_phys; + const char *fw_name; size_t res_size; ssize_t fw_size; void *mem_virt; int ret; =20 - if (strlen(fw_name) >=3D MAX_FIRMWARE_NAME_SIZE - 4) - return -EINVAL; - ret =3D of_reserved_mem_region_to_resource(dev->of_node, 0, &res); if (ret) return ret; @@ -37,9 +112,11 @@ static int iris_load_fw_to_memory(struct iris_core *cor= e, const char *fw_name) mem_phys =3D res.start; res_size =3D resource_size(&res); =20 - ret =3D request_firmware(&firmware, fw_name, dev); - if (ret) - return ret; + firmware =3D iris_detect_firmware(core, &fw_name); + if (IS_ERR(firmware)) + return PTR_ERR(firmware); + + core->iris_firmware_data =3D core->iris_firmware_desc->firmware_data; =20 fw_size =3D qcom_mdt_get_size(firmware); if (fw_size < 0 || res_size < (size_t)fw_size) { @@ -66,18 +143,12 @@ static int iris_load_fw_to_memory(struct iris_core *co= re, const char *fw_name) int iris_fw_load(struct iris_core *core) { const struct tz_cp_config *cp_config; - const char *fwpath =3D NULL; int i, ret; =20 - ret =3D of_property_read_string_index(core->dev->of_node, "firmware-name"= , 0, - &fwpath); - if (ret) - fwpath =3D core->iris_firmware_desc->fwname; - - ret =3D iris_load_fw_to_memory(core, fwpath); + ret =3D iris_load_fw_to_memory(core); if (ret) { - dev_err(core->dev, "firmware download failed\n"); - return -ENOMEM; + dev_err(core->dev, "firmware download failed %d\n", ret); + return ret; } =20 ret =3D qcom_scm_pas_auth_and_reset(IRIS_PAS_ID); @@ -99,7 +170,7 @@ int iris_fw_load(struct iris_core *core) } } =20 - return ret; + return 0; } =20 int iris_fw_unload(struct iris_core *core) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 0408d51188b27251986780de6b4672b155ab1005..7acb073f719746f57ebaa2afd90= 61db9239f860e 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -257,11 +257,7 @@ struct iris_firmware_desc { }; =20 struct iris_platform_data { - /* - * XXX: replace with gen1 / gen2 pointers once we have platforms - * supporting both firmware kinds. - */ - const struct iris_firmware_desc *firmware_desc; + const struct iris_firmware_desc *firmware_desc_gen1, *firmware_desc_gen2; =20 const struct vpu_ops *vpu_ops; const struct icc_info *icc_tbl; diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu2.c b/driver= s/media/platform/qcom/iris/iris_platform_vpu2.c index 00d6244bc92fd9216bd7c0e6153689e7d8982a67..8259709ba203eac2230da304816= 6b33892b337b2 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_vpu2.c @@ -22,6 +22,12 @@ const struct iris_firmware_desc iris_vpu20_p1_gen1_desc = =3D { .fwname =3D "qcom/vpu/vpu20_p1.mbn", }; =20 +const struct iris_firmware_desc iris_vpu20_p1_gen2_s6_desc =3D { + .firmware_data =3D &iris_hfi_gen2_data, + .get_vpu_buffer_size =3D iris_vpu33_buf_size, + .fwname =3D "qcom/vpu/vpu20_p1_gen2_s6.mbn", +}; + const struct iris_firmware_desc iris_vpu20_p4_gen1_desc =3D { .firmware_data =3D &iris_hfi_gen1_data, .get_vpu_buffer_size =3D iris_vpu_buf_size, @@ -65,7 +71,8 @@ static const struct tz_cp_config tz_cp_config_vpu2[] =3D { }; =20 const struct iris_platform_data sc7280_data =3D { - .firmware_desc =3D &iris_vpu20_p1_gen1_desc, + .firmware_desc_gen1 =3D &iris_vpu20_p1_gen1_desc, + .firmware_desc_gen2 =3D &iris_vpu20_p1_gen2_s6_desc, .vpu_ops =3D &iris_vpu2_ops, .icc_tbl =3D iris_icc_info_vpu2, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu2), @@ -94,7 +101,7 @@ const struct iris_platform_data sc7280_data =3D { }; =20 const struct iris_platform_data sm8250_data =3D { - .firmware_desc =3D &iris_vpu20_p4_gen1_desc, + .firmware_desc_gen1 =3D &iris_vpu20_p4_gen1_desc, .vpu_ops =3D &iris_vpu2_ops, .icc_tbl =3D iris_icc_info_vpu2, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu2), diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c b/drive= rs/media/platform/qcom/iris/iris_platform_vpu3x.c index 6180104f3b94bf0d5e3206481816802fbd09849d..829dc37b4058101e7dddd484533= 724272b502560 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c +++ b/drivers/media/platform/qcom/iris/iris_platform_vpu3x.c @@ -83,7 +83,7 @@ static const struct tz_cp_config tz_cp_config_vpu3[] =3D { * - inst_caps to platform_inst_cap_qcs8300 */ const struct iris_platform_data qcs8300_data =3D { - .firmware_desc =3D &iris_vpu30_p4_s6_gen2_desc, + .firmware_desc_gen2 =3D &iris_vpu30_p4_s6_gen2_desc, .vpu_ops =3D &iris_vpu3_ops, .icc_tbl =3D iris_icc_info_vpu3x, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu3x), @@ -112,7 +112,7 @@ const struct iris_platform_data qcs8300_data =3D { }; =20 const struct iris_platform_data sm8550_data =3D { - .firmware_desc =3D &iris_vpu30_p4_gen2_desc, + .firmware_desc_gen2 =3D &iris_vpu30_p4_gen2_desc, .vpu_ops =3D &iris_vpu3_ops, .icc_tbl =3D iris_icc_info_vpu3x, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu3x), @@ -147,7 +147,7 @@ const struct iris_platform_data sm8550_data =3D { * - controller_rst_tbl to sm8650_controller_reset_table */ const struct iris_platform_data sm8650_data =3D { - .firmware_desc =3D &iris_vpu33_p4_gen2_desc, + .firmware_desc_gen2 =3D &iris_vpu33_p4_gen2_desc, .vpu_ops =3D &iris_vpu33_ops, .icc_tbl =3D iris_icc_info_vpu3x, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu3x), @@ -178,7 +178,7 @@ const struct iris_platform_data sm8650_data =3D { }; =20 const struct iris_platform_data sm8750_data =3D { - .firmware_desc =3D &iris_vpu35_p4_gen2_desc, + .firmware_desc_gen2 =3D &iris_vpu35_p4_gen2_desc, .vpu_ops =3D &iris_vpu35_ops, .icc_tbl =3D iris_icc_info_vpu3x, .icc_tbl_size =3D ARRAY_SIZE(iris_icc_info_vpu3x), diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index dbc15edc602b72fdec8bb2d8d3623676afee728c..89426ed42facca7729c987c5b28= 3d11e862e4fe1 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -251,8 +251,6 @@ static int iris_probe(struct platform_device *pdev) return core->irq; =20 core->iris_platform_data =3D of_device_get_match_data(core->dev); - core->iris_firmware_desc =3D core->iris_platform_data->firmware_desc; - core->iris_firmware_data =3D core->iris_firmware_desc->firmware_data; =20 core->ubwc_cfg =3D qcom_ubwc_config_get_data(); if (IS_ERR(core->ubwc_cfg)) @@ -271,8 +269,6 @@ static int iris_probe(struct platform_device *pdev) if (ret) return ret; =20 - iris_session_init_caps(core); - ret =3D v4l2_device_register(dev, &core->v4l2_dev); if (ret) return ret; diff --git a/drivers/media/platform/qcom/iris/iris_vidc.c b/drivers/media/p= latform/qcom/iris/iris_vidc.c index 807c9a20b6ba17fdda8e7e91956bdf19e83a3ad8..6fbc20366f5fd3a80468d90d813= 851ecf54e4cef 100644 --- a/drivers/media/platform/qcom/iris/iris_vidc.c +++ b/drivers/media/platform/qcom/iris/iris_vidc.c @@ -9,6 +9,7 @@ #include #include =20 +#include "iris_ctrls.h" #include "iris_vidc.h" #include "iris_instance.h" #include "iris_vdec.h" @@ -196,6 +197,8 @@ int iris_open(struct file *filp) goto fail_m2m_release; } =20 + iris_session_init_caps(core); + if (inst->domain =3D=3D DECODER) ret =3D iris_vdec_inst_init(inst); else if (inst->domain =3D=3D ENCODER) --=20 2.34.1