From nobody Tue Jun 16 18:09:07 2026 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14F4842317D for ; Wed, 29 Apr 2026 19:00:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777489234; cv=none; b=PqMeevCQhQbFmiRzGhaIqESzdPvUKL+iCtAYM5S4xADr7jFz0WAZiecRu8N8dOHSX+tgQynUreT9gZpnSzgdi2z2D6nBWZcewcLcuN+pMWF2upm4o4h/mT03CZAekIlvi3d4D5DljlD7NHvb3Wow2v2jcTm4Ac0apE21K42ROIc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777489234; c=relaxed/simple; bh=zG+o0MhzCy1MhAPEPaaXMKj2DtTAIlj69kKyo11vWYM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Retj/Ba8pIZv3VZhmtyjvi3+RejSsPOMrA4SQKI8xB9EvQEw4k+cBvLaszhpRSjiwr9M9eoBBQ4D/vu+fEHl9QY1TxkyKSQU+MrG5R6iOyN1KrL/JLgfmProbpMNAQ+5nKC03WmeSeU29ANISanUdkd6bquw22pnK+sPbjjQVyI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=olGne8yx; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="olGne8yx" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-483487335c2so1002785e9.2 for ; Wed, 29 Apr 2026 12:00:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1777489230; x=1778094030; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=+JAhGZcmG5DTNoPpP7LuatJXcV6lbxNbVHpf0DkS0EQ=; b=olGne8yxcmCXqBWeRmexhG9r2AGiZXQVItjA7r8YD7IJvxKP0pQMi2Ki62l9g9TIYK W9ueDVmUiNmdm4u9TGg7SGif7Gy2We4lC0XJumLSEfHNQFb7DFQJgcuTNdxpwtjCvdmI Y9PTBGkHzkGVEUw1TtVlo/sZU/VQQTQmfypUn0b1p3QqWym2gR7pg04RJDhMLv+rurK4 Z655C8YVdRRYWUmIaFbgE4KllW1f1K98Kjs0ixG5A74qFmOrx5AW5rOfW/CTCKOEmEJJ FS8orPv/PLPQF8t71t+x06loIUIil6v+GgCe3470RviGEUwgM0uU4xFGgEIUsvZy6IqQ aBXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777489230; x=1778094030; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=+JAhGZcmG5DTNoPpP7LuatJXcV6lbxNbVHpf0DkS0EQ=; b=QtrgD/0k7WFnM+7kOn+V4o4jdMyH7Koa1XPn/Yi4EVOwVVmtG3ck2E35vu1Ol9Era/ v7/cjL+l9rVQw7Trp6QE+Y8/pjc74eMviLZa1JEJxQe4kuNzTIMcCj4bmgOGbnMV8Emm KwIszhb/0alhBfjuKhzIawrcpfA9Lqu4/qWSYiO73YlYn9X27qC/dKwx/MaCy4EUuCfb r7p0+gd2lYNolIcLqCMPcHlIM91W03+o9F9xlSdD1JEBgHHGYb3AfKMANnkHFklamUL8 zc/feujsqY/JOECcx9twopFzjIxGOEw9th/2TgdV/aT5wyF1YAdGGJaHO1EzfpCJAdOd QgRg== X-Forwarded-Encrypted: i=1; AFNElJ/cT5PPKvxCcd1bxGiDfGxYnD/uDfTSninoF1l8dBuiLcIR1YosIZLmxd4pi0ylNfgneq3s03mtqrMUuFY=@vger.kernel.org X-Gm-Message-State: AOJu0YzOllCfejwUaHbw855xAD8Mu9al49MBLw8F915GE4oNGOzuMb3T CYK2Oiiov08V8IDqigICF0xJA8ZepVsL5P4mC77lV4UojzEpzZuqHWjbHwrTtWzUqHs= X-Gm-Gg: AeBDieuMT76qaT7UmCKBZxmTxdKMIF70gl/Yvk7yk1EKfDxiZ3sTQB0MIbW7y+acrqZ GbApGpIEQ523iA9tcQU1PzPu7/rDN+8d6Oti/bqUj3UcqGQ016IGQ93na5Ytdrjg6bULRbjP0jK 7JDqvRrhPPaVbWbjIFlOiLrbGsRHoGjiLX3HT/dEv14x3MejUmmXDsnhx3ZHo0goRngZ4K/Lgbk 6Mh+gYvIhowCHiXPgJ+7Qu3zQhMlZ9qIZnpwDh4P+LXS6aJOQJv+9WLH2/qq+WiOIvfDsQzAmA3 9nqO37il7fb6pawiZ7DWFECwVttaGfGe6ZpdxB0iRQ7syLTZEbm8qHWu1kuBAQn5G84GbO4Gt4+ dTDyD611+ZryLbk2DRdRyCi9jpnQtNjtoAamzLuLoNBowddGUCAnv5lmA1FaE7v+Fonkh6IB4Vp w1K9oHmYlzxAz/qxmmZ8lMKrcNNGKlVv+yJcTD9MXPRBqffs8A3AI9r6KLuWbgqaIu1aSs3sKWV sKYweQ+AwLMcJ5KT71aBnzMbtM= X-Received: by 2002:a05:600c:1396:b0:48a:5565:ec3d with SMTP id 5b1f17b1804b1-48a77b1b85fmr145395505e9.22.1777489230144; Wed, 29 Apr 2026 12:00:30 -0700 (PDT) Received: from [127.0.1.1] ([94.4.195.193]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a7b900b40sm26187785e9.2.2026.04.29.12.00.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2026 12:00:29 -0700 (PDT) From: Alexey Klimov Date: Wed, 29 Apr 2026 20:00:24 +0100 Subject: [PATCH v3 1/2] dt-bindings: mailbox: google,gs101-mbox: Add samsung,exynos850-mbox Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-exynos850-ap2apm-mailbox-v3-1-8e2719608c46@linaro.org> References: <20260429-exynos850-ap2apm-mailbox-v3-0-8e2719608c46@linaro.org> In-Reply-To: <20260429-exynos850-ap2apm-mailbox-v3-0-8e2719608c46@linaro.org> To: Krzysztof Kozlowski , Sam Protsenko , Rob Herring , Conor Dooley , Tudor Ambarus , Jassi Brar , Alim Akhtar Cc: Krzysztof Kozlowski , Peter Griffin , linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Klimov , Krzysztof Kozlowski X-Mailer: b4 0.14.3 Document support for a mailbox present on Exynos850-based platforms. The registers offsets are different from gs101 mailbox, but the workflow is similar, hence new compatible. Reviewed-by: Tudor Ambarus Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alexey Klimov Reviewed-by: Peter Griffin --- Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.ya= ml b/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml index e249db4c1fbc..c109c1f7af24 100644 --- a/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml +++ b/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml @@ -20,7 +20,9 @@ description: =20 properties: compatible: - const: google,gs101-mbox + enum: + - google,gs101-mbox + - samsung,exynos850-mbox =20 reg: maxItems: 1 --=20 2.51.0 From nobody Tue Jun 16 18:09:07 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C9A033F59B for ; Wed, 29 Apr 2026 19:00:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777489235; cv=none; b=rTb4MIEdseXfweyCQZlFegkNa89NNWVJkG+xtmLQasvGiuFCbGbgwmhdiQuc1WC7eWnURty6bYHY6RoSPaBLgGvsK9A0HufsmRtN1tJZFCLCGJIU+WlQ7EmA5HwS3VWmptA2qUlJwo8FSSdvyzYHsEqw7yjvD+GUq+9HQdJVNik= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777489235; c=relaxed/simple; bh=2wrIkCg2F0ORc8+hMPtq5Mv5GcVpiU80g1pcRdLD/fE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VZKAlcXvT2ayeHZglALqrBZ0fh8eOSX5nUxf86ZdrzfyVbiHLFZFCEyq/w6MAQ5xUIytUSst0MayyfTVxezypJVjNslOWBeznmQnyermK0hxoE3v05SFmth/bBhS52/0MYT5LsZ0tyiRG7XMhr7yIX9sJv4iE7KiLJSEG24rf40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Xrkp8dJx; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Xrkp8dJx" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-488ab2db91aso1012725e9.3 for ; Wed, 29 Apr 2026 12:00:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1777489232; x=1778094032; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=qBYA5nKt8YmzIPAJc6uOBQ1k/4UmKz7MxOXdNyaxiqk=; b=Xrkp8dJxjf3OIyIE4gAktt2vidMxt9afGtxdvsh8l8UDjH1rwJ/LmVle2LmltkP/ow GSHbOd07Sqs5v4a/QV5UEK0qvzw4IyU4y+zLZz/3vTu+9JFLQDlI4iuJjtwrT7RbInVB bQitzJHLeeO45nelM7z/KVDx+0gxNYTGUGatlWicpgZuIgFbsXLuaYBMifTZZ3zfsi1u laU4L8tjjrnRGdIXlqzVj7JkUhtFJEiZEEq72yKPkr/bIx0ABMWwTqAz60PX77WSGxL3 oEvjs9QFfKCw8RJPkUmHmoGhHFGPZy9gUB8OV+jBaCngTKii9eBsGZD2ebvUyGLrT0IR A6nA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777489232; x=1778094032; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=qBYA5nKt8YmzIPAJc6uOBQ1k/4UmKz7MxOXdNyaxiqk=; b=HxcN+c492YLrYNiBfIIIL4kzgev9xPA1PqsLFCCwp+20/oXs1d2/9rdE7P9CveiRYM By7Aat4/XNkLW+eIFGz8F9P2F6M1PvcLphTu+9PY2b7MnWKcZ0IcOK1awJFxdpNRb/uX U++REtEBIOgDiyCnqW7UE/kAmCHOWipizqSCx03JlL8G4WTT18cXbkNNsJolmNJh3EcG NRzL5oiSuP+Xx71WCHzP9hQL4CoIKxc6SWsF7xBNIztg6XZfVNbMndOZ0ru1pg3O7lOo AImZ9AH6td/24C+5jfYN7F6nMR0LVannuEIVTa0FGHb7J9OUlUP6nv4nVMceYVyd/3CS ctsg== X-Forwarded-Encrypted: i=1; AFNElJ++LA8kzx6qaOZx9srR5OTFQa5jDbsXf/v/cQE8QWyI3cNj43m/p8HVkeo/k8jnP4VOEe/cqQficTeMeOU=@vger.kernel.org X-Gm-Message-State: AOJu0YzzY+xWCsMRPtwixdwd0u6vXh0PLhkIxJoEgJdXHnNgpV+RAuwZ XbfwxUtXD1Xe2VJbixtb1gNV+TnRhswdmY5EcjowUQsQZQuxd47gT2B2FzB03M4/9CtrkRYIpDQ RJU9VTco= X-Gm-Gg: AeBDiet5YlLemqqtvyFcIVTPtEAshahC/dR41VfWPPM6OcVmUgcMDD1Ie+Vlri3SJzh SEg0Dr3EGPHWMzHt+j1tzFUEczz9dIoTr/sFkCEx9sHmRMAbKmeELJb+tvfsRvgiBRoPO6zvCHY B1BJ57QNUYuaOIqG4RAcPtLekzrP3DXQpoO4YypLi9i321HOKqUkmcHCbW4y1Alp+/9gjC8j5NM biAvsg0Hf/JeuP1rm19k7t//fZVd4T1WDUJhAFalH+kDLZHMGXhAA78m3fxDMHKqtE6BQltpCUE 4NEBup2p5Mk2xCUOzyp+pU8lJjo75Jfc9b3pkKeA3qNgahDC+f2aqCm3t3lKb+jkRN4b9wp35lt dSCFT3CA1HCuMouz3CEc+C1hZh6K6oII0e9sU4ea0BaQjIGDnlTMqN0sW37t6QD+nFSvpXcDKdB Ml5tR4aXG9mOcnPaxnE75phqFqFcgp0+AZEOeZr65QqSncMLkhiWB+v/7G4lFWPxHFNp5gVV04o GPMKLWbqWHOCzjVBmM/q6jzdRc= X-Received: by 2002:a05:600c:a409:b0:486:fba7:b150 with SMTP id 5b1f17b1804b1-48a7b531980mr72931285e9.15.1777489231411; Wed, 29 Apr 2026 12:00:31 -0700 (PDT) Received: from [127.0.1.1] ([94.4.195.193]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a7b900b40sm26187785e9.2.2026.04.29.12.00.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2026 12:00:30 -0700 (PDT) From: Alexey Klimov Date: Wed, 29 Apr 2026 20:00:25 +0100 Subject: [PATCH v3 2/2] mailbox: exynos: Add support for Exynos850 mailbox Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260429-exynos850-ap2apm-mailbox-v3-2-8e2719608c46@linaro.org> References: <20260429-exynos850-ap2apm-mailbox-v3-0-8e2719608c46@linaro.org> In-Reply-To: <20260429-exynos850-ap2apm-mailbox-v3-0-8e2719608c46@linaro.org> To: Krzysztof Kozlowski , Sam Protsenko , Rob Herring , Conor Dooley , Tudor Ambarus , Jassi Brar , Alim Akhtar Cc: Krzysztof Kozlowski , Peter Griffin , linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alexey Klimov , Krzysztof Kozlowski X-Mailer: b4 0.14.3 Exynos850-based platforms support ACPM and has similar workflow of communicating with ACPM via mailbox, however mailbox controller registers are located at different offsets and writes/reads could be different. To distinguish between such different behaviours, the registers offsets for Exynos850 and the platform-specific data structs are introduced and configuration is described in such structs for gs101 and exynos850 based SoCs. Probe routine now selects the corresponding platform-specific data via device_get_match_data(). Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alexey Klimov --- drivers/mailbox/exynos-mailbox.c | 59 ++++++++++++++++++++++++++++++++++++= ++-- 1 file changed, 56 insertions(+), 3 deletions(-) diff --git a/drivers/mailbox/exynos-mailbox.c b/drivers/mailbox/exynos-mail= box.c index d2355b128ba4..11657dd475c0 100644 --- a/drivers/mailbox/exynos-mailbox.c +++ b/drivers/mailbox/exynos-mailbox.c @@ -31,14 +31,52 @@ =20 #define EXYNOS_MBOX_CHAN_COUNT HWEIGHT32(EXYNOS_MBOX_INTGR1_MASK) =20 +#define EXYNOS850_MBOX_INTGR0 0x8 /* Interrupt Generation Register 0 */ +#define EXYNOS850_MBOX_INTMR1 0x24 /* Interrupt Mask Register 1 */ + +#define EXYNOS850_MBOX_INTMR1_MASK GENMASK(15, 0) + +/** + * struct exynos_mbox_driver_data - platform-specific mailbox configuratio= n. + * @intgr: offset to the IRQ generation register, doorbell + * to APM co-processor. + * @intgr_shift: shift to apply to the value written to IRQ generation + * register. + * @intmr: offset to the IRQ mask register. + * @intmr_mask: value to write to the mask register to mask out all + * interrupts. + */ +struct exynos_mbox_driver_data { + u16 intgr; + u16 intgr_shift; + u16 intmr; + u16 intmr_mask; +}; + /** * struct exynos_mbox - driver's private data. * @regs: mailbox registers base address. * @mbox: pointer to the mailbox controller. + * @data: pointer to driver platform-specific data. */ struct exynos_mbox { void __iomem *regs; struct mbox_controller *mbox; + const struct exynos_mbox_driver_data *data; +}; + +static const struct exynos_mbox_driver_data exynos850_mbox_data =3D { + .intgr =3D EXYNOS850_MBOX_INTGR0, + .intgr_shift =3D 16, + .intmr =3D EXYNOS850_MBOX_INTMR1, + .intmr_mask =3D EXYNOS850_MBOX_INTMR1_MASK, +}; + +static const struct exynos_mbox_driver_data exynos_gs101_mbox_data =3D { + .intgr =3D EXYNOS_MBOX_INTGR1, + .intgr_shift =3D 0, + .intmr =3D EXYNOS_MBOX_INTMR0, + .intmr_mask =3D EXYNOS_MBOX_INTMR0_MASK, }; =20 static int exynos_mbox_send_data(struct mbox_chan *chan, void *data) @@ -57,7 +95,9 @@ static int exynos_mbox_send_data(struct mbox_chan *chan, = void *data) return -EINVAL; } =20 - writel(BIT(msg->chan_id), exynos_mbox->regs + EXYNOS_MBOX_INTGR1); + /* Ring the doorbell */ + writel(BIT(msg->chan_id) << exynos_mbox->data->intgr_shift, + exynos_mbox->regs + exynos_mbox->data->intgr); =20 return 0; } @@ -87,13 +127,21 @@ static struct mbox_chan *exynos_mbox_of_xlate(struct m= box_controller *mbox, } =20 static const struct of_device_id exynos_mbox_match[] =3D { - { .compatible =3D "google,gs101-mbox" }, + { + .compatible =3D "google,gs101-mbox", + .data =3D &exynos_gs101_mbox_data + }, + { + .compatible =3D "samsung,exynos850-mbox", + .data =3D &exynos850_mbox_data + }, {}, }; MODULE_DEVICE_TABLE(of, exynos_mbox_match); =20 static int exynos_mbox_probe(struct platform_device *pdev) { + const struct exynos_mbox_driver_data *data; struct device *dev =3D &pdev->dev; struct exynos_mbox *exynos_mbox; struct mbox_controller *mbox; @@ -122,6 +170,11 @@ static int exynos_mbox_probe(struct platform_device *p= dev) return dev_err_probe(dev, PTR_ERR(pclk), "Failed to enable clock.\n"); =20 + data =3D device_get_match_data(&pdev->dev); + if (!data) + return -ENODEV; + + exynos_mbox->data =3D data; mbox->num_chans =3D EXYNOS_MBOX_CHAN_COUNT; mbox->chans =3D chans; mbox->dev =3D dev; @@ -133,7 +186,7 @@ static int exynos_mbox_probe(struct platform_device *pd= ev) platform_set_drvdata(pdev, exynos_mbox); =20 /* Mask out all interrupts. We support just polling channels for now. */ - writel(EXYNOS_MBOX_INTMR0_MASK, exynos_mbox->regs + EXYNOS_MBOX_INTMR0); + writel(data->intmr_mask, exynos_mbox->regs + data->intmr); =20 return devm_mbox_controller_register(dev, mbox); } --=20 2.51.0