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Tue, 28 Apr 2026 13:07:31 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:4ff5:9607:c7e5:48f3]) by smtp.gmail.com with UTF8SMTPSA id 5a478bee46e88-2ed0a10650esm2873589eec.22.2026.04.28.13.07.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Apr 2026 13:07:30 -0700 (PDT) From: Brian Norris To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Heiko Stuebner , Matthias Brugger , AngeloGioacchino Del Regno , Bjorn Andersson , Konrad Dybcio Cc: devicetree@vger.kernel.org, Doug Anderson , linux-arm-kernel@lists.infradead.org, Tzung-Bi Shih , chrome-platform@lists.linux.dev, Brian Norris , linux-rockchip@lists.infradead.org, Julius Werner , Alim Akhtar , cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/7] arm64: dts: rockchip: Add #{address,size}-cells to Chromium-based /firmware Date: Tue, 28 Apr 2026 13:06:53 -0700 Message-ID: <20260428200712.2660635-2-briannorris@chromium.org> X-Mailer: git-send-email 2.54.0.545.g6539524ca2-goog In-Reply-To: <20260428200712.2660635-1-briannorris@chromium.org> References: <20260428200712.2660635-1-briannorris@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: ## From a RK3399 Gru/Kevin Chromebook: # find /sys/firmware/devicetree/base/firmware /sys/firmware/devicetree/base/firmware /sys/firmware/devicetree/base/firmware/coreboot /sys/firmware/devicetree/base/firmware/coreboot/ram-code /sys/firmware/devicetree/base/firmware/coreboot/compatible /sys/firmware/devicetree/base/firmware/coreboot/board-id /sys/firmware/devicetree/base/firmware/coreboot/reg /sys/firmware/devicetree/base/firmware/coreboot/name /sys/firmware/devicetree/base/firmware/chromeos /sys/firmware/devicetree/base/firmware/chromeos/readonly-firmware-version /sys/firmware/devicetree/base/firmware/chromeos/active-ec-firmware /sys/firmware/devicetree/base/firmware/chromeos/firmware-version /sys/firmware/devicetree/base/firmware/chromeos/nonvolatile-context-stora= ge /sys/firmware/devicetree/base/firmware/chromeos/vboot-shared-data /sys/firmware/devicetree/base/firmware/chromeos/nonvolatile-context-size /sys/firmware/devicetree/base/firmware/chromeos/nonvolatile-context-offset /sys/firmware/devicetree/base/firmware/chromeos/hardware-id /sys/firmware/devicetree/base/firmware/chromeos/compatible /sys/firmware/devicetree/base/firmware/chromeos/firmware-type /sys/firmware/devicetree/base/firmware/chromeos/fmap-offset /sys/firmware/devicetree/base/firmware/chromeos/name /sys/firmware/devicetree/base/firmware/ranges /sys/firmware/devicetree/base/firmware/name The /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot= _table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-= translatable addresses") Signed-off-by: Brian Norris Reviewed-by: Chen-Yu Tsai Reviewed-by: Douglas Anderson --- arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot= /dts/rockchip/rk3399-gru.dtsi index 7eca1da78cff..2f9e39671efc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi @@ -18,6 +18,11 @@ chosen { stdout-path =3D "serial2:115200n8"; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + /* * Power Tree * --=20 2.54.0.545.g6539524ca2-goog From nobody Wed Jun 17 01:54:34 2026 Received: from mail-dy1-f171.google.com (mail-dy1-f171.google.com [74.125.82.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C9C53C0607 for ; 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Tue, 28 Apr 2026 13:07:34 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:4ff5:9607:c7e5:48f3]) by smtp.gmail.com with UTF8SMTPSA id 5a478bee46e88-2ed09fb6b8asm3015155eec.8.2026.04.28.13.07.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Apr 2026 13:07:34 -0700 (PDT) From: Brian Norris To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Heiko Stuebner , Matthias Brugger , AngeloGioacchino Del Regno , Bjorn Andersson , Konrad Dybcio Cc: devicetree@vger.kernel.org, Doug Anderson , linux-arm-kernel@lists.infradead.org, Tzung-Bi Shih , chrome-platform@lists.linux.dev, Brian Norris , linux-rockchip@lists.infradead.org, Julius Werner , Alim Akhtar , cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/7] ARM: dts: rockchip: Add #{address,size}-cells to Chromium-based /firmware Date: Tue, 28 Apr 2026 13:06:54 -0700 Message-ID: <20260428200712.2660635-3-briannorris@chromium.org> X-Mailer: git-send-email 2.54.0.545.g6539524ca2-goog In-Reply-To: <20260428200712.2660635-1-briannorris@chromium.org> References: <20260428200712.2660635-1-briannorris@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: / { firmware { ranges; coreboot { compatible =3D "coreboot"; reg =3D <...>; ...; }; }; }; Notably, the /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot= _table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-= translatable addresses") Signed-off-by: Brian Norris Reviewed-by: Douglas Anderson --- arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi b/arch/arm/boot/= dts/rockchip/rk3288-veyron.dtsi index 2d6cf08d00f9..ca8e8e735078 100644 --- a/arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3288-veyron.dtsi @@ -18,6 +18,11 @@ chosen { stdout-path =3D "serial2:115200n8"; }; =20 + firmware { + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + /* * The default coreboot on veyron devices ignores memory@0 nodes * and would instead create another memory node. --=20 2.54.0.545.g6539524ca2-goog From nobody Wed Jun 17 01:54:34 2026 Received: from mail-dl1-f50.google.com (mail-dl1-f50.google.com [74.125.82.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44A5C3B635B for ; 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charset="utf-8" Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: / { firmware { ranges; coreboot { compatible =3D "coreboot"; reg =3D <...>; ...; }; }; }; Notably, the /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot= _table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-= translatable addresses") Signed-off-by: Brian Norris Reviewed-by: Douglas Anderson --- arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi | 5 +++++ arch/arm/boot/dts/nvidia/tegra124-venice2.dts | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi b/arch/arm/boot/dt= s/nvidia/tegra124-nyan.dtsi index 974c76f007db..89a749cb8933 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi @@ -14,6 +14,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + /* * Note that recent version of the device tree compiler (starting with * version 1.4.2) warn about this node containing a reg property, but diff --git a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts b/arch/arm/boot/= dts/nvidia/tegra124-venice2.dts index df98dc2a67b8..059ee6c5b13c 100644 --- a/arch/arm/boot/dts/nvidia/tegra124-venice2.dts +++ b/arch/arm/boot/dts/nvidia/tegra124-venice2.dts @@ -18,6 +18,11 @@ chosen { stdout-path =3D "serial0:115200n8"; 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Tue, 28 Apr 2026 13:07:41 -0700 (PDT) From: Brian Norris To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Heiko Stuebner , Matthias Brugger , AngeloGioacchino Del Regno , Bjorn Andersson , Konrad Dybcio Cc: devicetree@vger.kernel.org, Doug Anderson , linux-arm-kernel@lists.infradead.org, Tzung-Bi Shih , chrome-platform@lists.linux.dev, Brian Norris , linux-rockchip@lists.infradead.org, Julius Werner , Alim Akhtar , cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/7] ARM: dts: samsung: Add #{address,size}-cells to Chromium-based /firmware Date: Tue, 28 Apr 2026 13:06:56 -0700 Message-ID: <20260428200712.2660635-5-briannorris@chromium.org> X-Mailer: git-send-email 2.54.0.545.g6539524ca2-goog In-Reply-To: <20260428200712.2660635-1-briannorris@chromium.org> References: <20260428200712.2660635-1-briannorris@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: / { firmware { ranges; coreboot { compatible =3D "coreboot"; reg =3D <...>; ...; }; }; }; Notably, the /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot= _table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-= translatable addresses") Signed-off-by: Brian Norris --- arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi | 5 +++++ arch/arm/boot/dts/samsung/exynos5250-spring.dts | 5 +++++ arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts | 5 +++++ arch/arm/boot/dts/samsung/exynos5800-peach-pi.dts | 5 +++++ 4 files changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi b/arch/a= rm/boot/dts/samsung/exynos5250-snow-common.dtsi index 65b000df176e..a64cdec3a2ef 100644 --- a/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi +++ b/arch/arm/boot/dts/samsung/exynos5250-snow-common.dtsi @@ -30,6 +30,11 @@ chosen { stdout-path =3D "serial3:115200n8"; }; =20 + firmware { + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + gpio-keys { compatible =3D "gpio-keys"; pinctrl-names =3D "default"; diff --git a/arch/arm/boot/dts/samsung/exynos5250-spring.dts b/arch/arm/boo= t/dts/samsung/exynos5250-spring.dts index d126fccdcaf3..a337fd9e3473 100644 --- a/arch/arm/boot/dts/samsung/exynos5250-spring.dts +++ b/arch/arm/boot/dts/samsung/exynos5250-spring.dts @@ -33,6 +33,11 @@ chosen { stdout-path =3D "serial3:115200n8"; }; =20 + firmware { + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + gpio-keys { compatible =3D "gpio-keys"; pinctrl-names =3D "default"; diff --git a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts b/arch/arm/= boot/dts/samsung/exynos5420-peach-pit.dts index 3759742d38ca..f24356784492 100644 --- a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts @@ -50,6 +50,11 @@ chosen { stdout-path =3D "serial3:115200n8"; }; =20 + firmware { + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + fixed-rate-clocks { oscclk { compatible =3D "samsung,exynos5420-oscclk"; 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Tue, 28 Apr 2026 13:07:45 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:4ff5:9607:c7e5:48f3]) by smtp.gmail.com with UTF8SMTPSA id a92af1059eb24-12ddd9a63a7sm3079240c88.11.2026.04.28.13.07.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Apr 2026 13:07:44 -0700 (PDT) From: Brian Norris To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Heiko Stuebner , Matthias Brugger , AngeloGioacchino Del Regno , Bjorn Andersson , Konrad Dybcio Cc: devicetree@vger.kernel.org, Doug Anderson , linux-arm-kernel@lists.infradead.org, Tzung-Bi Shih , chrome-platform@lists.linux.dev, Brian Norris , linux-rockchip@lists.infradead.org, Julius Werner , Alim Akhtar , cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/7] arm64: dts: mediatek: Add #{address,size}-cells to Chromium-based /firmware Date: Tue, 28 Apr 2026 13:06:57 -0700 Message-ID: <20260428200712.2660635-6-briannorris@chromium.org> X-Mailer: git-send-email 2.54.0.545.g6539524ca2-goog In-Reply-To: <20260428200712.2660635-1-briannorris@chromium.org> References: <20260428200712.2660635-1-briannorris@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: / { firmware { ranges; coreboot { compatible =3D "coreboot"; reg =3D <...>; ...; }; }; }; Notably, the /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot= _table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-= translatable addresses") Signed-off-by: Brian Norris Reviewed-by: Chen-Yu Tsai Reviewed-by: Douglas Anderson --- arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 5 +++++ arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 +++++ 6 files changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi b/arch/arm64/boot= /dts/mediatek/mt8173-elm.dtsi index a0573bc359fb..777da2129e77 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi @@ -16,6 +16,11 @@ aliases { mmc2 =3D &mmc3; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index a8e257b21a88..a906ec1ce672 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -21,6 +21,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells <2>; + #size-cells <2>; + }; + backlight_lcd0: backlight_lcd0 { compatible =3D "pwm-backlight"; pwms =3D <&pwm0 0 500000>; diff --git a/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi b/arch/arm64/= boot/dts/mediatek/mt8186-corsola.dtsi index ff20376a44d7..2b327d9ef65e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186-corsola.dtsi @@ -26,6 +26,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@40000000 { device_type =3D "memory"; /* The size should be filled in by the bootloader. */ diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/b= oot/dts/mediatek/mt8188-geralt.dtsi index 8e423504ec05..ed63c74cf238 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi @@ -41,6 +41,11 @@ dmic-codec { wakeup-delay-ms =3D <100>; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@40000000 { device_type =3D "memory"; /* The size will be filled in by the bootloader */ diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index eadf1b2d156f..b3850be25594 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -25,6 +25,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; 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Tue, 28 Apr 2026 13:07:49 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:4ff5:9607:c7e5:48f3]) by smtp.gmail.com with UTF8SMTPSA id 5a478bee46e88-2ed0a0ce761sm3064459eec.15.2026.04.28.13.07.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Apr 2026 13:07:48 -0700 (PDT) From: Brian Norris To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Heiko Stuebner , Matthias Brugger , AngeloGioacchino Del Regno , Bjorn Andersson , Konrad Dybcio Cc: devicetree@vger.kernel.org, Doug Anderson , linux-arm-kernel@lists.infradead.org, Tzung-Bi Shih , chrome-platform@lists.linux.dev, Brian Norris , linux-rockchip@lists.infradead.org, Julius Werner , Alim Akhtar , cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/7] arm64: dts: nvidia: Add #{address,size}-cells to Chromium-based /firmware Date: Tue, 28 Apr 2026 13:06:58 -0700 Message-ID: <20260428200712.2660635-7-briannorris@chromium.org> X-Mailer: git-send-email 2.54.0.545.g6539524ca2-goog In-Reply-To: <20260428200712.2660635-1-briannorris@chromium.org> References: <20260428200712.2660635-1-briannorris@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: / { firmware { ranges; coreboot { compatible =3D "coreboot"; reg =3D <...>; ...; }; }; }; Notably, the /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot= _table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-= translatable addresses") Signed-off-by: Brian Norris Reviewed-by: Douglas Anderson --- arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 5 +++++ arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/bo= ot/dts/nvidia/tegra132-norrin.dts index 683ac124523b..1f5222d43e62 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts @@ -18,6 +18,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + memory@80000000 { device_type =3D "memory"; reg =3D <0x0 0x80000000 0x0 0x80000000>; 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Tue, 28 Apr 2026 13:07:52 -0700 (PDT) Received: from localhost ([2a00:79e0:2e7c:8:4ff5:9607:c7e5:48f3]) by smtp.gmail.com with UTF8SMTPSA id 5a478bee46e88-2ed0a10678csm3167991eec.24.2026.04.28.13.07.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Apr 2026 13:07:52 -0700 (PDT) From: Brian Norris To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Heiko Stuebner , Matthias Brugger , AngeloGioacchino Del Regno , Bjorn Andersson , Konrad Dybcio Cc: devicetree@vger.kernel.org, Doug Anderson , linux-arm-kernel@lists.infradead.org, Tzung-Bi Shih , chrome-platform@lists.linux.dev, Brian Norris , linux-rockchip@lists.infradead.org, Julius Werner , Alim Akhtar , cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 7/7] arm64: dts: qcom: Add #{address,size}-cells to Chromium-based /firmware Date: Tue, 28 Apr 2026 13:06:59 -0700 Message-ID: <20260428200712.2660635-8-briannorris@chromium.org> X-Mailer: git-send-email 2.54.0.545.g6539524ca2-goog In-Reply-To: <20260428200712.2660635-1-briannorris@chromium.org> References: <20260428200712.2660635-1-briannorris@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Chromium/Depthcharge bootloaders may dynamically add a few device nodes to a system's DTB under a /firmware node. A typical DT looks something like the following: / { firmware { ranges; coreboot { compatible =3D "coreboot"; reg =3D <...>; ...; }; }; }; Notably, the /firmware node has an empty 'ranges', but does not have address/size-cells. Commit 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-translatable addresses") started requiring #address-cells for a device's parent if we want to use the reg resource in a device node. This leads to errors like the following: [ 7.763870] coreboot_table firmware:coreboot: probe with driver coreboot= _table failed with error -22 Add appropriate #{address,size}-cells to work around the problem. Note that Google has also patched the Depthcharge bootloader source to add {address,size}-cells [1], but bootloader updates are typically delivered only via Google OS updates. Not all users install Google software updates, and even if they do, Google may not produce updated binaries for all/older devices. [1] https://lore.kernel.org/all/20241209092809.GA3246424@google.com/ https://crrev.com/c/6051580 ("coreboot: Insert #address-cells and #size-cells for firmware node") Closes: https://lore.kernel.org/all/aeKlYzTiL0OB1y3g@google.com/ Fixes: 6e5773d52f4a ("of/address: Fix WARN when attempting translating non-= translatable addresses") Signed-off-by: Brian Norris Reviewed-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 5 +++++ arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot= /dts/qcom/sc7180-trogdor.dtsi index b398f69917f0..cd4a0e281cf8 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -99,6 +99,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + /* FIXED REGULATORS - parents above children */ =20 /* This is the top level supply and variable voltage */ diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/bo= ot/dts/qcom/sc7280-herobrine.dtsi index 5c5e4f1dd221..58ea0532c0fb 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi @@ -25,6 +25,11 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + firmware { + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + /* * FIXED REGULATORS * --=20 2.54.0.545.g6539524ca2-goog