From nobody Wed Jun 10 11:12:39 2026 Received: from server.couthit.com (server.couthit.com [162.240.164.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDB7C3D88E8; Tue, 28 Apr 2026 07:21:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=162.240.164.96 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777360919; cv=none; b=pFvKqsHx44mKBcQLUcvamXEIC0MvqgWnVVVNMyeRa98n44JS5whhc8dxbRppPKJ8zh0wxxfAr6G+q+jftEuczIkFwD3WcXH73c+RbJcCo2ekEP0Q43IF2C/E2XrjxVM72Fi/u+foIhdf0U0VdGXOBAeMSexd5ySI62im4ih3hdA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777360919; c=relaxed/simple; bh=61vKQtd1+DXJGLlnZ0i6TtmC3aOZQw7WeXdw/2PUKKc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e8gOtH3BVadIRZl+WSfDeBBbTgO3AE1SIUJlV6ZnPrVd4rfE/XcOayhTKKh/jlAwD6yK6oscwH6wR/nEISBLVBsZOTGahgegLgbfqD4wAk1Jx5YJiCCgGxg8moSq7rkZvoy9xQW3xNxDUFyw+rQIM6uZse8E6v2O7UhcLh/ou8A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=couthit.com; spf=pass smtp.mailfrom=couthit.com; dkim=pass (2048-bit key) header.d=couthit.com header.i=@couthit.com header.b=0fbJmAuG; arc=none smtp.client-ip=162.240.164.96 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=couthit.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=couthit.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=couthit.com header.i=@couthit.com header.b="0fbJmAuG" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=couthit.com ; s=default; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=/8JAxWZBvsIgT3JdjEwbxw+itBrVTYerSzmGiXRisbE=; b=0fbJmAuGdqXst9hBcE8CIKoCvu noFXk0W0nTxfrsPeUTy/ypso4F5PiND5WwK6vt/dvxX3CHp8yztfBQSdF4Lzdr5iwoq7mlNS4yibc 7/RA0DLeajsb+u4BPmGUtyE9qdIGvqw9uEHZeMv0roiinWLDFbP9walY63/b83EyJXGtziX6rD0se GTCWMqQ66YcsaQJ/6JJX1WOj03MAYKVOZ481QbqNFAHu/4ueY33WRP8zQtjLZzVGl/qgkfIqXHzz0 SZMKsk2VZC3ZX++QALgf+rLA4KPzwH4PGYfQZ3UrOeJipOtFSCwgi7OIrviV8ENsMaZOvJk0C+u5s izZhdX6A==; Received: from [115.246.246.98] (port=30876 helo=cypher.couthit.local) by server.couthit.com with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.98.1) (envelope-from ) id 1wHclW-0000000GFVv-0hTf; Tue, 28 Apr 2026 03:21:54 -0400 From: Parvathi Pudi To: nm@ti.com, vigneshr@ti.com, afd@ti.com, khilman@baylibre.com, rogerq@kernel.org, tony@atomide.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, richardcochran@gmail.com, aaro.koskinen@iki.fi, andreas@kemnade.info Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, andrew@lunn.ch, danishanwar@ti.com, pratheesh@ti.com, j-rameshbabu@ti.com, praneeth@ti.com, srk@ti.com, rogerq@ti.com, krishna@couthit.com, mohan@couthit.com, pmohan@couthit.com, basharath@couthit.com, parvathi@couthit.com, Murali Karicheri Subject: [PATCH v7 1/3] arm: dts: ti: Add device tree support for PRU-ICSS on AM57xx Date: Tue, 28 Apr 2026 12:47:27 +0530 Message-ID: <20260428072046.3022679-2-parvathi@couthit.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260428072046.3022679-1-parvathi@couthit.com> References: <20260428072046.3022679-1-parvathi@couthit.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.couthit.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - couthit.com X-Get-Message-Sender-Via: server.couthit.com: authenticated_id: parvathi@couthit.com X-Authenticated-Sender: server.couthit.com: parvathi@couthit.com X-Source: X-Source-Args: X-Source-Dir: Content-Type: text/plain; charset="utf-8" From: Roger Quadros The TI Sitara AM57xx series of devices consists of 2 PRU-ICSS instances (PRU-ICSS1 and PRU-ICSS2). This patch adds the device tree nodes for the PRU-ICSS2 instance to support DUAL-MAC mode of operation. Each PRU-ICSS instance consists of two PRU cores along with various peripherals such as the Interrupt Controller (PRU_INTC), the Industrial Ethernet Peripheral(IEP), the Real Time Media Independent Interface controller (MII_RT), and the Enhanced Capture (eCAP) event module. am57-pruss.dtsi - Adds IEP and eCAP peripheral as child nodes of the PRUSS subsystem node. am57xx-idk-common.dtsi - Adds PRU-ICSS2 instance node along with PRU eth port information and corresponding port configuration. It includes interrupt mapping for packet reception, HW timestamp collection, and PRU Ethernet ports in MII mode. am571x-idk.dts, am572x-idk.dts and am574x-idk.dts - GPIO configuration along with delay configuration for individual PRU Ethernet port. Signed-off-by: Roger Quadros Signed-off-by: Andrew F. Davis Signed-off-by: Murali Karicheri Signed-off-by: Basharath Hussain Khaja Signed-off-by: Parvathi Pudi Reviewed-by: MD Danish Anwar --- arch/arm/boot/dts/ti/omap/am57-pruss.dtsi | 11 ++++ arch/arm/boot/dts/ti/omap/am571x-idk.dts | 8 ++- arch/arm/boot/dts/ti/omap/am572x-idk.dts | 10 +-- arch/arm/boot/dts/ti/omap/am574x-idk.dts | 10 +-- .../boot/dts/ti/omap/am57xx-idk-common.dtsi | 61 +++++++++++++++++++ 5 files changed, 91 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/ti/omap/am57-pruss.dtsi b/arch/arm/boot/dts/= ti/omap/am57-pruss.dtsi index 46c5383f0eee..f73316625608 100644 --- a/arch/arm/boot/dts/ti/omap/am57-pruss.dtsi +++ b/arch/arm/boot/dts/ti/omap/am57-pruss.dtsi @@ -170,6 +170,17 @@ pruss2_iepclk_mux: iepclk-mux@30 { }; }; =20 + pruss2_iep: iep@2e000 { + compatible =3D "ti,am5728-icss-iep"; + reg =3D <0x2e000 0x31c>; + clocks =3D <&pruss2_iepclk_mux>; + }; + + pruss2_ecap: ecap@30000 { + compatible =3D "ti,pruss-ecap"; + reg =3D <0x30000 0x60>; + }; + pruss2_mii_rt: mii-rt@32000 { compatible =3D "ti,pruss-mii", "syscon"; reg =3D <0x32000 0x58>; diff --git a/arch/arm/boot/dts/ti/omap/am571x-idk.dts b/arch/arm/boot/dts/t= i/omap/am571x-idk.dts index 322cf79d22e9..02653b440585 100644 --- a/arch/arm/boot/dts/ti/omap/am571x-idk.dts +++ b/arch/arm/boot/dts/ti/omap/am571x-idk.dts @@ -214,5 +214,11 @@ &pruss1_mdio { }; =20 &pruss2_mdio { - status =3D "disabled"; + reset-gpios =3D <&gpio5 9 GPIO_ACTIVE_LOW>; + reset-delay-us =3D <2>; /* PHY datasheet states 1uS min */ +}; + +&pruss2_eth { + ti,pruss-gp-mux-sel =3D <4>, /* MII2, needed for PRUSS1_MII0 */ + <4>; /* MII2, needed for PRUSS1_MII1 */ }; diff --git a/arch/arm/boot/dts/ti/omap/am572x-idk.dts b/arch/arm/boot/dts/t= i/omap/am572x-idk.dts index 94a738cb0a4d..54a8ccb9ca14 100644 --- a/arch/arm/boot/dts/ti/omap/am572x-idk.dts +++ b/arch/arm/boot/dts/ti/omap/am572x-idk.dts @@ -28,10 +28,12 @@ &mmc2 { pinctrl-2 =3D <&mmc2_pins_ddr_rev20>; }; =20 -&pruss1_mdio { - status =3D "disabled"; +&pruss2_eth0_phy { + reset-gpios =3D <&gpio5 8 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <2>; /* PHY datasheet states 1uS min */ }; =20 -&pruss2_mdio { - status =3D "disabled"; +&pruss2_eth1_phy { + reset-gpios =3D <&gpio5 9 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <2>; /* PHY datasheet states 1uS min */ }; diff --git a/arch/arm/boot/dts/ti/omap/am574x-idk.dts b/arch/arm/boot/dts/t= i/omap/am574x-idk.dts index 47b9174d2353..47b6c6cb210c 100644 --- a/arch/arm/boot/dts/ti/omap/am574x-idk.dts +++ b/arch/arm/boot/dts/ti/omap/am574x-idk.dts @@ -40,10 +40,12 @@ &emif1 { status =3D "okay"; }; =20 -&pruss1_mdio { - status =3D "disabled"; +&pruss2_eth0_phy { + reset-gpios =3D <&gpio5 8 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <2>; /* PHY datasheet states 1uS min */ }; =20 -&pruss2_mdio { - status =3D "disabled"; +&pruss2_eth1_phy { + reset-gpios =3D <&gpio5 9 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <2>; /* PHY datasheet states 1uS min */ }; diff --git a/arch/arm/boot/dts/ti/omap/am57xx-idk-common.dtsi b/arch/arm/bo= ot/dts/ti/omap/am57xx-idk-common.dtsi index 43e3623f079c..5eccff3bb4b6 100644 --- a/arch/arm/boot/dts/ti/omap/am57xx-idk-common.dtsi +++ b/arch/arm/boot/dts/ti/omap/am57xx-idk-common.dtsi @@ -155,6 +155,52 @@ src_clk_x1: src_clk_x1 { compatible =3D "fixed-clock"; clock-frequency =3D <20000000>; }; + + /* Dual-MAC Ethernet application node on PRU-ICSS2 */ + pruss2_eth: pruss2-eth { + compatible =3D "ti,am57-prueth"; + ti,prus =3D <&pru2_0>, <&pru2_1>; + sram =3D <&ocmcram1>; + ti,mii-rt =3D <&pruss2_mii_rt>; + ti,iep =3D <&pruss2_iep>; + ti,ecap =3D <&pruss2_ecap>; + interrupts =3D <20 2 2>, <21 3 3>; + interrupt-names =3D "rx_hp", "rx_lp"; + interrupt-parent =3D <&pruss2_intc>; + + ethernet-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + pruss2_emac0: ethernet-port@0 { + reg =3D <0>; + phy-handle =3D <&pruss2_eth0_phy>; + phy-mode =3D "mii"; + interrupts =3D <20 2 2>, <26 6 6>, <23 6 6>; + interrupt-names =3D "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address =3D [00 00 00 00 00 00]; + }; + + pruss2_emac1: ethernet-port@1 { + reg =3D <1>; + phy-handle =3D <&pruss2_eth1_phy>; + phy-mode =3D "mii"; + interrupts =3D <21 3 3>, <27 9 7>, <24 9 7>; + interrupt-names =3D "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address =3D [00 00 00 00 00 00]; + }; + }; + }; + +}; + +&pruss2_iep { + interrupt-parent =3D <&pruss2_intc>; + interrupts =3D <7 7 8>; + interrupt-names =3D "iep_cap_cmp"; }; =20 &dra7_pmx_core { @@ -606,3 +652,18 @@ dpi_out: endpoint { }; }; }; + +&pruss2_mdio { + status =3D "okay"; + pruss2_eth0_phy: ethernet-phy@0 { + reg =3D <0>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <30 IRQ_TYPE_LEVEL_LOW>; + }; + + pruss2_eth1_phy: ethernet-phy@1 { + reg =3D <1>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <31 IRQ_TYPE_LEVEL_LOW>; + }; +}; --=20 2.43.0 From nobody Wed Jun 10 11:12:39 2026 Received: from server.couthit.com (server.couthit.com [162.240.164.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67B203D3CE6; Tue, 28 Apr 2026 07:22:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=162.240.164.96 ARC-Seal: i=1; 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Tue, 28 Apr 2026 03:22:15 -0400 From: Parvathi Pudi To: nm@ti.com, vigneshr@ti.com, afd@ti.com, khilman@baylibre.com, rogerq@kernel.org, tony@atomide.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, richardcochran@gmail.com, aaro.koskinen@iki.fi, andreas@kemnade.info Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, andrew@lunn.ch, danishanwar@ti.com, pratheesh@ti.com, j-rameshbabu@ti.com, praneeth@ti.com, srk@ti.com, rogerq@ti.com, krishna@couthit.com, mohan@couthit.com, pmohan@couthit.com, basharath@couthit.com, parvathi@couthit.com, Murali Karicheri Subject: [PATCH v7 2/3] arm: dts: ti: Add device tree support for PRU-ICSS on AM437x Date: Tue, 28 Apr 2026 12:47:28 +0530 Message-ID: <20260428072046.3022679-3-parvathi@couthit.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260428072046.3022679-1-parvathi@couthit.com> References: <20260428072046.3022679-1-parvathi@couthit.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.couthit.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - couthit.com X-Get-Message-Sender-Via: server.couthit.com: authenticated_id: parvathi@couthit.com X-Authenticated-Sender: server.couthit.com: parvathi@couthit.com X-Source: X-Source-Args: X-Source-Dir: Content-Type: text/plain; charset="utf-8" From: Roger Quadros The TI Sitara AM437x series of devices consists of 2 PRU-ICSS instances (PRU-ICSS0 and PRU-ICSS1). This patch adds the device tree nodes for the PRU-ICSS1 instance to support DUAL-MAC mode of operation. Support for Ethernet over PRU is available only for ICSS1 instance. PRU-ICSS instance consists of two PRU cores along with various peripherals such as the Interrupt Controller (PRU_INTC), the Industrial Ethernet Peripheral(IEP), the Real Time Media Independent Interface controller (MII_RT), and the Enhanced Capture (eCAP) event module. am4372.dtsi - Adds IEP and eCAP peripheral as child nodes of the PRUSS subsystem node. am437x-idk-evm.dts - Adds PRU-ICSS instance node along with PRU eth port information and corresponding port configuration. It includes interrupt mapping for packet reception, HW timestamp collection, and PRU Ethernet ports in MII mode, GPIO configuration, boot strapping along with delay configuration for individual PRU Ethernet port and other required nodes. Signed-off-by: Roger Quadros Signed-off-by: Andrew F. Davis Signed-off-by: Murali Karicheri Signed-off-by: Basharath Hussain Khaja Signed-off-by: Parvathi Pudi Reviewed-by: MD Danish Anwar --- arch/arm/boot/dts/ti/omap/am4372.dtsi | 11 ++ arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts | 103 ++++++++++++++++++- 2 files changed, 113 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/ti/omap/am4372.dtsi b/arch/arm/boot/dts/ti/o= map/am4372.dtsi index 504fa6b57d39..494f251c8e6a 100644 --- a/arch/arm/boot/dts/ti/omap/am4372.dtsi +++ b/arch/arm/boot/dts/ti/omap/am4372.dtsi @@ -476,6 +476,17 @@ pruss1_mii_rt: mii-rt@32000 { reg =3D <0x32000 0x58>; }; =20 + pruss1_iep: iep@2e000 { + compatible =3D "ti,am4376-icss-iep"; + reg =3D <0x2e000 0x31c>; + clocks =3D <&pruss1_iepclk_mux>; + }; + + pruss1_ecap: ecap@30000 { + compatible =3D "ti,pruss-ecap"; + reg =3D <0x30000 0x60>; + }; + pruss1_intc: interrupt-controller@20000 { compatible =3D "ti,pruss-intc"; reg =3D <0x20000 0x2000>; diff --git a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts b/arch/arm/boot/d= ts/ti/omap/am437x-idk-evm.dts index 826f687c368a..2efa303d45be 100644 --- a/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts @@ -168,6 +168,48 @@ led-out7 { default-state =3D "off"; }; }; + + /* Dual-MAC Ethernet application node on PRU-ICSS1 */ + pruss1_eth: pruss1-eth { + compatible =3D "ti,am4376-prueth"; + ti,prus =3D <&pru1_0>, <&pru1_1>; + sram =3D <&ocmcram>; + ti,mii-rt =3D <&pruss1_mii_rt>; + ti,iep =3D <&pruss1_iep>; + ti,ecap =3D <&pruss1_ecap>; + interrupts =3D <20 2 2>, <21 3 3>; + interrupt-names =3D "rx_hp", "rx_lp"; + interrupt-parent =3D <&pruss1_intc>; + + pinctrl-0 =3D <&pruss1_eth_default>; + pinctrl-names =3D "default"; + + ethernet-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + pruss1_emac0: ethernet-port@0 { + reg =3D <0>; + phy-handle =3D <&pruss1_eth0_phy>; + phy-mode =3D "mii"; + interrupts =3D <20 2 2>, <26 6 6>, <23 6 6>; + interrupt-names =3D "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address =3D [00 00 00 00 00 00]; + }; + + pruss1_emac1: ethernet-port@1 { + reg =3D <1>; + phy-handle =3D <&pruss1_eth1_phy>; + phy-mode =3D "mii"; + interrupts =3D <21 3 3>, <27 9 5>, <24 9 5>; + interrupt-names =3D "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address =3D [00 00 00 00 00 00]; + }; + }; + }; }; =20 &am43xx_pinmux { @@ -303,6 +345,52 @@ AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; =20 + pruss1_mdio_default: pruss1-mdio-default-pins { + pinctrl-single,pins =3D < + AM4372_IOPAD(0x88c, PIN_OUTPUT | MUX_MODE5) /* (A12) gpmc_clk.pr1_mdio_= mdclk */ + AM4372_IOPAD(0xa70, PIN_INPUT | MUX_MODE8) /* (D24) xdma_event_intr0.pr= 1_mdio_data */ + AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE7) /* (AD23) cam1_data6.= gpio4[20] */ + >; + }; + + pruss1_eth_default: pruss1-eth-default-pins { + pinctrl-single,pins =3D < + AM4372_IOPAD(0x8a0, PIN_INPUT | MUX_MODE2) /* (B22) dss_data0.pr1_mii_m= t0_clk */ + AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE2) /* (B20) dss_data5.pr1_mii0= _txd0 */ + AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE2) /* (A20) dss_data4.pr1_mii0= _txd1 */ + AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE2) /* (C21) dss_data3.pr1_mii0= _txd2 */ + AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE2) /* (B21) dss_data2.pr1_mii0= _txd3 */ + AM4372_IOPAD(0x8cc, PIN_INPUT | MUX_MODE5) /* (B18) dss_data11.pr1_mii0= _rxd0 */ + AM4372_IOPAD(0x8c8, PIN_INPUT | MUX_MODE5) /* (A18) dss_data10.pr1_mii0= _rxd1 */ + AM4372_IOPAD(0x8c4, PIN_INPUT | MUX_MODE5) /* (B19) dss_data9.pr1_mii0_= rxd2 */ + AM4372_IOPAD(0x8c0, PIN_INPUT | MUX_MODE5) /* (A19) dss_data8.pr1_mii0_= rxd3 */ + AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE2) /* (A21) dss_data1.pr1_mii0= _txen */ + AM4372_IOPAD(0x8d8, PIN_INPUT | MUX_MODE5) /* (C17) dss_data14.pr1_mii_= mr0_clk */ + AM4372_IOPAD(0x8dc, PIN_INPUT | MUX_MODE5) /* (D17) dss_data15.pr1_mii0= _rxdv */ + AM4372_IOPAD(0x8d4, PIN_INPUT | MUX_MODE5) /* (D19) dss_data13.pr1_mii0= _rxer */ + AM4372_IOPAD(0x8d0, PIN_INPUT | MUX_MODE5) /* (C19) dss_data12.pr1_mii0= _rxlink */ + AM4372_IOPAD(0xa40, PIN_INPUT | MUX_MODE5) /* (G20) gpio5_10.pr1_mii0_c= rs */ + AM4372_IOPAD(0xa38, PIN_INPUT | MUX_MODE5) /* (D25) gpio5_8.pr1_mii0_co= l */ + + AM4372_IOPAD(0x858, PIN_INPUT | MUX_MODE5) /* (E8) gpmc_a6.pr1_mii_mt1_= clk */ + AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE5) /* (E7) gpmc_a5.pr1_mii1_tx= d0 */ + AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE5) /* (D7) gpmc_a4.pr1_mii1_tx= d1 */ + AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE5) /* (A4) gpmc_a3.pr1_mii1_tx= d2 */ + AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE5) /* (C6) gpmc_a2.pr1_mii1_tx= d3 */ + AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE5) /* (D8) gpmc_a11.pr1_mii1_rx= d0 */ + AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE5) /* (G8) gpmc_a10.pr1_mii1_rx= d1 */ + AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE5) /* (B4) gpmc_a9.pr1_mii1_rxd= 2 */ + AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE5) /* (F7) gpmc_a8.pr1_mii1_rxd= 3 */ + AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE5) /* (C3) gpmc_a0.pr1_mii1_tx= en */ + AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE5) /* (F6) gpmc_a7.pr1_mii_mr1_= clk */ + AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE5) /* (C5) gpmc_a1.pr1_mii1_rxd= v */ + AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE5) /* (B3) gpmc_wpn.pr1_mii1_rx= er */ + AM4372_IOPAD(0xa4c, PIN_INPUT | MUX_MODE5) /* (E24) gpio5_13.pr1_mii1_r= xlink */ + AM4372_IOPAD(0xa44, PIN_INPUT | MUX_MODE5) /* (F23) gpio5_11.pr1_mii1_c= rs */ + AM4372_IOPAD(0x878, PIN_INPUT | MUX_MODE5) /* (A3) gpmc_be1n.pr1_mii1_c= ol */ + >; + }; + qspi_pins_default: qspi-default-pins { pinctrl-single,pins =3D < AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_cs= n */ @@ -539,5 +627,18 @@ opp-100-600000000 { }; =20 &pruss1_mdio { - status =3D "disabled"; + pinctrl-0 =3D <&pruss1_mdio_default>; + pinctrl-names =3D "default"; + status =3D "okay"; + + reset-gpios =3D <&gpio4 20 GPIO_ACTIVE_LOW>; + reset-delay-us =3D <2>; /* PHY datasheet states 1uS min */ + + pruss1_eth0_phy: ethernet-phy@0 { + reg =3D <0>; + }; + + pruss1_eth1_phy: ethernet-phy@1 { + reg =3D <1>; + }; }; --=20 2.43.0 From nobody Wed Jun 10 11:12:39 2026 Received: from server.couthit.com (server.couthit.com [162.240.164.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14D833D3CE6; Tue, 28 Apr 2026 07:22:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=162.240.164.96 ARC-Seal: i=1; a=rsa-sha256; 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Tue, 28 Apr 2026 03:22:36 -0400 From: Parvathi Pudi To: nm@ti.com, vigneshr@ti.com, afd@ti.com, khilman@baylibre.com, rogerq@kernel.org, tony@atomide.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, richardcochran@gmail.com, aaro.koskinen@iki.fi, andreas@kemnade.info Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, andrew@lunn.ch, danishanwar@ti.com, pratheesh@ti.com, j-rameshbabu@ti.com, praneeth@ti.com, srk@ti.com, rogerq@ti.com, krishna@couthit.com, mohan@couthit.com, pmohan@couthit.com, basharath@couthit.com, parvathi@couthit.com, Murali Karicheri Subject: [PATCH v7 3/3] arm: dts: ti: Add device tree support for PRU-ICSS on AM335x Date: Tue, 28 Apr 2026 12:47:29 +0530 Message-ID: <20260428072046.3022679-4-parvathi@couthit.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260428072046.3022679-1-parvathi@couthit.com> References: <20260428072046.3022679-1-parvathi@couthit.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.couthit.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - couthit.com X-Get-Message-Sender-Via: server.couthit.com: authenticated_id: parvathi@couthit.com X-Authenticated-Sender: server.couthit.com: parvathi@couthit.com X-Source: X-Source-Args: X-Source-Dir: Content-Type: text/plain; charset="utf-8" From: Roger Quadros The TI Sitara AM335x ICE-V2 consists of single PRU-ICSS instance, This patch adds the new device tree overlay file in-order to enable PRU-ICSS instance, along with makefile changes. PRU-ICSS instance consists of two PRU cores along with various peripherals such as the Interrupt Controller (PRU_INTC), the Industrial Ethernet Peripheral(IEP), the Real Time Media Independent Interface controller (MII_RT), and the Enhanced Capture (eCAP) event module. am33xx-l4.dtsi - Adds IEP and eCAP peripheral as child nodes of the PRUSS subsystem node. am335x-icev2-prueth.dtso - Adds PRU-ICSS instance node along with PRU eth port information and corresponding port configuration. It includes interrupt mapping for packet reception, HW timestamp collection, and PRU Ethernet ports in MII mode, GPIO configuration, boot strapping along with delay configuration for individual PRU Ethernet port and other required nodes. Signed-off-by: Roger Quadros Signed-off-by: Andrew F. Davis Signed-off-by: Murali Karicheri Signed-off-by: Basharath Hussain Khaja Signed-off-by: Parvathi Pudi Reviewed-by: MD Danish Anwar --- arch/arm/boot/dts/ti/omap/Makefile | 4 + .../ti/omap/am335x-icev2-prueth-overlay.dtso | 156 ++++++++++++++++++ arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi | 11 ++ 3 files changed, 171 insertions(+) create mode 100644 arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.d= tso diff --git a/arch/arm/boot/dts/ti/omap/Makefile b/arch/arm/boot/dts/ti/omap= /Makefile index 3a4d9204339b..498c36ccb5ea 100644 --- a/arch/arm/boot/dts/ti/omap/Makefile +++ b/arch/arm/boot/dts/ti/omap/Makefile @@ -88,6 +88,9 @@ dtb-$(CONFIG_ARCH_OMAP4) +=3D \ am335x-bonegreen-hdmi-00a0-dtbs :=3D am335x-bonegreen-eco.dtb \ am335x-bone-hdmi-00a0.dtbo =20 +am335x-icev2-prueth-dtbs :=3D am335x-icev2.dtb \ + am335x-icev2-prueth-overlay.dtbo + dtb-$(CONFIG_SOC_AM33XX) +=3D \ am335x-baltos-ir2110.dtb \ am335x-baltos-ir3220.dtb \ @@ -106,6 +109,7 @@ dtb-$(CONFIG_SOC_AM33XX) +=3D \ am335x-evmsk.dtb \ am335x-guardian.dtb \ am335x-icev2.dtb \ + am335x-icev2-prueth.dtb \ am335x-lxm.dtb \ am335x-mba335x.dtb \ am335x-moxa-uc-2101.dtb \ diff --git a/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso b/a= rch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso new file mode 100644 index 000000000000..ffed1f3d046a --- /dev/null +++ b/arch/arm/boot/dts/ti/omap/am335x-icev2-prueth-overlay.dtso @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * DT overlay for IDK AM335x + * + * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ + */ + +/* + * AM335x ICE V2 board + * http://www.ti.com/tool/tmdsice3359 + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +&{/} { + /* Dual-MAC Ethernet application node on PRU-ICSS */ + pruss_eth: pruss-eth { + compatible =3D "ti,am3359-prueth"; + ti,prus =3D <&pru0>, <&pru1>; + sram =3D <&ocmcram>; + ti,mii-rt =3D <&pruss_mii_rt>; + ti,iep =3D <&pruss_iep>; + ti,ecap =3D <&pruss_ecap>; + interrupts =3D <20 2 2>, <21 3 3>; + interrupt-names =3D "rx_hp", "rx_lp"; + interrupt-parent =3D <&pruss_intc>; + + pinctrl-0 =3D <&pruss_eth_default>; + pinctrl-names =3D "default"; + + ethernet-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + pruss_emac0: ethernet-port@0 { + reg =3D <0>; + phy-handle =3D <&pruss_eth0_phy>; + phy-mode =3D "mii"; + interrupts =3D <20 2 2>, <26 6 6>, <23 6 6= >; + interrupt-names =3D "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address =3D [00 00 00 00 00 00]; + }; + + pruss_emac1: ethernet-port@1 { + reg =3D <1>; + phy-handle =3D <&pruss_eth1_phy>; + phy-mode =3D "mii"; + interrupts =3D <21 3 3>, <27 9 7>, <24 9 7= >; + interrupt-names =3D "rx", "emac_ptp_tx", + "hsr_ptp_tx"; + /* Filled in by bootloader */ + local-mac-address =3D [00 00 00 00 00 00]; + }; + }; + }; +}; + +&am33xx_pinmux { + /* MDIO node for PRU-ICSS */ + pruss_mdio_default: pruss-mdio-default-pins { + pinctrl-single,pins =3D < + AM33XX_IOPAD(0x88c, PIN_OUTPUT | MUX_MODE5) /* (V12) gpmc_clk.pr1_mdio_= mdclk */ + AM33XX_IOPAD(0x888, PIN_INPUT | MUX_MODE5) /* (T13) gpmc_csn3.pr1_mdio_= data */ + >; + }; + + /* Pinmux configuration for PRU-ICSS */ + pruss_eth_default: pruss-eth-default-pins { + pinctrl-single,pins =3D < + AM33XX_IOPAD(0x8a0, PIN_INPUT | MUX_MODE2) /* (R1) lcd_data0.pr1_mii_mt= 0_clk */ + AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE2) /* (T2) lcd_data5.pr1_mii0_= txd0 */ + AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE2) /* (T1) lcd_data4.pr1_mii0_= txd1 */ + AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE2) /* (R4) lcd_data3.pr1_mii0_= txd2 */ + AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE2) /* (R3) lcd_data2.pr1_mii0_= txd3 */ + AM33XX_IOPAD(0x8cc, PIN_INPUT | MUX_MODE5) /* (U4) lcd_data11.pr1_mii0_= rxd0 */ + AM33XX_IOPAD(0x8c8, PIN_INPUT | MUX_MODE5) /* (U3) lcd_data10.pr1_mii0_= rxd1 */ + AM33XX_IOPAD(0x8c4, PIN_INPUT | MUX_MODE5) /* (U2) lcd_data9.pr1_mii0_r= xd2 */ + AM33XX_IOPAD(0x8c0, PIN_INPUT | MUX_MODE5) /* (U1) lcd_data8.pr1_mii0_r= xd3 */ + AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE2) /* (R2) lcd_data1.pr1_mii0_= txen */ + AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE5) /* (V4) lcd_data14.pr1_mii_m= r0_clk */ + AM33XX_IOPAD(0x8dc, PIN_INPUT | MUX_MODE5) /* (T5) lcd_data15.pr1_mii0_= rxdv */ + AM33XX_IOPAD(0x8d4, PIN_INPUT | MUX_MODE5) /* (V3) lcd_data13.pr1_mii0_= rxer */ + AM33XX_IOPAD(0x8d0, PIN_INPUT | MUX_MODE5) /* (V2) lcd_data12.pr1_mii0_= rxlink */ + AM33XX_IOPAD(0x8e8, PIN_INPUT | MUX_MODE2) /* (V5) lcd_pclk.pr1_mii0_cr= s */ + + AM33XX_IOPAD(0x840, PIN_INPUT | MUX_MODE5) /* (R13) gpmc_a0.pr1_mii_mt1= _clk */ + AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE5) /* (R14) gpmc_a4.pr1_mii1_t= xd0 */ + AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE5) /* (T14) gpmc_a3.pr1_mii1_t= xd1 */ + AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE5) /* (U14) gpmc_a2.pr1_mii1_t= xd2 */ + AM33XX_IOPAD(0x844, PIN_OUTPUT | MUX_MODE5) /* (V14) gpmc_a1.pr1_mii1_t= xd3 */ + AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE5) /* (V16) gpmc_a8.pr1_mii1_rx= d0 */ + AM33XX_IOPAD(0x85c, PIN_INPUT | MUX_MODE5) /* (T15) gpmc_a7.pr1_mii1_rx= d1 */ + AM33XX_IOPAD(0x858, PIN_INPUT | MUX_MODE5) /* (U15) gpmc_a6.pr1_mii1_rx= d2 */ + AM33XX_IOPAD(0x854, PIN_INPUT | MUX_MODE5) /* (V15) gpmc_a5.pr1_mii1_rx= d3 */ + AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE5) /* (U17) gpmc_wpn.pr1_mii1_= txen */ + AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE5) /* (U16) gpmc_a9.pr1_mii_mr1= _clk */ + AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE5) /* (T16) gpmc_a10.pr1_mii1_r= xdv */ + AM33XX_IOPAD(0x86c, PIN_INPUT | MUX_MODE5) /* (V17) gpmc_a11.pr1_mii1_r= xer */ + AM33XX_IOPAD(0x878, PIN_INPUT | MUX_MODE5) /* (U18) gpmc_be1n.pr1_mii1_= rxlink */ + AM33XX_IOPAD(0x8ec, PIN_INPUT | MUX_MODE2) /* (R6) lcd_ac_bias_en.pr1_m= ii1_crs */ + >; + }; +}; + +&gpio3 { + mux-mii-hog { + status =3D "disabled"; + }; + + mux-mii-hog-0 { + gpio-hog; + gpios =3D <10 GPIO_ACTIVE_HIGH>; + /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */ + output-low; + line-name =3D "MUX_MII_CTL1"; + }; +}; + +/* + * Disable CPSW switch node and + * MDIO configuration to prevent + * conflict with PRU-ICSS + */ +&mac_sw { + status =3D "disabled"; +}; + +&davinci_mdio_sw { + status =3D "disabled"; +}; + +/* PRU-ICSS MDIO configuration */ +&pruss_mdio { + pinctrl-0 =3D <&pruss_mdio_default>; + pinctrl-names =3D "default"; + reset-gpios =3D <&gpio2 5 GPIO_ACTIVE_LOW>; + reset-delay-us =3D <2>; /* PHY datasheet states 1uS min */ + status =3D "okay"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + pruss_eth0_phy: ethernet-phy@1 { + reg =3D <1>; + }; + + pruss_eth1_phy: ethernet-phy@3 { + reg =3D <3>; + }; +}; diff --git a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi b/arch/arm/boot/dts/t= i/omap/am33xx-l4.dtsi index 89d16fcc773e..a63ef307d918 100644 --- a/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/ti/omap/am33xx-l4.dtsi @@ -896,6 +896,17 @@ pruss_mii_rt: mii-rt@32000 { reg =3D <0x32000 0x58>; }; =20 + pruss_iep: iep@2e000 { + compatible =3D "ti,am3356-icss-iep"; + reg =3D <0x2e000 0x31c>; + clocks =3D <&pruss_iepclk_mux>; + }; + + pruss_ecap: ecap@30000 { + compatible =3D "ti,pruss-ecap"; + reg =3D <0x30000 0x60>; + }; + pruss_intc: interrupt-controller@20000 { compatible =3D "ti,pruss-intc"; reg =3D <0x20000 0x2000>; --=20 2.43.0