From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BD5427E056; Mon, 27 Apr 2026 21:57:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327066; cv=none; b=TzpMS9D4cFZ/z2crmN2GhH5kW3GwenFapgK/foYSpxKR3PImp9ZBNe3f6/bbs9ph0oHE9gns2X8Hkp3Cba8BLlFXLtmwak4Zqf7IhzXECPdrMKRa68y7Du7RM0c9+IF/6711K9+bJ0r0WNqC84P6EbK+wurzKhKejJB4Kpj6A/A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327066; c=relaxed/simple; bh=jsP9HGoABouAJrSx9y3RVxvt/zIaKtzWEMQhaHCYUfQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qoVFbZozDJkafojF/VXMxXQtSzSg2n1h/p5/7mxaWsCDKQ6OIf8wN97FMWe7ftxsMrxxJNxP74OtOh4X6s02aytYfOHoPYhG5T2zidez0pZsT1YPm/8Xh8gfz8rBkZY7qtDfiotL+D92+rVy2gHVaO4CfjZwI6Pr7Pw8k6zRyc8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=DWXVOukJ; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="DWXVOukJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1777327063; bh=jsP9HGoABouAJrSx9y3RVxvt/zIaKtzWEMQhaHCYUfQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=DWXVOukJZ3oEF3p1EXUMYrGtmD0EHvky0RHc5sAHnirTD6R2h23xVYTzrMUFlPoRY VMoQ2qRoRINB65TY9KdLohW6LxECLnFQtI6xtt12P8jxDBk3H1feIOe/0DQkKpDhjE ms68ITMQIx3wJYkcEustd/0iDPKdpPjcLu2oga4KQp7mlUGWhHPJqc4axtTOHhJD7b AURzSdPb5b+oh163hfs2KMBeWQSZ9Wc+55/uhKgFR8idAURl+RbYcl9OLoKdKLvpBY 911T9rcSoTLYRn4JLhWpoAaqDuJ4haWlDu6Pn6T54KtI+y6oxlkIulw+1PkULPO5+x wQpxDgpZt/ACw== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 7A37C17E0ED6; Mon, 27 Apr 2026 23:57:43 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:19 +0300 Subject: [PATCH v2 01/13] arm64: dts: rockchip: Add frl-enable-gpios to rk3576 boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-1-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The following RK3576 boards expose a GPIO pin to control the voltage bias on the HDMI data lines: - rk3576-100ask-dshanpi-a1 - rk3576-armsom-sige5 - rk3576-evb1-v10 - rk3576-evb2-v10 - rk3576-nanopi-m5 - rk3576-roc-pc - rk3576-rock-4d The pin must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts | 9 +++++++++ arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts | 9 +++++++++ arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts | 9 +++++++++ arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts | 9 +++++++++ arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts | 9 +++++++++ arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts | 9 +++++++++ arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 9 +++++++++ 7 files changed, 63 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts b/ar= ch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts index b19f9b6be6bf..a9e3beb3ee5e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts @@ -278,6 +278,9 @@ &gpu { }; =20 &hdmi { + frl-enable-gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -738,6 +741,12 @@ hp_det: hp-det { }; }; =20 + hdmi { + hdmi_tx_on_h: hdmi-tx-on-h { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pcie { pcie_reset: pcie-reset { rockchip,pins =3D <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/ar= m64/boot/dts/rockchip/rk3576-armsom-sige5.dts index 1c100ffd1518..c3e8966c09c4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts @@ -304,6 +304,9 @@ &gpu { }; =20 &hdmi { + frl-enable-gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -819,6 +822,12 @@ hp_det_l: hp-det-l { }; }; =20 + hdmi { + hdmi_tx_on_h: hdmi-tx-on-h { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3576-evb1-v10.dts index fb0dd1bc5148..4c82980a9f63 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts @@ -370,6 +370,9 @@ &gpu { }; =20 &hdmi { + frl-enable-gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -895,6 +898,12 @@ host_wake_bt: host-wake-bt { }; }; =20 + hdmi { + hdmi_tx_on_h: hdmi-tx-on-h { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { rtc_int: rtc-int { rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3576-evb2-v10.dts index 98d5d00d63b5..dfc756d5ec5e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts @@ -375,6 +375,9 @@ &gpu { }; =20 &hdmi { + frl-enable-gpios =3D <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -832,6 +835,12 @@ image_pwren: image-pwren { }; }; =20 + hdmi { + hdmi_tx_on_h: hdmi-tx-on-h { + rockchip,pins =3D <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { rtc_int: rtc-int { rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts b/arch/arm64= /boot/dts/rockchip/rk3576-nanopi-m5.dts index 7406a4adf810..227fe6f3ec7c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts @@ -327,6 +327,9 @@ &gpu { }; =20 &hdmi { + frl-enable-gpios =3D <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -813,6 +816,12 @@ gmac1_rst: gmac1-rst { }; }; =20 + hdmi { + hdmi_tx_on_h: hdmi-tx-on-h { + rockchip,pins =3D <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts b/arch/arm64/bo= ot/dts/rockchip/rk3576-roc-pc.dts index d0ab1d1e0e11..54de3a50571f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts @@ -283,6 +283,9 @@ ð0m0_rgmii_bus }; =20 &hdmi { + frl-enable-gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -720,6 +723,12 @@ &sdmmc { }; =20 &pinctrl { + hdmi { + hdmi_tx_on_h: hdmi-tx-on-h { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { rtc_int_l: rtc-int-l { rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/b= oot/dts/rockchip/rk3576-rock-4d.dts index 899a84b1fbf9..cc054c837317 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts @@ -289,6 +289,9 @@ &gpu { }; =20 &hdmi { + frl-enable-gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -720,6 +723,12 @@ &pcie0 { }; =20 &pinctrl { + hdmi { + hdmi_tx_on_h: hdmi-tx-on-h { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0502136D517; Mon, 27 Apr 2026 21:57:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327067; cv=none; b=HfgYpk/Z8GAvRaO8rj1BTao0eTwwo+Lik/L5Ck3zC35xD52Bitb5A321WN/MpIILew+GSTYobgqm7h1ecU+awxR1p2zkHCplIjNc7roL/NcnqNHqbsqTEDcsvl7absXxQUcrbH5jn5tNYiB81FLu2ogxSGNqKCf/Lmv3Aq9bl44= ARC-Message-Signature: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-2-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The board exposes the GPIO4_C6 pin to control the voltage bias on the HDMI data lines. It must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. Additionally, remove the now unnecessary workaround of using vcc_5v0_hdmi as hdmi-pwr-supply solely to drive the GPIO into its default state. Also rename the hdmi_con_en pinctrl to hdmi_tx_on_h to match the schematic naming. Signed-off-by: Cristian Ciocaltea --- .../boot/dts/rockchip/rk3576-luckfox-core3576.dtsi | 22 ++++--------------= ---- 1 file changed, 4 insertions(+), 18 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi b/ar= ch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi index 749f0a54b478..4fc8496828f8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi @@ -26,7 +26,6 @@ chosen { =20 hdmi-con { compatible =3D "hdmi-connector"; - hdmi-pwr-supply =3D <&vcc_5v0_hdmi>; type =3D "a"; =20 port { @@ -138,22 +137,6 @@ regulator-state-mem { }; }; =20 - vcc_5v0_hdmi: regulator-vcc-5v0-hdmi { - compatible =3D "regulator-fixed"; - enable-active-high; - gpios =3D <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdmi_con_en>; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - regulator-name =3D "vcc_5v0_hdmi"; - vin-supply =3D <&vcc_5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - vcc_5v0_host: regulator-vcc-5v0-host { compatible =3D "regulator-fixed"; enable-active-high; @@ -231,6 +214,9 @@ &gpu { }; =20 &hdmi { + frl-enable-gpios =3D <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -655,7 +641,7 @@ &pcie0 { =20 &pinctrl { hdmi { - hdmi_con_en: hdmi-con-en { + hdmi_tx_on_h: hdmi-tx-on-h { rockchip,pins =3D <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; }; }; --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D88AF39F190; Mon, 27 Apr 2026 21:57:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; 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Mon, 27 Apr 2026 23:57:45 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:21 +0300 Subject: [PATCH v2 03/13] arm64: dts: rockchip: Add frl-enable-gpios to rk3576-nanopi-r76s Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-3-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The board exposes the GPIO4_C6 pin to control the voltage bias on the HDMI data lines. It must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. Additionally, drop the now unnecessary workaround of using vcc5v_hdmi_tx as hdmi-pwr-supply solely to drive the GPIO into its default state. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts b/arch/arm= 64/boot/dts/rockchip/rk3576-nanopi-r76s.dts index 7ec27b05ff10..0a5cd5f6fd33 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts @@ -70,7 +70,6 @@ led-2 { =20 hdmi-con { compatible =3D "hdmi-connector"; - hdmi-pwr-supply =3D <&vcc5v_hdmi_tx>; type =3D "a"; =20 port { @@ -109,18 +108,6 @@ vcc5v_dcin: regulator-vcc5v-dcin { regulator-name =3D "vcc5v_dcin"; }; =20 - vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx { - compatible =3D "regulator-fixed"; - enable-active-high; - gpios =3D <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdmi_tx_on_h>; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - regulator-name =3D "vcc5v_hdmi_tx"; - vin-supply =3D <&vcc5v0_sys_s5>; - }; - vcc5v0_device_s0: regulator-vcc5v0-device-s0 { compatible =3D "regulator-fixed"; regulator-always-on; @@ -252,6 +239,9 @@ &gpu { }; =20 &hdmi { + frl-enable-gpios =3D <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmi_txm0_pins &hdmi_tx_scl &hdmi_tx_sda &hdmi_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A66723A6B6C; Mon, 27 Apr 2026 21:57:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327074; cv=none; b=GU5uNz3kU25jl125KSVflk7qzsGBI/DT/SiqE6A6PMRB+Cp3zELaWjkD00AjVHrrxUhL17+Ty7c7JyBseYu3tCy3up+Rqn/c8fr1j+4CnYX8fbJBfEFUXXh8QMmNYjzLO6jOz/MbrDiAJMR9iy/07jz3lZsy8SroSgejdUjckTA= ARC-Message-Signature: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-4-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The following RK3588 boards expose one or two GPIO pins to control the voltage bias on the HDMI0 and/or HDMI1 data lines: - rk3588-armsom-sige7 - rk3588-armsom-w3 - rk3588-coolpi-cm5-evb - rk3588-coolpi-cm5-genbook - rk3588-evb1-v10 - rk3588-evb2-v10 - rk3588-firefly-itx-3588j - rk3588-friendlyelec-cm3588-nas - rk3588-h96-max-v58 - rk3588-jaguar - rk3588-mnt-reform2 - rk3588-nanopc-t6 - rk3588-orangepi-5-max - rk3588-orangepi-5-plus - rk3588-orangepi-5-ultra - rk3588-roc-rt - rk3588-rock-5-itx - rk3588-rock-5b-5bp-5t - rk3588-tiger The pins must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi0 and/or hdmi1 nodes to their dedicated GPIO pin(s) via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. While at it, also ensure that pinctrl-names is present and ordered alphabetically within the hdmi nodes. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts | 18 ++++++++++++++= ++++ arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts | 18 ++++++++++++++= +++- .../boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts | 11 ++++++++++- arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 18 ++++++++++++++= ++++ arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts | 10 ++++++++++ .../boot/dts/rockchip/rk3588-firefly-itx-3588j.dts | 10 ++++++++++ .../dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts | 18 ++++++++++++++= ++++ arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts | 10 +++++++++- arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 18 ++++++++++++++= ++++ arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts | 18 ++++++++++++++= ++-- .../arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts | 18 ++++++++++++++= ++++ .../boot/dts/rockchip/rk3588-orangepi-5-ultra.dts | 11 +++++++++-- arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts | 18 ++++++++++++++= ++++ arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts | 10 +++++++++- .../arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi | 18 ++++++++++++++= +++- arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts | 3 ++- arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi | 11 +++++++++-- 20 files changed, 256 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts b/arch/ar= m64/boot/dts/rockchip/rk3588-armsom-sige7.dts index 39197ee19837..c4854c0f22e2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts @@ -177,6 +177,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -347,6 +351,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts b/arch/arm64= /boot/dts/rockchip/rk3588-armsom-w3.dts index 6ad2759ddcca..3bbafdd89ede 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts @@ -162,6 +162,10 @@ &combphy2_psu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -182,6 +186,10 @@ &hdmi0_sound { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim2_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -330,6 +338,16 @@ &pcie3x4 { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts b/arch/= arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts index 3d5c8b753208..66e3c20d7b4f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-evb.dts @@ -125,6 +125,10 @@ vcc5v0_usb30_otg: regulator-vcc5v0-usb30-otg { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -145,8 +149,10 @@ hdmi0_out_con: endpoint { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx= 1_sda + &hdmi1_tx_on_h>; pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx= 1_sda>; status =3D "okay"; }; =20 @@ -211,6 +217,16 @@ &pcie3x4 { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + lcd { lcdpwr_en: lcdpwr-en { rockchip,pins =3D <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts b/a= rch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts index 738637ecaf55..e05e6b2d5136 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts @@ -184,7 +184,10 @@ edp_out_panel: endpoint { =20 /* HDMI CEC is not used */ &hdmi0 { - pinctrl-0 =3D <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>; + frl-enable-gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda + &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -277,6 +280,12 @@ &pcie3x4 { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + lcd { lcdpwr_en: lcdpwr-en { rockchip,pins =3D <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3588-evb1-v10.dts index 09bc7b68dcc0..977849bfd509 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -360,6 +360,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -376,6 +380,10 @@ hdmi0_out_con: endpoint { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim2_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -612,6 +620,16 @@ rtl8211f_rst: rtl8211f-rst { =20 }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hdmirx { hdmirx_hpd: hdmirx-5v-detection { rockchip,pins =3D <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3588-evb2-v10.dts index 60ba6ac55b23..b7d2cb456148 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts @@ -143,6 +143,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -183,6 +187,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts b/ar= ch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts index e086114c7634..e43afb0c53fb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts @@ -322,6 +322,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -487,6 +491,12 @@ dp1_hpd: dp1-hpd { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dt= s b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts index 10a7d3691a26..0dce96ca8c28 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts @@ -331,6 +331,10 @@ &gpio4 { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -347,6 +351,10 @@ hdmi0_out_con: endpoint { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim2_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -520,6 +528,16 @@ key1_pin: key1-pin { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hdmirx { hdmirx_hpd: hdmirx-5v-detection { rockchip,pins =3D <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts b/arch/arm= 64/boot/dts/rockchip/rk3588-h96-max-v58.dts index 73d8ce4fde2b..7c2a1e6bcff9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts @@ -210,6 +210,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -339,6 +343,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/bo= ot/dts/rockchip/rk3588-jaguar.dts index 5f5d89a33a4a..05b524f682cf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts @@ -278,8 +278,10 @@ &gpu { =20 &hdmi0 { /* No CEC on Jaguar */ + frl-enable-gpios =3D <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda + &hdmi0_tx_on_h>; pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>; status =3D "okay"; }; =20 @@ -571,6 +573,12 @@ eth_reset: eth-reset { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + leds { led1_pin: led1-pin { rockchip,pins =3D <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts b/arch/arm= 64/boot/dts/rockchip/rk3588-mnt-reform2.dts index 78a4e896f665..36a5977d0795 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts @@ -148,6 +148,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -205,6 +209,12 @@ dp1_hpd: dp1-hpd { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pcie2 { pcie2_0_rst: pcie2-0-rst { rockchip,pins =3D <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm6= 4/boot/dts/rockchip/rk3588-nanopc-t6.dtsi index 84b6b53f016a..3b0903d0e3e2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi @@ -361,6 +361,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -381,6 +385,10 @@ &hdmi0_sound { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim2_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -682,6 +690,16 @@ usr_led_pin: usr-led-pin { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hdmirx { hdmirx_hpd: hdmirx-5v-detection { rockchip,pins =3D <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts b/arch/= arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts index 8b1d35760c3b..762f9fd966a4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-max.dts @@ -35,6 +35,10 @@ hdmi1_con_in: endpoint { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -55,9 +59,10 @@ &hdmi0_sound { }; =20 &hdmi1 { - pinctrl-names =3D "default"; + frl-enable-gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx1_cec &hdmim0_tx1_hpd - &hdmim1_tx1_scl &hdmim1_tx1_sda>; + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -102,6 +107,15 @@ &led_green_pwm { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; =20 usb { usb_otg_pwren: usb-otg-pwren { diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts b/arch= /arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts index 9950d1147e12..7142938d2971 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts @@ -121,6 +121,10 @@ &fan { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -141,6 +145,10 @@ hdmi0_out_con: endpoint { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim2_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -278,6 +286,16 @@ &pcie2x1l2 { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts b/arc= h/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts index f8c6c080e418..2b693dfb434c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-ultra.dts @@ -25,9 +25,10 @@ hdmi1_con_in: endpoint { }; =20 &hdmi1 { - pinctrl-names =3D "default"; + frl-enable-gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx1_cec &hdmim0_tx1_hpd - &hdmim1_tx1_scl &hdmim1_tx1_sda>; + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -64,6 +65,12 @@ &led_green_pwm { }; =20 &pinctrl { + hdmi { + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + usb { usb_otg_pwren: usb-otg-pwren { rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts b/arch/arm64/bo= ot/dts/rockchip/rk3588-roc-rt.dts index 2d6fed2a84a3..c50217a7b559 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts @@ -325,6 +325,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -345,6 +349,10 @@ &hdmi0_sound { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim2_tx1_cec &hdmim0_tx1_hpd + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -583,6 +591,16 @@ led_pins: led-pins { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts b/arch/arm6= 4/boot/dts/rockchip/rk3588-rock-5-itx.dts index f7dd01d6fa0a..d5c0b01987fc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts @@ -346,8 +346,10 @@ &gpu { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx1_cec &hdmim0_tx1_hpd - &hdmim1_tx1_scl &hdmim1_tx1_sda>; + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -696,6 +698,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { rtc_int: rtc-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi b/arch= /arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi index bf4a1d2e55ca..b2ca041b8e8b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi @@ -183,6 +183,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -203,8 +207,10 @@ &hdmi0_sound { }; =20 &hdmi1 { + frl-enable-gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx1_cec &hdmim0_tx1_hpd - &hdmim1_tx1_scl &hdmim1_tx1_sda>; + &hdmim1_tx1_scl &hdmim1_tx1_sda &hdmi1_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -505,6 +511,16 @@ &pd_npu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + hdmi1_tx_on_h: hdmi1-tx-on-h { + rockchip,pins =3D <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts b/arch/ar= m64/boot/dts/rockchip/rk3588-tiger-haikou.dts index caa43d1abf17..08b7d477d8db 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts @@ -172,8 +172,9 @@ &hdmi0 { * While HDMI-CEC is present on the Q7 connector, it is not * connected on Haikou itself. */ + pinctrl-0 =3D <&hdmim0_tx0_hpd &hdmim1_tx0_scl &hdmim1_tx0_sda + &hdmi0_tx_on_h>; pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdmim0_tx0_hpd &hdmim1_tx0_scl &hdmim1_tx0_sda>; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/bo= ot/dts/rockchip/rk3588-tiger.dtsi index a0e97481afb7..ea5c264d1537 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi @@ -148,9 +148,10 @@ &gpu { }; =20 &hdmi0 { - pinctrl-names =3D "default"; + frl-enable-gpios =3D <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim1_tx0_cec &hdmim0_tx0_hpd &hdmim1_tx0_scl - &hdmim1_tx0_sda>; + &hdmim1_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; }; =20 &i2c1 { @@ -349,6 +350,12 @@ eth_reset: eth-reset { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + leds { module_led_pin: module-led-pin { rockchip,pins =3D <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7FD53A1A21; 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Mon, 27 Apr 2026 23:57:46 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:23 +0300 Subject: [PATCH v2 05/13] arm64: dts: rockchip: Add frl-enable-gpios to rk3588s boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-5-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The following RK3588s boards expose a GPIO pin to control the voltage bias on the HDMI0 data lines: - rk3588s-coolpi-4b - rk3588s-indiedroid-nova - rk3588s-nanopi-r6 - rk3588s-odroid-m2 - rk3588s-orangepi-5 - rk3588s-radxa-cm5-io - rk3588s-rock-5a - rk3588s-rock-5c The pin must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi0 node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. While at it, also ensure that pinctrl-names is present and ordered alphabetically within the hdmi nodes. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts | 10 +++++++++- arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 12 ++++++++++-- arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts | 12 ++++++++++-- 8 files changed, 79 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts b/arch/arm6= 4/boot/dts/rockchip/rk3588s-coolpi-4b.dts index 189444d20779..16f19109fca6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts @@ -251,6 +251,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -396,6 +400,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts b/arc= h/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts index 174d299cc6bb..f9e3c0134d5f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts @@ -277,8 +277,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx0_scl>, <&hdmim0_tx0_sda>, - <&hdmim0_tx0_hpd>, <&hdmim0_tx0_cec>; + <&hdmim0_tx0_hpd>, <&hdmim0_tx0_cec>, + <&hdmi0_tx_on_h>; pinctrl-names =3D "default"; status =3D "okay"; }; @@ -517,6 +519,12 @@ bt_wake_host: bt-wake-host { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { =20 hym8563_int: hym8563-int { diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi index 1b6a59f7cabc..b9c0a1a050a9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi @@ -236,6 +236,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -404,6 +408,12 @@ lan2_led_pin: lan2-led-pin { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { rtc_int: rtc-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts b/arch/arm6= 4/boot/dts/rockchip/rk3588s-odroid-m2.dts index a72063c55140..4e98fa33492c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts @@ -249,6 +249,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -438,6 +442,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + lcd { lcd_pwren: lcd-pwren { rockchip,pins =3D <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi b/arch/ar= m64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi index dafad29f9854..cd80cb15a405 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi @@ -181,6 +181,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -381,6 +385,12 @@ &pd_npu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + hym8563 { hym8563_int: hym8563-int { rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts b/arch/a= rm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts index f80d5a00a4bd..af4a9bc015e1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts @@ -120,6 +120,10 @@ &gmac1 { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -217,6 +221,12 @@ usbc0_int: usbc0-int { }; }; =20 + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins =3D <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/= boot/dts/rockchip/rk3588s-rock-5a.dts index 0991f6a21190..ffd26b43ae8c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -323,11 +323,13 @@ &gmac1_rgmii_clk }; =20 &hdmi0 { - pinctrl-names =3D "default"; + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim1_tx0_hpd &hdmim0_tx0_scl - &hdmim0_tx0_sda>; + &hdmim0_tx0_sda + &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -373,6 +375,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + leds { io_led: io-led { rockchip,pins =3D <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts b/arch/arm64/= boot/dts/rockchip/rk3588s-rock-5c.dts index 7fe42f4ff827..9d3d0791554d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts @@ -258,11 +258,13 @@ &gpu { }; =20 &hdmi0 { - pinctrl-names =3D "default"; + frl-enable-gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim1_tx0_hpd &hdmim0_tx0_scl - &hdmim0_tx0_sda>; + &hdmim0_tx0_sda + &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -461,6 +463,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + leds { led_pins: led-pins { rockchip,pins =3D <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D6CB3A6B81; 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Mon, 27 Apr 2026 23:57:47 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:24 +0300 Subject: [PATCH v2 06/13] arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-gameforce-ace Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-6-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The board exposes the GPIO4_B3 pin to control the voltage bias on the HDMI0 data lines. It must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi0 node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. Additionally, drop the now unnecessary ddc-en-gpios property and the associated pinctrl-* entries from hdmi0-con, and rename the hdmi0_en pinmux to hdmi0_tx_on_h, in line with the naming commonly used in RK3588s-based board schematics. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts b/arch/= arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts index 89618394c0bf..b657d54c2c59 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts @@ -302,9 +302,6 @@ amp_headphone: headphone-amplifier { =20 hdmi0-con { compatible =3D "hdmi-connector"; - ddc-en-gpios =3D <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; - pinctrl-0 =3D <&hdmi0_en>; - pinctrl-names =3D "default"; type =3D "d"; =20 port { @@ -514,8 +511,9 @@ &gpu { =20 &hdmi0 { no-hpd; + frl-enable-gpios =3D <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx0_cec>, <&hdmim0_tx0_scl>, - <&hdmim0_tx0_sda>; + <&hdmim0_tx0_sda>, <&hdmi0_tx_on_h>; pinctrl-names =3D "default"; status =3D "okay"; }; @@ -893,7 +891,7 @@ charger_int_h: charger-int-h { }; =20 hdmi { - hdmi0_en: hdmi0-en { + hdmi0_tx_on_h: hdmi0-tx-on-h { rockchip,pins =3D <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; }; --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21710376BD9; Mon, 27 Apr 2026 21:57:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; cv=none; b=ul724aWp9qlGfYygvrV4564ESdYVwNkoi2JIvBjn1vRLtrWe12vuylf7tPK8zTOypa65TWYF4/snQUW04iXhvpkfqhzs3Uk/491lV5+A6dCaUFVXR3sM4+SqMssW5MSIYT1HhbL/sWVodCEx18+2ZFhIkRwcCLsEfPYFlW5+O5g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; c=relaxed/simple; bh=KpitoL56kjSJH2zK4K2wF3mkADlzeBuLCe4iX7ONuFs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BDV+LnY4iZtoR4OiIjOlNh2LuVlYt5Q0NKkCQQLQYJOuOU99cmAqgQl0K3ikL1JZ3/3rZDj+zlti3w+B90V5TJmPTt3o1gv5b0Wr/bmNuIEQIhnfo0bM0QRR18PCLqwjZrjQIOiGFPRaNcaenva4vJMDOjIVGbdnfg77kRfm9JE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=DGcWLsln; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="DGcWLsln" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1777327068; bh=KpitoL56kjSJH2zK4K2wF3mkADlzeBuLCe4iX7ONuFs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=DGcWLsln1qTLCz7HwxEJL/dzvhjgqfKwhKhdB8MT/xBD9r1sM8ixuYQLANXnf5BdU rtYqjsiuVrXxSim6vuPpjg6tMCIJJ35uFHm4iKqGjl3zeyNTpl45Oj6RVMRMZ6V3rS FO14UTUvEpKob73Lt2Xd2dT98JOqVKid0rnOIe2w7gvP5XYkExCJntI2m2AiUkC+57 8RtB85fWyJoMLCVK/we65ey1f7yzO/1z9HGPxYbxir4GENyhWyALhoXc9PGhBW0JjF h6HI5lgm5eIilYT+N/VW3uGq2bl7yG8TrIZ4KF46NEEUfDp77hR9HLuw7JwiDnEvnC eKFq4utsgfwVg== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 62AA117E1537; Mon, 27 Apr 2026 23:57:48 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:25 +0300 Subject: [PATCH v2 07/13] arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-khadas-edge2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-7-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The board exposes the GPIO4_B1 pin to control the voltage bias on the HDMI0 data lines. It must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi0 node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. While at it, remove the duplicated &hdmi0_sound node. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/a= rm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 2c22abaf40a8..5afbc593341b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -194,6 +194,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -217,10 +221,6 @@ &hdptxphy0 { status =3D "okay"; }; =20 -&hdmi0_sound { - status =3D "okay"; -}; - &i2c0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c0m2_xfer>; @@ -282,6 +282,12 @@ &pd_gpu { }; =20 &pinctrl { + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + vdd_sd { vdd_sd_en: vdd-sd-en { rockchip,pins =3D <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33BF23A0E80; Mon, 27 Apr 2026 21:57:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; cv=none; b=VFulB7kJIBY911qujLA4VVKK8Rc797+2Mdd6LJSE8Lb10xXnFKSFE+Tm1AFMHuxtXGd1WJV+blQ+0XWp3A3yrieWgbgm3ZcyIV21uoA8v8HlCe0B/Q32sYzaiBJlRxJHeh1YMDAzg0Xwba4KqV2cf+8a+4CeTIwBUvQ2UbGfiY4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; c=relaxed/simple; bh=FDI0D3bF0d00cd9rT9aq23OMLT8xla/yOJVEQWe89oI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=riAB7DT6D/zYOyb5ORoKSYNOv912I6COj/jyuJ+P5QRv0oapabutqCwYMN/Mvu40yr/yw2eQAAW5/sQKSeTrk6Chei8UXR/RCd2cJ6YY9l8gGCl14G02QFhTIIPf6rDG16AhYvobfeXsFvK0gKo7qbK1duYFcqIrdnG6WTGVaCk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=kSWeEJsr; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="kSWeEJsr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1777327069; bh=FDI0D3bF0d00cd9rT9aq23OMLT8xla/yOJVEQWe89oI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=kSWeEJsrKMkD9pCuqJEh+s1UCk4WrgkXADAHiNMbNBuMjfo7MoSETThMr1osw9IF8 zN+xPN8IiDXeNPJu3uHYQZFfFtJBryvKOSDcDM+Bd/xmRKgvfKFlKOw0w63qvu64Ie SlLnFlPgftLZY64d1dfuA8HwwTqYxvqwPYdIpvSpWdlr4RtSNaUW/Gg1Ba40uCIo2a +aKKW3JCQUKH7Xvikx7Bkaueqn4+62i+v9ns6gKWFBOOoufo4xf9od2TcYFCR0mtRQ fGf6pqJmsxGcIY3779v1uAA2w7NoW5XZWUURnveY5+6R0n2RdAY0dwxQcVnuiNXo3G Mhf+EFAMk7Kow== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 37CAA17E154C; Mon, 27 Apr 2026 23:57:49 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:26 +0300 Subject: [PATCH v2 08/13] arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-orangepi-cm5-base Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-8-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The board exposes the GPIO4_B5 pin to control the voltage bias on the HDMI0 data lines. It must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi0 node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. While at it, rename the hdmi_frl_pin pinmux to hdmi0_tx_on_h, in line with the naming commonly used in RK3588s-bassed board schematics. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts b/a= rch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts index 06120b2db690..20da0c2b3d92 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts @@ -143,10 +143,11 @@ &gmac1_rgmii_clk }; =20 &hdmi0 { - pinctrl-names =3D "default"; + frl-enable-gpios =3D <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda - &hdmi_frl_pin>; + &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -245,8 +246,8 @@ key1_pin: key1-pin { }; =20 hdmi { - hdmi_frl_pin: hdmi-frl-pin { - rockchip,pins =3D <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; }; }; =20 --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 384B43A168E; Mon, 27 Apr 2026 21:57:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; cv=none; b=Z895wCoX7IjjpWMjV72F9MyQ9bbX2wSqHvnGO2AuKHYhcM4P9+1yV4b8xf4+Y2nDcdqKBX3TOTgGJ+i4aaEc0+i8d900KDeKZE1kQbQXaEKF1QCjLtZ5O8XnSV8hXz8aMgSDrBq7ZSBktXLZWCAjjKnyeBQFKr1R/rxFv51v/DM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; c=relaxed/simple; bh=hkJBxlQNXD3WLXHHucu4Mt9C2VCbn3kXBkeHk5+lnGU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FGWE0JikxUEe/xAzpA9ENv+QyFNUniIoUya52w9pXIpibfvEs++wJojX4ZMVKTqCV5y0seNEwYseAABLZdPQMpLhDcswNJfQuFOsTb6uBJVLEBLIKZIKC/xX7MSNCWxO/KodnRbbuNZghw4PE409U1jwkG+laWTFsTnTtFti03o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=AlP8SKxy; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="AlP8SKxy" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1777327070; bh=hkJBxlQNXD3WLXHHucu4Mt9C2VCbn3kXBkeHk5+lnGU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=AlP8SKxyr/i007iVsLGUqGeZXzqPCHwI5AiJuZdrzR2YQ4r53NDqHC/vYCNZ0pzor 7ZAzQsXOTPk3eedUztWsaQoQD17BmvS4rM9weuZp9Kfwf0ayZhGHpdUZOtdrlLWuSm /zvtJtflWGHLhiIKFYo1O7wlSrycVq4c3zgQBEEitItcuHhSNf77SrU/MxtjkCOA3C 3A86ZQY8Si8Yk6ljUROgytZ8+3JjBnmVsPLVp6Bzr5b/pi3fYSCAaIcu7yFLPnYtq+ M47l69mwpFMSX7tj80AVL/BeQZcFwZnAOfwxYUHp9v2W0a2tH22vIHIbvnNI70mJQB 6gOovSejNnxQQ== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 0BDE817E0D23; Mon, 27 Apr 2026 23:57:50 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:27 +0300 Subject: [PATCH v2 09/13] arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-roc-pc Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-9-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 The board exposes the GPIO4_B2 line to control the voltage bias on the HDMI0 data lines. It must be asserted when operating in HDMI 2.1 FRL mode and deasserted for HDMI 1.4/2.0 TMDS mode. Wire up the hdmi0 node to its dedicated GPIO via frl-enable-gpios to allow adjusting the bias when transitioning between TMDS and FRL modes. While at it, move hym8563 down to fix the ordering of &pinctrl entries. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts b/arch/arm64/b= oot/dts/rockchip/rk3588s-roc-pc.dts index 7e179862da6e..aa02cf510d6d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts @@ -224,6 +224,10 @@ &gpu { }; =20 &hdmi0 { + frl-enable-gpios =3D <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -367,9 +371,9 @@ &pd_gpu { }; =20 &pinctrl { - hym8563 { - hym8563_int: hym8563-int { - rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + hdmi { + hdmi0_tx_on_h: hdmi0-tx-on-h { + rockchip,pins =3D <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; }; }; =20 @@ -379,6 +383,12 @@ hp_detect: hp-detect { }; }; =20 + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + leds { led_pins: led-pins { rockchip,pins =3D <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>, --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 393FE39184B; Mon, 27 Apr 2026 21:57:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; cv=none; b=hezrcy3mJQ5LdBaaYY20cr44HJPyoEmpZFuZ0KPqYZz2yIFaJvsHbv0JHZDsXbRJilgWSUFjAmdmDgYvTQMQ0PXyu/6iN8z+tXRyzJItx6fRLTSX2V/kBpBhN8lipPlQEnDLLlYnT/0qALt5jqObeoq9ysCVMHhxGsn3ZWzkUGk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; c=relaxed/simple; bh=pqRtbplYE8IdJKdBWhM5OHW77gHMGDEF1m/tI0sVmVg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OSgKQb4uNCHrD6ZR8D4Uf5c19CfH1OaigafBk4AuImEPgCSyIiBEG3T3jakRVoLkb89xnLKdf8moF/Om+rQy639xOwALD2mBjpynicbG+S8IPL7rqMIu9UNS3Iy4/ve3AH8vfCeMG3s908otAf8mGE1r8+lb921QOUknOgMZ9Ps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=KQLXIHWJ; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="KQLXIHWJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1777327071; bh=pqRtbplYE8IdJKdBWhM5OHW77gHMGDEF1m/tI0sVmVg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=KQLXIHWJdZT0TECVDrV5VZQulabse1tqARayoCENAjGajdd5B5KWN683h6Y3vIu3U 5CVfEqlvA3dilYUNKiO+TrtyWoyUJnTtsJIduQICpxwoesLS2fABYxCowaeIwW3jYD zsfok6b79zkMnZzdofnsKK0lRaCTrOmE77rQLOc2LWcs4zZcMK0ocsLOisn+MQu63P pYS02iAetB/LAyB1aMrkpAqY+UlTBq7t6RNCuxQn5TvMCUg7hp3Bg0l5n/c6gFnPR/ Z+PAkRZILC9fLTjqMDKyTsK+H3/EVTL7qGCDdhuFrL++UeYsbFn3UevNYGhP9FEv/J n4LzWoTtnCv9w== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id D5A7E17E141F; Mon, 27 Apr 2026 23:57:50 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:28 +0300 Subject: [PATCH v2 10/13] arm64: dts: rockchip: Drop unnecessary #{address,size}-cells from rk3588-jaguar Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-10-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 Remove the unnecessary #address-cells and #size-cells properties from the usb_host0_xhci and usb_host1_xhci port nodes, as they each contain a single endpoint child with no reg property. This fixes the following dtc warnings: rk3588-jaguar.dts: Warning (avoid_unnecessary_addr_size): /usb@fc000000/port: unnecessary #address-cells/#size-cells [...] /usb@fc400000/port: unnecessary #address-cells/#size-cells [...] Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/bo= ot/dts/rockchip/rk3588-jaguar.dts index 05b524f682cf..033db78aff67 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts @@ -1142,9 +1142,6 @@ &usb_host0_xhci { status =3D "okay"; =20 port { - #address-cells =3D <1>; - #size-cells =3D <0>; - usb_host0_xhci_drd_sw: endpoint { remote-endpoint =3D <&usbc0_hs>; }; @@ -1157,9 +1154,6 @@ &usb_host1_xhci { status =3D "okay"; =20 port { - #address-cells =3D <1>; - #size-cells =3D <0>; - usb_host1_xhci_drd_sw: endpoint { remote-endpoint =3D <&usbc1_hs>; }; --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33B2339FCCF; Mon, 27 Apr 2026 21:57:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; cv=none; b=XaQ/Llr505QQytzhyhdbDmX/4VlfcULX7cF93pWrHR6Qn57L1zgaLHkKdH2Bz4WrJ5wc9mMY6JG0En4dR6wQGHa8JdR26EduE7cMucAVaFrEDEUzPKr8KpQHLdNjbWpek6p9ZqSz3NP9FO0AXmLYw3EuNNUqTuLxTc8V/WZlpcQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777327075; c=relaxed/simple; bh=L8fHGnYJyQWq1k1jHm8DfO8Gn8xMdJZNXES7wUUBo9c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nzm247aQ/Pi38pB0/8yectQu6RNVo31+xcEfeez1E4tvm9ue5pF/PeMWLZFmo/Q7x1PHyxQR1ypRGM1CBR9EpUzHh4myhpanTJi2i3PN5fIPqiiJDfUydQ2uUqFX7gup+WUb5fTb30wZLnv+EA46Zuw5YlZePiPeotsivO8ex/w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=Ggm058k0; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Ggm058k0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1777327071; bh=L8fHGnYJyQWq1k1jHm8DfO8Gn8xMdJZNXES7wUUBo9c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Ggm058k0+YbgMqt05i7tTW6pf9RqHbyXgydQijp8VJES5aK77XPSjSp8n3kvNBXBu ybZaEsDWpYpcmmT0S0ZoF8LQUxgDjPQBcbRF2sobpdybIiIE95AFusregoagXVzFMd hdsKanc1SMBYANsyAymDv5DYG6+/SXU8jv6HRzR72faobSg8KFf5Q0h1pL4cUjNhv4 i1nX74FGneWfPx+koeVN7igKgM9IBVg+a72u8rzQChW5/bJ1F9xSrX2RggYK1gXxQb clUnpmpMTS//Ox6/abwtN9cR4hLfVHw9qS9/ZTnYIfBK/gqnAFqwZASInrWndT+axD phl00X6KJ0CoA== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id ACE4717E1562; Mon, 27 Apr 2026 23:57:51 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:29 +0300 Subject: [PATCH v2 11/13] arm64: dts: rockchip: Add missing pinctrl-names to rk3576 boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-11-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 Several rk3576 board DTS files override pinctrl-0 for uart0 without re-specifying pinctrl-names. While the property is inherited from the base rk3576.dtsi, add it explicitly to the board-level overrides for consistency with other nodes. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts | 1 + arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts | 1 + arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts | 1 + arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 1 + 4 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts b/ar= ch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts index a9e3beb3ee5e..05fb4a7f9a16 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-100ask-dshanpi-a1.dts @@ -815,6 +815,7 @@ &u2phy1_otg { =20 &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/ar= m64/boot/dts/rockchip/rk3576-armsom-sige5.dts index c3e8966c09c4..4ac4465e39a5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts @@ -975,6 +975,7 @@ &u2phy1_otg { =20 &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts b/arch/arm64/bo= ot/dts/rockchip/rk3576-roc-pc.dts index 54de3a50571f..8411c16fa471 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-roc-pc.dts @@ -776,6 +776,7 @@ wd_en: wd-en { =20 &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts b/arch/arm64/b= oot/dts/rockchip/rk3576-rock-4d.dts index cc054c837317..272af1012ab0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts @@ -833,6 +833,7 @@ &u2phy1_otg { =20 &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 --=20 2.53.0 From nobody Tue Jun 16 07:38:18 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3645D3A0E8F; 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Mon, 27 Apr 2026 23:57:52 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:30 +0300 Subject: [PATCH v2 12/13] arm64: dts: rockchip: Add missing pinctrl-names to rk3588 boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-12-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 Several rk3588 board DTS files override pinctrl-0 for i2c, i2s, pcie, pwm, sdmmc, spdif, spi and uart nodes without re-specifying pinctrl-names. While the property is inherited from the base SoC DTSI, add it explicitly to the board-level overrides for consistency with other nodes. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi | 4 ++++ arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 2 ++ arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts | 2 ++ arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts | 8 ++++++++ arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts | 2 ++ arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 3 +++ arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts | 2 ++ arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts | 2 ++ arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi | 9 +++++++++ arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi | 2 ++ 24 files changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts b/arch/ar= m64/boot/dts/rockchip/rk3588-armsom-sige7.dts index c4854c0f22e2..1005b15d708a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts @@ -788,6 +788,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts b/arch/arm64= /boot/dts/rockchip/rk3588-armsom-w3.dts index 3bbafdd89ede..faeddcfdeb32 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts @@ -439,6 +439,7 @@ &sdio { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts b/a= rch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts index e05e6b2d5136..37d7b82ad553 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts @@ -335,6 +335,7 @@ pcie_wake: pcie-wake { =20 &pwm6 { pinctrl-0 =3D <&pwm6m1_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi index b07543315f87..33dacaa6af4d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi @@ -143,6 +143,7 @@ &gpu { =20 &i2c0 { pinctrl-0 =3D <&i2c0m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 vdd_cpu_big0_s0: regulator@42 { @@ -219,6 +220,7 @@ hym8563: rtc@51 { =20 &i2c7 { pinctrl-0 =3D <&i2c7m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 es8316: audio-codec@10 { @@ -244,6 +246,7 @@ &i2s0_mclk &i2s0_sclk &i2s0_sdi0 &i2s0_sdo0>; + pinctrl-names =3D "default"; status =3D "okay"; =20 i2s0_8ch_p0: port { @@ -656,5 +659,6 @@ &tsadc { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi b/ar= ch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi index 08920344a4b8..2751f84a4b8b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi @@ -252,6 +252,7 @@ &sdmmc { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3588-evb1-v10.dts index 977849bfd509..8969b56f3063 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -510,6 +510,7 @@ &i2s0_mclk &i2s0_sclk &i2s0_sdi0 &i2s0_sdo0>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -1386,6 +1387,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3588-evb2-v10.dts index b7d2cb456148..059ab02411d9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts @@ -921,6 +921,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi b/arch/arm6= 4/boot/dts/rockchip/rk3588-fet3588-c.dtsi index 4331cdc70f97..d3fb2677a855 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi @@ -558,5 +558,6 @@ &tsadc { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi b/= arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi index 80e16ea4154c..ecb27b4a29bd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi @@ -443,5 +443,6 @@ regulator-state-mem { /* rk3588 preferred debug out */ &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi b= /arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi index 6726eeb49255..80ca7e78354c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi @@ -439,5 +439,6 @@ regulator-state-mem { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts b/ar= ch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts index e43afb0c53fb..8dac069f8351 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts @@ -568,11 +568,13 @@ &sata2 { /* uart/232/485 */ &uart0 { pinctrl-0 =3D <&uart0m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 &uart1 { pinctrl-0 =3D <&uart1m1_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts b/arch/arm= 64/boot/dts/rockchip/rk3588-h96-max-v58.dts index 7c2a1e6bcff9..3811f9a73bb6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts @@ -784,6 +784,7 @@ &u2phy1_otg { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/bo= ot/dts/rockchip/rk3588-jaguar.dts index 033db78aff67..41758fe7d368 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts @@ -307,6 +307,7 @@ &hdptxphy0 { =20 &i2c0 { pinctrl-0 =3D <&i2c0m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 fan@18 { @@ -417,10 +418,12 @@ regulator-state-mem { =20 &i2c1 { pinctrl-0 =3D <&i2c1m4_xfer>; + pinctrl-names =3D "default"; }; =20 &i2c6 { pinctrl-0 =3D <&i2c6m4_xfer>; + pinctrl-names =3D "default"; }; =20 &i2c7 { @@ -439,6 +442,7 @@ eeprom@54 { =20 &i2c8 { pinctrl-0 =3D <&i2c8m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 typec-portc@22 { @@ -1054,18 +1058,21 @@ &u2phy3_host { /* Mule-ATtiny debug UART; typically baudrate 9600 */ &uart0 { pinctrl-0 =3D <&uart0m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 /* Main debug interface on P20 micro-USB B port and P21 header */ &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 /* RS485 on P19 */ &uart3 { pinctrl-0 =3D <&uart3m2_xfer &uart3_rtsn>; + pinctrl-names =3D "default"; linux,rs485-enabled-at-boot-time; status =3D "okay"; }; @@ -1073,6 +1080,7 @@ &uart3 { /* Mule-ATtiny UPDI flashing UART */ &uart7 { pinctrl-0 =3D <&uart7m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts b/arch/arm= 64/boot/dts/rockchip/rk3588-mnt-reform2.dts index 36a5977d0795..9052e0d5494f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts @@ -185,6 +185,7 @@ rgmii_phy: ethernet-phy@0 { =20 &pcie2x1l2 { pinctrl-0 =3D <&pcie2_0_rst>; + pinctrl-names =3D "default"; reset-gpios =3D <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; status =3D "okay"; }; @@ -236,6 +237,7 @@ eth_phy_reset: eth-phy-reset { =20 &pwm8 { pinctrl-0 =3D <&pwm8m2_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm6= 4/boot/dts/rockchip/rk3588-nanopc-t6.dtsi index 3b0903d0e3e2..7495af5bd973 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi @@ -579,6 +579,7 @@ rt5616_p0_0: endpoint { =20 &i2c8 { pinctrl-0 =3D <&i2c8m2_xfer>; + pinctrl-names =3D "default"; }; =20 &i2s0_8ch { @@ -763,6 +764,7 @@ usbc0_int: usbc0-int { =20 &pwm1 { pinctrl-0 =3D <&pwm1m1_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -1174,6 +1176,7 @@ &tsadc { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts b/arch= /arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts index 7142938d2971..145986695720 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts @@ -351,6 +351,7 @@ &pwm2 { =20 &pwm3 { pinctrl-0 =3D <&pwm3m1_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -369,6 +370,7 @@ &u2phy1_otg { =20 &uart9 { pinctrl-0 =3D <&uart9m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3588-orangepi-5.dtsi index 3bceee948458..4e9fe872b581 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi @@ -822,6 +822,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts b/arch/arm64/bo= ot/dts/rockchip/rk3588-roc-rt.dts index c50217a7b559..02d532c77a26 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts @@ -1059,6 +1059,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts b/arch/arm6= 4/boot/dts/rockchip/rk3588-rock-5-itx.dts index d5c0b01987fc..f9bd30e6cdda 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts @@ -894,6 +894,7 @@ spi_flash: flash@0 { =20 &spdif_tx1 { pinctrl-0 =3D <&spdif1m2_tx>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -1228,6 +1229,7 @@ &tsadc { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi b/arch= /arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi index b2ca041b8e8b..13aaf63ad093 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi @@ -975,6 +975,7 @@ &tsadc { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts b/arch/ar= m64/boot/dts/rockchip/rk3588-tiger-haikou.dts index 08b7d477d8db..873fbeb8daa1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts @@ -274,6 +274,7 @@ &sdmmc { cd-gpios =3D <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; disable-wp; pinctrl-0 =3D <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>; + pinctrl-names =3D "default"; sd-uhs-sdr12; sd-uhs-sdr25; sd-uhs-sdr50; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi b/arch/arm64/bo= ot/dts/rockchip/rk3588-tiger.dtsi index ea5c264d1537..139f70e7bbd9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi @@ -156,6 +156,7 @@ &hdmi0 { =20 &i2c1 { pinctrl-0 =3D <&i2c1m0_xfer>; + pinctrl-names =3D "default"; }; =20 &i2c1m0_xfer { @@ -168,6 +169,7 @@ &i2c1m0_xfer { =20 &i2c2 { pinctrl-0 =3D <&i2c2m3_xfer>; + pinctrl-names =3D "default"; }; =20 &i2c2m3_xfer { @@ -180,10 +182,12 @@ &i2c2m3_xfer { =20 &i2c3 { pinctrl-0 =3D <&i2c3m0_xfer>; + pinctrl-names =3D "default"; }; =20 &i2c4 { pinctrl-0 =3D <&i2c4m4_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 vdd_npu_s0: regulator@42 { @@ -205,6 +209,7 @@ regulator-state-mem { =20 &i2c5 { pinctrl-0 =3D <&i2c5m1_xfer>; + pinctrl-names =3D "default"; }; =20 &i2c5m1_xfer { @@ -302,6 +307,7 @@ &i2c7m0_xfer { =20 &i2c8 { pinctrl-0 =3D <&i2c8m2_xfer>; + pinctrl-names =3D "default"; }; =20 &mdio0 { @@ -441,6 +447,7 @@ &sdmmc { =20 &spi0 { pinctrl-0 =3D <&spi0m1_cs0 &spi0m1_cs1 &spi0m3_pins>; + pinctrl-names =3D "default"; }; =20 &spi2 { @@ -771,10 +778,12 @@ &tsadc { /* Routed to UART0 on the Q7 connector */ &uart2 { pinctrl-0 =3D <&uart2m2_xfer>; + pinctrl-names =3D "default"; }; =20 /* Mule-ATtiny UPDI */ &uart4 { pinctrl-0 =3D <&uart4m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts b/arch/arm= 64/boot/dts/rockchip/rk3588-toybrick-x0.dts index 5a428e00ab93..85ac072f64b9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts @@ -675,6 +675,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3588-turing-rk1.dtsi index b11d24dcc180..9d5d4cfe0170 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi @@ -704,11 +704,13 @@ &tsadc { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; 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h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Mw4iQqvadAmOphrPhpJVLo4xrwmSLa5UtdvdRNoXj3BrP5EUXXbfTTpU1EmaVjMug lcYe4BNTRujnnqcXt8Pfbz+RUTuUwWgeFqDqvsOsqq8x2PBPbu1Ck5t6wA/BKrz5tj ZDH3F3SQeR7C1vL8MBiRnwWQg2MuH4pkrLU59WPRXyzcGXNWGjT6ewdmogN/UUPwO+ IETGUhKTSQM6XreXwl4MgKFhtJmmdH3xXwBX7Z2iSGJcODxO5h1r8Imo9UfLKDuSG7 cqnZkxEjP8AhYvbt/xkGo5PLkj1/xNC9u41SrTKbotic5jVoBojX4HQVuLAW3VuXy4 nF6q/1LLbPDEw== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 511F117E157E; Mon, 27 Apr 2026 23:57:53 +0200 (CEST) From: Cristian Ciocaltea Date: Tue, 28 Apr 2026 00:57:31 +0300 Subject: [PATCH v2 13/13] arm64: dts: rockchip: Add missing pinctrl-names to rk3588s boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260428-dts-rk-frl-enable-gpios-v2-13-924df9db884a@collabora.com> References: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> In-Reply-To: <20260428-dts-rk-frl-enable-gpios-v2-0-924df9db884a@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.1 Several rk3588s board DTS files override pinctrl-0 for i2c, i2s, pwm, spi, tsadc and uart nodes without re-specifying pinctrl-names. While the property is inherited from the base rk3588s.dtsi, add it explicitly to the board-level overrides for consistency with other nodes. Signed-off-by: Cristian Ciocaltea --- arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts | 6 ++++++ arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts | 7 +++++++ arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts | 3 +++ arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts | 3 +++ arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi | 3 +++ arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 1 + arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts | 1 + 12 files changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts b/arch/arm6= 4/boot/dts/rockchip/rk3588s-coolpi-4b.dts index 16f19109fca6..2e8661ac7fcf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts @@ -276,6 +276,7 @@ &hdptxphy0 { =20 &i2c0 { pinctrl-0 =3D <&i2c0m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 vdd_cpu_big0_s0: regulator@42 { @@ -336,6 +337,7 @@ regulator-state-mem { =20 &i2c6 { pinctrl-0 =3D <&i2c6m3_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 hym8563: rtc@51 { @@ -352,6 +354,7 @@ hym8563: rtc@51 { =20 &i2c7 { pinctrl-0 =3D <&i2c7m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 es8316: audio-codec@10 { @@ -377,6 +380,7 @@ &i2s0_mclk &i2s0_sclk &i2s0_sdi0 &i2s0_sdo0>; + pinctrl-names =3D "default"; status =3D "okay"; =20 i2s0_8ch_p0: port { @@ -469,6 +473,7 @@ wifi_poweren_pin: wifi-poweren-pin { =20 &pwm2 { pinctrl-0 =3D <&pwm2m1_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -875,6 +880,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts b/arch/arm64= /boot/dts/rockchip/rk3588s-evb1-v10.dts index d6b62cd1b90b..c4ddb78f9bb2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts @@ -457,6 +457,7 @@ usbc0_int: usbc0-int { =20 &pwm12 { pinctrl-0 =3D <&pwm12m1_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts b/arch/= arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts index b657d54c2c59..230aac005e8f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts @@ -614,6 +614,7 @@ touchscreen@14 { =20 &i2c4 { pinctrl-0 =3D <&i2c4m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 ti_adc: adc@48 { @@ -650,6 +651,7 @@ imu@68 { =20 &i2c6 { pinctrl-0 =3D <&i2c6m3_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 fusb302: typec@22 { @@ -783,6 +785,7 @@ &i2s0_mclk &i2s0_sclk &i2s0_sdi0 &i2s0_sdo0>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -1026,11 +1029,13 @@ wifi_host_wake_irq: wifi-host-wake-irq { =20 &pwm12 { pinctrl-0 =3D <&pwm12m1_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 &pwm13 { pinctrl-0 =3D <&pwm13m1_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -1432,11 +1437,13 @@ &u2phy0_otg { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 &uart9 { pinctrl-0 =3D <&uart9m2_xfer>, <&uart9m2_ctsn>, <&uart9m2_rtsn>; + pinctrl-names =3D "default"; uart-has-rtscts; status =3D "okay"; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts b/arc= h/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts index f9e3c0134d5f..ed36c27c2320 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-indiedroid-nova.dts @@ -368,6 +368,7 @@ regulator-state-mem { =20 &i2c6 { pinctrl-0 =3D <&i2c6m3_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 fusb302: typec-portc@22 { @@ -440,6 +441,7 @@ rtc_hym8563: rtc@51 { =20 &i2c7 { pinctrl-0 =3D <&i2c7m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 es8388: audio-codec@11 { @@ -973,6 +975,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/a= rm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 5afbc593341b..833f27fdd1c6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -742,6 +742,7 @@ &tsadc { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi index b9c0a1a050a9..91b6eefd7abf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi @@ -851,6 +851,7 @@ &u2phy2_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi b/arch/ar= m64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi index cd80cb15a405..9da13f96f13a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi @@ -847,6 +847,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts b/a= rch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts index 20da0c2b3d92..0145e194841c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts @@ -173,6 +173,7 @@ &hdptxphy0 { =20 &i2c1 { pinctrl-0 =3D <&i2c1m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 rtc@51 { @@ -280,6 +281,7 @@ &pwm4 { =20 &pwm5 { pinctrl-0 =3D <&pwm5m1_pins>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 @@ -320,6 +322,7 @@ &u2phy2_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi b/arch/= arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi index 32357eba4b78..5d3dc21c4d61 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi @@ -64,6 +64,7 @@ &gpu { =20 &i2c0 { pinctrl-0 =3D <&i2c0m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; =20 vdd_cpu_big0_s0: regulator@42 { @@ -142,6 +143,7 @@ &spi2 { assigned-clock-rates =3D <200000000>; num-cs =3D <1>; pinctrl-0 =3D <&spi2m2_cs0 &spi2m2_pins>; + pinctrl-names =3D "default"; status =3D "okay"; =20 pmic@0 { @@ -468,5 +470,6 @@ &tsadc { * through the CRU. */ pinctrl-0 =3D <&tsadc_gpio_func>; + pinctrl-names =3D "default"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts b/arch/arm64/b= oot/dts/rockchip/rk3588s-roc-pc.dts index aa02cf510d6d..d534d662c40f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts @@ -810,6 +810,7 @@ &uart2 { =20 &uart7 { pinctrl-0 =3D <&uart7m2_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/= boot/dts/rockchip/rk3588s-rock-5a.dts index ffd26b43ae8c..a76734da982f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -827,6 +827,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts b/arch/arm64/= boot/dts/rockchip/rk3588s-rock-5c.dts index 9d3d0791554d..e4784885c267 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts @@ -930,6 +930,7 @@ &u2phy3_host { =20 &uart2 { pinctrl-0 =3D <&uart2m0_xfer>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 --=20 2.53.0