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Mon, 27 Apr 2026 10:05:14 -0700 (PDT) Received: from hu-uchheda-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36490025d98sm99313a91.4.2026.04.27.10.05.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Apr 2026 10:05:14 -0700 (PDT) From: Umang Chheda To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, richardcochran@gmail.com Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, umang.chheda@oss.qualcomm.com Subject: [PATCH v4 1/4] arm64: dts: qcom: monaco-evk: Extract common EVK hardware into shared dtsi Date: Mon, 27 Apr 2026 22:35:02 +0530 Message-Id: <20260427170505.1494703-2-umang.chheda@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260427170505.1494703-1-umang.chheda@oss.qualcomm.com> References: <20260427170505.1494703-1-umang.chheda@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: vMDTUigyW7frQj9EknczqCUKTh7J--Ow X-Authority-Analysis: v=2.4 cv=Xba5Co55 c=1 sm=1 tr=0 ts=69ef974d cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=m4GvGgdk-pu3HkIto4AA:9 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-GUID: vMDTUigyW7frQj9EknczqCUKTh7J--Ow X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI3MDE4MSBTYWx0ZWRfX4Vk9loqIubHd pst3z43bOn4O+hG2DY8do5i7f63sZxH7npn4QcWGh0SVYlzrA/bdf1YQiRekniwcktW70DFQtyV 1qC1SqhQ0VaPgvJykHaFeuFGGCZ9nEd4InJIzfbSd7d4PAlr+bg+jIJ2WLVWhqXe/OaBYEW46xo LCHf1V+C1fpmRQyuxlnC6y6juLf/vpppD1Nrg2AwSD9BCfuA5AtMPcjGn+Y5XzGcbGtW2AboI8p RUNGVoUeZinKVhU0PfOx24RpWvHKYoexyLtH+SjAc4IFWBFYZ0vWYYlPnJxnLsWVTwT6ZwU09pa RhE3JAdjqB1oKQMRu94pDTj8B4Z+IExb5Kjh0hUWzO7z5NRbvL5BTKooVh+BfvHJrEb83VpKTwt 0cQviVddaJMwmFRAaqRhWoXOWGOsPrFrulYN/QSOsuWwGBytZzLQ57mKOlB0k6R2X5aS6w5En8o S2gYCO2+dAUTOcsV+gg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-27_04,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 suspectscore=0 phishscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604270181 Content-Type: text/plain; charset="utf-8" The monaco-ac EVK is a new board variant which shares the majority of its hardware description with the existing monaco-evk board. In preparation for adding this variant, extract the common hardware nodes from monaco-evk.dts into a new shared monaco-evk-common.dtsi include file, and update monaco-evk.dts to include it and keep only board-specific overrides. No functional change intended. Signed-off-by: Umang Chheda --- .../boot/dts/qcom/monaco-evk-common.dtsi | 900 ++++++++++++++++++ arch/arm64/boot/dts/qcom/monaco-evk.dts | 894 +---------------- 2 files changed, 901 insertions(+), 893 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi b/arch/arm64/b= oot/dts/qcom/monaco-evk-common.dtsi new file mode 100644 index 000000000000..12c847c03757 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi @@ -0,0 +1,900 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include + +#include "monaco.dtsi" +#include "monaco-pmics.dtsi" + +/ { + aliases { + ethernet0 =3D ðernet0; + i2c1 =3D &i2c1; + serial0 =3D &uart7; + serial2 =3D &uart6; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + connector-2 { + compatible =3D "gpio-usb-b-connector", "usb-b-connector"; + label =3D "micro-USB"; + type =3D "micro"; + + id-gpios =3D <&pmm8620au_0_gpios 9 GPIO_ACTIVE_HIGH>; + vbus-gpios =3D <&expander6 7 GPIO_ACTIVE_HIGH>; + vbus-supply =3D <&usb2_vbus>; + + pinctrl-0 =3D <&usb2_id>; + pinctrl-names =3D "default"; + + port { + usb2_con_hs_ep: endpoint { + remote-endpoint =3D <&usb_2_dwc3_hs>; + }; + }; + }; + + dmic: audio-codec-0 { + compatible =3D "dmic-codec"; + #sound-dai-cells =3D <0>; + num-channels =3D <1>; + }; + + max98357a: audio-codec-1 { + compatible =3D "maxim,max98357a"; + #sound-dai-cells =3D <0>; + }; + + dp-connector-0 { + compatible =3D "dp-connector"; + label =3D "DP0"; + type =3D "mini"; + + port { + dp0_connector_in: endpoint { + remote-endpoint =3D <<8713sx_dp0_out>; + }; + }; + }; + + dp-connector-1 { + compatible =3D "dp-connector"; + label =3D "DP1"; + type =3D "mini"; + + port { + dp1_connector_in: endpoint { + remote-endpoint =3D <<8713sx_dp1_out>; + }; + }; + }; + + usb2_vbus: regulator-usb2-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "usb2_vbus"; + gpio =3D <&pmm8650au_1_gpios 7 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + }; + + sound { + compatible =3D "qcom,qcs8275-sndcard"; + model =3D "MONACO-EVK"; + + pinctrl-0 =3D <&hs0_mi2s_active>, <&mi2s1_active>; + pinctrl-names =3D "default"; + + hs0-mi2s-playback-dai-link { + link-name =3D "HS0 MI2S Playback"; + + codec { + sound-dai =3D <&max98357a>; + }; + + cpu { + sound-dai =3D <&q6apmbedai PRIMARY_MI2S_RX>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + sec-mi2s-capture-dai-link { + link-name =3D "Secondary MI2S Capture"; + + codec { + sound-dai =3D <&dmic>; + }; + + cpu { + sound-dai =3D <&q6apmbedai SECONDARY_MI2S_TX>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + + vreg_cam0_2p8: vreg-cam0-2p8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_cam0_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + startup-delay-us =3D <10000>; + + gpio =3D <&tlmm 73 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&cam0_avdd_2v8_en_default>; + pinctrl-names =3D "default"; + }; + + vreg_cam1_2p8: vreg-cam1-2p8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_cam1_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + startup-delay-us =3D <10000>; + + gpio =3D <&tlmm 74 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&cam1_avdd_2v8_en_default>; + pinctrl-names =3D "default"; + }; + + vreg_cam2_2p8: vreg-cam2-2p8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_cam2_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + startup-delay-us =3D <10000>; + + gpio =3D <&tlmm 75 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&cam2_avdd_2v8_en_default>; + pinctrl-names =3D "default"; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id =3D "a"; + + vreg_l3a: ldo3 { + regulator-name =3D "vreg_l3a"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l4a: ldo4 { + regulator-name =3D "vreg_l4a"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l5a: ldo5 { + regulator-name =3D "vreg_l5a"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l6a: ldo6 { + regulator-name =3D "vreg_l6a"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l7a: ldo7 { + regulator-name =3D "vreg_l7a"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <912000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l8a: ldo8 { + regulator-name =3D "vreg_l8a"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l9a: ldo9 { + regulator-name =3D "vreg_l9a"; + regulator-min-microvolt =3D <2970000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vreg_s5c: smps5 { + regulator-name =3D "vreg_s5c"; + regulator-min-microvolt =3D <1104000>; + regulator-max-microvolt =3D <1104000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c: ldo1 { + regulator-name =3D "vreg_l1c"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <512000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l2c: ldo2 { + regulator-name =3D "vreg_l2c"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <904000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l4c: ldo4 { + regulator-name =3D "vreg_l4c"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l7c: ldo7 { + regulator-name =3D "vreg_l7c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l8c: ldo8 { + regulator-name =3D "vreg_l8c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l9c: ldo9 { + regulator-name =3D "vreg_l9c"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; +}; + +ðernet0 { + phy-mode =3D "2500base-x"; + phy-handle =3D <&hsgmii_phy0>; + + pinctrl-0 =3D <ðernet0_default>; + pinctrl-names =3D "default"; + + snps,mtl-rx-config =3D <&mtl_rx_setup>; + snps,mtl-tx-config =3D <&mtl_tx_setup>; + nvmem-cells =3D <&mac_addr0>; + nvmem-cell-names =3D "mac-address"; + + status =3D "okay"; + + mdio { + compatible =3D "snps,dwmac-mdio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + hsgmii_phy0: ethernet-phy@1c { + compatible =3D "ethernet-phy-id004d.d101"; + reg =3D <0x1c>; + reset-gpios =3D <&tlmm 31 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <11000>; + reset-deassert-us =3D <70000>; + }; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use =3D <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel =3D <0x0>; + snps,route-up; + snps,priority =3D <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel =3D <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel =3D <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel =3D <0x3>; + snps,priority =3D <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use =3D <4>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope =3D <0x1000>; + snps,idle_slope =3D <0x1000>; + snps,high_credit =3D <0x3e800>; + snps,low_credit =3D <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope =3D <0x1000>; + snps,idle_slope =3D <0x1000>; + snps,high_credit =3D <0x3e800>; + snps,low_credit =3D <0xffc18000>; + }; + }; +}; + +&gpi_dma0 { + status =3D "okay"; +}; + +&gpi_dma1 { + status =3D "okay"; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/qcs8300/a623_zap.mbn"; +}; + +&i2c0 { + status =3D "okay"; + + bridge@4f { + compatible =3D "lontium,lt8713sx"; + reg =3D <0x4f>; + reset-gpios =3D <&expander5 6 GPIO_ACTIVE_LOW>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + lt8713sx_dp_in: endpoint { + remote-endpoint =3D <&mdss_dp0_out>; + }; + }; + + port@1 { + reg =3D <1>; + + lt8713sx_dp0_out: endpoint { + remote-endpoint =3D <&dp0_connector_in>; + }; + }; + + port@2 { + reg =3D <2>; + + lt8713sx_dp1_out: endpoint { + remote-endpoint =3D <&dp1_connector_in>; + }; + }; + }; + }; +}; + +&i2c1 { + pinctrl-0 =3D <&qup_i2c1_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + fan_controller: fan@18 { + compatible =3D "ti,amc6821"; + reg =3D <0x18>; + #pwm-cells =3D <2>; + + fan { + pwms =3D <&fan_controller 40000 PWM_POLARITY_INVERTED>; + }; + }; + + eeprom0: eeprom@50 { + compatible =3D "atmel,24c256"; + reg =3D <0x50>; + pagesize =3D <64>; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + mac_addr0: mac-addr@0 { + reg =3D <0x0 0x6>; + }; + }; + }; +}; + +&i2c15 { + pinctrl-0 =3D <&qup_i2c15_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + expander0: gpio@38 { + compatible =3D "ti,tca9538"; + reg =3D <0x38>; + #gpio-cells =3D <2>; + gpio-controller; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupts-extended =3D <&tlmm 56 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&expander0_int>; + pinctrl-names =3D "default"; + }; + + expander1: gpio@39 { + compatible =3D "ti,tca9538"; + reg =3D <0x39>; + #gpio-cells =3D <2>; + gpio-controller; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupts-extended =3D <&tlmm 16 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&expander1_int>; + pinctrl-names =3D "default"; + }; + + expander2: gpio@3a { + compatible =3D "ti,tca9538"; + reg =3D <0x3a>; + #gpio-cells =3D <2>; + gpio-controller; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupts-extended =3D <&tlmm 95 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&expander2_int>; + pinctrl-names =3D "default"; + }; + + expander3: gpio@3b { + compatible =3D "ti,tca9538"; + reg =3D <0x3b>; + #gpio-cells =3D <2>; + gpio-controller; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupts-extended =3D <&tlmm 24 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&expander3_int>; + pinctrl-names =3D "default"; + }; + + expander4: gpio@3c { + compatible =3D "ti,tca9538"; + reg =3D <0x3c>; + #gpio-cells =3D <2>; + gpio-controller; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupts-extended =3D <&tlmm 96 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&expander4_int>; + pinctrl-names =3D "default"; + }; + + expander5: gpio@3d { + compatible =3D "ti,tca9538"; + reg =3D <0x3d>; + #gpio-cells =3D <2>; + gpio-controller; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupts-extended =3D <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&expander5_int>; + pinctrl-names =3D "default"; + }; + + expander6: gpio@3e { + compatible =3D "ti,tca9538"; + reg =3D <0x3e>; + #gpio-cells =3D <2>; + gpio-controller; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupts-extended =3D <&tlmm 52 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&expander6_int>; + pinctrl-names =3D "default"; + }; +}; + +&iris { + status =3D "okay"; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + pinctrl-0 =3D <&dp_hot_plug_det>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&mdss_dp0_out { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; + remote-endpoint =3D <<8713sx_dp_in>; +}; + +&mdss_dp0_phy { + vdda-phy-supply =3D <&vreg_l5a>; + vdda-pll-supply =3D <&vreg_l4a>; + + status =3D "okay"; +}; + +&pcie0 { + pinctrl-0 =3D <&pcie0_default_state>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie0_phy { + vdda-phy-supply =3D <&vreg_l6a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&pcie1 { + pinctrl-0 =3D <&pcie1_default_state>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie1_phy { + vdda-phy-supply =3D <&vreg_l6a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&pcieport0 { + reset-gpios =3D <&tlmm 2 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 0 GPIO_ACTIVE_HIGH>; +}; + +&pcieport1 { + reset-gpios =3D <&tlmm 23 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 21 GPIO_ACTIVE_HIGH>; +}; + +&pmm8620au_0_gpios { + usb2_id: usb2-id-state { + pins =3D "gpio9"; + function =3D "normal"; + input-enable; + bias-pull-up; + power-source =3D <0>; + }; +}; + +&qup_i2c0_data_clk { + drive-strength =3D <2>; + bias-pull-up; +}; + +&qupv3_id_0 { + firmware-name =3D "qcom/qcs8300/qupv3fw.elf"; + status =3D "okay"; +}; + +&qupv3_id_1 { + firmware-name =3D "qcom/qcs8300/qupv3fw.elf"; + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/qcs8300/adsp.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/qcs8300/cdsp0.mbn"; + + status =3D "okay"; +}; + +&remoteproc_gpdsp { + firmware-name =3D "qcom/qcs8300/gpdsp0.mbn"; + + status =3D "okay"; +}; + +&serdes0 { + phy-supply =3D <&vreg_l4a>; + + status =3D "okay"; +}; + +&spi10 { + status =3D "okay"; + + tpm@0 { + compatible =3D "st,st33htpm-spi", "tcg,tpm_tis-spi"; + reg =3D <0>; + spi-max-frequency =3D <20000000>; + }; +}; + +&tlmm { + pcie0_default_state: pcie0-default-state { + wake-pins { + pins =3D "gpio0"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + clkreq-pins { + pins =3D "gpio1"; + function =3D "pcie0_clkreq"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-pins { + pins =3D "gpio2"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + ethernet0_default: ethernet0-default-state { + ethernet0_mdc: ethernet0-mdc-pins { + pins =3D "gpio5"; + function =3D "emac0_mdc"; + drive-strength =3D <16>; + bias-pull-up; + }; + + ethernet0_mdio: ethernet0-mdio-pins { + pins =3D "gpio6"; + function =3D "emac0_mdio"; + drive-strength =3D <16>; + bias-pull-up; + }; + }; + + expander5_int: expander5-int-state { + pins =3D "gpio3"; + function =3D "gpio"; + bias-pull-up; + }; + + expander1_int: expander1-int-state { + pins =3D "gpio16"; + function =3D "gpio"; + bias-pull-up; + }; + + qup_i2c1_default: qup-i2c1-state { + pins =3D "gpio19", "gpio20"; + function =3D "qup0_se1"; + drive-strength =3D <2>; + bias-pull-up; + }; + + pcie1_default_state: pcie1-default-state { + wake-pins { + pins =3D "gpio21"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + clkreq-pins { + pins =3D "gpio22"; + function =3D "pcie1_clkreq"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-pins { + pins =3D "gpio23"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + expander3_int: expander3-int-state { + pins =3D "gpio24"; + function =3D "gpio"; + bias-pull-up; + }; + + expander6_int: expander6-int-state { + pins =3D "gpio52"; + function =3D "gpio"; + bias-pull-up; + }; + + expander0_int: expander0-int-state { + pins =3D "gpio56"; + function =3D "gpio"; + bias-pull-up; + }; + + cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state { + pins =3D "gpio73"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + cam1_avdd_2v8_en_default: cam1-avdd-2v8-en-state { + pins =3D "gpio74"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + cam2_avdd_2v8_en_default: cam2-avdd-2v8-en-state { + pins =3D "gpio75"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + qup_i2c15_default: qup-i2c15-state { + pins =3D "gpio91", "gpio92"; + function =3D "qup1_se7"; + drive-strength =3D <2>; + bias-pull-up; + }; + + expander2_int: expander2-int-state { + pins =3D "gpio95"; + function =3D "gpio"; + bias-pull-up; + }; + + expander4_int: expander4-int-state { + pins =3D "gpio96"; + function =3D "gpio"; + bias-pull-up; + }; +}; + +&uart6 { + status =3D "okay"; +}; + +&uart7 { + status =3D "okay"; +}; + +&ufs_mem_hc { + reset-gpios =3D <&tlmm 133 GPIO_ACTIVE_LOW>; + vcc-supply =3D <&vreg_l8a>; + vcc-max-microamp =3D <1100000>; + vccq-supply =3D <&vreg_l4c>; + vccq-max-microamp =3D <1200000>; + + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l4a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&usb_1 { + dr_mode =3D "peripheral"; + + status =3D "okay"; +}; + +&usb_1_hsphy { + vdda-pll-supply =3D <&vreg_l7a>; + vdda18-supply =3D <&vreg_l7c>; + vdda33-supply =3D <&vreg_l9a>; + + status =3D "okay"; +}; + +&usb_qmpphy { + vdda-phy-supply =3D <&vreg_l7a>; + vdda-pll-supply =3D <&vreg_l5a>; + + status =3D "okay"; +}; + +&usb_2 { + status =3D "okay"; +}; + +&usb_2_dwc3_hs { + remote-endpoint =3D <&usb2_con_hs_ep>; +}; + +&usb_2_hsphy { + vdda-pll-supply =3D <&vreg_l7a>; + vdda18-supply =3D <&vreg_l7c>; + vdda33-supply =3D <&vreg_l9a>; + + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/= qcom/monaco-evk.dts index 9d17ef7d2caf..f01eef1c2e16 100644 --- a/arch/arm64/boot/dts/qcom/monaco-evk.dts +++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts @@ -5,174 +5,12 @@ /dts-v1/; -#include -#include -#include -#include - -#include "monaco.dtsi" -#include "monaco-pmics.dtsi" +#include "monaco-evk-common.dtsi" / { model =3D "Qualcomm Technologies, Inc. Monaco EVK"; compatible =3D "qcom,monaco-evk", "qcom,qcs8300"; - aliases { - ethernet0 =3D ðernet0; - i2c1 =3D &i2c1; - serial0 =3D &uart7; - serial2 =3D &uart6; - }; - - chosen { - stdout-path =3D "serial0:115200n8"; - }; - - connector-2 { - compatible =3D "gpio-usb-b-connector", "usb-b-connector"; - label =3D "micro-USB"; - type =3D "micro"; - - id-gpios =3D <&pmm8620au_0_gpios 9 GPIO_ACTIVE_HIGH>; - vbus-gpios =3D <&expander6 7 GPIO_ACTIVE_HIGH>; - vbus-supply =3D <&usb2_vbus>; - - pinctrl-0 =3D <&usb2_id>; - pinctrl-names =3D "default"; - - port { - usb2_con_hs_ep: endpoint { - remote-endpoint =3D <&usb_2_dwc3_hs>; - }; - }; - }; - - dmic: audio-codec-0 { - compatible =3D "dmic-codec"; - #sound-dai-cells =3D <0>; - num-channels =3D <1>; - }; - - max98357a: audio-codec-1 { - compatible =3D "maxim,max98357a"; - #sound-dai-cells =3D <0>; - }; - - dp-connector-0 { - compatible =3D "dp-connector"; - label =3D "DP0"; - type =3D "mini"; - - port { - dp0_connector_in: endpoint { - remote-endpoint =3D <<8713sx_dp0_out>; - }; - }; - }; - - dp-connector-1 { - compatible =3D "dp-connector"; - label =3D "DP1"; - type =3D "mini"; - - port { - dp1_connector_in: endpoint { - remote-endpoint =3D <<8713sx_dp1_out>; - }; - }; - }; - - usb2_vbus: regulator-usb2-vbus { - compatible =3D "regulator-fixed"; - regulator-name =3D "usb2_vbus"; - gpio =3D <&pmm8650au_1_gpios 7 GPIO_ACTIVE_HIGH>; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - enable-active-high; - }; - - sound { - compatible =3D "qcom,qcs8275-sndcard"; - model =3D "MONACO-EVK"; - - pinctrl-0 =3D <&hs0_mi2s_active>, <&mi2s1_active>; - pinctrl-names =3D "default"; - - hs0-mi2s-playback-dai-link { - link-name =3D "HS0 MI2S Playback"; - - codec { - sound-dai =3D <&max98357a>; - }; - - cpu { - sound-dai =3D <&q6apmbedai PRIMARY_MI2S_RX>; - }; - - platform { - sound-dai =3D <&q6apm>; - }; - }; - - sec-mi2s-capture-dai-link { - link-name =3D "Secondary MI2S Capture"; - - codec { - sound-dai =3D <&dmic>; - }; - - cpu { - sound-dai =3D <&q6apmbedai SECONDARY_MI2S_TX>; - }; - - platform { - sound-dai =3D <&q6apm>; - }; - }; - }; - - vreg_cam0_2p8: vreg-cam0-2p8 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vreg_cam0_2p8"; - regulator-min-microvolt =3D <2800000>; - regulator-max-microvolt =3D <2800000>; - startup-delay-us =3D <10000>; - - gpio =3D <&tlmm 73 GPIO_ACTIVE_HIGH>; - enable-active-high; - - pinctrl-0 =3D <&cam0_avdd_2v8_en_default>; - pinctrl-names =3D "default"; - }; - - vreg_cam1_2p8: vreg-cam1-2p8 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vreg_cam1_2p8"; - regulator-min-microvolt =3D <2800000>; - regulator-max-microvolt =3D <2800000>; - startup-delay-us =3D <10000>; - - gpio =3D <&tlmm 74 GPIO_ACTIVE_HIGH>; - enable-active-high; - - pinctrl-0 =3D <&cam1_avdd_2v8_en_default>; - pinctrl-names =3D "default"; - }; - - vreg_cam2_2p8: vreg-cam2-2p8 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vreg_cam2_2p8"; - regulator-min-microvolt =3D <2800000>; - regulator-max-microvolt =3D <2800000>; - startup-delay-us =3D <10000>; - - gpio =3D <&tlmm 75 GPIO_ACTIVE_HIGH>; - enable-active-high; - - pinctrl-0 =3D <&cam2_avdd_2v8_en_default>; - pinctrl-names =3D "default"; - }; - /* This comes from a PMIC handled within the SAIL domain */ vreg_s2s: vreg-s2s { compatible =3D "regulator-fixed"; @@ -183,517 +21,6 @@ vreg_s2s: vreg-s2s { }; }; -&apps_rsc { - regulators-0 { - compatible =3D "qcom,pmm8654au-rpmh-regulators"; - qcom,pmic-id =3D "a"; - - vreg_l3a: ldo3 { - regulator-name =3D "vreg_l3a"; - regulator-min-microvolt =3D <1200000>; - regulator-max-microvolt =3D <1200000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l4a: ldo4 { - regulator-name =3D "vreg_l4a"; - regulator-min-microvolt =3D <880000>; - regulator-max-microvolt =3D <912000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l5a: ldo5 { - regulator-name =3D "vreg_l5a"; - regulator-min-microvolt =3D <1200000>; - regulator-max-microvolt =3D <1200000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l6a: ldo6 { - regulator-name =3D "vreg_l6a"; - regulator-min-microvolt =3D <880000>; - regulator-max-microvolt =3D <912000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l7a: ldo7 { - regulator-name =3D "vreg_l7a"; - regulator-min-microvolt =3D <880000>; - regulator-max-microvolt =3D <912000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l8a: ldo8 { - regulator-name =3D "vreg_l8a"; - regulator-min-microvolt =3D <2504000>; - regulator-max-microvolt =3D <2960000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l9a: ldo9 { - regulator-name =3D "vreg_l9a"; - regulator-min-microvolt =3D <2970000>; - regulator-max-microvolt =3D <3072000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - }; - - regulators-1 { - compatible =3D "qcom,pmm8654au-rpmh-regulators"; - qcom,pmic-id =3D "c"; - - vreg_s5c: smps5 { - regulator-name =3D "vreg_s5c"; - regulator-min-microvolt =3D <1104000>; - regulator-max-microvolt =3D <1104000>; - regulator-initial-mode =3D ; - }; - - vreg_l1c: ldo1 { - regulator-name =3D "vreg_l1c"; - regulator-min-microvolt =3D <300000>; - regulator-max-microvolt =3D <512000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l2c: ldo2 { - regulator-name =3D "vreg_l2c"; - regulator-min-microvolt =3D <900000>; - regulator-max-microvolt =3D <904000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l4c: ldo4 { - regulator-name =3D "vreg_l4c"; - regulator-min-microvolt =3D <1200000>; - regulator-max-microvolt =3D <1200000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l7c: ldo7 { - regulator-name =3D "vreg_l7c"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l8c: ldo8 { - regulator-name =3D "vreg_l8c"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - - vreg_l9c: ldo9 { - regulator-name =3D "vreg_l9c"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-initial-mode =3D ; - regulator-allow-set-load; - regulator-allowed-modes =3D ; - }; - }; -}; - -ðernet0 { - phy-mode =3D "2500base-x"; - phy-handle =3D <&hsgmii_phy0>; - - pinctrl-0 =3D <ðernet0_default>; - pinctrl-names =3D "default"; - - snps,mtl-rx-config =3D <&mtl_rx_setup>; - snps,mtl-tx-config =3D <&mtl_tx_setup>; - nvmem-cells =3D <&mac_addr0>; - nvmem-cell-names =3D "mac-address"; - - status =3D "okay"; - - mdio { - compatible =3D "snps,dwmac-mdio"; - #address-cells =3D <1>; - #size-cells =3D <0>; - - hsgmii_phy0: ethernet-phy@1c { - compatible =3D "ethernet-phy-id004d.d101"; - reg =3D <0x1c>; - reset-gpios =3D <&tlmm 31 GPIO_ACTIVE_LOW>; - reset-assert-us =3D <11000>; - reset-deassert-us =3D <70000>; - }; - }; - - mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use =3D <4>; - snps,rx-sched-sp; - - queue0 { - snps,dcb-algorithm; - snps,map-to-dma-channel =3D <0x0>; - snps,route-up; - snps,priority =3D <0x1>; - }; - - queue1 { - snps,dcb-algorithm; - snps,map-to-dma-channel =3D <0x1>; - snps,route-ptp; - }; - - queue2 { - snps,avb-algorithm; - snps,map-to-dma-channel =3D <0x2>; - snps,route-avcp; - }; - - queue3 { - snps,avb-algorithm; - snps,map-to-dma-channel =3D <0x3>; - snps,priority =3D <0xc>; - }; - }; - - mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use =3D <4>; - - queue0 { - snps,dcb-algorithm; - }; - - queue1 { - snps,dcb-algorithm; - }; - - queue2 { - snps,avb-algorithm; - snps,send_slope =3D <0x1000>; - snps,idle_slope =3D <0x1000>; - snps,high_credit =3D <0x3e800>; - snps,low_credit =3D <0xffc18000>; - }; - - queue3 { - snps,avb-algorithm; - snps,send_slope =3D <0x1000>; - snps,idle_slope =3D <0x1000>; - snps,high_credit =3D <0x3e800>; - snps,low_credit =3D <0xffc18000>; - }; - }; -}; - -&gpi_dma0 { - status =3D "okay"; -}; - -&gpi_dma1 { - status =3D "okay"; -}; - -&gpu { - status =3D "okay"; -}; - -&gpu_zap_shader { - firmware-name =3D "qcom/qcs8300/a623_zap.mbn"; -}; - -&i2c0 { - status =3D "okay"; - - bridge@4f { - compatible =3D "lontium,lt8713sx"; - reg =3D <0x4f>; - reset-gpios =3D <&expander5 6 GPIO_ACTIVE_LOW>; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - - lt8713sx_dp_in: endpoint { - remote-endpoint =3D <&mdss_dp0_out>; - }; - }; - - port@1 { - reg =3D <1>; - - lt8713sx_dp0_out: endpoint { - remote-endpoint =3D <&dp0_connector_in>; - }; - }; - - port@2 { - reg =3D <2>; - - lt8713sx_dp1_out: endpoint { - remote-endpoint =3D <&dp1_connector_in>; - }; - }; - }; - }; -}; - -&i2c1 { - pinctrl-0 =3D <&qup_i2c1_default>; - pinctrl-names =3D "default"; - - status =3D "okay"; - - fan_controller: fan@18 { - compatible =3D "ti,amc6821"; - reg =3D <0x18>; - #pwm-cells =3D <2>; - - fan { - pwms =3D <&fan_controller 40000 PWM_POLARITY_INVERTED>; - }; - }; - - eeprom0: eeprom@50 { - compatible =3D "atmel,24c256"; - reg =3D <0x50>; - pagesize =3D <64>; - - nvmem-layout { - compatible =3D "fixed-layout"; - #address-cells =3D <1>; - #size-cells =3D <1>; - - mac_addr0: mac-addr@0 { - reg =3D <0x0 0x6>; - }; - }; - }; -}; - -&i2c15 { - pinctrl-0 =3D <&qup_i2c15_default>; - pinctrl-names =3D "default"; - - status =3D "okay"; - - expander0: gpio@38 { - compatible =3D "ti,tca9538"; - reg =3D <0x38>; - #gpio-cells =3D <2>; - gpio-controller; - #interrupt-cells =3D <2>; - interrupt-controller; - interrupts-extended =3D <&tlmm 56 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&expander0_int>; - pinctrl-names =3D "default"; - }; - - expander1: gpio@39 { - compatible =3D "ti,tca9538"; - reg =3D <0x39>; - #gpio-cells =3D <2>; - gpio-controller; - #interrupt-cells =3D <2>; - interrupt-controller; - interrupts-extended =3D <&tlmm 16 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&expander1_int>; - pinctrl-names =3D "default"; - }; - - expander2: gpio@3a { - compatible =3D "ti,tca9538"; - reg =3D <0x3a>; - #gpio-cells =3D <2>; - gpio-controller; - #interrupt-cells =3D <2>; - interrupt-controller; - interrupts-extended =3D <&tlmm 95 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&expander2_int>; - pinctrl-names =3D "default"; - }; - - expander3: gpio@3b { - compatible =3D "ti,tca9538"; - reg =3D <0x3b>; - #gpio-cells =3D <2>; - gpio-controller; - #interrupt-cells =3D <2>; - interrupt-controller; - interrupts-extended =3D <&tlmm 24 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&expander3_int>; - pinctrl-names =3D "default"; - }; - - expander4: gpio@3c { - compatible =3D "ti,tca9538"; - reg =3D <0x3c>; - #gpio-cells =3D <2>; - gpio-controller; - #interrupt-cells =3D <2>; - interrupt-controller; - interrupts-extended =3D <&tlmm 96 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&expander4_int>; - pinctrl-names =3D "default"; - }; - - expander5: gpio@3d { - compatible =3D "ti,tca9538"; - reg =3D <0x3d>; - #gpio-cells =3D <2>; - gpio-controller; - #interrupt-cells =3D <2>; - interrupt-controller; - interrupts-extended =3D <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&expander5_int>; - pinctrl-names =3D "default"; - }; - - expander6: gpio@3e { - compatible =3D "ti,tca9538"; - reg =3D <0x3e>; - #gpio-cells =3D <2>; - gpio-controller; - #interrupt-cells =3D <2>; - interrupt-controller; - interrupts-extended =3D <&tlmm 52 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&expander6_int>; - pinctrl-names =3D "default"; - }; -}; - -&iris { - status =3D "okay"; -}; - -&mdss { - status =3D "okay"; -}; - -&mdss_dp0 { - pinctrl-0 =3D <&dp_hot_plug_det>; - pinctrl-names =3D "default"; - - status =3D "okay"; -}; - -&mdss_dp0_out { - data-lanes =3D <0 1 2 3>; - link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; - remote-endpoint =3D <<8713sx_dp_in>; -}; - -&mdss_dp0_phy { - vdda-phy-supply =3D <&vreg_l5a>; - vdda-pll-supply =3D <&vreg_l4a>; - - status =3D "okay"; -}; - -&pcie0 { - pinctrl-0 =3D <&pcie0_default_state>; - pinctrl-names =3D "default"; - - status =3D "okay"; -}; - -&pcie0_phy { - vdda-phy-supply =3D <&vreg_l6a>; - vdda-pll-supply =3D <&vreg_l5a>; - - status =3D "okay"; -}; - -&pcie1 { - pinctrl-0 =3D <&pcie1_default_state>; - pinctrl-names =3D "default"; - - status =3D "okay"; -}; - -&pcie1_phy { - vdda-phy-supply =3D <&vreg_l6a>; - vdda-pll-supply =3D <&vreg_l5a>; - - status =3D "okay"; -}; - -&pcieport0 { - reset-gpios =3D <&tlmm 2 GPIO_ACTIVE_LOW>; - wake-gpios =3D <&tlmm 0 GPIO_ACTIVE_HIGH>; -}; - -&pcieport1 { - reset-gpios =3D <&tlmm 23 GPIO_ACTIVE_LOW>; - wake-gpios =3D <&tlmm 21 GPIO_ACTIVE_HIGH>; -}; - -&pmm8620au_0_gpios { - usb2_id: usb2-id-state { - pins =3D "gpio9"; - function =3D "normal"; - input-enable; - bias-pull-up; - power-source =3D <0>; - }; -}; - -&qup_i2c0_data_clk { - drive-strength =3D <2>; - bias-pull-up; -}; - -&qupv3_id_0 { - firmware-name =3D "qcom/qcs8300/qupv3fw.elf"; - status =3D "okay"; -}; - -&qupv3_id_1 { - firmware-name =3D "qcom/qcs8300/qupv3fw.elf"; - status =3D "okay"; -}; - -&remoteproc_adsp { - firmware-name =3D "qcom/qcs8300/adsp.mbn"; - - status =3D "okay"; -}; - -&remoteproc_cdsp { - firmware-name =3D "qcom/qcs8300/cdsp0.mbn"; - - status =3D "okay"; -}; - -&remoteproc_gpdsp { - firmware-name =3D "qcom/qcs8300/gpdsp0.mbn"; - - status =3D "okay"; -}; - &sdhc_1 { vmmc-supply =3D <&vreg_l8a>; vqmmc-supply =3D <&vreg_s2s>; @@ -704,222 +31,3 @@ &sdhc_1 { status =3D "okay"; }; - -&serdes0 { - phy-supply =3D <&vreg_l4a>; - - status =3D "okay"; -}; - -&spi10 { - status =3D "okay"; - - tpm@0 { - compatible =3D "st,st33htpm-spi", "tcg,tpm_tis-spi"; - reg =3D <0>; - spi-max-frequency =3D <20000000>; - }; -}; - -&tlmm { - pcie0_default_state: pcie0-default-state { - wake-pins { - pins =3D "gpio0"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-up; - }; - - clkreq-pins { - pins =3D "gpio1"; - function =3D "pcie0_clkreq"; - drive-strength =3D <2>; - bias-pull-up; - }; - - perst-pins { - pins =3D "gpio2"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-up; - }; - }; - - ethernet0_default: ethernet0-default-state { - ethernet0_mdc: ethernet0-mdc-pins { - pins =3D "gpio5"; - function =3D "emac0_mdc"; - drive-strength =3D <16>; - bias-pull-up; - }; - - ethernet0_mdio: ethernet0-mdio-pins { - pins =3D "gpio6"; - function =3D "emac0_mdio"; - drive-strength =3D <16>; - bias-pull-up; - }; - }; - - expander5_int: expander5-int-state { - pins =3D "gpio3"; - function =3D "gpio"; - bias-pull-up; - }; - - expander1_int: expander1-int-state { - pins =3D "gpio16"; - function =3D "gpio"; - bias-pull-up; - }; - - qup_i2c1_default: qup-i2c1-state { - pins =3D "gpio19", "gpio20"; - function =3D "qup0_se1"; - drive-strength =3D <2>; - bias-pull-up; - }; - - pcie1_default_state: pcie1-default-state { - wake-pins { - pins =3D "gpio21"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-up; - }; - - clkreq-pins { - pins =3D "gpio22"; - function =3D "pcie1_clkreq"; - drive-strength =3D <2>; - bias-pull-up; - }; - - perst-pins { - pins =3D "gpio23"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-up; - }; - }; - - expander3_int: expander3-int-state { - pins =3D "gpio24"; - function =3D "gpio"; - bias-pull-up; - }; - - expander6_int: expander6-int-state { - pins =3D "gpio52"; - function =3D "gpio"; - bias-pull-up; - }; - - expander0_int: expander0-int-state { - pins =3D "gpio56"; - function =3D "gpio"; - bias-pull-up; - }; - - cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state { - pins =3D "gpio73"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - cam1_avdd_2v8_en_default: cam1-avdd-2v8-en-state { - pins =3D "gpio74"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - cam2_avdd_2v8_en_default: cam2-avdd-2v8-en-state { - pins =3D "gpio75"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - qup_i2c15_default: qup-i2c15-state { - pins =3D "gpio91", "gpio92"; - function =3D "qup1_se7"; - drive-strength =3D <2>; - bias-pull-up; - }; - - expander2_int: expander2-int-state { - pins =3D "gpio95"; - function =3D "gpio"; - bias-pull-up; - }; - - expander4_int: expander4-int-state { - pins =3D "gpio96"; - function =3D "gpio"; - bias-pull-up; - }; -}; - -&uart6 { - status =3D "okay"; -}; - -&uart7 { - status =3D "okay"; -}; - -&ufs_mem_hc { - reset-gpios =3D <&tlmm 133 GPIO_ACTIVE_LOW>; - vcc-supply =3D <&vreg_l8a>; - vcc-max-microamp =3D <1100000>; - vccq-supply =3D <&vreg_l4c>; - vccq-max-microamp =3D <1200000>; - - status =3D "okay"; -}; - -&ufs_mem_phy { - vdda-phy-supply =3D <&vreg_l4a>; - vdda-pll-supply =3D <&vreg_l5a>; - - status =3D "okay"; -}; - -&usb_1 { - dr_mode =3D "peripheral"; - - status =3D "okay"; -}; - -&usb_1_hsphy { - vdda-pll-supply =3D <&vreg_l7a>; - vdda18-supply =3D <&vreg_l7c>; - vdda33-supply =3D <&vreg_l9a>; - - status =3D "okay"; -}; - -&usb_qmpphy { - vdda-phy-supply =3D <&vreg_l7a>; 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charset="utf-8" Introduce bindings for the monaco-ac-evk IoT board, which is based on the monaco-ac (QCS8300-AC) SoC variant. Acked-by: Krzysztof Kozlowski Signed-off-by: Umang Chheda --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index b4943123d2e4..7531ab3143a6 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -918,6 +918,7 @@ properties: - items: - enum: - arduino,monza + - qcom,monaco-ac-evk - qcom,monaco-evk - qcom,qcs8300-ride - const: qcom,qcs8300 -- 2.34.1 From nobody Mon Jun 15 19:05:16 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B8203DD522 for ; Mon, 27 Apr 2026 17:05:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; 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charset="utf-8" Add initial device tree support for monaco-ac EVK board, based on Qualcomm's monaco-ac (QCS8300-AC) variant SoC. Compared to the existing monaco-evk board, which is based on the QCS8300-AA SKU and uses a four-PMIC power delivery network (2x PM8650AU, Maxim MAX20018, TI TPS6594) to support higher power requirements, the monaco-ac EVK uses QCS8300-AC SKU (with 20 TOPS NPU capability) and a simplified two-PMIC power delivery network (2x PM8650AU). Apart from the SoC SKU and PDN differences, the board layout and peripherals are equivalent to the monaco-evk design and are reused accordingly. Co-developed-by: Faruque Ansari Signed-off-by: Faruque Ansari Signed-off-by: Umang Chheda --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/monaco-ac-evk.dts | 31 ++++++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/monaco-ac-evk.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 4ba8e7306419..852d2b86407b 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D lemans-evk-ifp-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D mahua-crd.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D milos-fairphone-fp6.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-arduino-monza.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-ac-evk.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-evk.dtb monaco-evk-camera-imx577-dtbs :=3D monaco-evk.dtb monaco-evk-camera-imx577= .dtbo diff --git a/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts b/arch/arm64/boot/d= ts/qcom/monaco-ac-evk.dts new file mode 100644 index 000000000000..6405d1e1939b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "monaco-evk-common.dtsi" + +/ { + model =3D "Qualcomm Technologies, Inc. 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charset="utf-8" monaco-ac-evk board supports monaco-evk-ifp-mezzanine attach. Add combined DTB for the same by merging monaco-ac-evk.dtb with monaco-evk-ifp-mezzanine overlay. Signed-off-by: Umang Chheda --- arch/arm64/boot/dts/qcom/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 852d2b86407b..25013a408062 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -66,6 +66,9 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-evk-camera-imx577.dtb monaco-evk-el2-dtbs :=3D monaco-evk.dtb monaco-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-evk-el2.dtb + +monaco-ac-evk-ifp-mezzanine-dtbs :=3D monaco-ac-evk.dtb monaco-evk-ifp-mez= zanine.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-ac-evk-ifp-mezzanine.dtb monaco-evk-ifp-mezzanine-dtbs :=3D monaco-evk.dtb monaco-evk-ifp-mezzanine= .dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D monaco-evk-ifp-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D msm8216-samsung-fortuna3g.dtb -- 2.34.1