From nobody Wed Jun 17 05:16:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9D9D3914FC; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318490; cv=none; b=sGVaclzBQEoYcfiuK28G5E3aDnRMoPr0+uZr58b/M5QAo4iUMI5o8Ta1AAjFm3hX15AnZraklVqCehCD8KHFXSsopHYUT1nAh4hHE+zlpirSMYsgxerVZ7vJh5RVrwqYt8cchwyoa+6cphIrEThHtkPj12keUrKMKjpk/lJ4+U8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318490; c=relaxed/simple; bh=rDqz766+E6phUQjlub0Ao54TKx1InCqtA9Pfpa7kJtU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aA3EnITlcj+gIlS+uxr6XmWmS81fhA0SlqmO5EXSpmp02GrhSNEiCCuJ//mOg+oGxmf5q9pIX5lH8Xk/pD7bDOhRlSLgrjTXqq4IvncL53VNAGGGO4AwY/26XP7uZC0Ok6lDMQ5OUOe/lu43twwv6J9EhXMxVCDoQ96K6kTeXIY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=b3AzZTks; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="b3AzZTks" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7CB80C2BCB6; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777318490; bh=rDqz766+E6phUQjlub0Ao54TKx1InCqtA9Pfpa7kJtU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=b3AzZTkslsBmbUNSd5Wrxhm9DpXJZcoJKtKNPFzQJh6Lc/hDguf1vg6DgoWqmnwzq rZRnjoq22w9XU/OsFUUwfQtlUt9TyvF3ZiT8dli5cJ27eXY0jqsQHMs9uPprTZy8zU 7GZU1AGcQ6/8VrTlzF1Dau7z/3qEyMC26khEruUyACD5PCpIayPE//dFdjzx77LXn3 aWuxqzxZd/HMQyY+PNaJ+yuts+0WH/GuwL5Ota26Uww+KBzXmaNHwUvp7nckvIllkx VtVb/o7nVZKXXeAiu6ZpIhjemufYebJeheYjjuXoGCU5CEmazRTp5/sYj4zU6sDKjK wUQUQl+WfiSQQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75330FF8860; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) From: Alexandre MINETTE via B4 Relay Date: Mon, 27 Apr 2026 21:34:47 +0200 Subject: [PATCH v2 1/8] dt-bindings: arm: qcom: Add Samsung Galaxy S4 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-mainline-send-v1-sending-v2-1-dcaa9178007b@alex-min.fr> References: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> In-Reply-To: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , MyungJoo Ham , Chanwoo Choi , Guru Das Srinagesh , Linus Walleij , Rob Clark , Joerg Roedel , Will Deacon , Robin Murphy , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, phone-devel@vger.kernel.org, Alexandre MINETTE X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777318488; l=762; i=contact@alex-min.fr; s=20260421; h=from:subject:message-id; bh=pN5zSMRd7VPt+prprAXYp+uFxzoyOlObA2TSxPHx4vo=; b=MAf7IlcrrpOwvS7ItL7RfCDkZ2bREHw2T/E+ZzGhSPDT/pltyVLslIynsKNMux6GE17SwkIEz DZ4AHb+03rsCLe/HE3zA1iEP5fA6uD8rBsGBspx2cX4ABB0viwAvlJV X-Developer-Key: i=contact@alex-min.fr; a=ed25519; pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4= X-Endpoint-Received: by B4 Relay for contact@alex-min.fr/20260421 with auth_id=743 X-Original-From: Alexandre MINETTE Reply-To: contact@alex-min.fr From: Alexandre MINETTE Add the compatible for this Samsung smartphone, codenamed jflte. Signed-off-by: Alexandre MINETTE Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index b4943123d2e4..b7e186ed2efc 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -39,6 +39,7 @@ properties: - enum: - asus,nexus7-flo - lg,nexus4-mako + - samsung,jflte - sony,xperia-yuga - qcom,apq8064-cm-qs600 - qcom,apq8064-ifc6410 --=20 2.43.0 From nobody Wed Jun 17 05:16:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9C223914E1; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318490; cv=none; b=PWeb2spLHtGRfLsT1hh0W8sdAWkc1cxcXFadNKkmNMCqhZrMofSMB4nVupkxSsZzfE9qt3HhpbeLH8ibo+EkaIx3km51iBOA5T+Qcmtjnh/cw1kUCDqR0gKVjY0vFgCtw3lyC3XHwSx5Uql8dMR3X+1sApzZfjod6v4FaOyjp7M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318490; c=relaxed/simple; bh=Bb1lbtQItfW5BTJKMAd/sfKV3J+o1fT9fhNTOqbzM2k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ppbfxo/vcLTHjPN2BeEUbxSS1nrdKQ4gPlhv4kUpuiGJB52RLZy9/CpwWVrcken33+t2wb7mWCtIzfwe1zqdabKxOIxd9WLfgrf6yYjwZVIcyMugH9b4Eeba5xx19dC/KUPF8K9Ppa1nAd6SmN6rfuWQf0aV/Sn//RkE2pNaqRg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=roqEVmXE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="roqEVmXE" Received: by smtp.kernel.org (Postfix) with ESMTPS id 8E3C4C2BCC4; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777318490; bh=Bb1lbtQItfW5BTJKMAd/sfKV3J+o1fT9fhNTOqbzM2k=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=roqEVmXEAzDySkh8mMNxD4+M1WkwqfDzYTbkkVO46nhpnt6Jer+q3SiCoP1kDI/hD XUK4EyERAv7YBKcwa6zLcpoaKDg9y8WkIcs7seOkgEyZYnEiCm/YM/imxGjorswG/q FtSE76fBGA4aJXsqoTn8wnrsnpB9Fn3kgfW7aod9puiRjGv/eHGfCpN4qOgAm5h86R QGtVBVp/9YT2bO5c2buVwPR1RezzjkYVl2FM955mj/kTmsJdDLMQSPGMVNG6gHpEj8 +w7W0ZoALxUeMf1OktWR+wyw8j2MwfLUP6KFeluc7EPSq1mClJNg8IjFRIxjvLdma9 snaBxXmacyQ4w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86559FF886F; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) From: Alexandre MINETTE via B4 Relay Date: Mon, 27 Apr 2026 21:34:48 +0200 Subject: [PATCH v2 2/8] dt-bindings: extcon: qcom,pm8941-misc: Add PM8921 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-mainline-send-v1-sending-v2-2-dcaa9178007b@alex-min.fr> References: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> In-Reply-To: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , MyungJoo Ham , Chanwoo Choi , Guru Das Srinagesh , Linus Walleij , Rob Clark , Joerg Roedel , Will Deacon , Robin Murphy , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, phone-devel@vger.kernel.org, Alexandre MINETTE X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777318488; l=1745; i=contact@alex-min.fr; s=20260421; h=from:subject:message-id; bh=5UIfYQUdRZLRDt1LSWl5X2pDrLJ84c7SqdbQApH5K2U=; b=oXTU0+0R9FAs0PpW+YQSjiyd25xzBt0VxQScacWPCwQ9P7UXv7hzkwboxvLfIMU37he/4Vjoy r0DacSZ8fOPDldzx0fPqoSi1Pc+1UQJtvhfL+NhA96KdmwTvbizGOkd X-Developer-Key: i=contact@alex-min.fr; a=ed25519; pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4= X-Endpoint-Received: by B4 Relay for contact@alex-min.fr/20260421 with auth_id=743 X-Original-From: Alexandre MINETTE Reply-To: contact@alex-min.fr From: Alexandre MINETTE PM8921 provides USB ID detection through the USB_ID_IN interrupt, which APQ8064 boards use for OTG role detection. The Qualcomm PMIC misc extcon binding only needs the interrupt description for this use case. Allow qcom,pm8921-misc without requiring a register resource so boards can describe PM8921 USB ID detection. Signed-off-by: Alexandre MINETTE --- .../devicetree/bindings/extcon/qcom,pm8941-misc.yaml | 17 +++++++++++++= ---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml= b/Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml index 6b80518cbf62..4e3d0aadb83c 100644 --- a/Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml +++ b/Documentation/devicetree/bindings/extcon/qcom,pm8941-misc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/extcon/qcom,pm8941-misc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Qualcomm Technologies, Inc. PM8941 USB ID Extcon device +title: Qualcomm Technologies, Inc. PMIC USB ID Extcon device =20 maintainers: - Guru Das Srinagesh @@ -15,8 +15,9 @@ description: | =20 properties: compatible: - items: - - const: qcom,pm8941-misc + enum: + - qcom,pm8921-misc + - qcom,pm8941-misc =20 reg: maxItems: 1 @@ -37,10 +38,18 @@ properties: - const: usb_vbus required: - compatible - - reg - interrupts - interrupt-names =20 +allOf: + - if: + properties: + compatible: + const: qcom,pm8941-misc + then: + required: + - reg + additionalProperties: false =20 examples: --=20 2.43.0 From nobody Wed Jun 17 05:16:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9CD53914E9; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318490; cv=none; b=CGTRHhrnU8ASI992jQTnw+dDvOYiTQsPX81at1mI54LPn1XYv5kIYfmXQwGSFikgwWl2w0/5X5icx9MikioT8x6+HwPBHqXR0aArmVKW49z+qkK9m7A4ec5UOOFjSphOioG13A/yRm6+KuXTu64sWyHSbZNMoj7WRjeAPLfjTYE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318490; c=relaxed/simple; bh=7DeREkHBuy3CC/OxlxoJowva/HyNWfGd+W2ZNWZknP8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CusYQZQV7+gPjRVJn7IiG0YrW8PAxxm5HGW3X3p3n+tu30BkWc7w19gOHZipLTO7uwMYUu9sPBqRhLhu38lIYBPUB7zuy8lITrCgCUUAIe698J31zKZ6swCn2EyOx3PJWNmlPULP29/yZ9QrRUPa3MCtwLpjaEIExb0e8LHj6Nk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CLiokm3z; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CLiokm3z" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9FCA8C2BCB7; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777318490; bh=7DeREkHBuy3CC/OxlxoJowva/HyNWfGd+W2ZNWZknP8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=CLiokm3zJp5RtPy1k9AdAo6Qo2XAeWOZZdG4XTw9BMfwzG/GL9TCLlQZE6t6DyLCS Tlx6GS7DvA++YmtmyNAf2KSJVCav75vB7ZC45khsfX6J9gPI87bRxsMhZqEHkdvwr5 SSe6TPZyBIPcMtLOd1oiYsqoHk/ez8fnaYhggXQyPTVrsjwQrViI8/sY1yJyIVduwz CGwfN6pR/EDxdTeZdqpICkwRJ42/HnfoqVd7FM8X7Kbth4jMX07GGPNuu6/hs6qcP9 tZxmMyVftPLIfhy4Rcxesh7G7pVpynq3L++Cho1PQ64zp+Jaaw5WUKUXUC5tGFx7Wg vhSWkcp5BVWHA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98D52FF8870; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) From: Alexandre MINETTE via B4 Relay Date: Mon, 27 Apr 2026 21:34:49 +0200 Subject: [PATCH v2 3/8] pinctrl: qcom: Register functions before enabling pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-mainline-send-v1-sending-v2-3-dcaa9178007b@alex-min.fr> References: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> In-Reply-To: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , MyungJoo Ham , Chanwoo Choi , Guru Das Srinagesh , Linus Walleij , Rob Clark , Joerg Roedel , Will Deacon , Robin Murphy , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, phone-devel@vger.kernel.org, Alexandre MINETTE X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777318488; l=2004; i=contact@alex-min.fr; s=20260421; h=from:subject:message-id; bh=gqK5qmgCceA2ln5R06RBqAB8HOklQ9gk21qwB8S51xo=; b=oOWG34jZy36RGXXAHLq5QkZ6h3qiGytJ7F+UT5O5j57647flrE8MXSuHSuDk/C3BpUuYHsd+Y 3GNF3MxsuCRB3xQLR/it0HBYwwA+q1E+5mxpRqUbYAGLRKCi+ZAebw3 X-Developer-Key: i=contact@alex-min.fr; a=ed25519; pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4= X-Endpoint-Received: by B4 Relay for contact@alex-min.fr/20260421 with auth_id=743 X-Original-From: Alexandre MINETTE Reply-To: contact@alex-min.fr From: Alexandre MINETTE pinctrl consumers can request states while the pinctrl core enables the controller. On Qualcomm pinctrl drivers this can happen before the SoC function list has been registered, which leaves the function table incomplete during state lookup. On APQ8064 this can fail while claiming pinctrl hogs: apq8064-pinctrl 800000.pinctrl: invalid function ps_hold in map table apq8064-pinctrl 800000.pinctrl: error claiming hogs: -22 apq8064-pinctrl 800000.pinctrl: could not claim hogs: -22 Register Qualcomm pinctrl with devm_pinctrl_register_and_init(), add the SoC pin functions, and only then enable the pinctrl device. Signed-off-by: Alexandre MINETTE --- drivers/pinctrl/qcom/pinctrl-msm.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinc= trl-msm.c index 45b3a2763eb8..a2a1e0835735 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1593,11 +1593,11 @@ int msm_pinctrl_probe(struct platform_device *pdev, pctrl->desc.pins =3D pctrl->soc->pins; pctrl->desc.npins =3D pctrl->soc->npins; =20 - pctrl->pctrl =3D devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl); - if (IS_ERR(pctrl->pctrl)) { - dev_err(&pdev->dev, "Couldn't register pinctrl driver\n"); - return PTR_ERR(pctrl->pctrl); - } + ret =3D devm_pinctrl_register_and_init(&pdev->dev, &pctrl->desc, + pctrl, &pctrl->pctrl); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Couldn't register pinctrl driver\n"); =20 for (i =3D 0; i < soc_data->nfunctions; i++) { func =3D &soc_data->functions[i]; @@ -1607,6 +1607,11 @@ int msm_pinctrl_probe(struct platform_device *pdev, return ret; } =20 + ret =3D pinctrl_enable(pctrl->pctrl); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Couldn't enable pinctrl driver\n"); + ret =3D msm_gpio_init(pctrl); if (ret) return ret; --=20 2.43.0 From nobody Wed Jun 17 05:16:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD63C391505; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; cv=none; b=AObOLj/u6UjVSYi830DH9upzPI9QLz23h4uOta9O3H4Fy5Omod/uORXgnRMJ5T3LlBHM35tNDMbPEWnxgcghnE44N8jmrz81M8QZzoFPGfBRzZ7S346fOv9oGFp49T/du4yqhxsSswY6Evh5ysKOsF9vhGjNUyED7T7c4hv6bw4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; c=relaxed/simple; bh=Djj4DA8V0onSZ02OPE+IzZkuFDVGk+DrM9lo8y2SZSQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GsXooPLwD7BAjsdz/EcIoZr4OiLXKJPlhw9Y+UYy7Fcd1lW9tDJOXc0vgnb439FNAaNa2vC4kSOKkdLhjGaQslxvz/VvL2eP25yN8WZhvZrDjMtM7Xskkas4tI/kJPEE/OelG4iCmNQ2cFM7w0rTYwQDgR6+rC7CKTsHGJQTWgo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UiMm8uar; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UiMm8uar" Received: by smtp.kernel.org (Postfix) with ESMTPS id B0750C2BCB8; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777318490; bh=Djj4DA8V0onSZ02OPE+IzZkuFDVGk+DrM9lo8y2SZSQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=UiMm8uar4gP/J6Ql0zKDZUplt4IbcHxODxY+kcc3H5+fMrwocNiMaXgMXW+ySVLa4 f4g2nlSpENWmGFskLbWBbvpEJ3Nw5FGM7jCJi/NVHYR6z4m+z2G+aSHPrbkLiO84me gTZf5Wa8Hdbt7WeW6sjjRMH61WPWg/x6N/GmAMA8uHvd7HN/JLDIMrdAPsZRFG0MdO 7R/HBYA1k59ZylMzFj6lrTq5bh4i3X+FZXLnAhUsbJjd/WMuRpRePnOIp0ZLJZspoG 4BWVdFMrV7YVBA+h4mRB9qlnXqHjNqltgZ+aqJjjNE1Uqr1o0kV6NmouCgqsVSD2Fc yakWk6LzvHjag== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A96CAFF8868; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) From: Alexandre MINETTE via B4 Relay Date: Mon, 27 Apr 2026 21:34:50 +0200 Subject: [PATCH v2 4/8] iommu/msm: Look up masters per IOMMU instance Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-mainline-send-v1-sending-v2-4-dcaa9178007b@alex-min.fr> References: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> In-Reply-To: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , MyungJoo Ham , Chanwoo Choi , Guru Das Srinagesh , Linus Walleij , Rob Clark , Joerg Roedel , Will Deacon , Robin Murphy , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, phone-devel@vger.kernel.org, Alexandre MINETTE X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777318488; l=3959; i=contact@alex-min.fr; s=20260421; h=from:subject:message-id; bh=1JcBVPryARcXpHswW3TvhWpd0BaNOt71q4/rKhmP4NY=; b=5XOC2OaldtQ1/p7DoGQyvI4znlWXoVAnNZPpzexhOajp6zxDrNkFAITLPL+f4vcXdeaXvbhPe 03Vt1VkOdeyDYdBTlxDWYrwfaA7Z0dHQ9FssH2cQBSuxyXzQlSTm71y X-Developer-Key: i=contact@alex-min.fr; a=ed25519; pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4= X-Endpoint-Received: by B4 Relay for contact@alex-min.fr/20260421 with auth_id=743 X-Original-From: Alexandre MINETTE Reply-To: contact@alex-min.fr From: Alexandre MINETTE MSM IOMMU stores context descriptors on each IOMMU instance. Looking up the descriptor through dev_iommu_priv_get() is not sufficient because a device can reference multiple IOMMU provider nodes. Look up the master from the target IOMMU ctx_list instead, and use the same helper when probing and attaching devices. This avoids dereferencing a NULL master when an IOMMU already has context entries for another device, and keeps separate context descriptors for separate IOMMU instances. On APQ8064 this crashes during IOMMU probe while qcom_iommu_of_xlate() adds stream IDs for a device referencing multiple IOMMU provider nodes. The failure comes from insert_iommu_master() dereferencing a NULL master after dev_iommu_priv_get() returns no context descriptor for the current IOMMU instance: Unable to handle kernel NULL pointer dereference at virtual address 00000= 088 PC is at qcom_iommu_of_xlate+0x84/0x174 Call trace: qcom_iommu_of_xlate from of_iommu_configure+0x140/0x234 of_iommu_configure from of_dma_configure_id+0xec/0x3b0 of_dma_configure_id from platform_dma_configure+0xb0/0xcc platform_dma_configure from __iommu_probe_device+0x270/0x450 __iommu_probe_device from probe_iommu_group+0x24/0x48 probe_iommu_group from bus_for_each_dev+0x7c/0xcc bus_for_each_dev from iommu_device_register+0xcc/0x220 iommu_device_register from msm_iommu_probe+0x47c/0x578 This is required to boot APQ8064 boards using multiple IOMMU contexts. Signed-off-by: Alexandre MINETTE --- drivers/iommu/msm_iommu.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index 0ad5ff431d5b..9c03878d0d2c 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -357,17 +357,25 @@ static int msm_iommu_domain_config(struct msm_priv *p= riv) return 0; } =20 +static struct msm_iommu_ctx_dev *find_iommu_master(struct msm_iommu_dev *i= ommu, + struct device *dev) +{ + struct msm_iommu_ctx_dev *master; + + list_for_each_entry(master, &iommu->ctx_list, list) + if (master->of_node =3D=3D dev->of_node) + return master; + + return NULL; +} + /* Must be called under msm_iommu_lock */ static struct msm_iommu_dev *find_iommu_for_dev(struct device *dev) { struct msm_iommu_dev *iommu, *ret =3D NULL; - struct msm_iommu_ctx_dev *master; =20 list_for_each_entry(iommu, &qcom_iommu_devices, dev_node) { - master =3D list_first_entry(&iommu->ctx_list, - struct msm_iommu_ctx_dev, - list); - if (master->of_node =3D=3D dev->of_node) { + if (find_iommu_master(iommu, dev)) { ret =3D iommu; break; } @@ -405,10 +413,7 @@ static int msm_iommu_attach_dev(struct iommu_domain *d= omain, struct device *dev, =20 spin_lock_irqsave(&msm_iommu_lock, flags); list_for_each_entry(iommu, &qcom_iommu_devices, dev_node) { - master =3D list_first_entry(&iommu->ctx_list, - struct msm_iommu_ctx_dev, - list); - if (master->of_node =3D=3D dev->of_node) { + if (find_iommu_master(iommu, dev)) { ret =3D __enable_clocks(iommu); if (ret) goto fail; @@ -601,10 +606,10 @@ static int insert_iommu_master(struct device *dev, struct msm_iommu_dev **iommu, const struct of_phandle_args *spec) { - struct msm_iommu_ctx_dev *master =3D dev_iommu_priv_get(dev); + struct msm_iommu_ctx_dev *master =3D find_iommu_master(*iommu, dev); int sid; =20 - if (list_empty(&(*iommu)->ctx_list)) { + if (!master) { master =3D kzalloc_obj(*master, GFP_ATOMIC); if (!master) { dev_err(dev, "Failed to allocate iommu_master\n"); @@ -612,7 +617,6 @@ static int insert_iommu_master(struct device *dev, } master->of_node =3D dev->of_node; list_add(&master->list, &(*iommu)->ctx_list); - dev_iommu_priv_set(dev, master); } =20 for (sid =3D 0; sid < master->num_mids; sid++) --=20 2.43.0 From nobody Wed Jun 17 05:16:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A35A39183C; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; cv=none; b=VNRqgWvP9gzFsvVdi3CDUAeBTSRWrFSqjYOaZYZ5+ZWCCFhytLkW5bfer9pkdgtO/iBUSeZOkwacrIH85oxc01odISX1Nc4t+NaBultVK3SAqqWPryb+d/H7uETEU+kaMRDOWXuBp1T4eMYOmsF6TSPjVApymuNvkt9YuEVfmJ8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; c=relaxed/simple; bh=+w0LWswgfExLCbfWGN/kjH/uWfmMfzLcxZXCvXM5aQ8=; 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Mon, 27 Apr 2026 19:34:50 +0000 (UTC) From: Alexandre MINETTE via B4 Relay Date: Mon, 27 Apr 2026 21:34:51 +0200 Subject: [PATCH v2 5/8] extcon: qcom-spmi-misc: Add PM8921 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-mainline-send-v1-sending-v2-5-dcaa9178007b@alex-min.fr> References: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> In-Reply-To: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , MyungJoo Ham , Chanwoo Choi , Guru Das Srinagesh , Linus Walleij , Rob Clark , Joerg Roedel , Will Deacon , Robin Murphy , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, phone-devel@vger.kernel.org, Alexandre MINETTE , Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777318488; l=1070; i=contact@alex-min.fr; s=20260421; h=from:subject:message-id; bh=BB4ojfMkzmO4sNO4pn+20iT7YQPj9GzvZr/jFD2gdkk=; b=GEEjKnSycwg3zzmiHm5BVEZmcQMyWjztf9sE9PDLIcdzuxRwtxtzC1aVbQwk3ib2UyAFrOwSA hP6HJmfC0vmBYkGbOFoF9a6qx62tpTz2QLGDZQHtN29KIMbgxEzrmfM X-Developer-Key: i=contact@alex-min.fr; a=ed25519; pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4= X-Endpoint-Received: by B4 Relay for contact@alex-min.fr/20260421 with auth_id=743 X-Original-From: Alexandre MINETTE Reply-To: contact@alex-min.fr From: Alexandre MINETTE PM8921 provides USB ID detection through the USB_ID_IN interrupt, which APQ8064 boards use for OTG role detection. The Qualcomm PMIC misc extcon binding only needs the interrupt description for this use case. Allow qcom,pm8921-misc without requiring a register resource so boards can describe PM8921 USB ID detection. Signed-off-by: Alexandre MINETTE Reviewed-by: Dmitry Baryshkov --- drivers/extcon/extcon-qcom-spmi-misc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/extcon/extcon-qcom-spmi-misc.c b/drivers/extcon/extcon= -qcom-spmi-misc.c index afaba5685c3d..6811d3383254 100644 --- a/drivers/extcon/extcon-qcom-spmi-misc.c +++ b/drivers/extcon/extcon-qcom-spmi-misc.c @@ -199,6 +199,7 @@ static SIMPLE_DEV_PM_OPS(qcom_usb_extcon_pm_ops, qcom_usb_extcon_suspend, qcom_usb_extcon_resume); =20 static const struct of_device_id qcom_usb_extcon_dt_match[] =3D { + { .compatible =3D "qcom,pm8921-misc", }, { .compatible =3D "qcom,pm8941-misc", }, { } }; --=20 2.43.0 From nobody Wed Jun 17 05:16:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D79242188F; Mon, 27 Apr 2026 19:34:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; cv=none; b=uYr+hmcti0JYZmr+zF/FqQITmjUk6vB1LOXwqgoB1yGd3OqW1/st05kWvp4aOLPbXOAdLjWspOVtnaYZc/RYYo90tISiy3yK8aFc7OepKbiM1J8iDnprUmTN3D6AtMvG1BhQkj2kTeCVagG29yt9g3CHcwebRr1PRpXUxsBmKK8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; c=relaxed/simple; bh=4REIVhbi2HpYMo0VmqFQnhQBpV/ub9I+JIc4h1eraKo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OT6RGvRia2+RUpaPogpVv8LUlZJ/HgHRG+W+1+IxtMtpy6eEcmtyoVkljuRWsMM7U6qthTh8HOtDZK+nStDM5Oq/8azHpbIR7Uptd2PbG5nDgagfCgSMw0bqO3x/gPyvz86vxPIeiwbiX3CxRIb7IHmeqHgGe3/Pw2BjLwpECNk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jlnX39pn; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jlnX39pn" Received: by smtp.kernel.org (Postfix) with ESMTPS id D1A04C2BCC9; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777318490; bh=4REIVhbi2HpYMo0VmqFQnhQBpV/ub9I+JIc4h1eraKo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=jlnX39pnAqL5f39q9UgbD20CJBD0NgrAftXGXCAt1Cde6h065nfRnxsvqv1889lS8 unjrPyMAJaXdE1a6JXI1w9SizAYVS+hzA9NOuWJ3PSugmgQgMwg1rz+HEd7x3DVy+T pCTcbRViMgJgnNGpnZj7DxjvPcETsPsBlXNdBOuNW8JN4RF+lswXr2Yow/YmkTWRcg 5VOAnFUl4QFBxuZEB1iwEBspNDbMPm/YwK/O4S2wQGSZZUjXfr5yYhgWBjWFdSetEP 5mcFxj6196jFlee4UG/wP9MhCuMxOCTUe7A1D/YBIbx+CxlP0vmSGEfOpXDo4G+Pee KJdh9aluq9zAw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA264FF886D; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) From: Alexandre MINETTE via B4 Relay Date: Mon, 27 Apr 2026 21:34:52 +0200 Subject: [PATCH v2 6/8] ARM: dts: qcom: apq8064: Fix USB controller clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-mainline-send-v1-sending-v2-6-dcaa9178007b@alex-min.fr> References: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> In-Reply-To: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , MyungJoo Ham , Chanwoo Choi , Guru Das Srinagesh , Linus Walleij , Rob Clark , Joerg Roedel , Will Deacon , Robin Murphy , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, phone-devel@vger.kernel.org, Alexandre MINETTE , Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777318488; l=2859; i=contact@alex-min.fr; s=20260421; h=from:subject:message-id; bh=tDanbY1Cko/+r7eERo9ft8l2xT64Pb+DV4KNs6tKMuc=; b=JvBsd54fD6BVLx4hT5UzeW9gCLrSEWRFGya4LCEtCBhYECjOrGrnm9ByH2Q4C8fmmegMRqUK4 IgdFI0tKa6lAd4g6pevDi5lF1n2NLQ+bHnm9EA38Lo5kojr/C5szIWT X-Developer-Key: i=contact@alex-min.fr; a=ed25519; pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4= X-Endpoint-Received: by B4 Relay for contact@alex-min.fr/20260421 with auth_id=743 X-Original-From: Alexandre MINETTE Reply-To: contact@alex-min.fr From: Alexandre MINETTE The APQ8064 HS USB controller nodes describe the transceiver clock as "core", but the ChipIdea MSM glue expects "core" to be the controller fabric clock and "fs" to be the transceiver clock. This mismatch can leave the fabric clock disabled while the controller is accessed. Some boards may tolerate that if the clock is already enabled elsewhere, but it is not a correct description of the hardware. Describe the RPM Daytona fabric clock as "core", the AHB clock as "iface", and the transceiver clock as "fs" for all APQ8064 HS USB controllers. Without this, USB does not probe reliably on Samsung Galaxy S4 because the fabric clock remains disabled. Signed-off-by: Alexandre MINETTE Acked-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Reviewed-by: Linus Walleij --- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/q= com/qcom-apq8064.dtsi index 09062b2ad8ba..62ea38b7a652 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -813,8 +813,10 @@ usb1: usb@12500000 { reg =3D <0x12500000 0x200>, <0x12500200 0x200>; interrupts =3D ; - clocks =3D <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>; - clock-names =3D "core", "iface"; + clocks =3D <&rpmcc RPM_DAYTONA_FABRIC_CLK>, + <&gcc USB_HS1_H_CLK>, + <&gcc USB_HS1_XCVR_CLK>; + clock-names =3D "core", "iface", "fs"; assigned-clocks =3D <&gcc USB_HS1_XCVR_CLK>; assigned-clock-rates =3D <60000000>; resets =3D <&gcc USB_HS1_RESET>; @@ -844,8 +846,10 @@ usb3: usb@12520000 { reg =3D <0x12520000 0x200>, <0x12520200 0x200>; interrupts =3D ; - clocks =3D <&gcc USB_HS3_XCVR_CLK>, <&gcc USB_HS3_H_CLK>; - clock-names =3D "core", "iface"; + clocks =3D <&rpmcc RPM_DAYTONA_FABRIC_CLK>, + <&gcc USB_HS3_H_CLK>, + <&gcc USB_HS3_XCVR_CLK>; + clock-names =3D "core", "iface", "fs"; assigned-clocks =3D <&gcc USB_HS3_XCVR_CLK>; assigned-clock-rates =3D <60000000>; resets =3D <&gcc USB_HS3_RESET>; @@ -875,8 +879,10 @@ usb4: usb@12530000 { reg =3D <0x12530000 0x200>, <0x12530200 0x200>; interrupts =3D ; - clocks =3D <&gcc USB_HS4_XCVR_CLK>, <&gcc USB_HS4_H_CLK>; - clock-names =3D "core", "iface"; + clocks =3D <&rpmcc RPM_DAYTONA_FABRIC_CLK>, + <&gcc USB_HS4_H_CLK>, + <&gcc USB_HS4_XCVR_CLK>; + clock-names =3D "core", "iface", "fs"; assigned-clocks =3D <&gcc USB_HS4_XCVR_CLK>; assigned-clock-rates =3D <60000000>; resets =3D <&gcc USB_HS4_RESET>; --=20 2.43.0 From nobody Wed Jun 17 05:16:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EBC0421896; Mon, 27 Apr 2026 19:34:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; cv=none; b=Bg1Prv1V+XJv6wCO/BuT6NBR2p8puy3piohOz1KCs9UWBa5iUsdnJzPd2GPwVmC/hEnEIMuezqmJjPU6Q3gwKw99SHA2wyvL+zr4d9HFvh1rZ4cSB0+DOJb6XOJMjq2TWSjkT2isYvRrOpL8xvdvg9sQbV7Om9rfbXXiTIUzffQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; c=relaxed/simple; bh=Py9LYX179tAcEapnh9XaBBlo2ukIpXQzVH2gKBTxsoo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VXkrSg070pyuK/PH7d08hryARZYbxCginTuMQ51LHq7mWaj+IU5qr1oEBz3TsOXaJPov41HpG3YHXeUUze0ZOnV7wi6OkrGzX0u11xTgzgdQPH0oIT2jMUD/CppB8tGodVV716Wq1YVtef7it5ACWlycPv/Bvx9Qt+nKGcC4QvA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eTrOKclV; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eTrOKclV" Received: by smtp.kernel.org (Postfix) with ESMTPS id E3D02C4AF13; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777318491; bh=Py9LYX179tAcEapnh9XaBBlo2ukIpXQzVH2gKBTxsoo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=eTrOKclVmbtegvJ00OceW0k+CE0oTAJXEImTWiwRW+KVow0bQ+57bDTOvUO3b6S8j gqCQBiptMHg0gDdtII9547CzBMBIbkBPskWQKfXS2imDDPb1mtgO8VVWZlURX4PXtg ZmeE02Gu3ZHrNSAuv16nlsbn8K4aLT7AkJJxSAPIZmD1XyUhmRMy89NuxfgW16XZkD K5irdpPpqmOQmBhv+5YAWW3eg8WOoL7dWmuGRlpcVRdF5S8Ncu3nCQM5jiESyXPGjE YR2jZbqHgnOnR+VUGxk3zSy96WPY9aAwEmaf/njYWoiRaYvH3RjwDTskzf7qRA2GRB nt5hQADkzI2ZQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA4DDFF886F; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) From: Alexandre MINETTE via B4 Relay Date: Mon, 27 Apr 2026 21:34:53 +0200 Subject: [PATCH v2 7/8] ARM: dts: qcom: pm8921: Add USB ID extcon Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-mainline-send-v1-sending-v2-7-dcaa9178007b@alex-min.fr> References: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> In-Reply-To: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , MyungJoo Ham , Chanwoo Choi , Guru Das Srinagesh , Linus Walleij , Rob Clark , Joerg Roedel , Will Deacon , Robin Murphy , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, phone-devel@vger.kernel.org, Alexandre MINETTE X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777318488; l=903; i=contact@alex-min.fr; s=20260421; h=from:subject:message-id; bh=Gn6Eztd/7RPnADkDDebRSs2mfCn3XMgtJiOIqNDSy/U=; b=0789+vbLD3zGGtqh4rM6+kxfuzK7OcAqvzOgfsoTItyYED9NqJvizjeA6cta8pbP2CgURPoFM NHtdpUqKBrlCagJutgKiJOWz1BbAPRxCF7Wd3KCJp8hFSR8mZOiUjY5 X-Developer-Key: i=contact@alex-min.fr; a=ed25519; pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4= X-Endpoint-Received: by B4 Relay for contact@alex-min.fr/20260421 with auth_id=743 X-Original-From: Alexandre MINETTE Reply-To: contact@alex-min.fr From: Alexandre MINETTE Add the PM8921 USB ID interrupt as a disabled extcon provider. Boards can enable it when their USB controller consumes the PMIC USB ID state for OTG role detection. The interrupt corresponds to PM8921 USB_ID_IN, block 6 bit 1. Signed-off-by: Alexandre MINETTE --- arch/arm/boot/dts/qcom/pm8921.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/qcom/pm8921.dtsi b/arch/arm/boot/dts/qcom/pm= 8921.dtsi index 535cb6a2543f..30366536f580 100644 --- a/arch/arm/boot/dts/qcom/pm8921.dtsi +++ b/arch/arm/boot/dts/qcom/pm8921.dtsi @@ -121,6 +121,13 @@ ref_muxoff: adc-channel@f { reg =3D <0x00 0x0f>; }; }; + + usb_id: usb-detect { + compatible =3D "qcom,pm8921-misc"; + interrupt-names =3D "usb_id"; + interrupts-extended =3D <&pm8921 49 IRQ_TYPE_EDGE_BOTH>; + status =3D "disabled"; + }; }; }; =20 --=20 2.43.0 From nobody Wed Jun 17 05:16:05 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E5734218AF; Mon, 27 Apr 2026 19:34:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; cv=none; b=IGM6NZ/MPxDDnuEnKShlTdvZ/Xone2OIKLJ6yxSVMMlK6e12C5Uvk1FHE+XuerPJeLextfs3fFYLDoMOKYCaF4p4TBSKb189q7hM99e/6qpP8qv+hIrBQ5GwFwGwc52G9XkEuN5aZdQUbu53vWFAPe0JKqc2iD/9lpzm020Wl5A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777318491; c=relaxed/simple; bh=643acxJA66pX33SgCvCaZjnMR/li8dPtq0mXBi+5duY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SKV3C/lxBKVi1Zj3/hfzsXl5ULH6olPxiJQwY1fg0kSwiYlwJyw0kuh56EDF6ESSi1YwG8Tq7K54MVfzTGW8mt4cD+McnL+4N98vtFR1UPrv+aSI0srxiBwZrl/5XOji8trAZsYyNHYD5n7AEDlpCgcYEKIDgOxCG/jznZJckrQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VuenH1IU; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VuenH1IU" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0C676C4AF11; Mon, 27 Apr 2026 19:34:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777318491; bh=643acxJA66pX33SgCvCaZjnMR/li8dPtq0mXBi+5duY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=VuenH1IUa/wippBseNGQ9oneXyBhY8wrDp6MRgWEk9ETKxd4DfLPSmpsB/4cWhrJL ZR1YLHJc4AFi+bOp+G9VnUsJ5BMIuSxcqFbHgEkPpvhm/GyDZbdTTT2DgS3+0aeKo6 bQL1Q1dczCiJL98MMqpvBCLr2DeYEHY5Izco2AetDq/KLSepxX5UdAzoSs+Wrjoels pdcYSQTgLlKe3QOU64UI1eQaGCrrIhY5eYSCIQI/HPqRKaPpS2xx2UbM+sqrqXnVI0 swrz7vZvH2Wz+KxNZAcxhI7KvxKHA//KLOkas3Goo6UMuNvaVDAvLu6XYGT8wQwAAq krlMOkEdDdKsA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE203FF8868; Mon, 27 Apr 2026 19:34:50 +0000 (UTC) From: Alexandre MINETTE via B4 Relay Date: Mon, 27 Apr 2026 21:34:54 +0200 Subject: [PATCH v2 8/8] ARM: dts: qcom: Add Samsung Galaxy S4 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-mainline-send-v1-sending-v2-8-dcaa9178007b@alex-min.fr> References: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> In-Reply-To: <20260427-mainline-send-v1-sending-v2-0-dcaa9178007b@alex-min.fr> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , MyungJoo Ham , Chanwoo Choi , Guru Das Srinagesh , Linus Walleij , Rob Clark , Joerg Roedel , Will Deacon , Robin Murphy , Kees Cook , Tony Luck , "Guilherme G. Piccoli" Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, iommu@lists.linux.dev, phone-devel@vger.kernel.org, Alexandre MINETTE X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777318488; l=11896; i=contact@alex-min.fr; s=20260421; h=from:subject:message-id; bh=8l39pJZ1XlJEGDJr7HTipgmonQLz2z3pssZs5Flyka0=; b=r1xReAPtYr6VIQqDDlltlUXVfpZJNtFpfOqK64Xz6MI8YQLlZ7vr3Xxoa8Yh7XU2XzdupT7RE Jm2glgrmCqiA3sQ++uxDgs/zH/uqy1R+xoHSrdozoP+tUm1dW3UxspU X-Developer-Key: i=contact@alex-min.fr; a=ed25519; pk=KOCaxY4v16ptaT0uk1FRkuaDF2n1JhmnYwLiqWD76M4= X-Endpoint-Received: by B4 Relay for contact@alex-min.fr/20260421 with auth_id=743 X-Original-From: Alexandre MINETTE Reply-To: contact@alex-min.fr From: Alexandre MINETTE Add a device tree for the Samsung Galaxy S4, codenamed jflte. This has been tested on a Samsung Galaxy S4 GT-I9505. The initial support covers UART, USB peripheral mode with USB networking, the front LED and the physical buttons. Signed-off-by: Alexandre MINETTE --- arch/arm/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/qcom-apq8064-samsung-jflte.dts | 485 +++++++++++++++++= ++++ 2 files changed, 486 insertions(+) diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makef= ile index 32a44b02d2fa..c23c961f79e3 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D \ qcom-apq8064-ifc6410.dtb \ qcom-apq8064-sony-xperia-lagan-yuga.dtb \ qcom-apq8064-asus-nexus7-flo.dtb \ + qcom-apq8064-samsung-jflte.dtb \ qcom-apq8064-lg-nexus4-mako.dtb \ qcom-apq8074-dragonboard.dtb \ qcom-ipq4018-ap120c-ac.dtb \ diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-samsung-jflte.dts b/arch/a= rm/boot/dts/qcom/qcom-apq8064-samsung-jflte.dts new file mode 100644 index 000000000000..2f10466077c7 --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-samsung-jflte.dts @@ -0,0 +1,485 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include + +#include "qcom-apq8064-v2.0.dtsi" +#include "pm8821.dtsi" +#include "pm8921.dtsi" + +/ { + model =3D "Samsung Galaxy S4 (jflte)"; + compatible =3D "samsung,jflte", "qcom,apq8064"; + chassis-type =3D "handset"; + + aliases { + serial0 =3D &gsbi7_serial; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + reserved-memory { + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + ramoops@88d00000 { + compatible =3D "ramoops"; + reg =3D <0x88d00000 0x100000>; + record-size =3D <0x20000>; + console-size =3D <0x20000>; + ftrace-size =3D <0x20000>; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <&gpio_keys_default>; + pinctrl-names =3D "default"; + + key-home { + label =3D "Home"; + gpios =3D <&pm8921_gpio 30 GPIO_ACTIVE_LOW>; + debounce-interval =3D <5>; + linux,code =3D ; + wakeup-source; + }; + + key-volume-up { + label =3D "Volume Up"; + gpios =3D <&pm8921_gpio 35 GPIO_ACTIVE_LOW>; + debounce-interval =3D <5>; + linux,code =3D ; + wakeup-source; + }; + + key-volume-down { + label =3D "Volume Down"; + gpios =3D <&pm8921_gpio 37 GPIO_ACTIVE_LOW>; + debounce-interval =3D <5>; + linux,code =3D ; + wakeup-source; + }; + }; + + i2c-led { + compatible =3D "i2c-gpio"; + sda-gpios =3D <&tlmm_pinmux 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios =3D <&tlmm_pinmux 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us =3D <2>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + led-controller@30 { + compatible =3D "panasonic,an30259a"; + reg =3D <0x30>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + led@1 { + reg =3D <1>; + function =3D LED_FUNCTION_STATUS; + color =3D ; + }; + + led@2 { + reg =3D <2>; + function =3D LED_FUNCTION_STATUS; + color =3D ; + }; + + led@3 { + reg =3D <3>; + function =3D LED_FUNCTION_STATUS; + color =3D ; + }; + }; + }; + + i2c-muic { + compatible =3D "i2c-gpio"; + sda-gpios =3D <&tlmm_pinmux 22 GPIO_ACTIVE_HIGH>; + scl-gpios =3D <&tlmm_pinmux 23 GPIO_ACTIVE_HIGH>; + i2c-gpio,delay-us =3D <2>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + max77693: pmic@66 { + compatible =3D "maxim,max77693"; + reg =3D <0x66>; + interrupt-parent =3D <&tlmm_pinmux>; + interrupts =3D <55 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 =3D <&muic_int_default_state>; + pinctrl-names =3D "default"; + + muic: muic { + compatible =3D "maxim,max77693-muic"; + safeout1-supply =3D <&esafeout1_reg>; + safeout2-supply =3D <&esafeout2_reg>; + }; + + regulators { + esafeout1_reg: ESAFEOUT1 { + regulator-name =3D "ESAFEOUT1"; + }; + + esafeout2_reg: ESAFEOUT2 { + regulator-name =3D "ESAFEOUT2"; + }; + }; + }; + }; +}; + +&gsbi7 { + qcom,mode =3D ; + + status =3D "okay"; +}; + +&gsbi7_serial { + pinctrl-0 =3D <&gsbi7_uart_pin_a>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pm8821 { + interrupts-extended =3D <&tlmm_pinmux 76 IRQ_TYPE_LEVEL_LOW>; +}; + +&pm8921 { + interrupts-extended =3D <&tlmm_pinmux 74 IRQ_TYPE_LEVEL_LOW>; +}; + +&riva { + pinctrl-0 =3D <&riva_wlan_pin_a>, <&riva_bt_pin_a>, <&riva_fm_pin_a>; + pinctrl-names =3D "default"; + + vddcx-supply =3D <&pm8921_s3>; + vddmx-supply =3D <&pm8921_l24>; + vddpx-supply =3D <&pm8921_s4>; + + status =3D "okay"; + + iris { + vddxo-supply =3D <&pm8921_l4>; + vddrfa-supply =3D <&pm8921_s2>; + vddpa-supply =3D <&pm8921_l10>; + vdddig-supply =3D <&pm8921_lvs2>; + }; +}; + +&rpm { + regulators { + compatible =3D "qcom,rpm-pm8921-regulators"; + + vdd_l1_l2_l12_l18-supply =3D <&pm8921_s4>; + vdd_l24-supply =3D <&pm8921_s1>; + vdd_l25-supply =3D <&pm8921_s1>; + vdd_l26-supply =3D <&pm8921_s7>; + vdd_l27-supply =3D <&pm8921_s7>; + vdd_l28-supply =3D <&pm8921_s7>; + vin_lvs1_3_6-supply =3D <&pm8921_s4>; + vin_lvs2-supply =3D <&pm8921_s1>; + vin_lvs4_5_7-supply =3D <&pm8921_s4>; + + pm8921_l1: l1 { + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-always-on; + bias-pull-down; + }; + + /* mipi_dsi.1-dsi1_pll_vdda */ + pm8921_l2: l2 { + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + bias-pull-down; + }; + + /* msm_otg-HSUSB_3p3 */ + pm8921_l3: l3 { + regulator-min-microvolt =3D <3075000>; + regulator-max-microvolt =3D <3500000>; + bias-pull-down; + }; + + /* msm_otg-HSUSB_1p8 */ + pm8921_l4: l4 { + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + /* msm_sdcc.1-sdc_vdd */ + pm8921_l5: l5 { + regulator-min-microvolt =3D <2950000>; + regulator-max-microvolt =3D <2950000>; + bias-pull-down; + }; + + /* earjack_debug */ + pm8921_l6: l6 { + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + bias-pull-down; + }; + + /* mipi_dsi.1-dsi_vci */ + pm8921_l8: l8 { + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <3000000>; + bias-pull-down; + }; + + /* wcnss_wlan.0-iris_vddpa */ + pm8921_l10: l10 { + regulator-min-microvolt =3D <2900000>; + regulator-max-microvolt =3D <2900000>; + bias-pull-down; + }; + + /* mipi_dsi.1-dsi1_avdd */ + pm8921_l11: l11 { + regulator-min-microvolt =3D <2850000>; + regulator-max-microvolt =3D <2850000>; + bias-pull-down; + }; + + /* touch_vdd */ + pm8921_l15: l15 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2950000>; + bias-pull-down; + }; + + /* slimport_dvdd */ + pm8921_l18: l18 { + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + bias-pull-down; + }; + + /* touch_io */ + pm8921_l22: l22 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + bias-pull-down; + }; + + /* + * mipi_dsi.1-dsi_vddio + * pil_qdsp6v4.1-pll_vdd + * pil_qdsp6v4.2-pll_vdd + * msm_ehci_host.0-HSUSB_1p8 + * msm_ehci_host.1-HSUSB_1p8 + */ + pm8921_l23: l23 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + bias-pull-down; + }; + + /* + * tabla2x-slim-CDC_VDDA_A_1P2V + * tabla2x-slim-VDDD_CDC_D + */ + pm8921_l24: l24 { + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <1150000>; + bias-pull-down; + }; + + pm8921_l25: l25 { + regulator-min-microvolt =3D <1250000>; + regulator-max-microvolt =3D <1250000>; + regulator-always-on; + bias-pull-down; + }; + + pm8921_l26: l26 { + regulator-min-microvolt =3D <375000>; + regulator-max-microvolt =3D <1050000>; + regulator-always-on; + bias-pull-down; + }; + + pm8921_l27: l27 { + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + }; + + pm8921_l28: l28 { + regulator-min-microvolt =3D <1050000>; + regulator-max-microvolt =3D <1050000>; + bias-pull-down; + }; + + /* wcnss_wlan.0-iris_vddio */ + pm8921_lvs1: lvs1 { + bias-pull-down; + }; + + /* wcnss_wlan.0-iris_vdddig */ + pm8921_lvs2: lvs2 { + bias-pull-down; + }; + + pm8921_lvs3: lvs3 { + bias-pull-down; + }; + + pm8921_lvs4: lvs4 { + bias-pull-down; + }; + + pm8921_lvs5: lvs5 { + bias-pull-down; + }; + + /* mipi_dsi.1-dsi_iovcc */ + pm8921_lvs6: lvs6 { + bias-pull-down; + }; + + /* + * pil_riva-pll_vdd + * lvds.0-lvds_vdda + * mipi_dsi.1-dsi1_vddio + * hdmi_msm.0-hdmi_vdda + */ + pm8921_lvs7: lvs7 { + bias-pull-down; + }; + + pm8921_ncp: ncp { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + qcom,switch-mode-frequency =3D <1600000>; + }; + + /* Buck SMPS */ + pm8921_s1: s1 { + regulator-always-on; + regulator-min-microvolt =3D <1225000>; + regulator-max-microvolt =3D <1225000>; + qcom,switch-mode-frequency =3D <3200000>; + bias-pull-down; + }; + + pm8921_s2: s2 { + regulator-min-microvolt =3D <1300000>; + regulator-max-microvolt =3D <1300000>; + qcom,switch-mode-frequency =3D <1600000>; + bias-pull-down; + }; + + /* msm otg HSUSB_VDDCX */ + pm8921_s3: s3 { + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1150000>; + qcom,switch-mode-frequency =3D <4800000>; + bias-pull-down; + }; + + /* + * msm_sdcc.1-sdc-vdd_io + * tabla2x-slim-CDC_VDDA_RX + * tabla2x-slim-CDC_VDDA_TX + * tabla2x-slim-CDC_VDD_CP + * tabla2x-slim-VDDIO_CDC + */ + pm8921_s4: s4 { + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + qcom,switch-mode-frequency =3D <1600000>; + bias-pull-down; + qcom,force-mode =3D ; + }; + + /* + * supply vdd_l26, vdd_l27, vdd_l28 + */ + pm8921_s7: s7 { + regulator-min-microvolt =3D <1300000>; + regulator-max-microvolt =3D <1300000>; + qcom,switch-mode-frequency =3D <3200000>; + }; + + pm8921_s8: s8 { + regulator-min-microvolt =3D <2200000>; + regulator-max-microvolt =3D <2200000>; + qcom,switch-mode-frequency =3D <1600000>; + }; + }; +}; + +/* eMMC */ +&sdcc1 { + vmmc-supply =3D <&pm8921_l5>; + vqmmc-supply =3D <&pm8921_s4>; + + status =3D "okay"; +}; + +&pm8921_gpio { + gpio_keys_default: gpio-keys-default-state { + pins =3D "gpio30", "gpio35", "gpio37"; + function =3D PMIC_GPIO_FUNC_NORMAL; + input-enable; + bias-pull-up; + power-source =3D ; + }; +}; + +&tlmm_pinmux { + gsbi7_uart_pin_a: gsbi7-uart-pin-active-state { + rx-pins { + pins =3D "gpio83"; + function =3D "gsbi7"; + drive-strength =3D <2>; + bias-pull-up; + }; + + tx-pins { + pins =3D "gpio82"; + function =3D "gsbi7"; + drive-strength =3D <4>; + bias-disable; + }; + }; + + muic_int_default_state: muic-int-default-state { + pins =3D "gpio55"; + function =3D "gpio"; + drive-strength =3D <2>; + input-enable; + bias-disable; + }; +}; + +&usb_hs1_phy { + v3p3-supply =3D <&pm8921_l3>; + v1p8-supply =3D <&pm8921_l4>; + extcon =3D <&muic>; +}; + +&usb_id { + status =3D "okay"; +}; + +&usb1 { + dr_mode =3D "otg"; + extcon =3D <&muic>, <&usb_id>; + + status =3D "okay"; +}; --=20 2.43.0