From nobody Wed Jun 10 19:57:18 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AC85371890 for ; Mon, 27 Apr 2026 06:35:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271735; cv=none; b=QTG4H0wnSVArBTwbmv+/vCyB7BnS5iG4JnvhVEzWQaO8ndOoB5Z0Z+guyISWSMsNE05pSvKtN7tDYsGYl5JJGzbhLKYoliAsiJLT0sHKCYaCRc7UKZ9cqfz7/pHfjiHU983LxbR/4Mj6oa4ZFlyfnT6Ev6oHUlHaK8DR0f6xfhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271735; c=relaxed/simple; bh=Fg3wV9TgWVv5u8ucAiklna4tkeUeVZmRlfG6VfBXnx0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nuNoYOks+oVVa2W34OC7dNoHOUO6DnEXq/RA6R6mQPNFvCq9QEBBEKZSEcqPviR783/NDntGzufJdwugQNr/A38n5QIuPg0uTVaBwf/iO5fCvUaGXfKkTH60xbNUUXn4orJ02QrrtLpMSUol9R2EreXX8IfTU5WRtmAYp1MwtpU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=WwzjYaFC; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=A0fmDSJQ; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="WwzjYaFC"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="A0fmDSJQ" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63QLF6eV1454631 for ; Mon, 27 Apr 2026 06:35:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= ez9CbcraMCzys8o937ycjyhc+fwq8fh4i95qoRSypAE=; b=WwzjYaFCRip1tRTg zN8/s0TL7eLSRezkSp622eWr+EkuPXLaqG7SX9v18AbWbZwZPgUGJcMtPBIN/ti/ Xe/T8kSag8yJ9w7klvnhPHWOHz1ktNAvvHBWmXpRfJZV5dtKQpv6slrRpdIwUE2k bAFgVsGxqSlXb7pfpFYpj66rUSqhMWmMrvquqfYfptiH2KeO/4YPrsGnF5roIOPr LbRJc6AHqvhCcxbBWiFt1A1AuGtRG5WIetfjATim7kRetc4XsATqiJS39JdudwNr JsZHx1t6d7A3typDhSOmf9Sa1ALjNNURvF0SB4rRcDGz5f+h7PrK8LI+4g+A+fTW SG+R1Q== Received: from mail-qv1-f71.google.com (mail-qv1-f71.google.com [209.85.219.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4drnu2vq36-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 27 Apr 2026 06:35:32 +0000 (GMT) Received: by mail-qv1-f71.google.com with SMTP id 6a1803df08f44-8a3bc7f5d43so24431756d6.2 for ; Sun, 26 Apr 2026 23:35:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1777271731; x=1777876531; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ez9CbcraMCzys8o937ycjyhc+fwq8fh4i95qoRSypAE=; b=A0fmDSJQr9CtJ/8abEX2ECsF2Wl8TpaGTMBn+o3zNBggTnuf0592jSykR1Yc9CWRAx WLSYkD3Lo6h6A6OitjSKXq2atHVoACpGeYfoR0KoE0kUwuAWsaH/HSLpe+phJcTlYqU5 88KwxJHAuM6zu1oxBRn3Pk0PQkylRPRyRmw+TJihj0T/fFcFtGcy9niZzum0PkrBO1ik 9tRKSC1EDS1BhAD3oRGtEhoCiDoOsqy3iidWSs2i9SaraBWsrQZx3KJ5TbtumwL6QdNt 47OyK2bv/i8Sjv4P87vxIj517pjjKeCNt4QXrzWfs9Ij9PqALImOQa7mfHJNN3I4YRQf IC8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777271731; x=1777876531; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=ez9CbcraMCzys8o937ycjyhc+fwq8fh4i95qoRSypAE=; b=iLC5i6cdVTHFK0Up98UD52fOEiZsjfR8TqraTAsK+AzjlvAtDcodvbC/6sipwQwQaZ PHsGgSFTS54O7/qwUDJSx4E4zGJQXwCGDk2vqNEGdCvqUcaiKt6g4PTk0uFb+ihJe2xk X9GnfztUGDAhlJ7iS4bmmJiZ5IMXhoVLGBV0LCVjWC7UL4MBTctm6O2C7UY9gnDUSIC/ NvX6u/B6kriaa8+xgPgD/9u08iQ+RggfT93xbAT60QsHaN9M7uYUBq8xGfXZ7uhw+IH7 e5UMLycz9FPiIW5Gh/5pLqclOEorfZQwrdo3jM8oQV5OoaaVEyXi9vVazJdlLcj9ujT/ qFig== X-Forwarded-Encrypted: i=1; AFNElJ83cH8gPFazAuLw2GXKcQlGd0LG1pRxXOPpR2QZprqsToeRBLNg8NQ5WZbWtgcxiTAJ+5NLyy9KQJTswb4=@vger.kernel.org X-Gm-Message-State: AOJu0YzH5H9BTt0efC1TIkXsD5xel5Tn/06zgskUpLtrW8jIo3PM7s6d aVwEgz2fOlpE2NSASb8ohF3oGgGzr/ISlV20F5o7SKa6f3qdPPvWTJG3v4WAJm+iRO/tEmsaf06 sW8o+9OReSBzxH5wqwwcDKFe//zAN3UBdg7sM0srYQ38+hHnijnyIlZ++1lWvRxsGnns= X-Gm-Gg: AeBDies7leCYk8aDI0N3yOMBR9+YI0LNZ0LeM/HiBs29VO9P1+kTmPgyr98gY8V/7gB n6PJkZhQtMTjRPPmEKt9NoI0iH4QaoksFJpdCOfsxmq15hu6qgmyXvQD1znRBY3afk5x1djslWq Z4e+sz/brOJbFLuYe89HAe/ijt2EBR/91YhzX4108fXmq49zIYjIV9WAST8QvgtGzKIt4MZA8pR 7a9+XMXdkVp5f4mIs6NeixFOMBdjVDKIJ5ZN5vt1qTANHkq1ihKxr67O+KZIopxqKRwXHA12wub Gx/9mEn0X/eMxVfhdKc2uR3qecWKE9l3FfcJrQNoPjkCAuUyXDbxSpNcbgAIy6GaAei2p5Ba7+w eIv+fJkx/ZITpPYuYhBLlZ/mfSkMcgOvC7AAB/9LkIReTTt92z/7U/aCD00lhzwwGCoy1YM6yRX MTcLM26BcH1NWUPYrgDw== X-Received: by 2002:a05:6214:590b:b0:8ac:ae56:b493 with SMTP id 6a1803df08f44-8b02810c139mr671021076d6.40.1777271731512; Sun, 26 Apr 2026 23:35:31 -0700 (PDT) X-Received: by 2002:a05:6214:590b:b0:8ac:ae56:b493 with SMTP id 6a1803df08f44-8b02810c139mr671020746d6.40.1777271731106; Sun, 26 Apr 2026 23:35:31 -0700 (PDT) Received: from yongmou2.ap.qualcomm.com (Global_NAT1_IAD_FW.qualcomm.com. [129.46.232.65]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8b02ac7d4e6sm251899256d6.20.2026.04.26.23.35.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Apr 2026 23:35:30 -0700 (PDT) From: Yongxing Mou Date: Mon, 27 Apr 2026 14:35:19 +0800 Subject: [PATCH v5 1/5] phy: qcom: edp: Unify generic DP/eDP swing and pre-emphasis tables Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-edp_phy-v5-1-3bb876824475@oss.qualcomm.com> References: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> In-Reply-To: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Stephen Boyd , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Yongxing Mou , stable@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777271722; l=3980; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=Fg3wV9TgWVv5u8ucAiklna4tkeUeVZmRlfG6VfBXnx0=; b=4aMB9c2y017pyM3zsrCgCqjBhc1orRHRVrwWiqxA37pUc948TsHRbjMOqG1C7yMsCh4o26TzM MfCtVKXCKkTAUpWwguOnqtLoJGVZFLncfP+Tvml+g+cT2B9gwiB6hGA X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-GUID: 2Eqen3QZb-QAWCc521SiNVwPyBGdXHKz X-Authority-Analysis: v=2.4 cv=cbriaHDM c=1 sm=1 tr=0 ts=69ef03b4 cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=_hJh01-1qFuxGScrDK8A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 X-Proofpoint-ORIG-GUID: 2Eqen3QZb-QAWCc521SiNVwPyBGdXHKz X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI3MDA2OCBTYWx0ZWRfXwhdo6PjXWAnA R/SPMJRxNJ66N5gHdfWHE16zQuTVi3RuwoBIjR38BcF2EKQm3GCq5POdChkiHUe5QkV924KNvwS g+h6PI+grfnBlAbwdGES7xnX/xiyHtgX31gXx0k7WjKMRhBB3Zt2VlCqEL/T2xNjjQ8RNIUKbkC gpAgR4umRMbDLqggR6w4eDP1oUI48pewINNqqAwQVQTdw0S28UPxe1iXYw3VH+eEaCuHARa6oPe 81i9smkIpWG/+IUEvybIq4IrA6+wRm7+kfxpU0k7Z2LknqJrjP9hKgCCVAyHBu99gNX1zH3vzNu uxxB7MsOWmiK73hPF0/9+K8K3FLmLL1Qc8WLTayc5+Ig0iuDPIFcocZIAiyyoeEg/inYo9mWOTI dZneU1tt2ZfSJSSRIYkHrqI29MAmKiO4M0MQyN/m6Ql1nd+UKvLLPdKhJNRsaU8dKifuXvveOGz bk0HRW/yYIOxmT3M+0w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-27_01,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 spamscore=0 malwarescore=0 bulkscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604270068 The current eDP and DP swing/pre-emphasis tables do not match the HPG requirements for the supported platforms, correct the table accordingly. The generic tables which can be shared as follows: DP mode=EF=BC=9A -sa8775p/sc7280/sc8280xp/x1e80100 -glymur -sc8180x eDP mode(low vdiff): -glymur/sa8775p/sc8280xp/x1e80100 -sc7280 -sc8180x The proper tables for SC8180X and SC7280 will be added in a later patch, since they need separate table. Cc: stable@vger.kernel.org Fixes: f199223cb490 ("phy: qcom: Introduce new eDP PHY driver") Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Yongxing Mou --- drivers/phy/qualcomm/phy-qcom-edp.c | 41 +++++++++------------------------= ---- 1 file changed, 10 insertions(+), 31 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy= -qcom-edp.c index 7372de05a0b8..2af3fd63832f 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -116,17 +116,17 @@ struct qcom_edp { }; =20 static const u8 dp_swing_hbr_rbr[4][4] =3D { - { 0x08, 0x0f, 0x16, 0x1f }, + { 0x07, 0x0f, 0x16, 0x1f }, { 0x11, 0x1e, 0x1f, 0xff }, { 0x16, 0x1f, 0xff, 0xff }, { 0x1f, 0xff, 0xff, 0xff } }; =20 static const u8 dp_pre_emp_hbr_rbr[4][4] =3D { - { 0x00, 0x0d, 0x14, 0x1a }, + { 0x00, 0x0e, 0x15, 0x1a }, { 0x00, 0x0e, 0x15, 0xff }, { 0x00, 0x0e, 0xff, 0xff }, - { 0x03, 0xff, 0xff, 0xff } + { 0x04, 0xff, 0xff, 0xff } }; =20 static const u8 dp_swing_hbr2_hbr3[4][4] =3D { @@ -158,7 +158,7 @@ static const u8 edp_swing_hbr_rbr[4][4] =3D { }; =20 static const u8 edp_pre_emp_hbr_rbr[4][4] =3D { - { 0x05, 0x12, 0x17, 0x1d }, + { 0x05, 0x11, 0x17, 0x1d }, { 0x05, 0x11, 0x18, 0xff }, { 0x06, 0x11, 0xff, 0xff }, { 0x00, 0xff, 0xff, 0xff } @@ -172,10 +172,10 @@ static const u8 edp_swing_hbr2_hbr3[4][4] =3D { }; =20 static const u8 edp_pre_emp_hbr2_hbr3[4][4] =3D { - { 0x08, 0x11, 0x17, 0x1b }, - { 0x00, 0x0c, 0x13, 0xff }, - { 0x05, 0x10, 0xff, 0xff }, - { 0x00, 0xff, 0xff, 0xff } + { 0x0c, 0x15, 0x19, 0x1e }, + { 0x0b, 0x15, 0x19, 0xff }, + { 0x0e, 0x14, 0xff, 0xff }, + { 0x0d, 0xff, 0xff, 0xff } }; =20 static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg= =3D { @@ -193,27 +193,6 @@ static const u8 edp_phy_vco_div_cfg_v4[4] =3D { 0x01, 0x01, 0x02, 0x00, }; =20 -static const u8 edp_pre_emp_hbr_rbr_v5[4][4] =3D { - { 0x05, 0x11, 0x17, 0x1d }, - { 0x05, 0x11, 0x18, 0xff }, - { 0x06, 0x11, 0xff, 0xff }, - { 0x00, 0xff, 0xff, 0xff } -}; - -static const u8 edp_pre_emp_hbr2_hbr3_v5[4][4] =3D { - { 0x0c, 0x15, 0x19, 0x1e }, - { 0x0b, 0x15, 0x19, 0xff }, - { 0x0e, 0x14, 0xff, 0xff }, - { 0x0d, 0xff, 0xff, 0xff } -}; - -static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg= _v5 =3D { - .swing_hbr_rbr =3D &edp_swing_hbr_rbr, - .swing_hbr3_hbr2 =3D &edp_swing_hbr2_hbr3, - .pre_emphasis_hbr_rbr =3D &edp_pre_emp_hbr_rbr_v5, - .pre_emphasis_hbr3_hbr2 =3D &edp_pre_emp_hbr2_hbr3_v5, -}; - static const u8 edp_phy_aux_cfg_v5[DP_AUX_CFG_SIZE] =3D { 0x00, 0x13, 0xa4, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03, 0x02, 0x02, 0= x00, }; @@ -564,7 +543,7 @@ static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cfg= =3D { .is_edp =3D false, .aux_cfg =3D edp_phy_aux_cfg_v5, .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, - .swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg_v5, + .swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, .ver_ops =3D &qcom_edp_phy_ops_v4, }; =20 @@ -945,7 +924,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v8 =3D= { static struct qcom_edp_phy_cfg glymur_phy_cfg =3D { .aux_cfg =3D edp_phy_aux_cfg_v8, .vco_div_cfg =3D edp_phy_vco_div_cfg_v8, - .swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg_v5, + .swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, .ver_ops =3D &qcom_edp_phy_ops_v8, }; =20 --=20 2.43.0 From nobody Wed Jun 10 19:57:18 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3ED4138F648 for ; Mon, 27 Apr 2026 06:35:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271738; cv=none; b=i+g2MqeiMm++sSf6Dn0fZZ6LdAbL4XtlSfZAHBsWWsR93zgVuzAc84h934KCLt4MrYHUCZtJuYveoJ2/H4GSP9Lepjk0HZc7hKrnhBzhA1bp0JXOqoiI5YOZ81VXUwH8PwUkJkUoWGh50VegzbVnoDfkxlD+jRKKqWF58EC8b3Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271738; c=relaxed/simple; bh=O1GeInKguzBA9mYySYOWGiOvhXg4+XShwWBtgMAL7dA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=b2k3fkR54JksBalq9nSKzg0wfvqzO0zWc1t/Aie1OmfLMKBwjb8vJTvo3GVwlq2t3a795FqeKQHM6qK85C8PsceYHYnD3oCCkNsQ2qzofB/KO8cPstFyetTutKy0pHIqmdrZ1aPxvLSxfMQEtKje4LZYsteI4fCFbgF8hDis8qQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=X9v9KZBp; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=CgjN29ZM; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="X9v9KZBp"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="CgjN29ZM" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63QGmUfL2084952 for ; Mon, 27 Apr 2026 06:35:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 68zN49TtAvswBkOR/vsRM9+htKxL4H2WIkv6U0YNdLw=; b=X9v9KZBp0iKSdQmi pdGNeg+qchzhLSd8uCWXvUl04Eff5PJXlO4w6xl7kgHXBEoQNq5UeWCkGwNIHS0l ZfjXWPB4hgKMzyNoRRc2PDVnQn08D5uDiDDVkelcUSwXVCOoOcu3n4UpPBqp+thY U04qUL91176YmrN71UbLs6L+f107ehwA3JLq1b6JxiZp+t25PLhbKAXU7YOTji1U 6dfcPD/5DiEQLC4kFiWDr8FroAQLn4DEc/dQuhmd4I4OD0Fk7s0xzRCgoEpt6D77 eIX+wMFyZr4UQmnQh/uxOqNsoz/cqMlUa4Qkc5TBT302s2zbvl4KW8rmZIMDRLQV NgpP/A== Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4drnkxcr9b-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 27 Apr 2026 06:35:36 +0000 (GMT) Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-8eb82634cbeso1369867985a.1 for ; Sun, 26 Apr 2026 23:35:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1777271735; x=1777876535; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=68zN49TtAvswBkOR/vsRM9+htKxL4H2WIkv6U0YNdLw=; b=CgjN29ZME0MBQRHx1vO3THxY4N8ArUdsGhRJE1ehyAZ6TLmaG574dvU9wwvYI9WVmP dkdP5h854EBt3BhiRCj8RRb4wSfE5UIumP+yQWBAzQyOO3gwKZRQdmEkyJoPE8Izy3/g +RVgrMUvz+L3cOBzgI8+g/wmQAfgW5e6euAc+QVP+nGGT1ANWncjsNmvlpSpftdLIt5I 6n+J0sIPTC3fzWfQGsBd0wY5i9SSneVqLcvQjYHtnKYpRbYGkA+uW6oMibMaOBPJkvPh MeCD9eexeuc3H/+/NDFOPURHWJgk6pyqezXzYh5hr2k+ZoVeqlLP1iwyrLncIkoN0+FN 8KiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777271735; x=1777876535; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=68zN49TtAvswBkOR/vsRM9+htKxL4H2WIkv6U0YNdLw=; b=UFWC/LuCyc2hMNZrnqXVJ8uvHyMnCq/ZMy0fNI+bTRq42hhm+tpiXiZTc81FA/wFui R2nKkf5x/giGUbhu4bS0kDeAp6oTMAaK0CLiAmaRtGhkQNcJlFKz8pRBwA/0kaWTZrVa 95j1U2GqCeAa9fw2w0a7PUKd1gz3Z1XQfwl8GNmPtvgV38sn0ACYyY2oWrEL/hlBD6Wb CdWQlu7Ny2OI3ly4A13ghnuYX3jXnRfy+kRzzHekoeVPmy89IzHLQOfmPmla00JnqZyH aR0NLYIrSS5QmmXqK219syw68H9vq0VYF18xrLw1J7tEJGaRUsYeISBsAhrRfp7PvHfh z0hA== X-Forwarded-Encrypted: i=1; AFNElJ96ngb5/RhwZ4Hpf18Ts8c7BnOuylvAscA3to+Mjra6CuKhXbb6snBo5Ra+iU8W3WcRwrhQn8Vb9J6GHtk=@vger.kernel.org X-Gm-Message-State: AOJu0Yy6qQzPCfaIztYJFXknojWH/BzK0Rzhl4v33iOQbGYB0MSVctI8 r1db9mz14G10NdMXrFzVjDXef+V448fawh7oFNfWbNNua85l3GLJis4f+RGoV1U73YdhWc/urzU k08gsIKw32kPe5xZXCRTDTqcPjUppfe6cCh+oUfaGOcanCWg6b3O03pj+DIXTVti0/rE= X-Gm-Gg: AeBDieu+oX2V1XiJ6ST6gkjBHZGxNp6n+wRc8gBO0n6yMM2cmVRPF+TckkPFewglMjk ztNhUffmwVUhppTcU0JgofqnQwh1DTh6/Gh+90TxyqDsK8xJasSyYyT57mIBOJnSdqvzW4Up65C ZUHr5egtpwxsh9rjvjxVEgmtILayJwZDkBYAPtvX1mwacKt3WpN3DDl2QhIngeFKmtFgpN6iVBq GAv4Ehy5TdCWkt0Pat0Qszb/D85ynAmU2kI425P0kOkR/yyIVn5tt+h5nnEXO3kqerBxwGm7MSQ tYGfeI9/jAIVhpU1dPJPzrDICgWEZhKJdKfut1epdPpSV6mfG37pWZeCUO7VHnx8uZIC0hlbX3Y xMYUT1p26/49fSPL9KTmfFLW71vVXYIuGlaaFYmz5yuK6ac/ZdpM1hBHLlz/HnQ6GZ7tuc/YdBb YVuCalCDXjY9FiuN2P2A== X-Received: by 2002:a05:620a:31a7:b0:8ea:e1a7:24a1 with SMTP id af79cd13be357-8eae1a73341mr4642101485a.33.1777271735534; Sun, 26 Apr 2026 23:35:35 -0700 (PDT) X-Received: by 2002:a05:620a:31a7:b0:8ea:e1a7:24a1 with SMTP id af79cd13be357-8eae1a73341mr4642099485a.33.1777271734943; Sun, 26 Apr 2026 23:35:34 -0700 (PDT) Received: from yongmou2.ap.qualcomm.com (Global_NAT1_IAD_FW.qualcomm.com. [129.46.232.65]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8b02ac7d4e6sm251899256d6.20.2026.04.26.23.35.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Apr 2026 23:35:34 -0700 (PDT) From: Yongxing Mou Date: Mon, 27 Apr 2026 14:35:20 +0800 Subject: [PATCH v5 2/5] phy: qcom: edp: Add eDP/DP mode switch support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-edp_phy-v5-2-3bb876824475@oss.qualcomm.com> References: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> In-Reply-To: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Stephen Boyd , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Yongxing Mou , stable@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777271722; l=5731; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=O1GeInKguzBA9mYySYOWGiOvhXg4+XShwWBtgMAL7dA=; b=xmV6Q+zgJRGesaYmJBkrJ3zWdAKMKfl/DOqcDFppyLCtPSgqKZ05PXBvzJKYUMGOaKFQJgJc7 eO1J7wXXO8jAApwXuXbyXXD4kXufby08Ya2MMZwhRdMAr7KgEiUEP90 X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-GUID: liy9hqota4enGWv9rmWVHZnhqfdGW0ui X-Proofpoint-ORIG-GUID: liy9hqota4enGWv9rmWVHZnhqfdGW0ui X-Authority-Analysis: v=2.4 cv=TuPWQjXh c=1 sm=1 tr=0 ts=69ef03b8 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=se8qGc9sdx2UsIF7nuMA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI3MDA2OCBTYWx0ZWRfX02rsfCTIDOlE d/E8E4NXy/4AKBfHzWnoftTg/xEHH1TYb27vGL6k4glysu/97pqT0QOdy9uBnLvi7BUG2P3jUCd VLKJfC5BtPzyxe/fvtWn9UUkWlHWBCSuGAi6E4oW3FJYz/N1wz0T1j82tR6xpRJ/3HwHTMOMsym wEAfgNv++FEAeh7vSWlgF4UGCDUM1xReax0bfwy4jk6TSZUxmT2vY1hZdxuQTe+vSJHDc2vKFtd K7lVhp/tdapS3k3pshP2t0CAI9/XrAmm1Yw23TmpHyyQEYWJkcX83JO0JruXjsdHe87N6hYcbxi vT+tZ5Glr64ZrgXGipsggcrNR3ZAQuS5LDv39CkW6tNNS3qUpJ72+13BAlcQJA3ptJkhjEA6hjj w9bfNMehq3A5xldDgFPuGLI6fi/l1297KgaZKa217T1M2S9kjwHs/Ihdb3QM2W2H7TjbDv9K4kW pjIMc0emtzDBnusjktA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-27_01,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 impostorscore=0 clxscore=1015 suspectscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604270068 The eDP PHY supports both eDP/DP modes, each requiring a different swing/pre-emphasis table. However, the driver currently uses a fixed static table for eDP programming rather than selecting the appropriate table based on the current mode. Add separate tables for eDP and DP modes, and select the appropriate table dynamically based on the current mode. Glymur's DP mode table differs from the other platforms, add a dedicated table for it. This also fixes the table mismatch for X1E80100 (eDP) and SA8775P (DP). Cc: stable@vger.kernel.org Fixes: 3f12bf16213c ("phy: qcom: edp: Add support for eDP PHY on SA8775P") Reviewed-by: Konrad Dybcio Signed-off-by: Yongxing Mou --- drivers/phy/qualcomm/phy-qcom-edp.c | 46 +++++++++++++++++++++++++++------= ---- 1 file changed, 34 insertions(+), 12 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy= -qcom-edp.c index 2af3fd63832f..3266026cfe37 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -87,7 +87,8 @@ struct qcom_edp_phy_cfg { bool is_edp; const u8 *aux_cfg; const u8 *vco_div_cfg; - const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg; + const struct qcom_edp_swing_pre_emph_cfg *dp_swing_pre_emph_cfg; + const struct qcom_edp_swing_pre_emph_cfg *edp_swing_pre_emph_cfg; const struct phy_ver_ops *ver_ops; }; =20 @@ -150,6 +151,20 @@ static const struct qcom_edp_swing_pre_emph_cfg dp_phy= _swing_pre_emph_cfg =3D { .pre_emphasis_hbr3_hbr2 =3D &dp_pre_emp_hbr2_hbr3, }; =20 +static const u8 dp_pre_emp_hbr_rbr_v8[4][4] =3D { + { 0x00, 0x0e, 0x15, 0x1a }, + { 0x00, 0x0e, 0x15, 0xff }, + { 0x00, 0x0e, 0xff, 0xff }, + { 0x00, 0xff, 0xff, 0xff } +}; + +static const struct qcom_edp_swing_pre_emph_cfg dp_phy_swing_pre_emph_cfg_= v8 =3D { + .swing_hbr_rbr =3D &dp_swing_hbr_rbr, + .swing_hbr3_hbr2 =3D &dp_swing_hbr2_hbr3, + .pre_emphasis_hbr_rbr =3D &dp_pre_emp_hbr_rbr_v8, + .pre_emphasis_hbr3_hbr2 =3D &dp_pre_emp_hbr2_hbr3, +}; + static const u8 edp_swing_hbr_rbr[4][4] =3D { { 0x07, 0x0f, 0x16, 0x1f }, { 0x0d, 0x16, 0x1e, 0xff }, @@ -246,7 +261,7 @@ static int qcom_edp_phy_init(struct phy *phy) * when more information becomes available about why this is * even needed. */ - if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp) + if (edp->cfg->dp_swing_pre_emph_cfg && !edp->is_edp) aux_cfg[8] =3D 0xb7; =20 writel(0xfc, edp->edp + DP_PHY_MODE); @@ -270,7 +285,7 @@ static int qcom_edp_phy_init(struct phy *phy) =20 static int qcom_edp_set_voltages(struct qcom_edp *edp, const struct phy_co= nfigure_opts_dp *dp_opts) { - const struct qcom_edp_swing_pre_emph_cfg *cfg =3D edp->cfg->swing_pre_emp= h_cfg; + const struct qcom_edp_swing_pre_emph_cfg *cfg; unsigned int v_level =3D 0; unsigned int p_level =3D 0; u8 ldo_config; @@ -278,12 +293,14 @@ static int qcom_edp_set_voltages(struct qcom_edp *edp= , const struct phy_configur u8 emph; int i; =20 + if (edp->is_edp) + cfg =3D edp->cfg->edp_swing_pre_emph_cfg; + else + cfg =3D edp->cfg->dp_swing_pre_emph_cfg; + if (!cfg) return 0; =20 - if (edp->is_edp) - cfg =3D &edp_phy_swing_pre_emph_cfg; - for (i =3D 0; i < dp_opts->lanes; i++) { v_level =3D max(v_level, dp_opts->voltage[i]); p_level =3D max(p_level, dp_opts->pre[i]); @@ -543,7 +560,8 @@ static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cfg= =3D { .is_edp =3D false, .aux_cfg =3D edp_phy_aux_cfg_v5, .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, - .swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, + .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg, + .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, .ver_ops =3D &qcom_edp_phy_ops_v4, }; =20 @@ -556,7 +574,8 @@ static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = =3D { static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg =3D { .aux_cfg =3D edp_phy_aux_cfg_v4, .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, - .swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg, + .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg, + .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, .ver_ops =3D &qcom_edp_phy_ops_v4, }; =20 @@ -564,7 +583,8 @@ static const struct qcom_edp_phy_cfg sc8280xp_edp_phy_c= fg =3D { .is_edp =3D true, .aux_cfg =3D edp_phy_aux_cfg_v4, .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, - .swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, + .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg, + .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, .ver_ops =3D &qcom_edp_phy_ops_v4, }; =20 @@ -745,7 +765,8 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v6 =3D= { static struct qcom_edp_phy_cfg x1e80100_phy_cfg =3D { .aux_cfg =3D edp_phy_aux_cfg_v4, .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, - .swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg, + .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg, + .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, .ver_ops =3D &qcom_edp_phy_ops_v6, }; =20 @@ -924,7 +945,8 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v8 =3D= { static struct qcom_edp_phy_cfg glymur_phy_cfg =3D { .aux_cfg =3D edp_phy_aux_cfg_v8, .vco_div_cfg =3D edp_phy_vco_div_cfg_v8, - .swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, + .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg_v8, + .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg, .ver_ops =3D &qcom_edp_phy_ops_v8, }; =20 @@ -942,7 +964,7 @@ static int qcom_edp_phy_power_on(struct phy *phy) if (ret) return ret; =20 - if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp) + if (edp->cfg->edp_swing_pre_emph_cfg && !edp->is_edp) ldo_config =3D 0x1; =20 writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG); --=20 2.43.0 From nobody Wed Jun 10 19:57:18 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B92DA37CD24 for ; Mon, 27 Apr 2026 06:35:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271742; cv=none; b=n5wqDtcRHnmp1m5F+40PpIPR9e9C82T8JPiWhhg9YbbHQYIOOwHvSkzWS6ayB1Z5LW+nLCuJTm8kuBGrlQLgeNJwJXBJXgM8z4+GsF47tGdxlpSbeZzzsm3SY+JNFkgqRlVv9lvIpMIh82ye/34pR9IflrXRjZwJFC/mW1MqK/E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271742; c=relaxed/simple; bh=R2IzNDqGo6HtlEfDbgCxfFqgBnJCRQP8v/nOXy+Ydls=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=us+TMdAbZkKEgWQKortmG/1ZF+IyOEF4SdGdVYFPTAfvnskCuMe8bn61wSHNnotNHa+vIj1Cubv1szb6YNfPnY9oWwYBBR9bJpM4Yl9fvnHIg6rb+Eh4TMt3Pjz5yGY0rMeqkjhieNpAk4FaVSZITllnnifd8qBC4VOWSOpBKIo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=K2UJ7JZP; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=NktejEih; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="K2UJ7JZP"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="NktejEih" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63QLF6eW1454631 for ; Mon, 27 Apr 2026 06:35:40 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= MOejmSdyeyE767wPf4LJqa7khHTtZoxzm9fKm4l9sgg=; b=K2UJ7JZPw7f4hXuj wdA4UgRA4HUE5z7Bx3Id33T/Vdc0xekCCpdFOVoZWNy7OKFReXmg3noBcswgVG/E mer3iYacWtgqem+QNf016nY0rYdfnxE31Q+NqduE4cWGvayGrDmJBV72u/jgozIf lNa7XwPWFrBiK7ryX8VfBXMUiQuIlY0b8TEE0IGOYRK/fm25U1yCbOYM16X6UiQw vMqfLCOBQIIfSbfDz7lvr9DBf4qdiBfz8YlAvS8bgwr9I2WGOjCpG3R3jqq5BkxU Gezux8F8m7ki7eh0MRJfSESHEHxVXkjZoTa55rKnvnVV6KSvc9ck2GBa+FUJG7un pdE4Ng== Received: from mail-qv1-f69.google.com (mail-qv1-f69.google.com [209.85.219.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4drnu2vq3m-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 27 Apr 2026 06:35:40 +0000 (GMT) Received: by mail-qv1-f69.google.com with SMTP id 6a1803df08f44-8aca6420fe3so35245906d6.0 for ; Sun, 26 Apr 2026 23:35:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1777271739; x=1777876539; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=MOejmSdyeyE767wPf4LJqa7khHTtZoxzm9fKm4l9sgg=; b=NktejEih2EnIQKolaOn1XiwmJzRSxOHTo0bN+xX0WBTbsOA4LTQMvKtGEJ6BabdpvX yn286LbsrlN3FAJFi0xe2M/knk7gdWMessqLRmzBTLZj8M+c05t6OL7oHW6S+jQcS9Ct m2mXo3emqryEKEBClAO/8biCcWclsHaoq7KYHlvJQMWV1Gs8VBRy6fnA+4IYtiZGYYX1 3Ywlvn0SdoOXrdUZxg3HQF9vUVGKTiq+RF36UgMFv1OZhcP0R2AZRnsdprC/SpP8q+fL jIDZratLeeF7ZXlveRAH15CSbR8GugGJd9HvQxZ+8wXUMuHCj6FilTG71I4HUeYnUBE5 3WYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777271739; x=1777876539; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=MOejmSdyeyE767wPf4LJqa7khHTtZoxzm9fKm4l9sgg=; b=CXtSBsTv1QhmNcHPNX1m1SFtq5DnMdj23O1VeKKth86dgUQCwKfIED9Nqs5f3UBk26 mmlwrVLTrrs470lzttrjLt6OLntLezXL+AGl1hpa0uDNNHY6fqguw0vMI5DFqKiIcGwU 8Aq38chil7gRQnTjZxUJWDoDEvFneTFUPNTy9xgFyD4a118oNi6E2eR/sFITZcOs5yY1 rBbhJsvXB24yLLd1hd5bsdymsZ2S4Snt+DFpXva1Z0Il/70xIe+AvPKrSkKBcjUA6sgl Xd6vb3FkhzLYqs5u+juT4jeNDLFcr1xqqSWGzDB+xDSEC6Y6FayuTLyxlxlSgqADbolo KxXw== X-Forwarded-Encrypted: i=1; AFNElJ+wqX5qJTU2LZ0Tq61Dr5hoYN3PNxlvN3w0v91mOlnp8FxYyXj18AS5yN/GPVlup9tEASEhYvydDMpFYVU=@vger.kernel.org X-Gm-Message-State: AOJu0YwW7ILY2c3J9NOnzPvPhK9klau4xI1ItqIjm+QMgUWTyJm8mCM4 buk0NMt1MZIg6H6QBz3ZEneN6EppNKsnkf+K0ukfkXQCeHGpVy0avZdDTfBff+quxHY1kFJ0Scl 0QFcGH04szf99Oaz5443csAjyltG0eBA5xrASP0D57dXIyWFlfnhqJd7lby+vqqUrFak= X-Gm-Gg: AeBDieupItUOuQrGgkJUTp39yjRVNLdsv1vGLnt1TMlkHIPpPpgTCM6oYqsasCNSFt3 R8QJ0tkLNFNGf1DrMw8RzR+ZcNe1vXzTCDMk8+NgAvF23TINz5Pf/dWAagiN82cf8tkNuaNmq1u NFYLIlqGrsEHdZR3L5eimWZOvpha3VAHIJ+oDJW4iinIta7HagNwsVmVYnjzbYrKZNDB9Fkw5gG tAfEAmClFUFCPiXfIH5NuVxRRkpvw1o1+jSJ3o8NdlgtO2lIX+DrDx1DlK3n8DbPiar/M0AttdA WeLbEB7LxHKgkv5DW5eB8Ag2jxwcnvZ00kCMoBZBpq7jGOJcyWi/R1qT5/Qldus6MtZq5jWemL3 JnrVmEWYsk3UuGwqWZiAYJdwT+4dLJWVS6jbDoFiLFzBAuldifvheMEpJO8suD96DfMXkBN98Ut Qjy8chfhYg/c9RUCP60w== X-Received: by 2002:a05:6214:4f18:b0:8ac:ae21:466 with SMTP id 6a1803df08f44-8b0280ce5bfmr601793796d6.24.1777271738986; Sun, 26 Apr 2026 23:35:38 -0700 (PDT) X-Received: by 2002:a05:6214:4f18:b0:8ac:ae21:466 with SMTP id 6a1803df08f44-8b0280ce5bfmr601793536d6.24.1777271738489; Sun, 26 Apr 2026 23:35:38 -0700 (PDT) Received: from yongmou2.ap.qualcomm.com (Global_NAT1_IAD_FW.qualcomm.com. [129.46.232.65]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8b02ac7d4e6sm251899256d6.20.2026.04.26.23.35.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Apr 2026 23:35:37 -0700 (PDT) From: Yongxing Mou Date: Mon, 27 Apr 2026 14:35:21 +0800 Subject: [PATCH v5 3/5] phy: qcom: edp: Add SC7280/SC8180X swing/pre-emphasis tables Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-edp_phy-v5-3-3bb876824475@oss.qualcomm.com> References: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> In-Reply-To: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Stephen Boyd , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Yongxing Mou X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777271722; l=5099; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=R2IzNDqGo6HtlEfDbgCxfFqgBnJCRQP8v/nOXy+Ydls=; b=esc5roMnJw7OaG85PNh1QTtRz5jMiXXxIeh1/mFItaQ6gg+lIgGGd4FVItjASJqkyKSj8Aa5d G+WKOZqRxDODO4R2WwPRlWIDNcF6lM+I4HeiCRvNXIRTZ0qgDtF9XHu X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-GUID: -bTkuxk7R3C9ogBqO3-V5TRSTeQliMRv X-Authority-Analysis: v=2.4 cv=cbriaHDM c=1 sm=1 tr=0 ts=69ef03bc cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=MHk7-D5nQAs65VpelYQA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-ORIG-GUID: -bTkuxk7R3C9ogBqO3-V5TRSTeQliMRv X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI3MDA2OCBTYWx0ZWRfX1EB4waYVTQY+ I2FWR2s3A4/YN9BIDVBPg9EURTQ0nWtOqnZ3/jg3PJGg4Owz/H8ZKCnFrT4WN4Oc0n4RzG/9DIn L1TYgoQS3+qvRnM01LZ1Lo4mL0PrJ6cMC2rrB2EaaKj/zlqPCOp5RXyRIprizJZq5bbhYondxte 2hIHvMGZVuBP7nj8ArRity459EVqzcN/Uni3KNeTMft1MSfeQe98kDDgCFWf0jVuLNwj2IgOIN6 6M4GU+KJM8GDmh6otYTxSwYt2v42jpN/2j1gfBP0YufHCwqBXZW58ldxJonqOKXjQC3XrJe4AVO vLa02VMLoobgNxuOSPb33Cqf5skV0yFiKcELDldjtzvQTDvbL/+T+QkpqCjk+Umadyn7dMBDKHe 9TF8dDxy473BA6Lv5UktU16UfnhWMKM9ePFuGIDm8B3MBGYH4m0FqIdQmWdgW04ut6JZvtOVBP+ 0Xg9jCa0W65eZptUKqA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-27_01,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 spamscore=0 malwarescore=0 bulkscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604270068 SC7280 and SC8180X previously shared the same cfg because they did not use swing/pre-emphasis tables. Add the corresponding tables for these platforms. Since they have different PHY sub-versions, their eDP/DP mode tables also differ, so move SC8180X to its own cfg instead of reusing the SC7280 one. Signed-off-by: Yongxing Mou Reviewed-by: Konrad Dybcio --- drivers/phy/qualcomm/phy-qcom-edp.c | 84 +++++++++++++++++++++++++++++++++= ++-- 1 file changed, 80 insertions(+), 4 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy= -qcom-edp.c index 3266026cfe37..3e613b374032 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -165,6 +165,33 @@ static const struct qcom_edp_swing_pre_emph_cfg dp_phy= _swing_pre_emph_cfg_v8 =3D { .pre_emphasis_hbr3_hbr2 =3D &dp_pre_emp_hbr2_hbr3, }; =20 +static const u8 dp_swing_hbr2_hbr3_v2[4][4] =3D { + { 0x27, 0x2f, 0x36, 0xff }, + { 0x31, 0x3e, 0x3f, 0xff }, + { 0x3a, 0x3f, 0xff, 0xff }, + { 0xff, 0xff, 0xff, 0xff } +}; + +static const u8 dp_pre_emp_hbr2_hbr3_v2[4][4] =3D { + { 0x20, 0x2e, 0x35, 0xff }, + { 0x20, 0x2e, 0x35, 0xff }, + { 0x20, 0x2e, 0xff, 0xff }, + { 0xff, 0xff, 0xff, 0xff } +}; + +static const struct qcom_edp_swing_pre_emph_cfg dp_phy_swing_pre_emph_cfg_= v2 =3D { + /* + * NOTE: The HPG does not specify a separate swing_hbr_rbr table. + * Reuse the HBR2/HBR3 table for now. + * + * TODO: Update this once the HPG explicitly defines RBR/HBR swing values. + */ + .swing_hbr_rbr =3D &dp_swing_hbr2_hbr3_v2, + .swing_hbr3_hbr2 =3D &dp_swing_hbr2_hbr3_v2, + .pre_emphasis_hbr_rbr =3D &dp_pre_emp_hbr2_hbr3_v2, + .pre_emphasis_hbr3_hbr2 =3D &dp_pre_emp_hbr2_hbr3_v2, +}; + static const u8 edp_swing_hbr_rbr[4][4] =3D { { 0x07, 0x0f, 0x16, 0x1f }, { 0x0d, 0x16, 0x1e, 0xff }, @@ -208,6 +235,48 @@ static const u8 edp_phy_vco_div_cfg_v4[4] =3D { 0x01, 0x01, 0x02, 0x00, }; =20 +static const u8 edp_pre_emp_hbr_rbr_v2[4][4] =3D { + { 0x05, 0x12, 0x17, 0x1d }, + { 0x05, 0x11, 0x18, 0xff }, + { 0x06, 0x11, 0xff, 0xff }, + { 0x00, 0xff, 0xff, 0xff } +}; + +static const u8 edp_pre_emp_hbr2_hbr3_v2[4][4] =3D { + { 0x0c, 0x15, 0x19, 0x1e }, + { 0x08, 0x15, 0x19, 0xff }, + { 0x0e, 0x14, 0xff, 0xff }, + { 0x0d, 0xff, 0xff, 0xff } +}; + +static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg= _v2 =3D { + .swing_hbr_rbr =3D &edp_swing_hbr_rbr, + .swing_hbr3_hbr2 =3D &edp_swing_hbr2_hbr3, + .pre_emphasis_hbr_rbr =3D &edp_pre_emp_hbr_rbr_v2, + .pre_emphasis_hbr3_hbr2 =3D &edp_pre_emp_hbr2_hbr3_v2, +}; + +static const u8 edp_swing_hbr2_hbr3_v3[4][4] =3D { + { 0x06, 0x11, 0x16, 0x1b }, + { 0x0b, 0x19, 0x1f, 0xff }, + { 0x18, 0x1f, 0xff, 0xff }, + { 0x1f, 0xff, 0xff, 0xff } +}; + +static const u8 edp_pre_emp_hbr2_hbr3_v3[4][4] =3D { + { 0x0c, 0x15, 0x19, 0x1e }, + { 0x09, 0x14, 0x19, 0xff }, + { 0x0f, 0x14, 0xff, 0xff }, + { 0x0d, 0xff, 0xff, 0xff } +}; + +static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg= _v3 =3D { + .swing_hbr_rbr =3D &edp_swing_hbr_rbr, + .swing_hbr3_hbr2 =3D &edp_swing_hbr2_hbr3_v3, + .pre_emphasis_hbr_rbr =3D &edp_pre_emp_hbr_rbr, + .pre_emphasis_hbr3_hbr2 =3D &edp_pre_emp_hbr2_hbr3_v3, +}; + static const u8 edp_phy_aux_cfg_v5[DP_AUX_CFG_SIZE] =3D { 0x00, 0x13, 0xa4, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03, 0x02, 0x02, 0= x00, }; @@ -298,9 +367,6 @@ static int qcom_edp_set_voltages(struct qcom_edp *edp, = const struct phy_configur else cfg =3D edp->cfg->dp_swing_pre_emph_cfg; =20 - if (!cfg) - return 0; - for (i =3D 0; i < dp_opts->lanes; i++) { v_level =3D max(v_level, dp_opts->voltage[i]); p_level =3D max(p_level, dp_opts->pre[i]); @@ -568,6 +634,16 @@ static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cf= g =3D { static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg =3D { .aux_cfg =3D edp_phy_aux_cfg_v4, .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, + .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg, + .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg_v3, + .ver_ops =3D &qcom_edp_phy_ops_v4, +}; + +static const struct qcom_edp_phy_cfg sc8180x_dp_phy_cfg =3D { + .aux_cfg =3D edp_phy_aux_cfg_v4, + .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, + .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg_v2, + .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg_v2, .ver_ops =3D &qcom_edp_phy_ops_v4, }; =20 @@ -1348,7 +1424,7 @@ static const struct of_device_id qcom_edp_phy_match_t= able[] =3D { { .compatible =3D "qcom,glymur-dp-phy", .data =3D &glymur_phy_cfg, }, { .compatible =3D "qcom,sa8775p-edp-phy", .data =3D &sa8775p_dp_phy_cfg, = }, { .compatible =3D "qcom,sc7280-edp-phy", .data =3D &sc7280_dp_phy_cfg, }, - { .compatible =3D "qcom,sc8180x-edp-phy", .data =3D &sc7280_dp_phy_cfg, }, + { .compatible =3D "qcom,sc8180x-edp-phy", .data =3D &sc8180x_dp_phy_cfg, = }, { .compatible =3D "qcom,sc8280xp-dp-phy", .data =3D &sc8280xp_dp_phy_cfg,= }, { .compatible =3D "qcom,sc8280xp-edp-phy", .data =3D &sc8280xp_edp_phy_cf= g, }, { .compatible =3D "qcom,x1e80100-dp-phy", .data =3D &x1e80100_phy_cfg, }, --=20 2.43.0 From nobody Wed Jun 10 19:57:18 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0663C3890F9 for ; Mon, 27 Apr 2026 06:35:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271746; cv=none; b=a+ER/OGBu/rbOr9PWMP56LUTgEa/IxDwEa0nkP4wg3yxcpVJ1/6u69Ke2H/QnVhmlPkoNONOHhw145SZG+im2CD0NVNVhBrDurOLQ4f2InperkoAqzS1xxGjFsopEUIRArI+xjqCVjGr+KRwV2JymD6zVTbnBx7X45/V0CDlqp4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271746; c=relaxed/simple; bh=aO28WQilAxZVtQvI+wCGetkRJaY0+sEy2pV+6FVXyTc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cMjye3jDh9qJKXKZ9tKtlEKdb2m1TvtEc2i7XQMK2b3QofHDlwdr/KvfnEylrK2YA75+8zrT2ldpDcrisJrc6bSb6IfmfFbPK2BuOrHbwCt3PilnSlLSunoNv+z1VMZE5CRHoXPnTzLd92EopdAOipAAG3f0dz6S8s9ZkVnh6Yc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=oARk0f0p; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=gBVWpszm; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="oARk0f0p"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="gBVWpszm" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63QIBtSp2981641 for ; Mon, 27 Apr 2026 06:35:44 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= hiUBwHms4Hb1isi9MNvxSr7/NA/P2eiTLjhGmjdWM4I=; b=oARk0f0pCY8Mf9Hz Fya6UQRmjX6wEXmriNLNQ7YjlHchBZHOKHsWXxPWlzDw2TS7uwQzPhsi1N0SV3f3 Ze53DZRO4zHFg9jvU+wovEAzSdgN8TvEIfGqLNzRa79DZuBVXaAf0uddaKzvuhVh 55r97B+DJjktE0BtKycy3UxenvyhWgUmjR1bwDAToZfW2j6JvX3vZTLaEmS0npa0 k8zmrvTxuTfYyOkLDu2PhuxiraKIqH7ZJ1hV0KfVlbzqj2Lt54tUepgpJ4JH1OI9 pOmakGQHfpZq9driQNNPXi8jd0qeOHiyVw2PxcSn8z1AOF38j5IEuBbtzB5cyTiO 4g/pmg== Received: from mail-qk1-f200.google.com (mail-qk1-f200.google.com [209.85.222.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4drpsgvm8v-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 27 Apr 2026 06:35:44 +0000 (GMT) Received: by mail-qk1-f200.google.com with SMTP id af79cd13be357-8f4ef450191so177105585a.2 for ; Sun, 26 Apr 2026 23:35:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1777271743; x=1777876543; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hiUBwHms4Hb1isi9MNvxSr7/NA/P2eiTLjhGmjdWM4I=; b=gBVWpszmoTZtCrnSFsO0bICrOqJK643kWyO1ushHyyACXwzQwaUF0sJW71UqXHfWnI 6bv21xEzNgDt1Q8Fcmi3Iu1l96gcQPvhalcDoyJH37ok4WTTMYDIfN8d5SDAZAnD/AbN KAG2bsLrd2gTK+2eG/2ppX/ZjknJVHZ1AvKNkhjEcuJOlZioGcUyVZZq/EnlOOd5WA1B ReJc4l5eXsXrw/6dKi4qAHsEYRvaxi6alkwP83X20EaiCrku4qSlz4yztphlbrvAZmCj ru2lZZQABNM/hHJzxyZat53+MvVoxSbYaY8ZNktuzIx7LplS2KmirYdk1c42QDOFLWMH 9dyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777271743; x=1777876543; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=hiUBwHms4Hb1isi9MNvxSr7/NA/P2eiTLjhGmjdWM4I=; b=s7sKddfYH6BhIIOR2b/18NDhBl5uMjoq4NbAozx6LC8DQY3dWFS2/EQcsdrhqcwCnx kN/l8ilN8sSIJ29/rjscveDlJVwAZwVvPPgAsxTE/unSbznAx2qJrbApIMjXLPZSIbFF iN6yEQf1VAvEdjl/YETwyIAG6ZhB+tLjaB2eUXn9rK1oL8UGcge6PMB8CIkqNE0N5sQB eRxFMcMXmgMBcaH5F6DbbZLn0V3pE666YPRmkFSlDLrHqyl23UP6SJgYuFeGyGK7Kt1W elg5Z/wyNwhrgEJrHp7VMZFxob1nCuDB8WOSzGjAP+VYxelnT4jN8eYcd6flflKbhuro IPeQ== X-Forwarded-Encrypted: i=1; AFNElJ9cGynjvmnljKcqO+sqxDErVAbAlrx4KVWWdilUboVe8k1is0mQAdpHQ5GoY/VqqnuEeZf9NHbBPxO5v9w=@vger.kernel.org X-Gm-Message-State: AOJu0YzL+/FxoOsjoG1iKjTJTo3NHZQ+cSwkHwknH6rXf45lKIdsIPUP /K/X8uUpdTnLdRrXsqwZ3Yc/ELFrsw+8WAsEMIiO/ACiVQ/dGKLw7DpqIYbvZxaBnyGDZXrK6oO aVAPN23lwNAUlrvfDVcYpz6T9tS/kU0TqAKDEym005EtAXs7cXfJMhIL7lGoCWPFQ6Lk= X-Gm-Gg: AeBDieveSxpCnx1aWwm430pxN4aRN/ZI1ygjVLKom8jnQM3irw0hjdKaiBQhiyiukKT mMAp+DyIKFoFc/U2kZT89TE15uBA7DmsZ30obDjEoancobtehJ72pg70KO/DJaFqG7tgwhfN1iX pMlRhhtULaufkCNp64JlWh5mCQIHhedPZJ+1EhDIlqwVhxnjkOd2SlLQ3s6tHhgT+qsfmLEZe1d i4vXZTwLvDDaXp85T8ozBticu96IZadqE5W8HmmYpeLl8zmBbtzrFGkzTIzoP+ZDGO80hjfcwQS Q5qpg0Bua0iJM0sUciaAOIOxrh78YIXsiFajFXtl/d0jGvvV+6Shq8SRUZ5Q/NiMRJZOqzdY4gE nNmGE5q21TLR8SK2UPsNd0/8t/Klcy4ppmX3y4lVi1scOg0LGfCkwc+uUbZE2wEeNu5bM9yN/Yw SiamYut96SawAaBX9vRg== X-Received: by 2002:a0c:e003:0:b0:8a2:1149:3337 with SMTP id 6a1803df08f44-8b0280cbac0mr536922126d6.24.1777271743153; Sun, 26 Apr 2026 23:35:43 -0700 (PDT) X-Received: by 2002:a0c:e003:0:b0:8a2:1149:3337 with SMTP id 6a1803df08f44-8b0280cbac0mr536921836d6.24.1777271742775; Sun, 26 Apr 2026 23:35:42 -0700 (PDT) Received: from yongmou2.ap.qualcomm.com (Global_NAT1_IAD_FW.qualcomm.com. [129.46.232.65]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8b02ac7d4e6sm251899256d6.20.2026.04.26.23.35.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Apr 2026 23:35:42 -0700 (PDT) From: Yongxing Mou Date: Mon, 27 Apr 2026 14:35:22 +0800 Subject: [PATCH v5 4/5] phy: qcom: edp: Fix AUX_CFG8 programming for DP mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-edp_phy-v5-4-3bb876824475@oss.qualcomm.com> References: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> In-Reply-To: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Stephen Boyd , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Yongxing Mou , stable@vger.kernel.org, Konrad Dybcio , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777271722; l=1322; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=aO28WQilAxZVtQvI+wCGetkRJaY0+sEy2pV+6FVXyTc=; b=KhT8bRFH9JS6NuUlvP1bcZQMegP1Zye5cxMcaApOj1lBr2zb4OC7W9m2Q7pfbKczPsrAsty3K WxNAK+1XhaKDXx9A2RQ4WZtSERsqPM3AN5McM+OZsqiUec4ko+30Wmf X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-GUID: 34_JsnoVgBpEy1LfYgHuhvLNHwojh9kX X-Proofpoint-ORIG-GUID: 34_JsnoVgBpEy1LfYgHuhvLNHwojh9kX X-Authority-Analysis: v=2.4 cv=Y+fIdBeN c=1 sm=1 tr=0 ts=69ef03c0 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=SO9rCO7GgoKHDwPkKK0A:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI3MDA2OCBTYWx0ZWRfXwn0zjgAXVoLp tHqXyaNlsK+kTzuYyXbvxVEpVdKvg8whgZbpa1EDIOgG0aca8NwLdaQ11sRvNaXolcdlUdxJTMr 89K4Q1RjlY9E/sA4wmOkIjNDsCI6AoYwH0RTTXn4ypFqxIGqfSyvYU/vqRb/yQiPHKHqo5DRI6B NZ1zbI1PHJgIQoLewOOk8R+hcowll0fOTY5jib15n9ywpzg2VHQcUuv+CtDr9fkwcTT9ZFoEPQ7 9AVT5WCf/htIr0rL3d563Z4GwTc22UBMQ4YCwx5++kw7PsC2XcDwHDi6ITyLan0OJAkImVd2dEe qOuCrw9ViD7m723V+rsw7un2+JR7t9Oe8gsDYN3/4mPpwRUpG0WU/z7Nq5zbQ20VAlvAbDRTIQM hu4uhN3e0pe8cNR7TVWFXQM8LGH3JMA2ImpqJTD3RjBi46XbnqUohSpXEwyhvATUXFNgXkGB6TV YJ4EqBV/ObWKJSfLDNQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-27_01,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 suspectscore=0 phishscore=0 adultscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604270068 AUX_CFG8 depends on whether the PHY is operating in eDP or DP mode, not the selected swing/pre-emphasis table. All supported platforms already have the proper tables, so remove the unnecessary check. Cc: stable@vger.kernel.org Fixes: 6078b8ce070c ("phy: qcom: edp: Add set_mode op for configuring eDP/D= P submode") Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Yongxing Mou --- drivers/phy/qualcomm/phy-qcom-edp.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy= -qcom-edp.c index 3e613b374032..3a848f18a8d6 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -325,12 +325,7 @@ static int qcom_edp_phy_init(struct phy *phy) DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, edp->edp + DP_PHY_PD_CTL); =20 - /* - * TODO: Re-work the conditions around setting the cfg8 value - * when more information becomes available about why this is - * even needed. - */ - if (edp->cfg->dp_swing_pre_emph_cfg && !edp->is_edp) + if (!edp->is_edp) aux_cfg[8] =3D 0xb7; =20 writel(0xfc, edp->edp + DP_PHY_MODE); --=20 2.43.0 From nobody Wed Jun 10 19:57:18 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90A81390998 for ; Mon, 27 Apr 2026 06:35:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271752; cv=none; b=p6z/Afy2rdxhBPNOYWp47UBfHiNTUqxMAxHf3pumdJfawWiRPOWuXrEyk+L9c9fTyzB57qBtg5ihz6PfpHIQ7p491jfBkVlrBgMrCLjv4Hsl3zDsUlOopJxdSdiF6CVXBNaW6kTInW1cg4bM/PT3vaoDDQD44ctY4xnZM+ORuWg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777271752; c=relaxed/simple; bh=UJfJbat0WxxGDDgc1J6mpbWkCUWZwu5kiHe5HC0OQjI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dXG7gURj58adqXcR6nZDj4jf0ntSD9c3anzkcJQX2E+1SV96Rkhrf99RDRl91ekdzwRT3Cp9u2KYhUOqq6jTGw/RbNlA5B3gdiFJc0asZeH6ultXB0fol/mKfbW+uP32yMABE0mNCJZREUhi5b8HFvBTUnWSYWqaFgvLlGkQJpU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=nWHbYaTY; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=GUBHb/fq; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="nWHbYaTY"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="GUBHb/fq" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63R30gg21676691 for ; Mon, 27 Apr 2026 06:35:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= F/ivyNBjCAffYDhazIIzpEgKd96rMA5tlEiyp0VgCXE=; b=nWHbYaTYsPIiL0Lj GMbIfoYOYOqWVxTl1lRylN3VIhIpG88pFYMWYBA9isyU7fSAN1UWFZLTfC6/uarK xbxdxtvjUGJUAvo0Ys3aB1g6nOpbivqOQuesWmAAN8kTW3NuwuxfigrlntXeHzO6 sOI4+ve6FKcLCUYGDLsg+oKrimjhPIwWsUW8H1XCz4oRcdwFV0C+LFzfhy1iphTe SX13vIa18nquLulqmHUKZ6rQkWRQmLh3UW3H181l7Q88VgUA4wOF+PWUSnMhwya0 hdCoSpjD84CRRXxnG9OvR5jetgZh98FqKIQELtH0/fMDYeFaMl93EjTsCIEJFutq epQZIw== Received: from mail-qv1-f72.google.com (mail-qv1-f72.google.com [209.85.219.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4drpcdmp9q-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 27 Apr 2026 06:35:48 +0000 (GMT) Received: by mail-qv1-f72.google.com with SMTP id 6a1803df08f44-8b0312bb1dcso248238706d6.1 for ; Sun, 26 Apr 2026 23:35:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1777271748; x=1777876548; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=F/ivyNBjCAffYDhazIIzpEgKd96rMA5tlEiyp0VgCXE=; b=GUBHb/fqYOkOw4eg25NazuNL0Xw2BMrbXcMPbmYje9jrSjOIPsaTrDvvDNm40fJpcv AHUDxQwxu7FKZ0AaZ/04JCX45HvwWgCnQcHsatMHxdBqpl/9Ieiw7y27mNAjqV8uSdri FUjFNYiTmHxqdofV2Lc59kiDlwo1Q9XvhlNNWs8+iERp0iCfjGuNdJ4rmQxrhwqRYIrJ xGPuVBtAKpCALO9PIkC60tW8fFb2GFFDBEYHylYQTdkJSis34omZ+vFigdq0LIqNp3W/ l0FkCK8crqkgOeIMMxb8Dc+85Bm+0cZ++1M98oWmJlWgV1KAnh1VStTOI7hXzA/4mUXQ T4sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777271748; x=1777876548; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=F/ivyNBjCAffYDhazIIzpEgKd96rMA5tlEiyp0VgCXE=; b=Y7u62jc0512QKWW2IX7kkmR3Z4cM5QxF4Qy1cp0ZBMgkXwWxAfsv7Ysu1fAr6WKL2n 2+uclL/FPayf6SNorqzfOoxyesHHOb7yYtViF8geAtPy+ZzzpPQNq0mVcaGEgzsd9kIm uvfUTuKaOCwkGHrQ2KXATDDvDkwZthuWzTJFucpHFqV2TfsnIqFLyDnq4FqsFcsK7zjE ViuC0LNT4VNoIzd9qXxEMgGbm0cEh+FywMuoAui7JxZFloYKe2NXZiG4OqtO78pgeH0O NM5pdVnamhDXQR8eo7m5ixr15mrVIv7yqSY7MuEEbm5AGBLWwbeKOQwO8VlNhdki+45W ddxQ== X-Forwarded-Encrypted: i=1; AFNElJ87LPe7rS44E22Xz1sukREf+cuWj6RZUqBXAs2fyT6QAEt7udFpb3tS77FSDRduZEJx0czE4k5NofRNQwY=@vger.kernel.org X-Gm-Message-State: AOJu0YwviRUPlL27C7zc4GLsuZM8AM//6urxwpfjF8io3UG/5YZyo+Bu auZu9256Kh0/ADvVIThuCZ9Hie8BTHjMzrQWWcn0s59ZgEpHyyNkYFJr8iki1AgTCXByPslunoB dKzu91ddaylAksudWljV2LeTigy6s0jHZoLEhiKZAmMB6p7TnMhiYwARkHImQYY03vrE= X-Gm-Gg: AeBDieuaO1A87Hb9tDnz13ZGCjzX2cbfthPXr8sX2P3khHcvNf1aG2i4BB6gKtH9mN3 MdyGTWJ17GgexJnpEVD8/BEcwujVITwxyURAIxrj0Oi5svWa5eLYevLfg99hLQJR0QCGgWXgaEe gHW86d5X49JWf+kCwto4qarpbOVxJ5xV4i12c0Tls8mDOMd8XbrSBwetBIkRmDJgGdUd3JKjNyC cHJROX/o1za0ya2FU2OADBQAtTP4okLGLOxR/p73dDd0EUMenbrzGumoeiLtvi7xy0bwzBr0RCR 0A9fu/c6lqNxLH3G7IwERYWA633dFyCaErqLqO+41lCqf2bncPE25jd5H2sbQ0mvQBBsWY9ULYt XQvk3O7Gpgkw2S6jTt6CrcuB2OQabqZkIcCtw3yrw5PFFoEXeMkxRb5MbI1Tk/tKLZdIi78LMlb p3HFd2kPn0o1khbJFuew== X-Received: by 2002:a05:6214:21ca:b0:8ac:b1ad:3a24 with SMTP id 6a1803df08f44-8b0280f1d8amr670800826d6.27.1777271747813; Sun, 26 Apr 2026 23:35:47 -0700 (PDT) X-Received: by 2002:a05:6214:21ca:b0:8ac:b1ad:3a24 with SMTP id 6a1803df08f44-8b0280f1d8amr670800476d6.27.1777271747362; Sun, 26 Apr 2026 23:35:47 -0700 (PDT) Received: from yongmou2.ap.qualcomm.com (Global_NAT1_IAD_FW.qualcomm.com. [129.46.232.65]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8b02ac7d4e6sm251899256d6.20.2026.04.26.23.35.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Apr 2026 23:35:46 -0700 (PDT) From: Yongxing Mou Date: Mon, 27 Apr 2026 14:35:23 +0800 Subject: [PATCH v5 5/5] phy: qcom: edp: Add PHY-specific LDO config for eDP low vdiff Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260427-edp_phy-v5-5-3bb876824475@oss.qualcomm.com> References: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> In-Reply-To: <20260427-edp_phy-v5-0-3bb876824475@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Stephen Boyd , Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Yongxing Mou , stable@vger.kernel.org, Dmitry Baryshkov , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1777271722; l=7072; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=UJfJbat0WxxGDDgc1J6mpbWkCUWZwu5kiHe5HC0OQjI=; b=yjUQR8Ti5SxHbjVW1hz6/RIkc1NgYL5wNokw2H+Is6pSidV1e9W2MzProOxrvWxN1W5R80J8D sDkp3K7Xz/ODozi+SKBIC2QAhnKraGBkVbjXMrQ7xNy/vB1or/J9Ghy X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDI3MDA2OCBTYWx0ZWRfXwXfPZgJP1yZJ 5OZQm5UxpbgmiB2zpvXeKT3JNTpS1y3RnvYJ/4p6Vn9bxTaXnV100AAez1p2WrXEP7MmW465a/T KIsbr2LeZneGPr9K8badsPPhhTL1af+U12gEnKZIls8uCkbl9Qcim+ZAp45ec+t7xi8qW3zLeiA tZJSjLOG3eoM51R9s3qnLePTF9perGs9cDD+2V/F0C17b/uyhd7gh9GBoknqFUqAoE3w5ZKWspl GINjECYYUPcotvHvQ+bzS4e+FySZ2xtXWufnMAX0wNuEw2obMvTHlf20bAFCdvBbajzbPRpJIFA ezrdhhd50oiKWTUB3If8LxNuplV4sPxP2ZSdmbQmfpPktbXOYc5PuEZh5pJUzlRDgZTCRee/xpQ cBoeLNYcgca12vlkIef+iQsJA/hpjEzKTGOwmdtqyiYJuHI+dwSZiBytruH1++zNo/63QgPumrT X4SyO7Yy7Hb/mOzAZyg== X-Authority-Analysis: v=2.4 cv=N5IZ0W9B c=1 sm=1 tr=0 ts=69ef03c4 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=Wstf64DO4dhji1mrokQA:9 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-ORIG-GUID: yumeG1claSAW0tlEq2oo8LXhYTcRNrep X-Proofpoint-GUID: yumeG1claSAW0tlEq2oo8LXhYTcRNrep X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-27_01,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 adultscore=0 phishscore=0 impostorscore=0 malwarescore=0 clxscore=1015 suspectscore=0 priorityscore=1501 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604270068 For eDP low vdiff, the LDO setting depends on the PHY version rather than being a simple 0x0 or 0x1 value. Introduce a PHY callback to program the correct LDO setting according to the HPG. Since SC7280/SC8180X uses different LDO settings from SA8775P/SC8280XP, introduce qcom_edp_phy_ops_v3 to keep the LDO setting correct. Cc: stable@vger.kernel.org Fixes: f199223cb490 ("phy: qcom: Introduce new eDP PHY driver") Signed-off-by: Yongxing Mou Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Tested-by: Konrad Dybcio # SC8280XP X13s --- drivers/phy/qualcomm/phy-qcom-edp.c | 88 ++++++++++++++++++++++++++++++++-= ---- 1 file changed, 77 insertions(+), 11 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy= -qcom-edp.c index 3a848f18a8d6..a3c893f72908 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -81,6 +81,7 @@ struct phy_ver_ops { int (*com_clk_fwd_cfg)(const struct qcom_edp *edp); int (*com_configure_pll)(const struct qcom_edp *edp); int (*com_configure_ssc)(const struct qcom_edp *edp); + int (*com_ldo_config)(const struct qcom_edp *edp); }; =20 struct qcom_edp_phy_cfg { @@ -352,7 +353,7 @@ static int qcom_edp_set_voltages(struct qcom_edp *edp, = const struct phy_configur const struct qcom_edp_swing_pre_emph_cfg *cfg; unsigned int v_level =3D 0; unsigned int p_level =3D 0; - u8 ldo_config; + int ret; u8 swing; u8 emph; int i; @@ -378,13 +379,13 @@ static int qcom_edp_set_voltages(struct qcom_edp *edp= , const struct phy_configur if (swing =3D=3D 0xff || emph =3D=3D 0xff) return -EINVAL; =20 - ldo_config =3D edp->is_edp ? 0x0 : 0x1; + ret =3D edp->cfg->ver_ops->com_ldo_config(edp); + if (ret) + return ret; =20 - writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG); writel(swing, edp->tx0 + TXn_TX_DRV_LVL); writel(emph, edp->tx0 + TXn_TX_EMP_POST1_LVL); =20 - writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG); writel(swing, edp->tx1 + TXn_TX_DRV_LVL); writel(emph, edp->tx1 + TXn_TX_EMP_POST1_LVL); =20 @@ -608,6 +609,52 @@ static int qcom_edp_com_configure_pll_v4(const struct = qcom_edp *edp) return 0; } =20 +static int qcom_edp_ldo_config_v3(const struct qcom_edp *edp) +{ + const struct phy_configure_opts_dp *dp_opts =3D &edp->dp_opts; + u32 ldo_config; + + if (!edp->is_edp) + ldo_config =3D 0x0; + else if (dp_opts->link_rate <=3D 2700) + ldo_config =3D 0x81; + else + ldo_config =3D 0x41; + + writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG); + writel(dp_opts->lanes > 2 ? ldo_config : 0x00, edp->tx1 + TXn_LDO_CONFIG); + + return 0; +} + +static int qcom_edp_ldo_config_v4(const struct qcom_edp *edp) +{ + const struct phy_configure_opts_dp *dp_opts =3D &edp->dp_opts; + u32 ldo_config; + + if (!edp->is_edp) + ldo_config =3D 0x0; + else if (dp_opts->link_rate <=3D 2700) + ldo_config =3D 0xc1; + else + ldo_config =3D 0x81; + + writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG); + writel(dp_opts->lanes > 2 ? ldo_config : 0x00, edp->tx1 + TXn_LDO_CONFIG); + + return 0; +} + +static const struct phy_ver_ops qcom_edp_phy_ops_v3 =3D { + .com_power_on =3D qcom_edp_phy_power_on_v4, + .com_resetsm_cntrl =3D qcom_edp_phy_com_resetsm_cntrl_v4, + .com_bias_en_clkbuflr =3D qcom_edp_com_bias_en_clkbuflr_v4, + .com_clk_fwd_cfg =3D qcom_edp_com_clk_fwd_cfg_v4, + .com_configure_pll =3D qcom_edp_com_configure_pll_v4, + .com_configure_ssc =3D qcom_edp_com_configure_ssc_v4, + .com_ldo_config =3D qcom_edp_ldo_config_v3, +}; + static const struct phy_ver_ops qcom_edp_phy_ops_v4 =3D { .com_power_on =3D qcom_edp_phy_power_on_v4, .com_resetsm_cntrl =3D qcom_edp_phy_com_resetsm_cntrl_v4, @@ -615,6 +662,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 =3D= { .com_clk_fwd_cfg =3D qcom_edp_com_clk_fwd_cfg_v4, .com_configure_pll =3D qcom_edp_com_configure_pll_v4, .com_configure_ssc =3D qcom_edp_com_configure_ssc_v4, + .com_ldo_config =3D qcom_edp_ldo_config_v4, }; =20 static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cfg =3D { @@ -631,7 +679,7 @@ static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = =3D { .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg, .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg_v3, - .ver_ops =3D &qcom_edp_phy_ops_v4, + .ver_ops =3D &qcom_edp_phy_ops_v3, }; =20 static const struct qcom_edp_phy_cfg sc8180x_dp_phy_cfg =3D { @@ -639,7 +687,7 @@ static const struct qcom_edp_phy_cfg sc8180x_dp_phy_cfg= =3D { .vco_div_cfg =3D edp_phy_vco_div_cfg_v4, .dp_swing_pre_emph_cfg =3D &dp_phy_swing_pre_emph_cfg_v2, .edp_swing_pre_emph_cfg =3D &edp_phy_swing_pre_emph_cfg_v2, - .ver_ops =3D &qcom_edp_phy_ops_v4, + .ver_ops =3D &qcom_edp_phy_ops_v3, }; =20 static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg =3D { @@ -824,6 +872,24 @@ static int qcom_edp_com_configure_pll_v6(const struct = qcom_edp *edp) return 0; } =20 +static int qcom_edp_ldo_config_v6(const struct qcom_edp *edp) +{ + const struct phy_configure_opts_dp *dp_opts =3D &edp->dp_opts; + u32 ldo_config; + + if (!edp->is_edp) + ldo_config =3D 0x0; + else if (dp_opts->link_rate <=3D 2700) + ldo_config =3D 0x51; + else + ldo_config =3D 0x91; + + writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG); + writel(dp_opts->lanes > 2 ? ldo_config : 0x00, edp->tx1 + TXn_LDO_CONFIG); + + return 0; +} + static const struct phy_ver_ops qcom_edp_phy_ops_v6 =3D { .com_power_on =3D qcom_edp_phy_power_on_v6, .com_resetsm_cntrl =3D qcom_edp_phy_com_resetsm_cntrl_v6, @@ -831,6 +897,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v6 =3D= { .com_clk_fwd_cfg =3D qcom_edp_com_clk_fwd_cfg_v4, .com_configure_pll =3D qcom_edp_com_configure_pll_v6, .com_configure_ssc =3D qcom_edp_com_configure_ssc_v6, + .com_ldo_config =3D qcom_edp_ldo_config_v6, }; =20 static struct qcom_edp_phy_cfg x1e80100_phy_cfg =3D { @@ -1011,6 +1078,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v8 = =3D { .com_clk_fwd_cfg =3D qcom_edp_com_clk_fwd_cfg_v8, .com_configure_pll =3D qcom_edp_com_configure_pll_v8, .com_configure_ssc =3D qcom_edp_com_configure_ssc_v8, + .com_ldo_config =3D qcom_edp_ldo_config_v6, }; =20 static struct qcom_edp_phy_cfg glymur_phy_cfg =3D { @@ -1026,7 +1094,6 @@ static int qcom_edp_phy_power_on(struct phy *phy) const struct qcom_edp *edp =3D phy_get_drvdata(phy); u32 bias0_en, drvr0_en, bias1_en, drvr1_en; unsigned long pixel_freq; - u8 ldo_config =3D 0x0; int ret; u32 val; u8 cfg1; @@ -1035,11 +1102,10 @@ static int qcom_edp_phy_power_on(struct phy *phy) if (ret) return ret; =20 - if (edp->cfg->edp_swing_pre_emph_cfg && !edp->is_edp) - ldo_config =3D 0x1; + ret =3D edp->cfg->ver_ops->com_ldo_config(edp); + if (ret) + return ret; =20 - writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG); - writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG); writel(0x00, edp->tx0 + TXn_LANE_MODE_1); writel(0x00, edp->tx1 + TXn_LANE_MODE_1); =20 --=20 2.43.0