From nobody Fri Jun 19 09:30:50 2026 Received: from mout-p-101.mailbox.org (mout-p-101.mailbox.org [80.241.56.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86F20288AD; Sat, 25 Apr 2026 23:38:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.241.56.151 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777160337; cv=none; b=ejTvLH95CYprpIQovRt8Wmq8v5S7rb9eHJxQSWt2KmS6tGN79xp8Wv2SLgY5oYoxNRMQZUmWYXJFDst/lKsJGbPIA3W9GLaanYUlGe2dpFH7OSVtW6jo6Zsp7LTKPtLkvc17UU3tYO/PNkpZ1VWUhOSIIJtsFYXluYmUXXpZOCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777160337; c=relaxed/simple; bh=kfOjTCZ/WD/9yCW5AWc3k+LiKZnkPI4OkmQxEMM0K5g=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=sPgn3zlPt7RHuF6U6Hn9N3CL5CMYrUtdPjCgIiQGPV/Wo6KQ6eYZZBMwwbtVDd4ej957/CC/38EqlHhzvV3bwCYz5Z1aY7I0BpaFZVMl2wYzBJ1h+20LPhDpG/J7KMxojeM6orz4wHBwdQchY9Jefr/S/OaqwyKEjFJS5v7saBo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org; spf=pass smtp.mailfrom=mailbox.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=AurzOrSo; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b=g6eecBUm; arc=none smtp.client-ip=80.241.56.151 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=mailbox.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mailbox.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="AurzOrSo"; dkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org header.b="g6eecBUm" Received: from smtp1.mailbox.org (smtp1.mailbox.org [10.196.197.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-101.mailbox.org (Postfix) with ESMTPS id 4g35rD3DHSz9tf7; Sun, 26 Apr 2026 01:38:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1777160332; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=sAz7g1dUi5hi0b+215Mn7DEKA29E+hd6TPfNhohZZAY=; b=AurzOrSojFAvdt1g48mMPvzZRwJFPN3kNgApXaR80getd4hrWqwvXxyDdvG16Q9a0sAK1Z bqL2MH2bHvdKrz4zaBbcXy9/OdrYIXLL3fJ4Eg0v2IWxpGc+zt1ZY4K2Fsi2Y0dbaT0ILT HV8ceUr3xQO11jO8im3cwZ/ZrErA3IAGzjjOOJqWV3DY8xQrTPDWrkNyv9/KjUiweFEuDS M280Ce6Q42MFvPjhkVuNPYoBzdXsRZgc5pXTVPNf/ISVgceWMR2OMXXJAB2+pbtFrANylE MkNkd9dfwaYCxVHDUmBpDMeg3eRP9GQNofcm6C4e9hHBXrDiS0SviLJQb1K9pQ== From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1777160331; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=sAz7g1dUi5hi0b+215Mn7DEKA29E+hd6TPfNhohZZAY=; b=g6eecBUmvcWtI59d4IpWU1TpbMNTB5i+jzsa0jQE+2d6U9w8EmjsR+UdJRkTGA6quZgmOn oRYXLTiYA0Wo5/1tQkoOTfnYX48hN1/bcrk1FhFJxnFHYBbU2wkrCIDvHfCTne02qw4Vrl 1XP4qfWugCp1YNBdBpxSCJEYp3VXmN3nytWSiYPhO+fawEJZlTlIqhV7zqAphqUEXmBHxx SqGSW1weZXcTcCPU6jNBHRhKFivMNjJDXppqyBXE4xfEYBQN8NjA7P7fgIG21wV86z7tBc p0gHhGhpmRSAjOVcxM/4oUJ/h421aZM1QFV2CsTT6dKRyUIKFf3j1v9j22TCGw== To: linux-pci@vger.kernel.org Cc: Marek Vasut , stable@vger.kernel.org, =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Geert Uytterhoeven , Koichiro Den , Lorenzo Pieralisi , Magnus Damm , Manivannan Sadhasivam , Rob Herring , Yoshihiro Shimoda , linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH] PCI: rcar-gen4: Limit Max_Read_Request_Size and Max_Payload_Size to 256 Bytes Date: Sun, 26 Apr 2026 01:38:28 +0200 Message-ID: <20260425233845.459175-1-marek.vasut+renesas@mailbox.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MBO-RS-ID: 457bd6f4a564d15300f X-MBO-RS-META: r11zh8f91w5eo8fpxks54nrjtcmwxayk R-Car Gen4 PCIe controller has a hardware limitation of 256 Bytes maximum payload size. The PCIe DMA generates requests of size up to minimum(Max_Read_Request_Size, Max_Payload_Size). Force limit both Max_Read_Request_Size and Max_Payload_Size to 256 Bytes and propagate this limit to all downstream devices. This limitation can be triggered for example by using an NVMe SSD which does not use host memory buffer, Samsung 980 PRO is such an SSD. Affected SSD reports 'hmpre' field as 0: " $ nvme id-ctrl /dev/nvme0 | grep hmpre hmpre : 0 " The symptom is a read from the SSD which wraps around at 256 Byte boundary. The test for this symptom can be implemented by writing 512 Byte of random data into the SSD and reading the data back. If the read back data repeat after 256 Bytes, the device is affected. " $ dd if=3D/dev/urandom of=3D/tmp/data.bin bs=3D256 count=3D2 \ dd if=3D/tmp/data.bin of=3D/dev/nvme0n1 bs=3D256 count=3D2 \ dd if=3D/dev/nvme0n1 bs=3D256 count=3D2 of=3D/tmp/readback.bin " Expected data: " $ hexdump -vC /tmp/data.bin 00000000 97 81 b7 3b 0e 38 2b 4d a7 d3 e0 47 ff c2 4b ca 00000010 c1 85 98 f0 4a ac 03 a0 3b ab f3 19 44 dd 06 8b ... 00000100 7a ce 3c b2 e1 d5 d9 11 88 63 10 59 76 3c dc 32 <-- random 00000110 72 32 2a 7d a3 e1 aa 13 7c da 58 a1 7b 21 11 50 <-- data " Faulty readback, collected without this change in place: " $ hexdump -vC /tmp/readback.bin 00000000 97 81 b7 3b 0e 38 2b 4d a7 d3 e0 47 ff c2 4b ca <---. 00000010 c1 85 98 f0 4a ac 03 a0 3b ab f3 19 44 dd 06 8b <-. | ... | | 00000100 97 81 b7 3b 0e 38 2b 4d a7 d3 e0 47 ff c2 4b ca <-:-+- repeated 00000110 c1 85 98 f0 4a ac 03 a0 3b ab f3 19 44 dd 06 8b <-+--- data ^^^ | '--- Repeat starts at offset 0x100 =3D 256 Bytes " Fixes: 0d0c551011df ("PCI: rcar-gen4: Add R-Car Gen4 PCIe controller suppor= t for host mode") Cc: stable@vger.kernel.org Signed-off-by: Marek Vasut --- Cc: "Krzysztof Wilczy=C5=84ski" Cc: Bjorn Helgaas Cc: Geert Uytterhoeven Cc: Koichiro Den Cc: Lorenzo Pieralisi Cc: Magnus Damm Cc: Manivannan Sadhasivam Cc: Rob Herring Cc: Yoshihiro Shimoda Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org --- drivers/pci/controller/dwc/pcie-rcar-gen4.c | 56 +++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/cont= roller/dwc/pcie-rcar-gen4.c index 8b03c42f8c84c..82f0a074a71da 100644 --- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c +++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c @@ -576,6 +576,7 @@ static int r8a779f0_pcie_ltssm_control(struct rcar_gen4= _pcie *rcar, bool enable) static void rcar_gen4_pcie_additional_common_init(struct rcar_gen4_pcie *r= car) { struct dw_pcie *dw =3D &rcar->dw; + u16 offset =3D dw_pcie_find_capability(dw, PCI_CAP_ID_EXP); u32 val; =20 val =3D dw_pcie_readl_dbi(dw, PCIE_PORT_LANE_SKEW); @@ -584,11 +585,66 @@ static void rcar_gen4_pcie_additional_common_init(str= uct rcar_gen4_pcie *rcar) val |=3D BIT(6); dw_pcie_writel_dbi(dw, PCIE_PORT_LANE_SKEW, val); =20 + val =3D dw_pcie_readl_dbi(dw, offset + PCI_EXP_DEVCTL); + val &=3D ~(PCI_EXP_DEVCTL_PAYLOAD | PCI_EXP_DEVCTL_READRQ); + val |=3D PCI_EXP_DEVCTL_PAYLOAD_256B | PCI_EXP_DEVCTL_READRQ_256B; + dw_pcie_writel_dbi(dw, offset + PCI_EXP_DEVCTL, val); + val =3D readl(rcar->base + PCIEPWRMNGCTRL); val |=3D APP_CLK_REQ_N | APP_CLK_PM_EN; writel(val, rcar->base + PCIEPWRMNGCTRL); } =20 +static void rcar_gen4_rc_pcie_quirk(struct pci_dev *dev) +{ + static const struct pci_device_id rcar_gen4_pcie_rc_devid =3D { + PCI_DEVICE(PCI_VENDOR_ID_RENESAS, 0x0030), + .class =3D PCI_CLASS_BRIDGE_PCI_NORMAL, .class_mask =3D ~0 + }; + struct pci_bus *bus =3D dev->bus; + struct pci_dev *bridge; + + if (pci_is_root_bus(bus)) + bridge =3D dev; + + /* Look for the host bridge */ + while (!pci_is_root_bus(bus)) { + bridge =3D bus->self; + bus =3D bus->parent; + } + + if (!bridge) + return; + + if (!pci_match_one_device(&rcar_gen4_pcie_rc_devid, bridge)) + return; + + /* + * R-Car Gen4 PCIe controller has a hardware limitation of 256 Bytes + * maximum payload size. The PCIe DMA generates requests of size up + * to minimum(Max_Read_Request_Size, Max_Payload_Size). Force limit + * both Max_Read_Request_Size and Max_Payload_Size to 256 Bytes and + * propagate this limit to all downstream devices. + * + * For details, refer to: + * R-Car S4 R19UH0161EJ0130 Rev.1.30 Jun. 16, 2025 or + * R-Car V4H R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 or + * R-Car V4M R19UH0217EJ0100 Rev.1.00 Dec. 12, 2025, + * chapters 104.1.1 Features and 104.3.9 DMA Transfer + * section DMA Read Transfer. + */ + if (pcie_get_readrq(dev) > 256) { + dev_info(&dev->dev, "Limiting MRRS to 256 bytes\n"); + pcie_set_readrq(dev, 256); + } + + if (pcie_get_mps(dev) > 256) { + dev_info(&dev->dev, "Limiting MPS to 256 bytes\n"); + pcie_set_mps(dev, 256); + } +} +DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, rcar_gen4_rc_pcie_quirk); + static void rcar_gen4_pcie_phy_reg_update_bits(struct rcar_gen4_pcie *rcar, u32 offset, u32 mask, u32 val) { --=20 2.53.0