From nobody Wed Jun 17 01:50:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2511E1DE894; Sat, 25 Apr 2026 00:59:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777078787; cv=none; b=mV15pBHNeLUms6Bsy/Dd4wbPDrTJSmb6cR416Y6AnqhIZXzZ1oR6KKoKrUP833PiWrtDIlsTdWhLt3TqBf/tuIwKxOSgn4fcA7U6rlo8jMavd5W7noSJkDTJdQKTmtvcTn4MWumq0j9F0gtEiEzTCRRI+HwpppBJOagqwx1kRrg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777078787; c=relaxed/simple; bh=cERsT3FzaAmTn0XF4uxIOLVAlPMEYfFsUqX/c6wlcfg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PIVQ5wMwZ92MGvHL7nXtpODL3HYZd6hyM+ad7Gpp9hHjoz91EI1kxa8Lm+zu6OfX6OjgiPXQl/PQfEunAShffJoAQ4Awl1I8AL9GtAEMms1Wbs5dDxuRZXwHpnYp/jdsu0Q6EZtfw6qpFOC3yxAsybVZvvw29n3L21iFFE3/rBg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mGjRELfo; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mGjRELfo" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 20A07C4AF09; Sat, 25 Apr 2026 00:59:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777078787; bh=cERsT3FzaAmTn0XF4uxIOLVAlPMEYfFsUqX/c6wlcfg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mGjRELfo7XWL9qHq5ylh6aclUwW/sJetbl2K/qhuO2k1euJ9vGRQFrEkvL6U848iy 3ci7xTEhydCrgj3UXsvRX+tWbe73FMLL/Z58JnTtDWfUzShbW+EfaSR87jljlaEFtZ S3mvJxY5T8DWw1XybYwLy8jPCJlpEweZtxB9M/PgE3KbO0O7QjOC9GVLSzM1T5SBz5 G6tVeCSKrP/+r1uvIhVbNHeebv4V5l7vkjPIiVZ+B4RR0IYypjRf3wdgP8xR2ErWWn kVMOZw6Rb7tB85DpBIf6lEpsb8IeUPlSiR5bThkD6B0roMe4QGhDq08Cv4HeAMET5g YBwOBxJjmBNWQ== From: guoren@kernel.org To: guoren@kernel.org Cc: alex@ghiti.fr, anup@brainfault.org, aou@eecs.berkeley.edu, atish.patra@linux.dev, cp0613@linux.alibaba.com, fangyu.yu@linux.alibaba.com, gaohan@iscas.ac.cn, inochiama@gmail.com, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, me@ziyao.cc, palmer@dabbelt.com, pjw@kernel.org, tglx@kernel.org Subject: [PATCH V2 1/4] RISC-V: KVM: AIA: Make HGEI number and management fully per-CPU Date: Sat, 25 Apr 2026 00:59:13 +0000 Message-ID: <20260425005916.3321811-2-guoren@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260425005916.3321811-1-guoren@kernel.org> References: <20260425005916.3321811-1-guoren@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Guo Ren (Alibaba DAMO Academy)" Previously the number of Hypervisor Guest External Interrupt (HGEI) lines was stored in a single global variable `kvm_riscv_aia_nr_hgei` and assumed to be the same for all HARTs. This assumption does not hold on heterogeneous RISC-V SoCs where different cores may expose different HGEIE CSR widths. Introduce `nr_hgei` field into the per-CPU `struct aia_hgei_control` and probe the actual supported HGEI count for the current HART in `kvm_riscv_aia_enable()` using the standard RISC-V CSR probe technique: csr_write(CSR_HGEIE, -1UL); nr =3D fls_long(csr_read(CSR_HGEIE)); if (nr) nr--; All HGEI allocation, free and disable paths (`kvm_riscv_aia_free_hgei()`, `kvm_riscv_aia_disable()`, etc.) now use the per-CPU value instead of the global one. The early global `kvm_riscv_aia_nr_hgei` is kept only for deciding whether SGEI interrupt registration is needed; the real per-HART initialization of lock and free_bitmap is moved to enable time. This makes KVM AIA robust on big.LITTLE-style and multi-vendor asymmetric platforms. Signed-off-by: Guo Ren (Alibaba DAMO Academy) --- arch/riscv/kvm/aia.c | 40 ++++++++++++++++++++++++---------------- 1 file changed, 24 insertions(+), 16 deletions(-) diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 5ec503288555..a23729052cfb 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -23,6 +23,7 @@ struct aia_hgei_control { raw_spinlock_t lock; unsigned long free_bitmap; struct kvm_vcpu *owners[BITS_PER_LONG]; + unsigned int nr_hgei; }; static DEFINE_PER_CPU(struct aia_hgei_control, aia_hgei); static int hgei_parent_irq; @@ -452,7 +453,7 @@ void kvm_riscv_aia_free_hgei(int cpu, int hgei) =20 raw_spin_lock_irqsave(&hgctrl->lock, flags); =20 - if (hgei > 0 && hgei <=3D kvm_riscv_aia_nr_hgei) { + if (hgei > 0 && hgei <=3D hgctrl->nr_hgei) { if (!(hgctrl->free_bitmap & BIT(hgei))) { hgctrl->free_bitmap |=3D BIT(hgei); hgctrl->owners[hgei] =3D NULL; @@ -486,21 +487,8 @@ static irqreturn_t hgei_interrupt(int irq, void *dev_i= d) =20 static int aia_hgei_init(void) { - int cpu, rc; + int rc; struct irq_domain *domain; - struct aia_hgei_control *hgctrl; - - /* Initialize per-CPU guest external interrupt line management */ - for_each_possible_cpu(cpu) { - hgctrl =3D per_cpu_ptr(&aia_hgei, cpu); - raw_spin_lock_init(&hgctrl->lock); - if (kvm_riscv_aia_nr_hgei) { - hgctrl->free_bitmap =3D - BIT(kvm_riscv_aia_nr_hgei + 1) - 1; - hgctrl->free_bitmap &=3D ~BIT(0); - } else - hgctrl->free_bitmap =3D 0; - } =20 /* Skip SGEI interrupt setup for zero guest external interrupts */ if (!kvm_riscv_aia_nr_hgei) @@ -545,9 +533,29 @@ static void aia_hgei_exit(void) =20 void kvm_riscv_aia_enable(void) { + struct aia_hgei_control *hgctrl; + if (!kvm_riscv_aia_available()) return; =20 + hgctrl =3D this_cpu_ptr(&aia_hgei); + + /* Figure-out number of bits in HGEIE */ + csr_write(CSR_HGEIE, -1UL); + hgctrl->nr_hgei =3D fls_long(csr_read(CSR_HGEIE)); + csr_write(CSR_HGEIE, 0); + if (hgctrl->nr_hgei) + hgctrl->nr_hgei--; + + if (hgctrl->nr_hgei) { + hgctrl->free_bitmap =3D BIT(hgctrl->nr_hgei + 1) - 1; + hgctrl->free_bitmap &=3D ~BIT(0); + } else { + hgctrl->free_bitmap =3D 0; + } + + raw_spin_lock_init(&hgctrl->lock); + csr_write(CSR_HVICTL, aia_hvictl_value(false)); csr_write(CSR_HVIPRIO1, 0x0); csr_write(CSR_HVIPRIO2, 0x0); @@ -588,7 +596,7 @@ void kvm_riscv_aia_disable(void) =20 raw_spin_lock_irqsave(&hgctrl->lock, flags); =20 - for (i =3D 0; i <=3D kvm_riscv_aia_nr_hgei; i++) { + for (i =3D 0; i <=3D hgctrl->nr_hgei; i++) { vcpu =3D hgctrl->owners[i]; if (!vcpu) continue; --=20 2.43.0 From nobody Wed Jun 17 01:50:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B9A781DE894; Sat, 25 Apr 2026 00:59:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777078791; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777078791; bh=qJflKuAh/n/m965x+f/wDzFNfhoMXFcBLlCylFjbZyk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LoLW64A9/zxlX08Uz3CvBNE5wF8jGEs5SzbJx+E5ncuk4yXsIWon+rnaHXGSL6y89 6NR+JfhQdDCu/UwJzrQWTpDCvrn30WBh834gWgKFumnvz90WofOUY+lLs4VXctPCBZ ivbmOV5th+04bc/B43ITBsvcx7m4JMgNspAoy9CKVahNbR+AGAAU72i+d7L6J8f9AZ UARNwI0khfCs86K/wiMAB+L6qItRb7t0pmNChJ8LRuku8mMKiOKe7i09dRJ7UHEK0h LsdLS4OYNlYFJznB+Y8+mbYGoLs3IH7OcefJ8EQpbSv7BNRkqdEnMNGnp34nU1oGn2 N+VLDth9ceL1Q== From: guoren@kernel.org To: guoren@kernel.org Cc: alex@ghiti.fr, anup@brainfault.org, aou@eecs.berkeley.edu, atish.patra@linux.dev, cp0613@linux.alibaba.com, fangyu.yu@linux.alibaba.com, gaohan@iscas.ac.cn, inochiama@gmail.com, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, me@ziyao.cc, palmer@dabbelt.com, pjw@kernel.org, tglx@kernel.org Subject: [PATCH V2 2/4] RISC-V: KVM: AIA: Replace global HGEI count with simple enabled bool Date: Sat, 25 Apr 2026 00:59:14 +0000 Message-ID: <20260425005916.3321811-3-guoren@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260425005916.3321811-1-guoren@kernel.org> References: <20260425005916.3321811-1-guoren@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Guo Ren (Alibaba DAMO Academy)" Now that HGEI line management is fully per-CPU (via struct aia_hgei_control::nr_hgei), the global `kvm_riscv_aia_nr_hgei` is no longer needed. Replace it with a simple `bool kvm_riscv_aia_hgei_enabled` that only indicates whether HGEI support is available at all. Signed-off-by: Guo Ren (Alibaba DAMO Academy) --- arch/riscv/include/asm/kvm_aia.h | 2 +- arch/riscv/kvm/aia.c | 18 ++++++++---------- arch/riscv/kvm/aia_device.c | 4 ++-- arch/riscv/kvm/main.c | 3 +-- 4 files changed, 12 insertions(+), 15 deletions(-) diff --git a/arch/riscv/include/asm/kvm_aia.h b/arch/riscv/include/asm/kvm_= aia.h index b04ecdd1a860..e8749ac6bed7 100644 --- a/arch/riscv/include/asm/kvm_aia.h +++ b/arch/riscv/include/asm/kvm_aia.h @@ -79,7 +79,7 @@ struct kvm_vcpu_aia { =20 #define irqchip_in_kernel(k) ((k)->arch.aia.in_kernel) =20 -extern unsigned int kvm_riscv_aia_nr_hgei; +extern bool kvm_riscv_aia_hgei_enabled; extern unsigned int kvm_riscv_aia_max_ids; DECLARE_STATIC_KEY_FALSE(kvm_riscv_aia_available); #define kvm_riscv_aia_available() \ diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index a23729052cfb..70ff1d25dd99 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -28,7 +28,7 @@ struct aia_hgei_control { static DEFINE_PER_CPU(struct aia_hgei_control, aia_hgei); static int hgei_parent_irq; =20 -unsigned int kvm_riscv_aia_nr_hgei; +bool kvm_riscv_aia_hgei_enabled; unsigned int kvm_riscv_aia_max_ids; DEFINE_STATIC_KEY_FALSE(kvm_riscv_aia_available); =20 @@ -491,7 +491,7 @@ static int aia_hgei_init(void) struct irq_domain *domain; =20 /* Skip SGEI interrupt setup for zero guest external interrupts */ - if (!kvm_riscv_aia_nr_hgei) + if (!kvm_riscv_aia_hgei_enabled) goto skip_sgei_interrupt; =20 /* Find INTC irq domain */ @@ -524,7 +524,7 @@ static int aia_hgei_init(void) static void aia_hgei_exit(void) { /* Do nothing for zero guest external interrupts */ - if (!kvm_riscv_aia_nr_hgei) + if (!kvm_riscv_aia_hgei_enabled) return; =20 /* Free per-CPU SGEI interrupt */ @@ -631,6 +631,7 @@ int kvm_riscv_aia_init(void) { int rc; const struct imsic_global_config *gc; + unsigned int kvm_riscv_aia_nr_hgei; =20 if (!riscv_isa_extension_available(NULL, SxAIA)) return -ENODEV; @@ -641,21 +642,18 @@ int kvm_riscv_aia_init(void) kvm_riscv_aia_nr_hgei =3D fls_long(csr_read(CSR_HGEIE)); csr_write(CSR_HGEIE, 0); if (kvm_riscv_aia_nr_hgei) - kvm_riscv_aia_nr_hgei--; + kvm_riscv_aia_hgei_enabled =3D true; =20 /* * Number of usable HGEI lines should be minimum of per-HART * IMSIC guest files and number of bits in HGEIE */ - if (gc) - kvm_riscv_aia_nr_hgei =3D min((ulong)kvm_riscv_aia_nr_hgei, - gc->nr_guest_files); - else - kvm_riscv_aia_nr_hgei =3D 0; + if (!gc) + kvm_riscv_aia_hgei_enabled =3D 0; =20 /* Find number of guest MSI IDs */ kvm_riscv_aia_max_ids =3D IMSIC_MAX_ID; - if (gc && kvm_riscv_aia_nr_hgei) + if (gc && kvm_riscv_aia_hgei_enabled) kvm_riscv_aia_max_ids =3D gc->nr_guest_ids + 1; =20 /* Initialize guest external interrupt line management */ diff --git a/arch/riscv/kvm/aia_device.c b/arch/riscv/kvm/aia_device.c index 3d1e81e2a36b..5b45b1114425 100644 --- a/arch/riscv/kvm/aia_device.c +++ b/arch/riscv/kvm/aia_device.c @@ -71,7 +71,7 @@ static int aia_config(struct kvm *kvm, unsigned long type, * external interrupts (i.e. non-zero * VS-level IMSIC pages). */ - if (!kvm_riscv_aia_nr_hgei) + if (!kvm_riscv_aia_hgei_enabled) return -EINVAL; break; default: @@ -628,7 +628,7 @@ void kvm_riscv_aia_init_vm(struct kvm *kvm) */ =20 /* Initialize default values in AIA global context */ - aia->mode =3D (kvm_riscv_aia_nr_hgei) ? + aia->mode =3D (kvm_riscv_aia_hgei_enabled) ? KVM_DEV_RISCV_AIA_MODE_AUTO : KVM_DEV_RISCV_AIA_MODE_EMUL; aia->nr_ids =3D kvm_riscv_aia_max_ids - 1; aia->nr_sources =3D 0; diff --git a/arch/riscv/kvm/main.c b/arch/riscv/kvm/main.c index cb8a65273c1f..bcfa139f4871 100644 --- a/arch/riscv/kvm/main.c +++ b/arch/riscv/kvm/main.c @@ -169,8 +169,7 @@ static int __init riscv_kvm_init(void) kvm_info("VMID %ld bits available\n", kvm_riscv_gstage_vmid_bits()); =20 if (kvm_riscv_aia_available()) - kvm_info("AIA available with %d guest external interrupts\n", - kvm_riscv_aia_nr_hgei); + kvm_info("AIA available with guest external interrupts\n"); =20 kvm_riscv_setup_vendor_features(); =20 --=20 2.43.0 From nobody Wed Jun 17 01:50:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E3E51E7C2E; Sat, 25 Apr 2026 00:59:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777078796; cv=none; b=TLvn5MqNzMbXgHqrp56Cd0zkBF7HmZEFEXOX2Zopq0pHtN24uBfANAxEz/Mhar11y9805YNjYNXdvWW2sy2WIixxpJCN+cH+XRDcAX3E9gCMKkQyS6ALRI+xSLHwxl5zjFxoy7iOKJmhrXZbhbFwAJ9ZA5wdM0ozDeCUGsRNc9s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777078796; c=relaxed/simple; bh=7uQ0gjeqEPD6nPlkRBOxKlYHRuy/F0gDZ8rMmS8aYzE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZO2q+CpXGG8TzXhz0mjjlzckOuzlpfZx+GuZHJFn2nf2JyqFYferv6YIbCRMrZbAsKz2/HTefq4hVJgokqk4mm2upcf7ld6+rVCf3LiZlNI48mrKCFgW7AMAzS96059lIvIIad7s19uhwJfQGT2tksxiNMN2Omcf4VjBMZHPd40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=iVR8FtSh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="iVR8FtSh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D4BAAC2BCB5; Sat, 25 Apr 2026 00:59:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777078795; bh=7uQ0gjeqEPD6nPlkRBOxKlYHRuy/F0gDZ8rMmS8aYzE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iVR8FtShNzdaxPaI5u0kaR0SDRKtyeuyA0azvOPHDlNXRRDcCYZ1WMk4SzB4nuyN2 ScIpNayyJLSYkFEXP0qIBwGRCGQ9Yufhp7UBtIzYj7wg2PFsLM7N84fRIA9MaIp7sz mxHKuswu/FhIDWcGI8fTfF2cACfGiCOd/e/nxbSMNWWhitRTRX5UVPoJzWDo3N+dZX SJB2sjmMlGggVJE1HRZtx41I/j3Cno1cGW4aCwxLQkSJf1uaIOd7RcaDlbPLFtb2am 6V5TXLmroYqxvjDheBh7EN03+Zelu15yyfHmSUL00bBUecK/8lp07xUb4lxU/EhqnD caINHRMDPIQAQ== From: guoren@kernel.org To: guoren@kernel.org Cc: alex@ghiti.fr, anup@brainfault.org, aou@eecs.berkeley.edu, atish.patra@linux.dev, cp0613@linux.alibaba.com, fangyu.yu@linux.alibaba.com, gaohan@iscas.ac.cn, inochiama@gmail.com, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, me@ziyao.cc, palmer@dabbelt.com, pjw@kernel.org, tglx@kernel.org Subject: [PATCH V2 3/4] irqchip/riscv-imsic: Move nr_guest_files to per-HART local config Date: Sat, 25 Apr 2026 00:59:15 +0000 Message-ID: <20260425005916.3321811-4-guoren@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260425005916.3321811-1-guoren@kernel.org> References: <20260425005916.3321811-1-guoren@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Guo Ren (Alibaba DAMO Academy)" With the recent KVM AIA per-HART HGEI conversion, the global nr_guest_files is no longer appropriate. Different HARTs in heterogeneous SoCs may have different numbers of guest interrupt files. Move `nr_guest_files` from `struct imsic_global_config` to `struct imsic_local_config`, and compute it per-CPU in imsic_setup_state() based on the actual MMIO guest file region size. Update the related comment to reflect that KVM now uses the per-HART value. This eliminates the last global assumption about guest files and completes the per-HART conversion series for RISC-V AIA/IMSIC. Signed-off-by: Guo Ren (Alibaba DAMO Academy) Acked-by: Thomas Gleixner --- drivers/irqchip/irq-riscv-imsic-state.c | 10 ++++++---- include/linux/irqchip/riscv-imsic.h | 6 +++--- 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/irqchip/irq-riscv-imsic-state.c b/drivers/irqchip/irq-= riscv-imsic-state.c index e3ed874d89e7..f01525362cf7 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.c +++ b/drivers/irqchip/irq-riscv-imsic-state.c @@ -878,7 +878,6 @@ int __init imsic_setup_state(struct fwnode_handle *fwno= de, void *opaque) } =20 /* Configure handlers for target CPUs */ - global->nr_guest_files =3D BIT(global->guest_index_bits) - 1; for (i =3D 0; i < nr_parent_irqs; i++) { rc =3D imsic_get_parent_hartid(fwnode, i, &hartid); if (rc) { @@ -910,23 +909,26 @@ int __init imsic_setup_state(struct fwnode_handle *fw= node, void *opaque) reloff -=3D ALIGN(resource_size(&mmios[j]), BIT(global->guest_index_bits) * IMSIC_MMIO_PAGE_SZ); } + + local =3D per_cpu_ptr(global->local, cpu); + local->nr_guest_files =3D BIT(global->guest_index_bits) - 1; + if (index >=3D nr_mmios) { pr_warn("%pfwP: MMIO not found for parent irq%d\n", fwnode, i); continue; } =20 - local =3D per_cpu_ptr(global->local, cpu); local->msi_pa =3D mmios[index].start + reloff; local->msi_va =3D mmios_va[index] + reloff; =20 /* - * KVM uses global->nr_guest_files to determine the available guest + * KVM uses local->nr_guest_files to determine the available guest * interrupt files on each CPU. Take the minimum number of guest * interrupt files across all CPUs to avoid KVM incorrectly allocating * an unexisted or unmapped guest interrupt file on some CPUs. */ nr_guest_files =3D (resource_size(&mmios[index]) - reloff) / IMSIC_MMIO_= PAGE_SZ - 1; - global->nr_guest_files =3D min(global->nr_guest_files, nr_guest_files); + local->nr_guest_files =3D min(local->nr_guest_files, nr_guest_files); =20 nr_handlers++; } diff --git a/include/linux/irqchip/riscv-imsic.h b/include/linux/irqchip/ri= scv-imsic.h index 4b348836de7a..13e8bd7ff4b4 100644 --- a/include/linux/irqchip/riscv-imsic.h +++ b/include/linux/irqchip/riscv-imsic.h @@ -40,6 +40,9 @@ struct imsic_local_config { phys_addr_t msi_pa; void __iomem *msi_va; + + /* Number of guest interrupt files per core */ + u32 nr_guest_files; }; =20 struct imsic_global_config { @@ -68,9 +71,6 @@ struct imsic_global_config { /* Number of guest interrupt identities */ u32 nr_guest_ids; =20 - /* Number of guest interrupt files per core */ - u32 nr_guest_files; - /* Per-CPU IMSIC addresses */ struct imsic_local_config __percpu *local; }; --=20 2.43.0 From nobody Wed Jun 17 01:50:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F1C21EA7CE; Sat, 25 Apr 2026 01:00:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777078800; cv=none; b=M3fJE1PjMKVyxUlC97+rakTx22IDAyrhO7TkvIOsP+YS1IGNujEaq4sxHfU1jN0bPc+LgDKQkPcu9GIZ7TUierShd8DRPIBJENnexlFtBaMGfEcobzrEnL8HS5TDquRQ8ZnXTtUwUckS+bnWnnuoJQcD2CdE9ltAWllELfaH8Bk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777078800; c=relaxed/simple; bh=P/xWdbYp78TUgmPmZpbvCjaH6uZ1DZD8kPFRZWdzOHw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oEFBomeid8wVKQmUcIkJr/3QMD3GbfA92mc3LPcID0+dhgkW4KMXujhUPyJgLPojIcTAy5s+2YEyxtsRdQzwwlvs57BWcN7ivS4wTECUDSk3xmQ4tL5tu4j/5h/n35knETuXNHWNlRBSCemoLbKfmSleKC5Sp6akuOReIL26CVM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KDKbLWUA; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KDKbLWUA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3A364C19425; Sat, 25 Apr 2026 00:59:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777078800; bh=P/xWdbYp78TUgmPmZpbvCjaH6uZ1DZD8kPFRZWdzOHw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KDKbLWUAnL2XCg9gxeKEyc2mXC8E7299WLTINp8SuZiaodeEbDHdZ15OMfGvHI51r qAAfTAqehCQMylrcSdbrZaRwQ+ER1eT11KhMYuYKY8eYkKDxOiasQgi9gwGbpb3QCt qCFdHKsXzjTd+xcJCn/8TyRFJboFgvedtanFG6xOOVaLJpyJKfh5g9ywbxPm0SWI4Z yx/Hc24Y65Xe0c31BkGvvdqpneCpvSJwGPvB8PkvLET7SBsag/goxIZXVFOpSiebcz gC7W1WoqAHWMz5/QMUjv3qfJoEZmkEiugPU+q07GjlylR7C1FExQUSFm9Dycj43Ztd BHf4O00FBv8DA== From: guoren@kernel.org To: guoren@kernel.org Cc: alex@ghiti.fr, anup@brainfault.org, aou@eecs.berkeley.edu, atish.patra@linux.dev, cp0613@linux.alibaba.com, fangyu.yu@linux.alibaba.com, gaohan@iscas.ac.cn, inochiama@gmail.com, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, me@ziyao.cc, palmer@dabbelt.com, pjw@kernel.org, tglx@kernel.org Subject: [PATCH V2 4/4] RISC-V: KVM: AIA: Use per-HART IMSIC guest files to compute final HGEI count Date: Sat, 25 Apr 2026 00:59:16 +0000 Message-ID: <20260425005916.3321811-5-guoren@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260425005916.3321811-1-guoren@kernel.org> References: <20260425005916.3321811-1-guoren@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Guo Ren (Alibaba DAMO Academy)" Now that `nr_guest_files` has been moved to `struct imsic_local_config` and is computed per-HART, KVM must respect the actual number of guest interrupt files available on each HART when setting up HGEI. In `kvm_riscv_aia_enable()`: - Retrieve the per-CPU IMSIC local config - Take `min(hgctrl->nr_hgei, lc->nr_guest_files)` as the final usable HGEI count for this HART - Use the result to initialize `free_bitmap` This ensures correct HGEI allocation on heterogeneous RISC-V SoCs where different cores may have different IMSIC guest file counts, and completes the per-HART conversion series. Signed-off-by: Guo Ren (Alibaba DAMO Academy) --- arch/riscv/kvm/aia.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/aia.c b/arch/riscv/kvm/aia.c index 70ff1d25dd99..a5f4b7fe1dce 100644 --- a/arch/riscv/kvm/aia.c +++ b/arch/riscv/kvm/aia.c @@ -534,6 +534,9 @@ static void aia_hgei_exit(void) void kvm_riscv_aia_enable(void) { struct aia_hgei_control *hgctrl; + const struct imsic_global_config *gc; + const struct imsic_local_config *lc; + unsigned int nr_hgei; =20 if (!kvm_riscv_aia_available()) return; @@ -547,8 +550,13 @@ void kvm_riscv_aia_enable(void) if (hgctrl->nr_hgei) hgctrl->nr_hgei--; =20 - if (hgctrl->nr_hgei) { - hgctrl->free_bitmap =3D BIT(hgctrl->nr_hgei + 1) - 1; + gc =3D imsic_get_global_config(); + lc =3D (gc) ? this_cpu_ptr(gc->local) : NULL; + if (lc) + nr_hgei =3D min(hgctrl->nr_hgei, lc->nr_guest_files); + + if (nr_hgei) { + hgctrl->free_bitmap =3D BIT(nr_hgei + 1) - 1; hgctrl->free_bitmap &=3D ~BIT(0); } else { hgctrl->free_bitmap =3D 0; --=20 2.43.0