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[86.98.192.109]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a5aa3ae83sm378066605e9.12.2026.04.24.07.25.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Apr 2026 07:25:45 -0700 (PDT) From: Alexey Charkov Date: Fri, 24 Apr 2026 18:25:40 +0400 Subject: [PATCH] arm64: dts: rockchip: Add DT overlay to use Sige5 SD slot for SPI flashing Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260424-sige5-flasher-v1-1-0a147ebaec7b@flipper.net> X-B4-Tracking: v=1; b=H4sIAGN962kC/x3MTQqAIBBA4avErBNs0P6uEi0sRx2ICgciiO6et PwW7z0glJkExuqBTBcLH3tBU1ewJrdHUuyLATW22qBRwpGsCpuTRFlRZyz2iAMuHkpzZgp8/79 pft8PxGwWFV8AAAA= X-Change-ID: 20260424-sige5-flasher-e745282292bd To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alexey Charkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=5155; i=alchark@flipper.net; h=from:subject:message-id; bh=B4aH+4KVEOwhZxypLMourPUyt/cQ+ptjIMdAxFJZySc=; b=owGbwMvMwCW2adGNfoHIK0sZT6slMWS+rk1zP2Ls0hTsc4Jl4n3LWTP+9DewPWa4WTBR7cNMz ZW7q/5rdExkYRDjYrAUU2SZ+22J7VQjvlm7PDy+wsxhZQIZIi3SwAAELAx8uYl5pUY6Rnqm2oZ6 hkY6xjpGDFycAjDVu2MZGWZp1fSZSVi/2an6suTDN9XjogXCYf91WAWu7L6if6ZvtiHDf8fduo0 P/9yZdOP9u/5t35adUr3PGl5y53dCQOFZyQVhmYwA X-Developer-Key: i=alchark@flipper.net; a=openpgp; fpr=9DF6A43D95320E9ABA4848F5B2A2D88F1059D4A5 ArmSoM Sige5, just as most RK3576 based boards, has its SD card pins multiplexed with the FSPI1 controller, allowing for high-speed SPI access to flash chips. If one has a microSD breakout board, a voltage regulator to provide the necessary 1.8V power, a 6x5mm flash socket, and some jumper wires, it's possible to use this to flash SPI chips directly from the Sige5 with full hardware acceleration. Add a DT overlay to set up the necessary pinmux and enable the FSPI1 controller for this purpose. This is specifically targeted at 1.8V flash chips, and relies on an external regulator or power supply to provide the necessary 1.8V power to the flash chip. Signed-off-by: Alexey Charkov --- arch/arm64/boot/dts/rockchip/Makefile | 5 ++ .../rk3576-armsom-sige5-fspi1-flasher.dtso | 80 ++++++++++++++++++= ++++ 2 files changed, 85 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index cb55c6b70d0e..ece5bdb387bc 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -166,6 +166,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-= display-vz.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-io-expander.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-100ask-dshanpi-a1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-fspi1-flasher.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-v1.2-wifibt.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-evb1-v10-pcie1.dtbo @@ -289,6 +290,10 @@ rk3568-wolfvision-pf5-vz-2-uhd-dtbs :=3D rk3568-wolfvi= sion-pf5.dtb \ rk3568-wolfvision-pf5-display-vz.dtbo \ rk3568-wolfvision-pf5-io-expander.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-fspi1-flasher.dtb +rk3576-armsom-sige5-fspi1-flasher-dtbs :=3D rk3576-armsom-sige5.dtb \ + rk3576-armsom-sige5-fspi1-flasher.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-v1.2-wifibt.dtb rk3576-armsom-sige5-v1.2-wifibt-dtbs :=3D rk3576-armsom-sige5.dtb \ rk3576-armsom-sige5-v1.2-wifibt.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-fspi1-flasher= .dtso b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-fspi1-flasher.dtso new file mode 100644 index 000000000000..b2ed735a43fc --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5-fspi1-flasher.dtso @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * DT-overlay to use the SD card slot on the Sige5 for flashing SPI chips = via + * the hardware FSPI1 controller. + * + * This is specifically targeted at 1.8V SPI flash chips, and requires an + * external regulator or power supply to provide the power to the flash ch= ip, + * as the one on Sige5 is fixed at 3.3V. + * + * Here's an example circuit: + * ----------------------------------------------------------------- + * SD card slot SPI flash chip (e.g. MX25U12832F) + * (Pin 1) DAT2 <----------------------------> WP/SIO2 (Pin 3) + * (Pin 2) CD/DAT3 <----------------------------> RESET/SIO3 (Pin 7) + * (Pin 3) CMD <----------------------------> CS# (Pin 1) + * (Pin 5) CLK <----------------------------> SCLK (Pin 6) + * (Pin 7) DAT0 <----------------------------> SI/SIO0 (Pin 5) + * (Pin 8) DAT1 <----------------------------> SO/SIO1 (Pin 2) + * +-------+ + * (Pin 4) 3V3 VDD <-> VIN 3 |MCP1700| 2 VOUT <-> 1V8 VCC (Pin 8) + * +-------+ + * 1 GND + * | + * (Pin 6) VSS <-------------+--------------> GND (Pin 4) + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + vcc3v3_sd_s0: regulator-vcc-3v3-sd { + compatible =3D "regulator-fixed"; + pinctrl-0 =3D <&sdmmc0_pwren>; + pinctrl-names =3D "default"; + regulator-name =3D "vcc3v3_sd_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpios =3D <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&vcc_3v3_s3>; + }; +}; + +&pinctrl { + sd { + sdmmc0_pwren: sdmmc0-pwren { + rockchip,pins =3D <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sfc1 { + pinctrl-0 =3D <&fspi1m0_csn0>, <&fspi1m0_pins>; + pinctrl-names =3D "default"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + flash@0 { + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + spi-max-frequency =3D <50000000>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <1>; + vcc-supply =3D <&vcc3v3_sd_s0>; /* Need a discrete LDO!!! */ + }; +}; + +&sdmmc { + status =3D "disabled"; +}; + +&vccio_sd_s0 { + regulator-max-microvolt =3D <1800000>; +}; --- base-commit: 7080e32d3f09d8688c4a87d81bdcc71f7f606b16 change-id: 20260424-sige5-flasher-e745282292bd Best regards, --=20 Alexey Charkov