From nobody Fri Jun 19 07:56:30 2026 Received: from cstnet.cn (smtp21.cstnet.cn [159.226.251.21]) (using TLSv1.2 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 707B6309EFC for ; Fri, 24 Apr 2026 03:09:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=159.226.251.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777000176; cv=none; b=RymeeiKssV0fSGZ44dqBsrpKx4GkP/KHA85GdZdMCDPmB5Rxa6T7FwbrtZVRPEjv3+7vMuNMr5vJtWQlvLYFGdVmNm8US/4sXIFlxgN8o7mwKtBnbnm2ix/zEZE6Y+6pSbq9XnrZuCpF76wPkQH1rgg0sfBQynZMJVodzLzwHCw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777000176; c=relaxed/simple; bh=eYTWuvZEbB4opQv3pQJ8tG9aWk6mMKvqWyl2wefbARE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=hPGuG0egcmrZOKxigqTL/U91xqlpCUnSCGc1kzMha05bTq53Pz92yN7eQ9M0kPkxXLMI/gl8g+rj/8bfrQbq5WSd+yKsNTSzUMEV/Ktl2hwK687zKzZkv5uBbwNy2Fb0mYoYOOpRhE0Qj9hUyqSdPIHlONqopYCKjSUWeu/C9o4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn; spf=pass smtp.mailfrom=iscas.ac.cn; arc=none smtp.client-ip=159.226.251.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from [127.0.0.2] (unknown [36.110.52.2]) by APP-01 (Coremail) with SMTP id qwCowAA322Z+3eppnHE4Dg--.11152S2; Fri, 24 Apr 2026 11:03:26 +0800 (CST) From: Vivian Wang Date: Fri, 24 Apr 2026 11:03:26 +0800 Subject: [PATCH] riscv: mm: Do not probe satp mode limit if known in FDT Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260424-riscv-mm-trust-fdt-mmu-type-v1-1-57f3313275d2@iscas.ac.cn> X-B4-Tracking: v=1; b=H4sIAH3d6mkC/y3N0QqCQBCF4VeRuW5CF3HFVwkDXceaYNV2ZqUQ3 70tu/zg8J8NhAKTQJNtEGhl4XlKKE4ZuHs33Qh5SAaTmyovTYmBxa3oPWqIojgOmhBR3wuhq20 52srUha0hFZZAI79+9Ut7WGL/IKff5H8R6BnTrR4z6DtJodl71iZb7Tm/bju0+/4BpbEp86oAA AA= X-Change-ID: 20260424-riscv-mm-trust-fdt-mmu-type-c874f7628178 To: Paul Walmsley , Palmer Dabbelt , Palmer Dabbelt , Alexandre Ghiti Cc: Han Gao , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Vivian Wang X-Mailer: b4 0.15.1 X-CM-TRANSID: qwCowAA322Z+3eppnHE4Dg--.11152S2 X-Coremail-Antispam: 1UD129KBjvJXoWxCw45JF18Ar1UZr4DKFWfXwb_yoW5Cw1xpF 45Ga9avrW5JF9rtF4fGrykZry5t3Zag3y3XFyYyF98Can8tryYkr4Fqw13XryYqr17Ja4F kw4qgFZ8ZFWUCaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkG14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26ryj6F1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gc CE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E 2Ix0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJV W8JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc7CjxVAaw2AFwI0_ JF0_Jw1l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67 AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIY rxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14 v26r1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8 JwCI42IY6I8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x0JUhtxDUUU UU= X-CM-SenderInfo: pzdqw2pxlnt03j6l2u1dvotugofq/ Some systems may only have memory at such a high address that an identity mapping cannot be made in Sv48, or even Sv57. To avoid crashing while probing satp mode support, trust the mmu-type property from FDT and avoid probing if it is set. For example, if a CPU supports (up to) Sv57 but the SoC it is on only has memory starting at 128 TiB, an identity mapping cannot be made in Sv48. If the user specifies "no5lvl" on the command line, set_satp_mode() will attempt to test Sv48 support and crash, since the virtual address is too high. Instead, given the correct FDT CPU node property mmu-type =3D "riscv,sv57", set_satp_mode() can pick the maximum allowed mode from command line and FDT, namely Sv48, without probing. Handling of mmu-type "riscv,sv57" in set_satp_mode_from_fdt() is added since it is now needed. Signed-off-by: Vivian Wang --- Tested on QEMU 10.2.2 on all 3*3 combinations of Sv39/Sv48/Sv57 and (none)/no4lvl/no5lvl. In theory this could be a break if mmu-type is wrong, but so many other things would break if the FDT is wrong anyway. Also note that this doesn't apply on ACPI since it is difficult to use ACPICA and read ACPI RHCT at this point, so that will just fall back to probing. Hopefully UEFI/ACPI + this atrocious SoC design never happens, since the high memory base address would prevent a lot of PCI(e) devices from working without an IOMMU. (Fingers crossed.) --- arch/riscv/kernel/pi/fdt_early.c | 2 ++ arch/riscv/mm/init.c | 7 ++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kernel/pi/fdt_early.c b/arch/riscv/kernel/pi/fdt_ea= rly.c index a12ff8090f19..702253287560 100644 --- a/arch/riscv/kernel/pi/fdt_early.c +++ b/arch/riscv/kernel/pi/fdt_early.c @@ -218,6 +218,8 @@ u64 set_satp_mode_from_fdt(uintptr_t dtb_pa) return SATP_MODE_39; else if (!strcmp(mmu_type, "riscv,sv48")) return SATP_MODE_48; + else if (!strcmp(mmu_type, "riscv,sv57")) + return SATP_MODE_57; break; } =20 diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c index 811e03786c56..c37578eaddd0 100644 --- a/arch/riscv/mm/init.c +++ b/arch/riscv/mm/init.c @@ -859,8 +859,9 @@ static __init void set_satp_mode(uintptr_t dtb_pa) { u64 identity_satp, hw_satp; uintptr_t set_satp_mode_pmd =3D ((unsigned long)set_satp_mode) & PMD_MASK; + u64 satp_mode_limit_fdt =3D __pi_set_satp_mode_from_fdt(dtb_pa); u64 satp_mode_limit =3D min_not_zero(__pi_set_satp_mode_from_cmdline(dtb_= pa), - __pi_set_satp_mode_from_fdt(dtb_pa)); + satp_mode_limit_fdt); =20 kernel_map.page_offset =3D PAGE_OFFSET_L5; =20 @@ -872,6 +873,10 @@ static __init void set_satp_mode(uintptr_t dtb_pa) return; } =20 + /* Skip probing if max SATP mode known from FDT */ + if (satp_mode_limit_fdt) + return; + create_p4d_mapping(early_p4d, set_satp_mode_pmd, (uintptr_t)early_pud, P4D_SIZE, PAGE_TABLE); --- base-commit: 028ef9c96e96197026887c0f092424679298aae8 change-id: 20260424-riscv-mm-trust-fdt-mmu-type-c874f7628178 Best regards, -- =20 Vivian "dramforever" Wang