From nobody Wed Jun 17 06:27:21 2026 Received: from canpmsgout11.his.huawei.com (canpmsgout11.his.huawei.com [113.46.200.226]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55968289E13 for ; Thu, 23 Apr 2026 13:46:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.226 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776952023; cv=none; b=XiJ2YbUU+2DezeaDamNzhJgxQymT1LYNxedt0yuAujHW8PWRNA0ja2VSXwk1SbMBK5cIJXRnmuiSfHyMMqtEkqmuMxVE/ryTWPyIYS1/llc6He6uLmqEKA0D5OcGJy+xu5xJqOzp5GpwoMgMl661p/tkX2sAAl/jPeSxBeAjmXo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776952023; c=relaxed/simple; bh=/dPkSM6kSNsG1X5A3CJ2qH/JN0mjsPYSVfyp9jUcBfo=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=SQXu+HdE/nHdFM5sR3VrQJQxAxpWnoeN2kPsJx1DbrPMrVbYbyKCqapMsbShCErHrRSCBELlK8t6ekBHq0eiJULmUn4qv+jUuZ/Mj+a+x0sDmfERSSlg312EaX4rv60hVWBNYpo8Keh+RYTlc/Ckm1uaUEaf8y9vbSd3hSSruFM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=nj1rsFqD; arc=none smtp.client-ip=113.46.200.226 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="nj1rsFqD" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=4XEdIRO7bn6KGtF5i8gLxF5Bjo0q4vcIn20B8kZnyPM=; b=nj1rsFqDdOUgqFcqa53ZcI4JJPNEcZtl+e8EnnvLYH9cL0/vL+aZZPlVk1I6QgphYNULR1W3n 9TNuigPH+CJ4EA6bf1Af3Q3omTCTS//gs92iKsPSqS1/5b6ZdgHjDgxXmU9yG+5AD4kNGhOwZgL CrktkJTYr6lyGSXP7fRPiH0= Received: from mail.maildlp.com (unknown [172.19.163.200]) by canpmsgout11.his.huawei.com (SkyGuard) with ESMTPS id 4g1cfk19shzKm4w; Thu, 23 Apr 2026 21:40:30 +0800 (CST) Received: from kwepemr200004.china.huawei.com (unknown [7.202.195.241]) by mail.maildlp.com (Postfix) with ESMTPS id 5C8D54055B; Thu, 23 Apr 2026 21:46:55 +0800 (CST) Received: from huawei.com (10.50.163.32) by kwepemr200004.china.huawei.com (7.202.195.241) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Thu, 23 Apr 2026 21:46:54 +0800 From: Pengjie Zhang To: , CC: , , , , , , , , , , , , , , Subject: [PATCH v2] arm64: smp: Do not mark secondary CPUs possible under nosmp Date: Thu, 23 Apr 2026 21:46:54 +0800 Message-ID: <20260423134654.4178271-1-zhangpengjie2@huawei.com> X-Mailer: git-send-email 2.33.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500002.china.huawei.com (7.221.188.17) To kwepemr200004.china.huawei.com (7.202.195.241) Content-Type: text/plain; charset="utf-8" Under nosmp (maxcpus=3D0), arm64 never brings up secondary CPUs. However, arm64 still enumerates firmware-described CPUs during SMP initialization, which can leave secondary CPUs visible to for_each_possible_cpu() users even though they never reach the bringup path in this configuration. This is not just a cosmetic mask mismatch: code iterating over possible CPUs may observe secondary CPU per-CPU state that is never fully initialized under nosmp. Return early from smp_init_cpus() when nosmp/maxcpus=3D0 is in effect so that secondary CPUs are not marked possible on arm64. Suggested-by: Catalin Marinas Signed-off-by: Pengjie Zhang Reviewed-by: Catalin Marinas --- Changes in v2: - Drop the arch_disable_smp_support() approach. - Handle nosmp/maxcpus=3D0 directly in smp_init_cpus(). - Update the changelog accordingly. Link to v1:https://lore.kernel.org/all/20260422095831.2926775-1-zhangpengji= e2@huawei.com/ --- arch/arm64/kernel/smp.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 1aa324104afb..1b63846f646a 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -745,15 +745,21 @@ void __init smp_init_cpus(void) else acpi_parse_and_init_cpus(); =20 - if (cpu_count > nr_cpu_ids) - pr_warn("Number of cores (%d) exceeds configured maximum of %u - clippin= g\n", - cpu_count, nr_cpu_ids); - if (!bootcpu_valid) { pr_err("missing boot CPU MPIDR, not enabling secondaries\n"); return; } =20 + /* + * For the nosmp/maxcpus=3D0 case, do not mark the secondary CPUs + * possible. + */ + if (!setup_max_cpus) + return; + + if (cpu_count > nr_cpu_ids) + pr_warn("Number of cores (%d) exceeds configured maximum of %u - clippin= g\n", + cpu_count, nr_cpu_ids); /* * We need to set the cpu_logical_map entries before enabling * the cpus so that cpu processor description entries (DT cpu nodes --=20 2.33.0