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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id E25043F7044; Thu, 23 Apr 2026 03:43:23 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" , Suman Ghosh , "Dan Carpenter" Subject: [PATCH v3 net 01/11] octeontx2-af: npc: cn20k: Propagate MCAM key-type errors on cn20k Date: Thu, 23 Apr 2026 16:13:07 +0530 Message-ID: <20260423104317.2707923-2-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: hskMiAj1xg2SdJg5dzljwc7KShe4Kgj9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfXzeqs5XiJlXJw Srb7ms5UkDCnzmMdR+Uwu72mzNRL9WE4TPYTa1NnX1jY0FvrLHXKye9dygbwRysKJiVkhSviNPw U1TjNzptOA2QvY8zv3DcJLnueOdQaGRAi/3r8FkNTk+8g9vHNm39rRmhMzdvUr1PthMsA2QOuO8 F2mWTSbUd37202KvhXFa4btEwNAJjvdsNClEHOuxOWgP6xwb0Qg0yMzb5IzJmpWJnpcS9dNv2jc kZ8RRrbnUsoDgy6crQgH8QAX2gFXwP3rSxYCddI/vUisL+JWwOGaJRL5VtMVvoZWq5vkq+DI/6D 5DIJ9cZgfQgW4MWvBbgp9yPTH3BxtyiuiAJsQ3RNusstGQKVBewr4c9HheuA2OfcOEYku8K8e3z sNKJAvJHAzqAwTOwqbR24ZK9ff2pTnDi9ESSMasZV3cI7l5HrRsjAOfdEfuxyyONHCUHhGLLumx Yu8tZLdNFqYiIAW/14A== X-Proofpoint-GUID: hskMiAj1xg2SdJg5dzljwc7KShe4Kgj9 X-Authority-Analysis: v=2.4 cv=SJBykuvH c=1 sm=1 tr=0 ts=69e9f7d0 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=QXcCYyLzdtTjyudCfB6f:22 a=VwQbUJbxAAAA:8 a=M5GUcnROAAAA:8 a=pGLkceISAAAA:8 a=j4DJZzs_5jzhZZj0efwA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" npc_mcam_idx_2_key_type() can fail; callers used to ignore it and still used kw_type when enabling, configuring, copying, and reading MCAM entries. That could program or decode hardware with an undefined key type. Return -EINVAL when key-type lookup fails. Return -EINVAL from npc_cn20k_copy_mcam_entry() when src and dest key types differ instead of failing silently. Change npc_cn20k_{enable,config,copy,read}_mcam_entry() to return int on success or error. Thread those errors through the cn20k MCAM write and read mbox handlers, the cn20k baseline steer read path, NPC defrag move (disable/copy/enable with dev_err and -EFAULT), and the DMAC update path in rvu_npc_fs.c. Make npc_copy_mcam_entry() return int so the cn20k branch can return npc_cn20k_copy_mcam_entry() without a void/int mismatch, and fail NPC_MCAM_SHIFT_ENTRY when copy fails. Cc: Suman Ghosh Cc: Dan Carpenter Fixes: 6d1e70282f76 ("octeontx2-af: npc: cn20k: Use common APIs") Link: https://lore.kernel.org/netdev/adiQJvuKlEhq2ILx@stanley.mountain/ Signed-off-by: Ratheesh Kannoth --- .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 109 ++++++++++++------ .../ethernet/marvell/octeontx2/af/cn20k/npc.h | 20 ++-- .../ethernet/marvell/octeontx2/af/rvu_npc.c | 18 ++- .../marvell/octeontx2/af/rvu_npc_fs.c | 20 ++-- 4 files changed, 111 insertions(+), 56 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 7291fdb89b03..49b5cd2838b5 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -798,7 +798,7 @@ void npc_cn20k_load_mkex_profile(struct rvu *rvu, int b= lkaddr, iounmap(mkex_prfl_addr); } =20 -void +int npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr, int index, bool enable) { @@ -808,7 +808,9 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkadd= r, u64 cfg, hw_prio; u8 kw_type; =20 - npc_mcam_idx_2_key_type(rvu, index, &kw_type); + if (npc_mcam_idx_2_key_type(rvu, index, &kw_type)) + return -EINVAL; + if (kw_type =3D=3D NPC_MCAM_KEY_X2) { cfg =3D rvu_read64(rvu, blkaddr, NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, @@ -819,7 +821,7 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkadd= r, rvu_write64(rvu, blkaddr, NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank), cfg); - return; + return 0; } =20 /* For NPC_CN20K_MCAM_KEY_X4 keys, both the banks @@ -836,6 +838,8 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkadd= r, NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank), cfg); } + + return 0; } =20 void @@ -1042,9 +1046,9 @@ npc_cn20k_set_mcam_bank_cfg(struct rvu *rvu, int blka= ddr, int mcam_idx, } } =20 -void npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index, - u8 intf, struct cn20k_mcam_entry *entry, - bool enable, u8 hw_prio, u8 req_kw_type) +int npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index, + u8 intf, struct cn20k_mcam_entry *entry, + bool enable, u8 hw_prio, u8 req_kw_type) { struct npc_mcam *mcam =3D &rvu->hw->mcam; int mcam_idx =3D index % mcam->banksize; @@ -1052,10 +1056,13 @@ void npc_cn20k_config_mcam_entry(struct rvu *rvu, i= nt blkaddr, int index, int kw =3D 0; u8 kw_type; =20 + if (npc_mcam_idx_2_key_type(rvu, index, &kw_type)) + return -EINVAL; + /* Disable before mcam entry update */ - npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, false); + if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, false)) + return -EINVAL; =20 - npc_mcam_idx_2_key_type(rvu, index, &kw_type); /* CAM1 takes the comparison value and * CAM0 specifies match for a bit in key being '0' or '1' or 'dontcare'. * CAM1 =3D 0 & CAM0 =3D 1 =3D> match if key =3D 0 @@ -1120,9 +1127,11 @@ void npc_cn20k_config_mcam_entry(struct rvu *rvu, in= t blkaddr, int index, /* PF installing VF rule */ npc_cn20k_set_mcam_bank_cfg(rvu, blkaddr, mcam_idx, bank, kw_type, enable, hw_prio); + + return 0; } =20 -void npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, u16 src, u16 = dest) +int npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, u16 src, u16 d= est) { struct npc_mcam *mcam =3D &rvu->hw->mcam; u64 cfg, sreg, dreg, soff, doff; @@ -1132,10 +1141,15 @@ void npc_cn20k_copy_mcam_entry(struct rvu *rvu, int= blkaddr, u16 src, u16 dest) =20 dbank =3D npc_get_bank(mcam, dest); sbank =3D npc_get_bank(mcam, src); - npc_mcam_idx_2_key_type(rvu, src, &src_kwtype); - npc_mcam_idx_2_key_type(rvu, dest, &dest_kwtype); + + if (npc_mcam_idx_2_key_type(rvu, src, &src_kwtype)) + return -EINVAL; + + if (npc_mcam_idx_2_key_type(rvu, dest, &dest_kwtype)) + return -EINVAL; + if (src_kwtype !=3D dest_kwtype) - return; + return -EINVAL; =20 src &=3D (mcam->banksize - 1); dest &=3D (mcam->banksize - 1); @@ -1170,6 +1184,8 @@ void npc_cn20k_copy_mcam_entry(struct rvu *rvu, int b= lkaddr, u16 src, u16 dest) if (src_kwtype =3D=3D NPC_MCAM_KEY_X2) break; } + + return 0; } =20 static void npc_cn20k_fill_entryword(struct cn20k_mcam_entry *entry, int i= dx, @@ -1179,16 +1195,17 @@ static void npc_cn20k_fill_entryword(struct cn20k_m= cam_entry *entry, int idx, entry->kw_mask[idx] =3D cam1 ^ cam0; } =20 -void npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index, - struct cn20k_mcam_entry *entry, - u8 *intf, u8 *ena, u8 *hw_prio) +int npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index, + struct cn20k_mcam_entry *entry, + u8 *intf, u8 *ena, u8 *hw_prio) { struct npc_mcam *mcam =3D &rvu->hw->mcam; u64 cam0, cam1, bank_cfg, cfg; int kw =3D 0, bank; u8 kw_type; =20 - npc_mcam_idx_2_key_type(rvu, index, &kw_type); + if (npc_mcam_idx_2_key_type(rvu, index, &kw_type)) + return -EINVAL; =20 bank =3D npc_get_bank(mcam, index); index &=3D (mcam->banksize - 1); @@ -1298,6 +1315,8 @@ void npc_cn20k_read_mcam_entry(struct rvu *rvu, int b= lkaddr, u16 index, cfg =3D rvu_read64(rvu, blkaddr, NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(index, 0, 1)); entry->vtag_action =3D cfg; + + return 0; } =20 int rvu_mbox_handler_npc_cn20k_mcam_write_entry(struct rvu *rvu, @@ -1335,11 +1354,10 @@ int rvu_mbox_handler_npc_cn20k_mcam_write_entry(str= uct rvu *rvu, if (is_pffunc_af(req->hdr.pcifunc)) nix_intf =3D req->intf; =20 - npc_cn20k_config_mcam_entry(rvu, blkaddr, req->entry, nix_intf, - &req->entry_data, req->enable_entry, - req->hw_prio, req->req_kw_type); + rc =3D npc_cn20k_config_mcam_entry(rvu, blkaddr, req->entry, nix_intf, + &req->entry_data, req->enable_entry, + req->hw_prio, req->req_kw_type); =20 - rc =3D 0; exit: mutex_unlock(&mcam->lock); return rc; @@ -1361,11 +1379,13 @@ int rvu_mbox_handler_npc_cn20k_mcam_read_entry(stru= ct rvu *rvu, =20 mutex_lock(&mcam->lock); rc =3D npc_mcam_verify_entry(mcam, pcifunc, req->entry); - if (!rc) - npc_cn20k_read_mcam_entry(rvu, blkaddr, req->entry, - &rsp->entry_data, &rsp->intf, - &rsp->enable, &rsp->hw_prio); + if (rc) + goto fail; =20 + rc =3D npc_cn20k_read_mcam_entry(rvu, blkaddr, req->entry, + &rsp->entry_data, &rsp->intf, + &rsp->enable, &rsp->hw_prio); +fail: mutex_unlock(&mcam->lock); return rc; } @@ -1415,14 +1435,14 @@ int rvu_mbox_handler_npc_cn20k_mcam_alloc_and_write= _entry(struct rvu *rvu, else nix_intf =3D pfvf->nix_rx_intf; =20 - npc_cn20k_config_mcam_entry(rvu, blkaddr, entry, nix_intf, - &req->entry_data, req->enable_entry, - req->hw_prio, req->req_kw_type); + rc =3D npc_cn20k_config_mcam_entry(rvu, blkaddr, entry, nix_intf, + &req->entry_data, req->enable_entry, + req->hw_prio, req->req_kw_type); =20 mutex_unlock(&mcam->lock); =20 rsp->entry =3D entry_rsp.entry; - return 0; + return rc; } =20 static int rvu_npc_get_base_steer_rule_type(struct rvu *rvu, u16 pcifunc) @@ -1480,9 +1500,9 @@ int rvu_mbox_handler_npc_cn20k_read_base_steer_rule(s= truct rvu *rvu, =20 read_entry: /* Read the mcam entry */ - npc_cn20k_read_mcam_entry(rvu, blkaddr, index, - &rsp->entry, &intf, - &enable, &hw_prio); + rc =3D npc_cn20k_read_mcam_entry(rvu, blkaddr, index, + &rsp->entry, &intf, + &enable, &hw_prio); mutex_unlock(&mcam->lock); out: return rc; @@ -3607,9 +3627,30 @@ int npc_defrag_move_vdx_to_free(struct rvu *rvu, NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(midx, bank)); =20 - npc_cn20k_enable_mcam_entry(rvu, blkaddr, old_midx, false); - npc_cn20k_copy_mcam_entry(rvu, blkaddr, old_midx, new_midx); - npc_cn20k_enable_mcam_entry(rvu, blkaddr, new_midx, true); + /* If bug happened during copy/enable mcam, then there is a bug in alloc= ation + * algorithm itself. There is no point in rewinding and returning, as it + * will face further issue. Return error after printing error + */ + if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, old_midx, false)) { + dev_err(rvu->dev, + "%s: Error happened while disabling old_mid=3D%u\n", + __func__, old_midx); + return -EFAULT; + } + + if (npc_cn20k_copy_mcam_entry(rvu, blkaddr, old_midx, new_midx)) { + dev_err(rvu->dev, + "%s: Error happened to while copying old_midx=3D%u new_midx=3D%u\n", + __func__, old_midx, new_midx); + return -EFAULT; + } + + if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, new_midx, true)) { + dev_err(rvu->dev, + "%s: Error happened while enabling new_mid=3D%u\n", + __func__, new_midx); + return -EFAULT; + } =20 midx =3D new_midx % mcam->banksize; bank =3D new_midx / mcam->banksize; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.h index 815d0b257a7e..8f3eea9cfb1d 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h @@ -320,16 +320,16 @@ void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pc= ifunc); int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 pcifunc, u16 *bcast, u16 *mcast, u16 *promisc, u16 *ucast); =20 -void npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index, - u8 intf, struct cn20k_mcam_entry *entry, - bool enable, u8 hw_prio, u8 req_kw_type); -void npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr, - int index, bool enable); -void npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, - u16 src, u16 dest); -void npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index, - struct cn20k_mcam_entry *entry, u8 *intf, - u8 *ena, u8 *hw_prio); +int npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index, + u8 intf, struct cn20k_mcam_entry *entry, + bool enable, u8 hw_prio, u8 req_kw_type); +int npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkaddr, + int index, bool enable); +int npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blkaddr, + u16 src, u16 dest); +int npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index, + struct cn20k_mcam_entry *entry, u8 *intf, + u8 *ena, u8 *hw_prio); void npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkaddr, int bank, int index); int npc_mcam_idx_2_key_type(struct rvu *rvu, u16 mcam_idx, u8 *key_type); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_npc.c index c2ca5ed1d028..ecaf0946b852 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c @@ -241,7 +241,10 @@ void npc_enable_mcam_entry(struct rvu *rvu, struct npc= _mcam *mcam, if (index < 0 || index >=3D mcam->banksize * mcam->banks) return; =20 - return npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, enable); + if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, enable)) + dev_err(rvu->dev, "Error to %s mcam %u entry\n", + enable ? "enable" : "disable", index); + return; } =20 index &=3D (mcam->banksize - 1); @@ -589,8 +592,8 @@ void npc_read_mcam_entry(struct rvu *rvu, struct npc_mc= am *mcam, NPC_AF_MCAMEX_BANKX_CFG(src, sbank)) & 1; } =20 -static void npc_copy_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam, - int blkaddr, u16 src, u16 dest) +static int npc_copy_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam, + int blkaddr, u16 src, u16 dest) { int dbank =3D npc_get_bank(mcam, dest); int sbank =3D npc_get_bank(mcam, src); @@ -630,6 +633,7 @@ static void npc_copy_mcam_entry(struct rvu *rvu, struct= npc_mcam *mcam, NPC_AF_MCAMEX_BANKX_CFG(src, sbank)); rvu_write64(rvu, blkaddr, NPC_AF_MCAMEX_BANKX_CFG(dest, dbank), cfg); + return 0; } =20 u64 npc_get_mcam_action(struct rvu *rvu, struct npc_mcam *mcam, @@ -3266,7 +3270,10 @@ int rvu_mbox_handler_npc_mcam_shift_entry(struct rvu= *rvu, npc_enable_mcam_entry(rvu, mcam, blkaddr, new_entry, false); =20 /* Copy rule from old entry to new entry */ - npc_copy_mcam_entry(rvu, mcam, blkaddr, old_entry, new_entry); + if (npc_copy_mcam_entry(rvu, mcam, blkaddr, old_entry, new_entry)) { + rc =3D NPC_MCAM_INVALID_REQ; + break; + } =20 /* Copy counter mapping, if any */ cntr =3D mcam->entry2cntr_map[old_entry]; @@ -3284,7 +3291,8 @@ int rvu_mbox_handler_npc_mcam_shift_entry(struct rvu = *rvu, =20 /* If shift has failed then report the failed index */ if (index !=3D req->shift_count) { - rc =3D NPC_MCAM_PERM_DENIED; + if (!rc) + rc =3D NPC_MCAM_PERM_DENIED; rsp->failed_entry_idx =3D index; } =20 diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drive= rs/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index b45798d9fdab..fe10554b1f0e 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -1980,13 +1980,15 @@ static int npc_update_dmac_value(struct rvu *rvu, i= nt npcblkaddr, =20 ether_addr_copy(rule->packet.dmac, pfvf->mac_addr); =20 - if (is_cn20k(rvu->pdev)) - npc_cn20k_read_mcam_entry(rvu, npcblkaddr, rule->entry, - cn20k_entry, &intf, - &enable, &hw_prio); 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 03D513F7044; Thu, 23 Apr 2026 03:43:27 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" , Dan Carpenter , "Simon Horman" Subject: [PATCH v3 net 02/11] octeontx2-af: npc: cn20k: Drop debugfs_create_file() error checks in init Date: Thu, 23 Apr 2026 16:13:08 +0530 Message-ID: <20260423104317.2707923-3-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: MlFDro9Drw31PzqvEGRY7qk8NJWMAL73 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfX+jski/THEfe+ 1K/t6Nhuylt/L6BiEEy9xthai2uNQ0wM0iYpagP3jy6d3fO9rRpJQ6egU5q4vcvpHL9jLgqXKP5 s656G6YRqbz5cjesR5voHDuGOFsw9i5LBx03LS5ftYC7iU7rV5jJWopMYXz7xTYY8X/dXdLIHPZ pmo3aj3wtrABoxJN2aU2jnA3alpgMwY2lzB58z7QRBJI8ua5Au7p8aW8c6+8IZlDPX/il+83Wi2 Cc7OLaq5z6Yyl5DNtbGhR5NmsHzhcBTAlLCqHA9UviR4F2IdOhIqvz4uBMxlDz9vWKXfAVnlJ1L 9pQmFof7kJcjBJtBFoIgZB5sjtPhNiURGtMmUPC02evK4uU13dYp6YFcYjkhQx4iKYj6VKgbDYb wIoLD6V7HKfTNb4slvebPUawAM1i0fTl0TiXe+83gNgtsPx/aWpeQe+OKuEMK83Yetz5xYpZSyU FxfPqOUOxwVPHkIetzQ== X-Proofpoint-GUID: MlFDro9Drw31PzqvEGRY7qk8NJWMAL73 X-Authority-Analysis: v=2.4 cv=SJBykuvH c=1 sm=1 tr=0 ts=69e9f7d4 cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=QXcCYyLzdtTjyudCfB6f:22 a=5dRrolKJAAAA:8 a=VwQbUJbxAAAA:8 a=pGLkceISAAAA:8 a=M5GUcnROAAAA:8 a=m_5JYv9Gamu-D5dMTTYA:9 a=y3-2bcJ53AEkEa81XYCb:22 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" debugfs is not intended to be checked for allocation failures the way other kernel APIs are: callers should not fail probe or subsystem init because a debugfs node could not be created, including when debugfs is disabled in Kconfig. Replacing NULL checks with IS_ERR() checks is similarly wrong for optional debugfs. Remove dentry checks and -EFAULT returns from npc_cn20k_debugfs_init(). https://staticthinking.wordpress.com/2023/07/24/debugfs-functions-are-not-s= upposed-to-be-checked/ Cc: Dan Carpenter Fixes: 528530dff56b ("octeontx2-af: npc: cn20k: add debugfs support") Link: https://lore.kernel.org/netdev/adjNGPWKMOk3KgWL@stanley.mountain/ Reviewed-by: Simon Horman Signed-off-by: Ratheesh Kannoth --- .../marvell/octeontx2/af/cn20k/debugfs.c | 33 ++++++------------- 1 file changed, 10 insertions(+), 23 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c b/dr= ivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c index 3debf2fae1a4..6f13296303cb 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c @@ -249,34 +249,21 @@ DEFINE_SHOW_ATTRIBUTE(npc_defrag); int npc_cn20k_debugfs_init(struct rvu *rvu) { struct npc_priv_t *npc_priv =3D npc_priv_get(); - struct dentry *npc_dentry; =20 - npc_dentry =3D debugfs_create_file("mcam_layout", 0444, rvu->rvu_dbg.npc, - npc_priv, &npc_mcam_layout_fops); + debugfs_create_file("mcam_layout", 0444, rvu->rvu_dbg.npc, + npc_priv, &npc_mcam_layout_fops); =20 - if (!npc_dentry) - return -EFAULT; + debugfs_create_file("mcam_default", 0444, rvu->rvu_dbg.npc, + rvu, &npc_mcam_default_fops); =20 - npc_dentry =3D debugfs_create_file("mcam_default", 0444, rvu->rvu_dbg.npc, - rvu, &npc_mcam_default_fops); + debugfs_create_file("vidx2idx", 0444, rvu->rvu_dbg.npc, + npc_priv, &npc_vidx2idx_map_fops); =20 - if (!npc_dentry) - return -EFAULT; + debugfs_create_file("idx2vidx", 0444, rvu->rvu_dbg.npc, + npc_priv, &npc_idx2vidx_map_fops); =20 - npc_dentry =3D debugfs_create_file("vidx2idx", 0444, rvu->rvu_dbg.npc, - npc_priv, &npc_vidx2idx_map_fops); - if (!npc_dentry) - return -EFAULT; - - npc_dentry =3D debugfs_create_file("idx2vidx", 0444, rvu->rvu_dbg.npc, - npc_priv, &npc_idx2vidx_map_fops); - if (!npc_dentry) - return -EFAULT; - - npc_dentry =3D debugfs_create_file("defrag", 0444, rvu->rvu_dbg.npc, - npc_priv, &npc_defrag_fops); - if (!npc_dentry) - return -EFAULT; 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 1ED5D3F7044; Thu, 23 Apr 2026 03:43:31 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" , Dan Carpenter Subject: [PATCH v3 net 03/11] octeontx2-af: npc: cn20k: Propagate errors in defrag MCAM alloc rollback Date: Thu, 23 Apr 2026 16:13:09 +0530 Message-ID: <20260423104317.2707923-4-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=F5dnsKhN c=1 sm=1 tr=0 ts=69e9f7d8 cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=TtqV-g6YmW1Jfm2GSLaY:22 a=VwQbUJbxAAAA:8 a=pGLkceISAAAA:8 a=M5GUcnROAAAA:8 a=nhaU4qLH0yjqk7k21MUA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfX2CPQAU1q74+y UL3yPn/G0WwdmV55JAphbj7wI752ooqrnHHus1/GkFP4ASSgkE++J2TAHVb3Q+SHy9kveAAi15s 2aOpH1Tyh15+7sQdL43r/4Qauuww4U4xSWQbUwPuz89w7NnZw/+rgOaxld+WFS0lyxHBP3UVPkg fgtr6FTX51Bc69jVvJKpGkjhGHXivXRglgXnsHBGR93scVzPlz9xDFkvZ9R3qYy+IFhnrYhI5Ay eHIZV6p69X6NInrXNojja3yCNC4tBhb0ftTBNBo6AsEBtR/yBRKkGYp6mD5wC0giiC9nwjv1Gi6 w13chbtd00P/f3wTXTCsEcFJRQ75Q3SmfmPdGOawd49HmB1wcgyVXw/HOPKqMhk95lv50BNrQC4 6pkEFDgI7C4wPYj7HtL3rLC3KCEMn8eVH9kkXwOWhYsPGlZMrpjPaUG/qgAgH9qnlfmvhZAXAVB dbSPGqKgxGYbrOA1thw== X-Proofpoint-ORIG-GUID: reP6Y7raDjGYzJh9OkzT8N-99Ql8-Wpe X-Proofpoint-GUID: reP6Y7raDjGYzJh9OkzT8N-99Ql8-Wpe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" npc_defrag_alloc_free_slots() allocates MCAM indexes in up to two passes on bank0 then bank1. On failure it rolls back by freeing entries already placed in save[]. __npc_subbank_alloc() can return a negative errno while only part of the indexes are valid. The rollback loop used rc for npc_mcam_idx_2_subbank_idx() as well, so a successful lookup stored zero in rc and a later __npc_subbank_free() failure could still end with return 0 when the allocation path had also left rc at zero (for example shortfall after zero return values from the alloc helpers). Jump to the rollback path immediately when either __npc_subbank_alloc() call fails, preserving its errno. If both calls succeed but the total allocated count is still less than cnt, set rc to -ENOSPC before rollback. Use a separate err variable for npc_mcam_idx_2_subbank_idx() so a successful lookup no longer clears a non-zero rc from the allocation phase. Cc: Dan Carpenter Fixes: 645c6e3c1999 ("octeontx2-af: npc: cn20k: virtual index support") Link: https://lore.kernel.org/netdev/adjNJEpILRZATB2N@stanley.mountain/ Signed-off-by: Ratheesh Kannoth --- .../net/ethernet/marvell/octeontx2/af/cn20k/npc.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 49b5cd2838b5..8630a6a73387 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -2325,6 +2325,7 @@ static int __npc_subbank_alloc(struct rvu *rvu, struc= t npc_subbank *sb, __npc_subbank_mark_free(rvu, sb); err1: kfree(save); + *alloc_cnt =3D 0; return rc; } =20 @@ -3502,7 +3503,7 @@ static int npc_defrag_alloc_free_slots(struct rvu *rv= u, { int alloc_cnt1, alloc_cnt2; struct npc_subbank *sb; - int rc, sb_off, i; + int rc, sb_off, i, err; bool deleted; =20 sb =3D &npc_priv.sb[f->idx]; @@ -3516,6 +3517,7 @@ static int npc_defrag_alloc_free_slots(struct rvu *rv= u, NPC_MCAM_LOWER_PRIO, false, cnt, save, cnt, true, &alloc_cnt1); + if (alloc_cnt1 < cnt) { rc =3D __npc_subbank_alloc(rvu, sb, NPC_MCAM_KEY_X2, sb->b1b, @@ -3531,15 +3533,17 @@ static int npc_defrag_alloc_free_slots(struct rvu *= rvu, dev_err(rvu->dev, "%s: Failed to alloc cnt=3D%u alloc_cnt1=3D%u alloc_cnt2=3D%u\n", __func__, cnt, alloc_cnt1, alloc_cnt2); + rc =3D -ENOSPC; goto fail_free_alloc; } + return 0; =20 fail_free_alloc: for (i =3D 0; i < alloc_cnt1 + alloc_cnt2; i++) { - rc =3D npc_mcam_idx_2_subbank_idx(rvu, save[i], - &sb, &sb_off); - if (rc) { + err =3D npc_mcam_idx_2_subbank_idx(rvu, save[i], + &sb, &sb_off); + if (err) { dev_err(rvu->dev, "%s: Error to find subbank for mcam idx=3D%u\n", __func__, save[i]); --=20 2.43.0 From nobody Wed Jun 17 06:18:36 2026 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C6373E1D18; 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id E959D3F7044; Thu, 23 Apr 2026 03:43:35 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" Subject: [PATCH v3 net 04/11] octeontx2-af: npc: cn20k: Make default entries as x4. Date: Thu, 23 Apr 2026 16:13:10 +0530 Message-ID: <20260423104317.2707923-5-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: gkS_zmLhYx51TeUShsQEe_1-wk9tz8sf X-Proofpoint-GUID: gkS_zmLhYx51TeUShsQEe_1-wk9tz8sf X-Authority-Analysis: v=2.4 cv=ecoNubEH c=1 sm=1 tr=0 ts=69e9f7f0 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=M5GUcnROAAAA:8 a=F9p9qQeY_ntdmK6_khkA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfX0edbaF/lY1yK +I1z4sWOHx4OGBIXx3jCxQfPgsAnK48ukvkCXV38BaqY6t9aKmnnAnKmW20a+3bZmHqCQxNXBS+ bvjtKDOAjdO4LbVZQ5LoqbZ4flrhawqbYHOvdY1YadkJUlg3znmuhwqj6kP2/sVIzTL6sxMthpi 3fiHVc0p9s6EWkCM4V0w9475hmvuqv1oQx92eodvEVCbRwy0HIIUhrgLc4BU7vrT1V8+1UMEBLB cuQZrcsLrL6cri/OxvPE8DHcAPn1MF9YainU5z+Y0OMIw3ke4mGQeQXUIz5OQS3jyfp4bIeiVrS GQsB4yxbZcaXibL0HT4uVZYGqnQNueQTRoIca/PCm6r/2B9KiPajusJ5rI9VeJlfwitgc2TUL59 kXCdcB9id2S6/C8yS4AYgU+x+ZF0RG4wi4ov6fTOG4ZHZJZ6R02zoqmvZiNZmYbnaqwS2MUyZh8 zvq+seNIvC/iR7BUMGQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" X4 profile users won't alloc x2 entries. Allocating x2 entries would cause under utilized subbanks(X2). Avoid this in X4 kex profile, all allocations will be from x4 subbank. Fixes: 09d3b7a1403f ("octeontx2-af: npc: cn20k: Allocate default MCAM index= es") Signed-off-by: Ratheesh Kannoth --- .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 27 +++++++++-- .../marvell/octeontx2/nic/otx2_flows.c | 48 +++++++++++++------ 2 files changed, 57 insertions(+), 18 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 8630a6a73387..97acba77ff88 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -3589,9 +3589,10 @@ int npc_defrag_move_vdx_to_free(struct rvu *rvu, struct npc_defrag_node *v, int cnt, u16 *save) { + u16 new_midx, old_midx, vidx, target_pf; struct npc_mcam *mcam =3D &rvu->hw->mcam; + struct rvu_npc_mcam_rule *rule, *tmp; int i, vidx_cnt, rc, sb_off; - u16 new_midx, old_midx, vidx; struct npc_subbank *sb; bool deleted; u16 pcifunc; @@ -3710,8 +3711,22 @@ int npc_defrag_move_vdx_to_free(struct rvu *rvu, mcam->entry2pfvf_map[new_midx] =3D pcifunc; /* Counter is not preserved */ mcam->entry2cntr_map[new_midx] =3D new_midx; + + target_pf =3D mcam->entry2target_pffunc[old_midx]; + mcam->entry2target_pffunc[new_midx] =3D target_pf; + mcam->entry2target_pffunc[old_midx] =3D 0; + npc_mcam_set_bit(mcam, new_midx); =20 + /* Note: list order is not functionally required for mcam_rules */ + list_for_each_entry_safe(rule, tmp, &mcam->mcam_rules, list) { + if (rule->entry !=3D old_midx) + continue; + + rule->entry =3D new_midx; + break; + } + /* Mark as invalid */ v->vidx[vidx_cnt - i - 1] =3D -1; save[cnt - i - 1] =3D -1; @@ -4274,10 +4289,16 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 = pcifunc) pfvf =3D rvu_get_pfvf(rvu, pcifunc); pfvf->hw_prio =3D NPC_DFT_RULE_PRIO; =20 + if (npc_priv.kw =3D=3D NPC_MCAM_KEY_X4) { + req.kw_type =3D NPC_MCAM_KEY_X4; + req.ref_entry =3D eidx & (npc_priv.bank_depth - 1); + } else { + req.kw_type =3D NPC_MCAM_KEY_X2; + req.ref_entry =3D eidx; + } + req.contig =3D false; req.ref_prio =3D NPC_MCAM_HIGHER_PRIO; - req.ref_entry =3D eidx; - req.kw_type =3D NPC_MCAM_KEY_X2; req.count =3D cnt; req.hdr.pcifunc =3D pcifunc; =20 diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c b/driv= ers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c index 38cc539d724d..5dd0591fed99 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c @@ -37,14 +37,13 @@ static void otx2_clear_ntuple_flow_info(struct otx2_nic= *pfvf, struct otx2_flow_ flow_cfg->max_flows =3D 0; } =20 -static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf, bool *is_x2, - u16 *x4_slots) +static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf, u16 *x4_slots, u8= *kw_type) { struct npc_get_pfl_info_rsp *rsp; struct msg_req *req; static struct { bool is_set; - bool is_x2; + u8 kw_type; u16 x4_slots; } pfl_info; =20 @@ -53,8 +52,8 @@ static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf, = bool *is_x2, */ mutex_lock(&pfvf->mbox.lock); if (pfl_info.is_set) { - *is_x2 =3D pfl_info.is_x2; *x4_slots =3D pfl_info.x4_slots; + *kw_type =3D pfl_info.kw_type; mutex_unlock(&pfvf->mbox.lock); return 0; } @@ -79,16 +78,16 @@ static int otx2_mcam_pfl_info_get(struct otx2_nic *pfvf= , bool *is_x2, return -EFAULT; } =20 - *is_x2 =3D (rsp->kw_type =3D=3D NPC_MCAM_KEY_X2); - if (*is_x2) - *x4_slots =3D 0; + pfl_info.kw_type =3D rsp->kw_type; + if (rsp->kw_type =3D=3D NPC_MCAM_KEY_X2) + pfl_info.x4_slots =3D 0; else - *x4_slots =3D rsp->x4_slots; - - pfl_info.is_x2 =3D *is_x2; - pfl_info.x4_slots =3D *x4_slots; + pfl_info.x4_slots =3D rsp->x4_slots; pfl_info.is_set =3D true; =20 + *x4_slots =3D pfl_info.x4_slots; + *kw_type =3D pfl_info.kw_type; + mutex_unlock(&pfvf->mbox.lock); return 0; } @@ -164,6 +163,7 @@ int otx2_alloc_mcam_entries(struct otx2_nic *pfvf, u16 = count) u16 dft_idx =3D 0, x4_slots =3D 0; int ent, allocated =3D 0, ref; bool is_x2 =3D false; + u8 kw_type =3D 0; int rc; =20 /* Free current ones and allocate new ones with requested count */ @@ -182,12 +182,14 @@ int otx2_alloc_mcam_entries(struct otx2_nic *pfvf, u1= 6 count) } =20 if (is_cn20k(pfvf->pdev)) { - rc =3D otx2_mcam_pfl_info_get(pfvf, &is_x2, &x4_slots); + rc =3D otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type); if (rc) { netdev_err(pfvf->netdev, "Error to retrieve profile info\n"); return rc; } =20 + is_x2 =3D kw_type =3D=3D NPC_MCAM_KEY_X2; + rc =3D otx2_get_dft_rl_idx(pfvf, &dft_idx); if (rc) { netdev_err(pfvf->netdev, @@ -289,6 +291,8 @@ int otx2_mcam_entry_init(struct otx2_nic *pfvf) struct npc_mcam_alloc_entry_rsp *rsp; int vf_vlan_max_flows, count; int rc, ref, prio, ent; + u8 kw_type =3D 0; + u16 x4_slots; u16 dft_idx; =20 ref =3D 0; @@ -315,6 +319,16 @@ int otx2_mcam_entry_init(struct otx2_nic *pfvf) if (!flow_cfg->def_ent) return -ENOMEM; =20 + kw_type =3D NPC_MCAM_KEY_X2; + if (is_cn20k(pfvf->pdev)) { + rc =3D otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type); + if (rc) { + netdev_err(pfvf->netdev, + "Error to get pfl info\n"); + return rc; + } + } + mutex_lock(&pfvf->mbox.lock); =20 req =3D otx2_mbox_alloc_msg_npc_mcam_alloc_entry(&pfvf->mbox); @@ -324,6 +338,10 @@ int otx2_mcam_entry_init(struct otx2_nic *pfvf) } =20 req->kw_type =3D NPC_MCAM_KEY_X2; + if (is_cn20k(pfvf->pdev) && kw_type =3D=3D NPC_MCAM_KEY_X4) { + req->kw_type =3D NPC_MCAM_KEY_X4; + ref &=3D (x4_slots - 1); + } req->contig =3D false; req->count =3D count; req->ref_prio =3D prio; @@ -1174,15 +1192,14 @@ static int otx2_add_flow_msg(struct otx2_nic *pfvf,= struct otx2_flow *flow) #ifdef CONFIG_DCB int vlan_prio, qidx, pfc_rule =3D 0; #endif + bool modify =3D false, is_x2; int err, vf =3D 0, off, sz; - bool modify =3D false; u8 kw_type =3D 0; u8 *src, *dst; u16 x4_slots; - bool is_x2; =20 if (is_cn20k(pfvf->pdev)) { - err =3D otx2_mcam_pfl_info_get(pfvf, &is_x2, &x4_slots); + err =3D otx2_mcam_pfl_info_get(pfvf, &x4_slots, &kw_type); if (err) { netdev_err(pfvf->netdev, "Error to retrieve NPC profile info, pcifunc=3D%#x\n", @@ -1190,6 +1207,7 @@ static int otx2_add_flow_msg(struct otx2_nic *pfvf, s= truct otx2_flow *flow) return -EFAULT; } =20 + is_x2 =3D kw_type =3D=3D NPC_MCAM_KEY_X2; if (!is_x2) { err =3D otx2_prepare_flow_request(&flow->flow_spec, &treq); --=20 2.43.0 From nobody Wed Jun 17 06:18:36 2026 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A33013D6698; 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 7BECF3F7044; Thu, 23 Apr 2026 03:43:39 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" Subject: [PATCH v3 net 05/11] octeontx2-af: npc: cn20k: Align MCAM X2/X4 use with KEX profile Date: Thu, 23 Apr 2026 16:13:11 +0530 Message-ID: <20260423104317.2707923-6-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: ooRd18Q-2R6pV-FChTvQm7wQchrrO1er X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfX2UVLmNnJRRoC lzIsKkC9/VwlHkX13Fvrb29VU1vag6tKH4+36ZAFhgIm6tdvMqVA8nuHAAX8slzp/n3qLQ8pS0n WUk45bzo8cZUa48308DuEFRodUneGvHqNELT+LofmsgkLlTIQepILMZVqBrrrmgBH8kbhbCAAPy Qkm09/1cL/Cuwf8edq9Lt5XvLtLiUkoGjcAddZnVlRAf5KMzPW42hR7Kv3QtK75kaehbrTFF7xw X5XnfIneC353EjH/nXIO2n1a7CCSOKA74b504Gmg/+40newG/zMfDyp86WYTNsY9gzUNgIlYG+g o3RoIBQm8sJ11zeWwNlR1qcphSbzw1AERXLq7Qddr6GYg/xXm+S76CuieZVAE1lXQSyc3pSGY28 PppZNtMRhdAtwWBv9vgvgL6QJDdjfyYk0x7qo/zp/zI/0ew2kyV/LBVheBTpQWwFxTY+6NkSUv/ 8z+kdbWD2nLjsn3Ielg== X-Proofpoint-GUID: ooRd18Q-2R6pV-FChTvQm7wQchrrO1er X-Authority-Analysis: v=2.4 cv=SJBykuvH c=1 sm=1 tr=0 ts=69e9f7df cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=QXcCYyLzdtTjyudCfB6f:22 a=M5GUcnROAAAA:8 a=KDiXX-RHRRxjKdtkOfgA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Flow install derives whether an NPC MCAM line must be X2 or X4 from the effective key width (>256 bits needs X4). That is only valid when the global KEX profile allows X4 keys; if the profile is X2-only, fail the install with -EOPNOTSUPP instead of allocating a mismatched entry. Default L2 rules allocation always requested X2 keys. When npc_priv.kw is X4, request X4 MCAM entries and wrap the reference index to the MCAM bank depth so default rules match the active key mode. Fixes: 9000cada7aa9 ("octeontx2-af: npc: cn20k: Allocate MCAM entry for flo= w installation") Signed-off-by: Ratheesh Kannoth --- .../net/ethernet/marvell/octeontx2/af/cn20k/npc.c | 11 +++++++++-- .../net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 12 +++++++++++- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 97acba77ff88..74dad164b6a9 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -4328,11 +4328,18 @@ int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 = pcifunc) * as NPC_DFT_RULE_PRIO - 1 (higher hw priority) */ req.contig =3D false; - req.kw_type =3D NPC_MCAM_KEY_X2; req.count =3D cnt; req.hdr.pcifunc =3D pcifunc; req.ref_prio =3D NPC_MCAM_LOWER_PRIO; - req.ref_entry =3D eidx + 1; + + if (npc_priv.kw =3D=3D NPC_MCAM_KEY_X4) { + req.kw_type =3D NPC_MCAM_KEY_X4; + req.ref_entry =3D eidx & (npc_priv.bank_depth - 1); + } else { + req.kw_type =3D NPC_MCAM_KEY_X2; + req.ref_entry =3D eidx; + } + ret =3D rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &req, &rsp); if (ret) { dev_err(rvu->dev, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drive= rs/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index fe10554b1f0e..dd5d50d52964 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -1663,9 +1663,11 @@ rvu_npc_alloc_entry_for_flow_install(struct rvu *rvu, { struct npc_mcam_alloc_entry_req entry_req; struct npc_mcam_alloc_entry_rsp entry_rsp; + struct npc_get_pfl_info_rsp rsp =3D { 0 }; struct npc_get_num_kws_req kws_req; struct npc_get_num_kws_rsp kws_rsp; int off, kw_bits, rc; + struct msg_req req; u8 *src, *dst; =20 if (!is_cn20k(rvu->pdev)) { @@ -1689,8 +1691,16 @@ rvu_npc_alloc_entry_for_flow_install(struct rvu *rvu, kw_bits =3D kws_rsp.kws * 64; =20 *kw_type =3D NPC_MCAM_KEY_X2; - if (kw_bits > 256) + if (kw_bits > 256) { + rvu_mbox_handler_npc_get_pfl_info(rvu, &req, &rsp); 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 100A23F7044; Thu, 23 Apr 2026 03:43:42 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" , Suman Ghosh Subject: [PATCH v3 net 06/11] octeontx2-af: npc: cn20k: Clear MCAM entries by index and key width Date: Thu, 23 Apr 2026 16:13:12 +0530 Message-ID: <20260423104317.2707923-7-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: SJD5zbWfNDuz611sbcGAa4aOvojARhvQ X-Proofpoint-GUID: SJD5zbWfNDuz611sbcGAa4aOvojARhvQ X-Authority-Analysis: v=2.4 cv=ecoNubEH c=1 sm=1 tr=0 ts=69e9f7f0 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=M5GUcnROAAAA:8 a=Te6SKzNpAKJ10Xq2tLIA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfX7EbLrwHQGU1f EGJV3GXK4NaQD5BUtal8SvA5RM9JR9JRROsUJOWT1ZEBRTbxDNTEW+7e1CNmXG8f8M0nsj82/SK 3Vk0jwhgFmpTHEgYQ4XX+XejFGE1jwmKZVn2at0vL6pJ3jtBCZj2XxY2y8Zh6z/y4v+Yo5fljEb jiNdAHjt4GvCHeDAVRQF97AuAro2xH3eg/yC+XZL4F0043vURRaSkAKDFqSnBFGvul11jRmEKQ8 ukYtpMxsW5Nx7Ib2yCAMLSQJXcdsImAx0PWmbxlYFXf6SjrJXG0Z1L3WNomxp49NKo6qChppoJP plSZGCmYNrzTvnmWKlaiyZPVNlsGpQ2g3mKhKlEDPCoj5Me6X8UlBKl/vpMvj7mMLkwUFoUEz5h LzO+Vj88xf5u7/P5wCvGi5MNE++mMqxOibCjctvzqFrJ/dzLrHiF44hUV5PilhQCJ1GEpGIR6DV zlBYu0khFfennYkr7iw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Replace the old four-argument CN20K MCAM clear with a per-bank static helper and npc_cn20k_clear_mcam_entry() that takes a logical MCAM index, resolves the key width via npc_mcam_idx_2_key_type(), and clears either one bank (X2) or every bank (X4). Call it from npc_clear_mcam_entry() on cn20k and log when key-type lookup fails. Use the per-bank helper from npc_cn20k_config_mcam_entry() for pre-program clears. For loopback VFs, use the promisc MCAM index as ucast_idx when copying RSS action for promisc, matching cn20k default-rule layout. Cc: Suman Ghosh Fixes: 6d1e70282f76 ("octeontx2-af: npc: cn20k: Use common APIs") Signed-off-by: Ratheesh Kannoth --- .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 37 ++++++++++++++++--- .../ethernet/marvell/octeontx2/af/cn20k/npc.h | 3 +- .../ethernet/marvell/octeontx2/af/rvu_npc.c | 17 ++++++++- 3 files changed, 48 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 74dad164b6a9..9ded0763ad54 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -842,8 +842,8 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkadd= r, return 0; } =20 -void -npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkaddr, int bank, int ind= ex) +static void +npc_clear_x2_entry(struct rvu *rvu, int blkaddr, int bank, int index) { rvu_write64(rvu, blkaddr, NPC_AF_CN20K_MCAMEX_BANKX_CAMX_INTF_EXT(index, bank, 1), @@ -877,6 +877,33 @@ npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkadd= r, int bank, int index) NPC_AF_CN20K_MCAMEX_BANKX_STAT_EXT(index, bank), 0); } =20 +int +npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkaddr, int mcam_idx) +{ + struct npc_mcam *mcam =3D &rvu->hw->mcam; + int bank =3D npc_get_bank(mcam, mcam_idx); + u8 kw_type; + int index; + + if (npc_mcam_idx_2_key_type(rvu, mcam_idx, &kw_type)) + return -EINVAL; + + index =3D mcam_idx & (mcam->banksize - 1); + + if (kw_type =3D=3D NPC_MCAM_KEY_X2) { + npc_clear_x2_entry(rvu, blkaddr, bank, index); + return 0; + } + + /* For NPC_MCAM_KEY_X4 keys, both the banks + * need to be programmed with the same value. + */ + for (bank =3D 0; bank < mcam->banks_per_entry; bank++) + npc_clear_x2_entry(rvu, blkaddr, bank, index); + + return 0; +} + static void npc_cn20k_get_keyword(struct cn20k_mcam_entry *entry, int idx, u64 *cam0, u64 *cam1) { @@ -1071,7 +1098,7 @@ int npc_cn20k_config_mcam_entry(struct rvu *rvu, int = blkaddr, int index, */ if (kw_type =3D=3D NPC_MCAM_KEY_X2) { /* Clear mcam entry to avoid writes being suppressed by NPC */ - npc_cn20k_clear_mcam_entry(rvu, blkaddr, bank, mcam_idx); + npc_clear_x2_entry(rvu, blkaddr, bank, mcam_idx); npc_cn20k_config_kw_x2(rvu, mcam, blkaddr, mcam_idx, intf, entry, bank, kw_type, kw, req_kw_type); @@ -1096,8 +1123,8 @@ int npc_cn20k_config_mcam_entry(struct rvu *rvu, int = blkaddr, int index, } =20 /* Clear mcam entry to avoid writes being suppressed by NPC */ - npc_cn20k_clear_mcam_entry(rvu, blkaddr, 0, mcam_idx); - npc_cn20k_clear_mcam_entry(rvu, blkaddr, 1, mcam_idx); + npc_clear_x2_entry(rvu, blkaddr, 0, mcam_idx); + npc_clear_x2_entry(rvu, blkaddr, 1, mcam_idx); =20 npc_cn20k_config_kw_x4(rvu, mcam, blkaddr, mcam_idx, intf, entry, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.h index 8f3eea9cfb1d..2f761b97f91b 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h @@ -330,8 +330,7 @@ int npc_cn20k_copy_mcam_entry(struct rvu *rvu, int blka= ddr, int npc_cn20k_read_mcam_entry(struct rvu *rvu, int blkaddr, u16 index, struct cn20k_mcam_entry *entry, u8 *intf, u8 *ena, u8 *hw_prio); -void npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkaddr, - int bank, int index); +int npc_cn20k_clear_mcam_entry(struct rvu *rvu, int blkaddr, int index); int npc_mcam_idx_2_key_type(struct rvu *rvu, u16 mcam_idx, u8 *key_type); u16 npc_cn20k_vidx2idx(u16 index); u16 npc_cn20k_idx2vidx(u16 idx); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_npc.c index ecaf0946b852..44ca65efc80f 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c @@ -261,6 +261,13 @@ static void npc_clear_mcam_entry(struct rvu *rvu, stru= ct npc_mcam *mcam, int bank =3D npc_get_bank(mcam, index); int actbank =3D bank; =20 + if (is_cn20k(rvu->pdev)) { + if (npc_cn20k_clear_mcam_entry(rvu, blkaddr, index)) + dev_err(rvu->dev, "%s Failed to clear mcam %u\n", + __func__, index); + return; + } + index &=3D (mcam->banksize - 1); for (; bank < (actbank + mcam->banks_per_entry); bank++) { rvu_write64(rvu, blkaddr, @@ -755,9 +762,15 @@ void rvu_npc_install_promisc_entry(struct rvu *rvu, u1= 6 pcifunc, =20 /* If the corresponding PF's ucast action is RSS, * use the same action for promisc also + * Please note that for lbk(s) "index" and "ucast_idx" + * will be same. */ - ucast_idx =3D npc_get_nixlf_mcam_index(mcam, pcifunc, - nixlf, NIXLF_UCAST_ENTRY); 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id E167F3F7044; Thu, 23 Apr 2026 03:43:46 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" , Suman Ghosh Subject: [PATCH v3 net 07/11] octeontx2-af: npc: cn20k: Fix bank value. Date: Thu, 23 Apr 2026 16:13:13 +0530 Message-ID: <20260423104317.2707923-8-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: _fsyH5ROpT3Uxd9xii-wawVgMM3yvJH5 X-Proofpoint-GUID: _fsyH5ROpT3Uxd9xii-wawVgMM3yvJH5 X-Authority-Analysis: v=2.4 cv=ecoNubEH c=1 sm=1 tr=0 ts=69e9f7ee cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=M5GUcnROAAAA:8 a=1IUtMPC23dKFR1PEuaoA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfXzgcWi284VBjt FerPpxXT1S/Wyfpub/13nj1eecY/OgBgncOtkYgdUSCD3bF38BOoj67wYNxwbg6qxQXY/BQHOdS Wuy3vQ8y4s5ft+ABcZhMa/9+3lt6f4xSrKNDZ3UYizg7u/Uc/R7aaD2K2CQQkHYvR/UQnT43dmm jvttTQB1uW8TcgLVM+C/dXh1qBEbeAq+hS8ics0F7aDKMEEU0zeIvELEigcAzcicY/8NHF2EvLq XB3cxmSdGu5qyN7LEcDejDnL9osTQ4J1/s3Tmfhyz4x3uPEby2V69V9h5nKHwiW1sPnO5QhxfGc e1Ml+ASXGCZb3aGJo0DUxLgj5B2mQBFiBccngRyBpTQzbblYYjWD0ahUsmPTCCypgEURnOalREs oiI2JlLTJ8xBTiNDvwg+IAscTmEnZgAUhAp0UG1yvLjaK8o+/UPtnEzQTlPEKn7Pu2IaOB5Irra RboHBi3U1vQjQLrTOUQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" or X4 keys its loop reused the bank parameter as the loop counter, so bank no longer reflected the caller's bank after the loop and the control flow was hard to follow. Program NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT directly in npc_cn20k_config_mcam_entry(): one CFG write for X2 using the computed bank, and one CFG write per bank inside the X4 action loop. Enable the entry at the end with npc_cn20k_enable_mcam_entry(..., true) instead of embedding the enable bit in bank_cfg via the removed helper. Cc: Suman Ghosh Fixes: 4e527f1e5c15 ("octeontx2-af: npc: cn20k: Add new mailboxes for CN20K= silicon") Signed-off-by: Ratheesh Kannoth --- .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 92 ++++++++----------- 1 file changed, 37 insertions(+), 55 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 9ded0763ad54..66d0d56f3045 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -1045,34 +1045,6 @@ static void npc_cn20k_config_kw_x4(struct rvu *rvu, = struct npc_mcam *mcam, kw, req_kw_type); } =20 -static void -npc_cn20k_set_mcam_bank_cfg(struct rvu *rvu, int blkaddr, int mcam_idx, - int bank, u8 kw_type, bool enable, u8 hw_prio) -{ - struct npc_mcam *mcam =3D &rvu->hw->mcam; - u64 bank_cfg; - - bank_cfg =3D (u64)hw_prio << 24; - if (enable) - bank_cfg |=3D 0x1; - - if (kw_type =3D=3D NPC_MCAM_KEY_X2) { - rvu_write64(rvu, blkaddr, - NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank), - bank_cfg); - return; - } - - /* For NPC_MCAM_KEY_X4 keys, both the banks - * need to be programmed with the same value. - */ - for (bank =3D 0; bank < mcam->banks_per_entry; bank++) { - rvu_write64(rvu, blkaddr, - NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank), - bank_cfg); - } -} - int npc_cn20k_config_mcam_entry(struct rvu *rvu, int blkaddr, int index, u8 intf, struct cn20k_mcam_entry *entry, bool enable, u8 hw_prio, u8 req_kw_type) @@ -1080,6 +1052,7 @@ int npc_cn20k_config_mcam_entry(struct rvu *rvu, int = blkaddr, int index, struct npc_mcam *mcam =3D &rvu->hw->mcam; int mcam_idx =3D index % mcam->banksize; int bank =3D index / mcam->banksize; + u64 bank_cfg =3D (u64)hw_prio << 24; int kw =3D 0; u8 kw_type; =20 @@ -1119,41 +1092,50 @@ int npc_cn20k_config_mcam_entry(struct rvu *rvu, in= t blkaddr, int index, NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(mcam_idx, bank, 1), entry->vtag_action); - goto set_cfg; - } =20 - /* Clear mcam entry to avoid writes being suppressed by NPC */ - npc_clear_x2_entry(rvu, blkaddr, 0, mcam_idx); - npc_clear_x2_entry(rvu, blkaddr, 1, mcam_idx); - - npc_cn20k_config_kw_x4(rvu, mcam, blkaddr, - mcam_idx, intf, entry, - kw_type, req_kw_type); - for (bank =3D 0; bank < mcam->banks_per_entry; bank++) { - /* Set 'action' */ + /* Set HW priority */ rvu_write64(rvu, blkaddr, - NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(mcam_idx, - bank, 0), - entry->action); + NPC_AF_CN20K_MCAMEX_BANKX_CFG_EXT(mcam_idx, bank), + bank_cfg); =20 - /* Set TAG 'action' */ - rvu_write64(rvu, blkaddr, - NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(mcam_idx, - bank, 1), - entry->vtag_action); + } else { + /* Clear mcam entry to avoid writes being suppressed by NPC */ + npc_clear_x2_entry(rvu, blkaddr, 0, mcam_idx); + npc_clear_x2_entry(rvu, blkaddr, 1, mcam_idx); =20 - /* Set 'action2' for inline receive */ - rvu_write64(rvu, blkaddr, - NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(mcam_idx, - bank, 2), - entry->action2); + npc_cn20k_config_kw_x4(rvu, mcam, blkaddr, + mcam_idx, intf, entry, + kw_type, req_kw_type); + for (bank =3D 0; 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id B5C283F7044; Thu, 23 Apr 2026 03:43:50 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" , Suman Ghosh Subject: [PATCH v3 net 08/11] octeontx2-af: npc: cn20k: Fix MCAM actions read Date: Thu, 23 Apr 2026 16:13:14 +0530 Message-ID: <20260423104317.2707923-9-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: QHFykbhdX6pjM-jwuNc2PJAjxCQ1fOW- X-Proofpoint-GUID: QHFykbhdX6pjM-jwuNc2PJAjxCQ1fOW- X-Authority-Analysis: v=2.4 cv=ecoNubEH c=1 sm=1 tr=0 ts=69e9f7f0 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=M5GUcnROAAAA:8 a=IbDIvz35LZQodz_KiiMA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfXz17JB4h+jitY ydIemkxeu/0bRNMbWy25w53sk08q70u+D74N6u0QVteV1hVFc60xULq9sqfljwabHYv8BhZZLCP YJT+galxR7O3BzmheWlt8I3Nsuzv4iC92dNVfpudZsERnvXI99+N1UahQAo3gHM3yAzyJyUV6br 7HoJtAt5BGTqqj9LrrRr3r/E8YAf9XDRsBZf0z1cj0+7/lagqWudbpwXsztyg81KTjYGnnilN8p hD7PC9HfqkAJiA9+4NL4IX9uayxtvfTfAgoz/kb42htWrJrbCSErVlzpGgiYyhtDLGsA3TckhNd 3MTOmFv6yeH+MS4vMZiawt8nkg+4YY5VNkuTLBQpiPfyJPgjnBFAv36xNv/kOtNz6lYqUGNUK/y Szv4XsI1GilXjQ1Fl3pADWGveHTefKxtlAoPZ2BrBBcZKqwuDRk3Vh5diAWhNAz3xm3F89k9VQo tzJtYA9aNCowf3ldGPQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" npc_cn20k_read_mcam_entry() always reloaded action and vtag_action from bank 0 after programming the CAM words. Use the bank returned by npc_get_bank() for the ACTION reads as well, and read those registers once up front so both X2 and X4 paths share the same metadata. Return directly from the X2 keyword path now that the action fields are already populated. Cc: Suman Ghosh Fixes: 6d1e70282f76 ("octeontx2-af: npc: cn20k: Use common APIs") Signed-off-by: Ratheesh Kannoth --- .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 26 +++++++++---------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 66d0d56f3045..0bcfd1243f12 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -1219,6 +1219,18 @@ int npc_cn20k_read_mcam_entry(struct rvu *rvu, int b= lkaddr, u16 index, bank =3D npc_get_bank(mcam, index); index &=3D (mcam->banksize - 1); =20 + cfg =3D rvu_read64(rvu, blkaddr, + NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(index, bank, 0)); + entry->action =3D cfg; + + cfg =3D rvu_read64(rvu, blkaddr, + NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(index, bank, 1)); + entry->vtag_action =3D cfg; + + cfg =3D rvu_read64(rvu, blkaddr, + NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(index, bank, 2)); + entry->action2 =3D cfg; + cfg =3D rvu_read64(rvu, blkaddr, NPC_AF_CN20K_MCAMEX_BANKX_CAMX_INTF_EXT(index, bank, 1)) & 3; @@ -1268,7 +1280,7 @@ int npc_cn20k_read_mcam_entry(struct rvu *rvu, int bl= kaddr, u16 index, bank, 0)); npc_cn20k_fill_entryword(entry, kw + 3, cam0, cam1); - goto read_action; + return 0; } =20 for (bank =3D 0; bank < mcam->banks_per_entry; bank++, kw =3D kw + 4) { @@ -1313,18 +1325,6 @@ int npc_cn20k_read_mcam_entry(struct rvu *rvu, int b= lkaddr, u16 index, npc_cn20k_fill_entryword(entry, kw + 3, cam0, cam1); } =20 -read_action: - /* 'action' is set to same value for both bank '0' and '1'. - * Hence, reading bank '0' should be enough. - */ - cfg =3D rvu_read64(rvu, blkaddr, - NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(index, 0, 0)); - entry->action =3D cfg; - - cfg =3D rvu_read64(rvu, blkaddr, - NPC_AF_CN20K_MCAMEX_BANKX_ACTIONX_EXT(index, 0, 1)); - entry->vtag_action =3D cfg; - return 0; } =20 --=20 2.43.0 From nobody Wed Jun 17 06:18:36 2026 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C4C33E121D; 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 8AE033F7044; Thu, 23 Apr 2026 03:43:54 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" Subject: [PATCH v3 net 09/11] octeontx2-af: npc: cn20k: Initialize default-rule index outputs up front Date: Thu, 23 Apr 2026 16:13:15 +0530 Message-ID: <20260423104317.2707923-10-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: 35iROhcl8q1kHfZxCw7OF_J1cz90IRUL X-Proofpoint-GUID: 35iROhcl8q1kHfZxCw7OF_J1cz90IRUL X-Authority-Analysis: v=2.4 cv=ecoNubEH c=1 sm=1 tr=0 ts=69e9f7f1 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=M5GUcnROAAAA:8 a=jWBfGndVv8tF2AnpqLMA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfX9WWfUY8G8gMe 62xaiaS8u3qaSO5N+fEPT+8ddtvA3Vt6y7tCmXWx4KXwI5hQOMI4rTyaaYQluB0yZ2X5LGM2qu9 ZhBKRC6zr4ZEqboAnBf+uv+QqHImRVTT5FmZC7/facUF6n3YdDoTv9IMqWfgND1n9wjbI2U5t0Y USRBmVSCc5RCamzYC9yopWuRxwGevkyElJ1bY7zcc/oDi1O6lAklTXeir/th73wQVR0wkoq6ZMO /xjq7txgQb6cruGX2nEtjc8npbaVzFus6Et8QOdIqDy2fydmV4mfV6VWxyjyjqHQXgkp01/aBQd imttivCXTICbwh1ul6cbDbteyHbfOQQw42ognIhHidbc/PhiRh+L2lTh1P8UFBiXoZ9x1Zr+cdX MolYkgO7u0OFcedEAUCRyFtsKZ8822GX28lKe7xn6egX162Y5d96nx/0USQ4+Y/wg0L2sr2uSBs Xlh9s8I7HtPIFz+NbKA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" npc_cn20k_dft_rules_idx_get() wrote USHRT_MAX into individual outputs only on some error paths (lbk promisc lookup, VF ucast lookup, and the PF rule walk), which could leave other caller slots stale across retries. Set every non-NULL bcast/mcast/promisc/ucast pointer to USHRT_MAX once at entry, then drop the duplicate assignments on failure. Successful lookups still overwrite the relevant slot before returning. Fixes: 09d3b7a1403f ("octeontx2-af: npc: cn20k: Allocate default MCAM index= es") Signed-off-by: Ratheesh Kannoth --- drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 0bcfd1243f12..6d3166960a3f 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -4004,6 +4004,13 @@ int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16= pcifunc, u16 *bcast, void *val; int i, j; =20 + for (i =3D 0; i < ARRAY_SIZE(ptr); i++) { + if (!ptr[i]) + continue; + + *ptr[i] =3D USHRT_MAX; + } + if (!npc_priv.init_done) return 0; =20 @@ -4019,7 +4026,6 @@ int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 = pcifunc, u16 *bcast, npc_dft_rule_name[NPC_DFT_RULE_PROMISC_ID], pcifunc); =20 - *ptr[0] =3D USHRT_MAX; return -ESRCH; } =20 @@ -4039,7 +4045,6 @@ int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 = pcifunc, u16 *bcast, npc_dft_rule_name[NPC_DFT_RULE_UCAST_ID], pcifunc); =20 - *ptr[3] =3D USHRT_MAX; return -ESRCH; } =20 @@ -4059,7 +4064,6 @@ int npc_cn20k_dft_rules_idx_get(struct rvu *rvu, u16 = pcifunc, u16 *bcast, __func__, npc_dft_rule_name[i], pcifunc); =20 - *ptr[j] =3D USHRT_MAX; continue; } =20 --=20 2.43.0 From nobody Wed Jun 17 06:18:36 2026 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1FC453E3D9F; Thu, 23 Apr 2026 10:44:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.148.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776941051; cv=none; b=qumubMZ7x5PAJrkxZjtsHO/C4bFR/4uueKr6n4trlV6uPRjVNoXaZiIvUgzUOHBKJk13GRkpX4gj6K9/3Lqc0zeUZzPhR7e5ckV+ddu9s314YV67QzIKAcwmRngFQW0fByWdGMJgvx1lL0z5IjrRY8HW7NN30JPXbPIBjEDc2Zg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776941051; c=relaxed/simple; bh=M1UwfssTOP5km/ySgomsbSJcaJBFiL1z190F8WI5ECI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pZRTm5qXBe4o+qkdgjIvTLqBEsmhDJPdTjzM1yyGxWqxyICpjDvWgNKtyOOyF8Ly1gr/qdPcKSWUWLYr0xIgg2aWSY9hkzAC4dpdI0I1auviDnRUFwLZwBL43MPLNvxtne2WEtprEXPTBXNxwGbf8ZMOpHB5FV30xHymkFiBqEU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com; spf=pass smtp.mailfrom=marvell.com; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b=AcggsXBr; arc=none smtp.client-ip=67.231.148.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=marvell.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="AcggsXBr" Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 63N6GaNW692965; Thu, 23 Apr 2026 03:44:02 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=5 HxdGQ0QEK/0bXSAywlOV1M4B82uvPg106WZkX2w6tw=; b=AcggsXBrjRU6AGShS FikoE+kqZB/hp7AR2nf2aFSWMU8i7LoiXC/fFNWch+I52UwgH38ytEyZIgwRtdZJ GCBA3mYrZYSpSvnwXgiQ0+ry5XRp5jS2+J/Wuvng5iYoEFaSEbFwnYvP0mk+O3wX z2zXd76JKCqQ1XuW9AFBq8kW5fBRnIPbpSWJq/yPWLeE+GOtsgFNuGj1W5z1cJMj uRVfwp1VtJhVs4YIaowiUQw1mTzl5zzuAx3iiLhbBwPHH9xOs4xolT37sNRB/Jn8 Utk2AXWlBhyDCSgVBeY+8EpNtJoPOHexFxAcYX7TG+kPGYb4RCsg8sKdNdtPMFd2 HVijw== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 4dq1n6jfh9-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 23 Apr 2026 03:44:01 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.25; Thu, 23 Apr 2026 03:44:01 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.25 via Frontend Transport; Thu, 23 Apr 2026 03:44:01 -0700 Received: from rkannoth-OptiPlex-7090.. (unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 1DA823F7044; Thu, 23 Apr 2026 03:43:57 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" Subject: [PATCH v3 net 10/11] octeontx2-af: npc: cn20k: Tear down default MCAM rules explicitly on free Date: Thu, 23 Apr 2026 16:13:16 +0530 Message-ID: <20260423104317.2707923-11-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: f_NqYl2w_RBwoo6ksbxRrHYAcuHipN0w X-Proofpoint-GUID: f_NqYl2w_RBwoo6ksbxRrHYAcuHipN0w X-Authority-Analysis: v=2.4 cv=ecoNubEH c=1 sm=1 tr=0 ts=69e9f7f1 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=M5GUcnROAAAA:8 a=7ZpIx3dYB2NUAZqCXlQA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfX7yr2xN954Ev9 8dwY+sxfjsoKSi/VOugAcKVO8DtWmsN1rNWAcLxTYPE1ut6CXv5HzIvCUKuWR6hYuEEbL5G5AvY +rC4QVN9Z6f3U3kY5J+GxkgJVBQuX5pIwpLZWG9gISj/sdoC6kFRtl+OAEFZr2jZZLbgpGV9Dbx l3JVv6yIkkAf3ynojkY781W/L0tr0CxcLnXz2Evw6m4toUnyD8yVlPdNu7m8ogM2gLk2dUqz/9d k8Je/vw5TOKWscwTJFlTCtpnnitV8+XtREpvZYZ0oHq9xbQURTbPlqqRQ3r7fgVSeEbH9vh/bKK UTSC2P8F9TB7RUCfePaLdwf0u1DQIRCBa/NV+Zc7kM1VDmD4MA8YRTdcqURRvmyVssfiFbMkBEz QJkIiczISERFqYWKP7+UP3FlsI3gIdf3sZpSosICYs3qwPutUDmu1SHIpg/+oHp5JuuJxclbPpW uZWzWLGApCIxkPzEFsw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" npc_cn20k_dft_rules_free() used the NPC MCAM mbox "free all" path, which does not match how cn20k tracks default-rule MCAM slots indexes. Resolve the default-rule indices, then for each valid slot clear the bitmap entry, drop the PF/VF map, disable the MCAM line, clear the target function, and npc_cn20k_idx_free(). Remove any matching software mcam_rules nodes. On hard failure from idx_free, WARN and stop so the box stays up for analysis. In npc_mcam_free_all_entries(), prefetch the same default-rule indices and, on cn20k, skip bitmap clear and idx_free when the scanned entry is one of those reserved defaults (they are released by npc_cn20k_dft_rules_free). Still disable the entry and tear down counter mapping for every matching index. Fixes: 09d3b7a1403f ("octeontx2-af: npc: cn20k: Allocate default MCAM index= es") Signed-off-by: Ratheesh Kannoth --- .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 55 +++++++++++++---- .../ethernet/marvell/octeontx2/af/rvu_npc.c | 59 +++++++++++++------ 2 files changed, 86 insertions(+), 28 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 6d3166960a3f..54a25d9c5505 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -4166,11 +4166,11 @@ static bool npc_is_cgx_or_lbk(struct rvu *rvu, u16 = pcifunc) =20 void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 pcifunc) { - struct npc_mcam_free_entry_req free_req =3D { 0 }; + struct npc_mcam *mcam =3D &rvu->hw->mcam; + u16 ptr[4] =3D {[0 ... 3] =3D USHRT_MAX}; + struct rvu_npc_mcam_rule *rule, *tmp; unsigned long index; - struct msg_rsp rsp; - u16 ptr[4]; - int rc, i; + int blkaddr, rc, i; void *map; =20 if (!npc_priv.init_done) @@ -4228,14 +4228,47 @@ void npc_cn20k_dft_rules_free(struct rvu *rvu, u16 = pcifunc) } =20 free_rules: + blkaddr =3D rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); + if (blkaddr < 0) + return; + for (int i =3D 0; i < 4; i++) { + if (ptr[i] =3D=3D USHRT_MAX) + continue; =20 - free_req.hdr.pcifunc =3D pcifunc; - free_req.all =3D 1; - rc =3D rvu_mbox_handler_npc_mcam_free_entry(rvu, &free_req, &rsp); - if (rc) - dev_err(rvu->dev, - "%s: Error deleting default entries (pcifunc=3D%#x\n", - __func__, pcifunc); + mutex_lock(&mcam->lock); + npc_mcam_clear_bit(mcam, ptr[i]); + mcam->entry2pfvf_map[ptr[i]] =3D NPC_MCAM_INVALID_MAP; + npc_cn20k_enable_mcam_entry(rvu, blkaddr, ptr[i], false); + mcam->entry2target_pffunc[ptr[i]] =3D 0x0; + mutex_unlock(&mcam->lock); + + rc =3D npc_cn20k_idx_free(rvu, &ptr[i], 1); + if (rc) { + /* Non recoverable error. Let us WARN and return. Keep system alive to + * enable debugging + */ + WARN(1, "%s Error deleting default entries (pcifunc=3D%#x) mcam_idx=3D%= u\n", + __func__, pcifunc, ptr[i]); + + /* Clear entries from mcam_rules, whose indexes are successfully freed + * by npc_cn20k_idx_free(). + */ + ptr[i] =3D USHRT_MAX; + } + } + + mutex_lock(&mcam->lock); + list_for_each_entry_safe(rule, tmp, &mcam->mcam_rules, list) { + for (int i =3D 0; i < 4; i++) { + if (ptr[i] !=3D rule->entry) + continue; + + list_del(&rule->list); + kfree(rule); + break; + } + } + mutex_unlock(&mcam->lock); } =20 int npc_cn20k_dft_rules_alloc(struct rvu *rvu, u16 pcifunc) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_npc.c index 44ca65efc80f..5d349d131fdb 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c @@ -2521,33 +2521,58 @@ void npc_mcam_clear_bit(struct npc_mcam *mcam, u16 = index) static void npc_mcam_free_all_entries(struct rvu *rvu, struct npc_mcam *mc= am, int blkaddr, u16 pcifunc) { + u16 dft_idxs[NPC_DFT_RULE_MAX_ID] =3D {[0 ... NPC_DFT_RULE_MAX_ID - 1] = =3D USHRT_MAX}; + bool cn20k_dft_rl; u16 index, cntr; int rc; =20 + npc_cn20k_dft_rules_idx_get(rvu, pcifunc, + &dft_idxs[NPC_DFT_RULE_BCAST_ID], + &dft_idxs[NPC_DFT_RULE_MCAST_ID], + &dft_idxs[NPC_DFT_RULE_PROMISC_ID], + &dft_idxs[NPC_DFT_RULE_UCAST_ID]); + /* Scan all MCAM entries and free the ones mapped to 'pcifunc' */ for (index =3D 0; index < mcam->bmap_entries; index++) { - if (mcam->entry2pfvf_map[index] =3D=3D pcifunc) { + if (mcam->entry2pfvf_map[index] !=3D pcifunc) + continue; + + cn20k_dft_rl =3D false; + + if (is_cn20k(rvu->pdev)) { + if (dft_idxs[NPC_DFT_RULE_BCAST_ID] =3D=3D index || + dft_idxs[NPC_DFT_RULE_MCAST_ID] =3D=3D index || + dft_idxs[NPC_DFT_RULE_PROMISC_ID] =3D=3D index || + dft_idxs[NPC_DFT_RULE_UCAST_ID] =3D=3D index) { + cn20k_dft_rl =3D true; + } + } + + /* Disable the entry */ + npc_enable_mcam_entry(rvu, mcam, blkaddr, index, false); + + if (!cn20k_dft_rl) { mcam->entry2pfvf_map[index] =3D NPC_MCAM_INVALID_MAP; /* Free the entry in bitmap */ npc_mcam_clear_bit(mcam, index); - /* Disable the entry */ - npc_enable_mcam_entry(rvu, mcam, blkaddr, index, false); - - /* Update entry2counter mapping */ - cntr =3D mcam->entry2cntr_map[index]; - if (cntr !=3D NPC_MCAM_INVALID_MAP) - npc_unmap_mcam_entry_and_cntr(rvu, mcam, - blkaddr, index, - cntr); mcam->entry2target_pffunc[index] =3D 0x0; - if (is_cn20k(rvu->pdev)) { - rc =3D npc_cn20k_idx_free(rvu, &index, 1); - if (rc) - dev_err(rvu->dev, - "Failed to free mcam idx=3D%u pcifunc=3D%#x\n", - index, pcifunc); - } } + + /* Update entry2counter mapping */ + cntr =3D mcam->entry2cntr_map[index]; + if (cntr !=3D NPC_MCAM_INVALID_MAP) + npc_unmap_mcam_entry_and_cntr(rvu, mcam, + blkaddr, index, + cntr); + + if (!is_cn20k(rvu->pdev) || cn20k_dft_rl) + continue; + + rc =3D npc_cn20k_idx_free(rvu, &index, 1); + if (rc) + dev_err(rvu->dev, + "Failed to free mcam idx=3D%u pcifunc=3D%#x\n", + index, pcifunc); } } =20 --=20 2.43.0 From nobody Wed Jun 17 06:18:36 2026 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7916D3E0C5B; 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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id A47123F7044; Thu, 23 Apr 2026 03:44:01 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" , Suman Ghosh Subject: [PATCH v3 net 11/11] octeontx2-af: npc: cn20k: Reject missing default-rule MCAM indices Date: Thu, 23 Apr 2026 16:13:17 +0530 Message-ID: <20260423104317.2707923-12-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260423104317.2707923-1-rkannoth@marvell.com> References: <20260423104317.2707923-1-rkannoth@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIzMDEwNSBTYWx0ZWRfX4XK/GJUBBhbD ctAbn/xHpoACo7i+gXugSgiZUGqVK1dpbILQ+BWrUP49Q9SocfLz29zd0UtG91dkBXtbisixWih Hz58ds4XaqLjUkNgINvlpWzr9/KqBXHqvIwEjimKLwSOv2QBxE8B3PDxUUE9YKr9lNOTwFgvSlZ hI/WZM9aoOT/prFAENTisOstvmD+wsFMJvkBCxHG59femzhyGU422If1WG50n4HwvxICAk6/7KQ c1Mb6aZREZG+9dD3rk9241o0vc8eWhJGfOAw40TKECE2puv15oD7/J5I8PTnkn6ocM6JMl043DL CHz3VDAQD0qkSNb4JCIKYjyQaWkpJQuR03KuX943C08nmfxFCmCisc5cxjReDlW8ycTZOxqiWuR h+2ns4PoZ89Hz8G8AcmJ/Zcv5hoyVvQclr1zwNxDc2i11wM7QnMcBApO5BQX7PXyBBnKO3zEQ9y VUxiJUc2e67FaIUEJFw== X-Proofpoint-GUID: i-GmSIA2tjkNQkMv1JfmzY7KNvwY2RUL X-Authority-Analysis: v=2.4 cv=N84Z0W9B c=1 sm=1 tr=0 ts=69e9f7f6 cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=qit2iCtTFQkLgVSMPQTB:22 a=M5GUcnROAAAA:8 a=Ojn6p07gvFcpcvQ9mSMA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-ORIG-GUID: i-GmSIA2tjkNQkMv1JfmzY7KNvwY2RUL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-23_02,2026-04-21_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" When cn20k default L2 rules are not installed, npc_cn20k_dft_rules_idx_get() leaves broadcast, multicast, promiscuous, and unicast slots at USHRT_MAX. npc_get_nixlf_mcam_index() previously returned that sentinel as a valid MCAM index, so callers could program hardware with an invalid index. Return -EINVAL from the cn20k branches of npc_get_nixlf_mcam_index() when the requested slot is still USHRT_MAX. Harden cn20k NPC MCAM entry helpers to reject out-of-range indices before touching hardware. Drop the early bounds check in npc_enable_mcam_entry() for cn20k so invalid indices are validated inside npc_cn20k_enable_mcam_entry() instead of being silently ignored. In rvu_npc_update_flowkey_alg_idx(), treat negative MCAM indices like out-of-range values, and only update RSS actions for promiscuous and all-multi paths when the resolved index is non-negative. Cc: Suman Ghosh Fixes: 6d1e70282f76 ("octeontx2-af: npc: cn20k: Use common APIs") Signed-off-by: Ratheesh Kannoth --- .../ethernet/marvell/octeontx2/af/cn20k/npc.c | 14 +- .../ethernet/marvell/octeontx2/af/cn20k/npc.h | 1 + .../ethernet/marvell/octeontx2/af/rvu_nix.c | 3 + .../ethernet/marvell/octeontx2/af/rvu_npc.c | 138 +++++++++++++++++- .../marvell/octeontx2/af/rvu_npc_fs.c | 10 +- .../marvell/octeontx2/af/rvu_npc_hash.c | 19 ++- .../marvell/octeontx2/nic/otx2_flows.c | 1 + 7 files changed, 172 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.c index 54a25d9c5505..1b3f2421ea32 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.c @@ -808,6 +808,9 @@ npc_cn20k_enable_mcam_entry(struct rvu *rvu, int blkadd= r, u64 cfg, hw_prio; u8 kw_type; =20 + if (index < 0 || index >=3D mcam->total_entries) + return -EINVAL; + if (npc_mcam_idx_2_key_type(rvu, index, &kw_type)) return -EINVAL; =20 @@ -1056,6 +1059,9 @@ int npc_cn20k_config_mcam_entry(struct rvu *rvu, int = blkaddr, int index, int kw =3D 0; u8 kw_type; =20 + if (index < 0 || index >=3D mcam->total_entries) + return -EINVAL; + if (npc_mcam_idx_2_key_type(rvu, index, &kw_type)) return -EINVAL; =20 @@ -1148,6 +1154,9 @@ int npc_cn20k_copy_mcam_entry(struct rvu *rvu, int bl= kaddr, u16 src, u16 dest) int bank, i, sb, db; int dbank, sbank; =20 + if (src >=3D mcam->total_entries || dest >=3D mcam->total_entries) + return -EINVAL; + dbank =3D npc_get_bank(mcam, dest); sbank =3D npc_get_bank(mcam, src); =20 @@ -1213,6 +1222,9 @@ int npc_cn20k_read_mcam_entry(struct rvu *rvu, int bl= kaddr, u16 index, int kw =3D 0, bank; u8 kw_type; =20 + if (index >=3D mcam->total_entries) + return -EINVAL; + if (npc_mcam_idx_2_key_type(rvu, index, &kw_type)) return -EINVAL; =20 @@ -4158,7 +4170,7 @@ int rvu_mbox_handler_npc_get_dft_rl_idxs(struct rvu *= rvu, struct msg_req *req, return 0; } =20 -static bool npc_is_cgx_or_lbk(struct rvu *rvu, u16 pcifunc) +bool npc_is_cgx_or_lbk(struct rvu *rvu, u16 pcifunc) { return is_pf_cgxmapped(rvu, rvu_get_pf(rvu->pdev, pcifunc)) || is_lbk_vf(rvu, pcifunc); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h b/driver= s/net/ethernet/marvell/octeontx2/af/cn20k/npc.h index 2f761b97f91b..3d5eb952cc07 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npc.h @@ -335,5 +335,6 @@ int npc_mcam_idx_2_key_type(struct rvu *rvu, u16 mcam_i= dx, u8 *key_type); u16 npc_cn20k_vidx2idx(u16 index); u16 npc_cn20k_idx2vidx(u16 idx); int npc_cn20k_defrag(struct rvu *rvu); +bool npc_is_cgx_or_lbk(struct rvu *rvu, u16 pcifunc); =20 #endif /* NPC_CN20K_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_nix.c index ef5b081162eb..f977734ae712 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -3577,6 +3577,9 @@ static int nix_update_mce_rule(struct rvu *rvu, u16 p= cifunc, mcam_index =3D npc_get_nixlf_mcam_index(mcam, pcifunc & ~RVU_PFVF_FUNC_MASK, nixlf, type); + if (mcam_index < 0) + return -EINVAL; + err =3D nix_update_mce_list(rvu, pcifunc, mce_list, mce_idx, mcam_index, add); return err; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_npc.c index 5d349d131fdb..611cd7fce245 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c @@ -163,14 +163,35 @@ int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, if (rc) return -EFAULT; =20 + if (is_lbk_vf(rvu, pcifunc)) { + if (promisc =3D=3D USHRT_MAX) + return -EINVAL; + return promisc; + } + + if (is_cgx_vf(rvu, pcifunc)) { + if (ucast =3D=3D USHRT_MAX) + return -EINVAL; + + return ucast; + } + switch (type) { case NIXLF_BCAST_ENTRY: + if (bcast =3D=3D USHRT_MAX) + return -EINVAL; return bcast; case NIXLF_ALLMULTI_ENTRY: + if (mcast =3D=3D USHRT_MAX) + return -EINVAL; return mcast; case NIXLF_PROMISC_ENTRY: + if (promisc =3D=3D USHRT_MAX) + return -EINVAL; return promisc; case NIXLF_UCAST_ENTRY: + if (ucast =3D=3D USHRT_MAX) + return -EINVAL; return ucast; default: return -EINVAL; @@ -238,9 +259,6 @@ void npc_enable_mcam_entry(struct rvu *rvu, struct npc_= mcam *mcam, int actbank =3D bank; =20 if (is_cn20k(rvu->pdev)) { - if (index < 0 || index >=3D mcam->banksize * mcam->banks) - return; - if (npc_cn20k_enable_mcam_entry(rvu, blkaddr, index, enable)) dev_err(rvu->dev, "Error to %s mcam %u entry\n", enable ? "enable" : "disable", index); @@ -434,6 +452,15 @@ static u64 npc_get_default_entry_action(struct rvu *rv= u, struct npc_mcam *mcam, =20 index =3D npc_get_nixlf_mcam_index(mcam, pf_func, nixlf, NIXLF_UCAST_ENTRY); + + if (index < 0) { + dev_err(rvu->dev, + "%s: failed to get ucast entry pcifunc:0x%x\n", + __func__, pf_func); + /* Action 0 is drop */ + return 0; + } + bank =3D npc_get_bank(mcam, index); index &=3D (mcam->banksize - 1); =20 @@ -700,6 +727,12 @@ void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 = pcifunc, =20 index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_UCAST_ENTRY); + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get ucast entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } =20 /* Don't change the action if entry is already enabled * Otherwise RSS action may get overwritten. @@ -755,11 +788,21 @@ void rvu_npc_install_promisc_entry(struct rvu *rvu, u= 16 pcifunc, index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_PROMISC_ENTRY); =20 + /* In cn20k, default indexes are installed only for CGX mapped + * and lbk interfaces + */ if (is_cgx_vf(rvu, pcifunc)) index =3D npc_get_nixlf_mcam_index(mcam, pcifunc & ~RVU_PFVF_FUNC_MASK, nixlf, NIXLF_PROMISC_ENTRY); =20 + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get promisc entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } + /* If the corresponding PF's ucast action is RSS, * use the same action for promisc also * Please note that for lbk(s) "index" and "ucast_idx" @@ -770,6 +813,12 @@ void rvu_npc_install_promisc_entry(struct rvu *rvu, u1= 6 pcifunc, else ucast_idx =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_UCAST_ENTRY); + if (ucast_idx < 0) { + dev_err(rvu->dev, + "%s: Error to get ucast/promisc entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } =20 if (is_mcam_entry_enabled(rvu, mcam, blkaddr, ucast_idx)) *(u64 *)&action =3D npc_get_mcam_action(rvu, mcam, @@ -844,6 +893,14 @@ void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16= pcifunc, =20 index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_PROMISC_ENTRY); + + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get promisc entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } + npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable); } =20 @@ -884,6 +941,12 @@ void rvu_npc_install_bcast_match_entry(struct rvu *rvu= , u16 pcifunc, =20 index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_BCAST_ENTRY); + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get bcast entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } =20 if (!hw->cap.nix_rx_multicast) { /* Early silicon doesn't support pkt replication, @@ -948,12 +1011,25 @@ void rvu_npc_install_allmulti_entry(struct rvu *rvu,= u16 pcifunc, int nixlf, =20 index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_ALLMULTI_ENTRY); + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get mcast entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } =20 /* If the corresponding PF's ucast action is RSS, * use the same action for multicast entry also */ ucast_idx =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_UCAST_ENTRY); + if (ucast_idx < 0) { + dev_err(rvu->dev, + "%s: Error to get ucast entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } + if (is_mcam_entry_enabled(rvu, mcam, blkaddr, ucast_idx)) *(u64 *)&action =3D npc_get_mcam_action(rvu, mcam, blkaddr, ucast_idx); @@ -1018,6 +1094,13 @@ void rvu_npc_enable_allmulti_entry(struct rvu *rvu, = u16 pcifunc, int nixlf, =20 index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_ALLMULTI_ENTRY); + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get mcast entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } + npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable); } =20 @@ -1130,8 +1213,12 @@ void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu,= u16 pcifunc, int nixlf, index =3D mcam_index; } =20 - if (index >=3D mcam->total_entries) + if (index < 0 || index >=3D mcam->total_entries) { + dev_err(rvu->dev, + "%s: Invalid mcam index, pcifunc=3D%#x\n", + __func__, pcifunc); return; + } =20 bank =3D npc_get_bank(mcam, index); index &=3D (mcam->banksize - 1); @@ -1175,16 +1262,18 @@ void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu= , u16 pcifunc, int nixlf, /* If PF's promiscuous entry is enabled, * Set RSS action for that entry as well */ - npc_update_rx_action_with_alg_idx(rvu, action, pfvf, index, - blkaddr, alg_idx); + if (index >=3D 0) + npc_update_rx_action_with_alg_idx(rvu, action, pfvf, index, + blkaddr, alg_idx); =20 index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_ALLMULTI_ENTRY); /* If PF's allmulti entry is enabled, * Set RSS action for that entry as well */ - npc_update_rx_action_with_alg_idx(rvu, action, pfvf, index, - blkaddr, alg_idx); + if (index >=3D 0) + npc_update_rx_action_with_alg_idx(rvu, action, pfvf, index, + blkaddr, alg_idx); } } =20 @@ -1197,12 +1286,22 @@ void npc_enadis_default_mce_entry(struct rvu *rvu, = u16 pcifunc, int index, blkaddr, mce_idx; struct rvu_pfvf *pfvf; =20 + /* multicast pkt replication is not enabled for AF's VFs & SDP links */ + if (is_lbk_vf(rvu, pcifunc) || is_sdp_pfvf(rvu, pcifunc)) + return; + blkaddr =3D rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); if (blkaddr < 0) return; =20 index =3D npc_get_nixlf_mcam_index(mcam, pcifunc & ~RVU_PFVF_FUNC_MASK, nixlf, type); + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get entry for pcifunc=3D%#x, type=3D%u\n", + __func__, pcifunc, type); + return; + } =20 /* disable MCAM entry when packet replication is not supported by hw */ if (!hw->cap.nix_rx_multicast && !is_vf(pcifunc)) { @@ -1231,6 +1330,10 @@ static void npc_enadis_default_entries(struct rvu *r= vu, u16 pcifunc, struct npc_mcam *mcam =3D &rvu->hw->mcam; int index, blkaddr; =20 + /* only CGX or LBK interfaces have default entries */ + if (is_cn20k(rvu->pdev) && !npc_is_cgx_or_lbk(rvu, pcifunc)) + return; + blkaddr =3D rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0); if (blkaddr < 0) return; @@ -1240,6 +1343,12 @@ static void npc_enadis_default_entries(struct rvu *r= vu, u16 pcifunc, pfvf->nix_rx_intf)) { index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_UCAST_ENTRY); + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get ucast entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable); } =20 @@ -3897,6 +4006,13 @@ int rvu_mbox_handler_npc_read_base_steer_rule(struct= rvu *rvu, /* Read the default ucast entry if there is no pkt steering rule */ index =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_UCAST_ENTRY); + if (index < 0) { + dev_err(rvu->dev, + "%s: Error to get ucast entry for pcifunc=3D%#x\n", + __func__, pcifunc); + goto out; + } + read_entry: /* Read the mcam entry */ npc_read_mcam_entry(rvu, mcam, blkaddr, index, &rsp->entry, &intf, @@ -3970,6 +4086,12 @@ void rvu_npc_clear_ucast_entry(struct rvu *rvu, int = pcifunc, int nixlf) =20 ucast_idx =3D npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf, NIXLF_UCAST_ENTRY); + if (ucast_idx < 0) { + dev_err(rvu->dev, + "%s: Error to get ucast entry for pcifunc=3D%#x\n", + __func__, pcifunc); + return; + } =20 npc_enable_mcam_entry(rvu, mcam, blkaddr, ucast_idx, false); =20 diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drive= rs/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index dd5d50d52964..d20eb0e47d7d 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -1444,7 +1444,7 @@ static int npc_install_flow(struct rvu *rvu, int blka= ddr, u16 target, struct msg_rsp write_rsp; struct mcam_entry *entry; bool new =3D false; - u16 entry_index; + int entry_index; int err; =20 installed_features =3D req->features; @@ -1477,6 +1477,14 @@ static int npc_install_flow(struct rvu *rvu, int blk= addr, u16 target, if (req->default_rule) { entry_index =3D npc_get_nixlf_mcam_index(mcam, target, nixlf, NIXLF_UCAST_ENTRY); + + if (entry_index < 0) { + dev_err(rvu->dev, + "%s: Error to get ucast entry for target=3D%#x\n", + __func__, target); + return -EINVAL; + } + enable =3D is_mcam_entry_enabled(rvu, mcam, blkaddr, entry_index); } =20 diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/dri= vers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c index 03bb485a1aca..59c1a105faad 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c @@ -1753,7 +1753,7 @@ int rvu_npc_exact_mac_addr_set(struct rvu *rvu, struc= t cgx_mac_addr_set_or_get * u32 seq_id =3D req->index; struct rvu_pfvf *pfvf; u8 cgx_id, lmac_id; - u32 mcam_idx =3D -1; + int mcam_idx =3D -1; int rc, nixlf; =20 rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id); @@ -1783,9 +1783,20 @@ int rvu_npc_exact_mac_addr_set(struct rvu *rvu, stru= ct cgx_mac_addr_set_or_get * =20 /* find mcam entry if exist */ rc =3D nix_get_nixlf(rvu, req->hdr.pcifunc, &nixlf, NULL); - if (!rc) { - mcam_idx =3D npc_get_nixlf_mcam_index(&rvu->hw->mcam, req->hdr.pcifunc, - nixlf, NIXLF_UCAST_ENTRY); + if (rc) { + dev_err(rvu->dev, + "%s: Error to get nixlf pcifunc=3D%#x\n", + __func__, req->hdr.pcifunc); + return LMAC_AF_ERR_PERM_DENIED; + } + + mcam_idx =3D npc_get_nixlf_mcam_index(&rvu->hw->mcam, req->hdr.pcifunc, + nixlf, NIXLF_UCAST_ENTRY); + if (mcam_idx < 0) { + dev_err(rvu->dev, + "%s: Error to get ucast entry for pcifunc=3D%#x\n", + __func__, req->hdr.pcifunc); + return LMAC_AF_ERR_INVALID_PARAM; } =20 rc =3D rvu_npc_exact_add_table_entry(rvu, cgx_id, lmac_id, req->mac_addr, diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c b/driv= ers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c index 5dd0591fed99..b2d777b5cb59 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c @@ -340,6 +340,7 @@ int otx2_mcam_entry_init(struct otx2_nic *pfvf) req->kw_type =3D NPC_MCAM_KEY_X2; if (is_cn20k(pfvf->pdev) && kw_type =3D=3D NPC_MCAM_KEY_X4) { req->kw_type =3D NPC_MCAM_KEY_X4; + /* In X4 profile, x4_slots is equal to bank depth */ ref &=3D (x4_slots - 1); } req->contig =3D false; --=20 2.43.0