From nobody Mon Jun 15 09:36:34 2026 Received: from SA9PR02CU001.outbound.protection.outlook.com (mail-southcentralusazon11013020.outbound.protection.outlook.com [40.93.196.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5AC338D68F; Thu, 23 Apr 2026 08:58:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.196.20 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934714; cv=fail; b=MLWN8jRbo+vricfVh5zbm5xRhSU/a9VCqCdJodPypAea+9rSAlF51xpeeFBUlwBAHzJUXYsKfoozy3C1GstXX+vmQTt1KnT5aVrpbS/+Gl7TaJ5Jp+xlv+Zv7RDpFBxoTpSavlp79dmSYOREHEdN76dnddWs/aeWQhcy5ITy2rE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934714; c=relaxed/simple; bh=EBZSt6VpqLMpLanowhsAB3J0dNK2HTjXPYQ0zIo9weE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=azWm9zh4mG4xNgUzW3j7QC4Qj8R/QHhBrB9e34+W6DJ2qQYMWwZgBnoEbQ4LURE6XudznC8UuAQvPMfOh/1Qjo+vPvZi1MvxQKjgtlp69HoUQWfNxFm6327VjQgX6i8JvtNW8lERIMQKFQusSzMUIZyi4eeaKgUzNtQaFIr8M/8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=TIRTrftm; arc=fail smtp.client-ip=40.93.196.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="TIRTrftm" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Isw9yRdTvhDNOfhuR+hKqRgWvT3cle9wFfXA22QHa1S/vJ4pSI+NxzCYNvlvcYNZ+dz2uH/MubqmjzmodSLZaajIHW/MADbIu4SYIXhciN0o+gYFW5omvV9dcTMB1LnlKY1iInCgGbbytYG17sKYJ16J1pzxypuJxFv24ztUKKCVDpbzFqBViLQfNNG2QHrBz6rhzxWRb4tSnTrat2ZtEtFdVhJz4kDHfJvNR2D01DMJwG2KRbAPBQA+CRzQHOdtK2Z9rrCwSDvLUstt1gQ64QjxN8KMxvI63FPna6PDhkXPAQyfZqMaA8dhs+MAfwkWY5be7TEYQ7llV5DIwWOAfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=bzsnL2U6id2ypmtn57KI2bzWdbhnFF1kii1pZTvcOco=; b=fAMzaIQ44YtM+x5mcDoNW+trbhmlvYy3oZSprliupyMAbCJ/Ii/MFpPyTcZjGxXfymAjcVI4dUDigKo+v1arW2iXvpPrbhnjIqQ+I+VtcXbkVyqJNF/Cs1K95aGuX9JJZXAGHFi8GYrVDtWTbjIrj0bAdvXAf4tAdPph7Z+BOwjAHPHeQrZzTac8HvQaQQCV7Xt3H5ZgzSi5irOeOalcbZ60MD63kWjLVZcYqihRhGcwWPwE6LqrtfipF9RCxEl/KlvzUFGWf3HpIZnApQ9E5heHUFAfuINXWp5oeJ7p3h6EtcVPgPHq69h/yOKPvFecOBcSNAvQAagqvlSPyXnaxw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=bzsnL2U6id2ypmtn57KI2bzWdbhnFF1kii1pZTvcOco=; b=TIRTrftm0UK02HDEMfhmr7G8+let1rtr7Hp+TqMXfJFv6bv5t4RDw04hiH8aPTSCUNXM48AvDwtA5ETvUhvwg/i3n18kzvC2U1MgiizfKwPHslx6pAorAbBECI/k7dDvhheN9FR4TZMRvBCZ0mQZb+VF2wrmHbzF4+KFC24oYyx0f+k+NrlBTzlIuxq3966nLzik3WZ1KLHMIrM2bUi1PBR35gco08PQt4MQs58vKHdkHtKzBFXEdSwDZ6cLrgAl5agdwDa7VkaFBA9PM/M6HuVGUqUnWnQ6531XJ3pbs04vhZm32uyfJ5a1fxwOOx7rOBaGbUM+HYzma1oB3c0j6w== Received: from CH2PR10CA0030.namprd10.prod.outlook.com (2603:10b6:610:4c::40) by CH2PR12MB4216.namprd12.prod.outlook.com (2603:10b6:610:a8::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.16; Thu, 23 Apr 2026 08:58:23 +0000 Received: from CH3PEPF0000000D.namprd04.prod.outlook.com (2603:10b6:610:4c:cafe::43) by CH2PR10CA0030.outlook.office365.com (2603:10b6:610:4c::40) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9791.48 via Frontend Transport; Thu, 23 Apr 2026 08:58:23 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH3PEPF0000000D.mail.protection.outlook.com (10.167.244.43) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 08:58:22 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:58:06 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:58:05 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:57:57 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 01/13] dt-bindings: i3c: Add mipi-i3c-static-method to support SETAASA Date: Thu, 23 Apr 2026 14:27:00 +0530 Message-ID: <20260423085718.70762-2-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000D:EE_|CH2PR12MB4216:EE_ X-MS-Office365-Filtering-Correlation-Id: 5074544e-80df-45d0-453b-08dea1167908 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|36860700016|82310400026|18002099003|22082099003|56012099003|921020; X-Microsoft-Antispam-Message-Info: 7aIEILfsD+4jXOw+bO0gpycA7IyBiqeCNhs1R0PWJAN1LpuQeoo6eEx43uOq/rM8M0KqsoiA743nN6ByMO8b6UTkSFSFnnsdMHF1CoDeBgCP69pgJtySXUCTB63OeZk6ag0ZubzvtN8KGcf0z1ioyzgQUyx0ghYnIqbS2i5ubtW2hkLam+e7w8bQrIg5uXmJWpnzBEpOrHHcUJg9ukdi2cVhWL6tjwR/OMu+JnDBKNoRr16dx/1mb5KOC9hxBANteyBixPqLU9sSu3FRXLuUnv2iLllK3W5Tm2mGqRMHX1MjNWgzlpeOom2ejhw1TtcbdlL8e5Lr+zCCSIqNqgCtRU7ry6jO28R4ya5MyuvqmZ2mu+/uq99ZKZyGrhF6cFjv6bRRWCviCE/8twHSIZW6WCbN5VndQCWNawGWS9VuskjJjTFkYE26IIjsU6SjMvh1+wm4AYREMetKEcf3G/3w9Py9w8oymnmP75f5qOeldfPgyT32P34w8zXyyCIPWJ5fgQF/PDFuVx0j/eEVoRCvcTfKYdsQS8RsyrFRCniAHq13MP6tTSsPNb1EV5UY8vU6q72siUJwnhYW+eJAB6HDrvFLjOOuhRiNTbRvqsaufyvn1r0SAEl+CaT95hT2YqMvl4ZdtrVyQVdqzBr3ooxGTH2Uj6J2xxUXO5hN+v7wGBxviZcTI2cPHcoachrO4dlmJslqSGnYqSVwar3VP8+c7h1YdPBI2vbcV5k/5w9DII7W0Ard3JPFLF+/ujmJ/2Aed5f0c8QievjxDKYWwL/bBoZcVuScbxJso7XPZ69RMf2KmzH8309vslqSQFvW3tmdNhfmra/4z0UY6eYUJm+oJQ== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(36860700016)(82310400026)(18002099003)(22082099003)(56012099003)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: nYgbBf2wusCh6QNvL1cvmeOfr6nnn3ccZj+ABiiAFBDiJd1HE0/T84o3tS7VAn8cxyAWXt4jtXUf2KFA9QbOl/CkTvEERtPliNd08uRpUQ2HFQ1MSA64Ln++uwnJc7YPTdGS6NfqQFZStVGV4yFtVP4khtAzfVM23j4XTIlN48W23+E9ZoTgfKd8s5zhd0oQtzmrHkWtsop4Y3LU26GlOc2KCicyXKJNjL2dGH85D//Y0jeHXEYKJ8fFY9OMj1HYukHaRnUAIopEPYK3GyKhX9LTVaZn0WMLuy4uuJ28J31Rq5NKEGfSNMiftprF+ixKbHt9M6Ch/Z+xh0Ecit1vVhem7LynBrMb5JwnEnmoNIzjND6fjD/qvPmt2Hmv91Fr5tLPw+rZWUf2ZYEyYpdnjLziTJGaDc7+qSX6oyNhiCMx9edJbiOrGp9ggfWrBLKs X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 08:58:22.3466 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5074544e-80df-45d0-453b-08dea1167908 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4216 Content-Type: text/plain; charset="utf-8" Add the 'mipi-i3c-static-method' property mentioned in the MIPI I3C Discovery and Configuration Specification [1] to specify which discovery method an I3C device supports during bus initialization. The property is a bitmap, where a bit value of 1 indicates support for that method, and 0 indicates lack of support. Bit 0: SETDASA CCC (Direct) Bit 1: SETAASA CCC (Broadcast) Bit 2: Other CCC (vendor / standards extension) All other bits are reserved. It is specifically needed when an I3C device requires SETAASA for the address assignment. SETDASA will be supported by default if this property is absent, which means for now the property just serves as a flag to enable SETAASA, but keep the property as a bitmap to align with the specifications. [1] https://www.mipi.org/mipi-disco-for-i3c-download Signed-off-by: Akhil R --- .../devicetree/bindings/i3c/i3c.yaml | 31 ++++++++++++++++--- include/dt-bindings/i3c/i3c.h | 3 ++ 2 files changed, 30 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/i3c/i3c.yaml b/Documentation= /devicetree/bindings/i3c/i3c.yaml index e25fa72fd785..225844abdd1f 100644 --- a/Documentation/devicetree/bindings/i3c/i3c.yaml +++ b/Documentation/devicetree/bindings/i3c/i3c.yaml @@ -31,10 +31,12 @@ properties: described in the device tree, which in turn means we have to describe I3C devices. =20 - Another use case for describing an I3C device in the device tree is = when - this I3C device has a static I2C address and we want to assign it a - specific I3C dynamic address before the DAA takes place (so that oth= er - devices on the bus can't take this dynamic address). + Other use-cases for describing an I3C device in the device tree are: + - When the I3C device has a static I2C address and we want to assign + it a specific I3C dynamic address before the DAA takes place (so + that other devices on the bus can't take this dynamic address). + - When the I3C device requires SETAASA for its discovery and uses a + pre-defined static address. =20 "#size-cells": const: 0 @@ -147,6 +149,27 @@ patternProperties: through SETDASA. If static address is not present, this address = is assigned through SETNEWDA after assigning a temporary address via ENTDAA. =20 + mipi-i3c-static-method: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0x1 + maximum: 0x7 + default: 1 + description: | + Bitmap describing which methods of Dynamic Address Assignment fr= om a + static address are supported by this I3C Target. A bit value of 1 + indicates support for that method, and 0 indicates lack of suppo= rt. + + Bit 0: SETDASA CCC (Direct) + Bit 1: SETAASA CCC (Broadcast) + Bit 2: Other CCC (vendor / standards extension) + All other bits are reserved. + + This property follows the MIPI I3C specification. The primary use + of this property is to indicate support for SETAASA, i.e Bit 1, = but + will allow other values mentioned in the specification so that it + mirrors the specification. SETDASA will remain as the default me= thod + even if this property is not present. + required: - reg =20 diff --git a/include/dt-bindings/i3c/i3c.h b/include/dt-bindings/i3c/i3c.h index 373439218bba..b4ceb9827ec0 100644 --- a/include/dt-bindings/i3c/i3c.h +++ b/include/dt-bindings/i3c/i3c.h @@ -13,4 +13,7 @@ #define I2C_NO_FILTER_HIGH_FREQUENCY (1 << 5) #define I2C_NO_FILTER_LOW_FREQUENCY (2 << 5) =20 +#define I3C_ADDR_METHOD_SETDASA (1 << 0) +#define I3C_ADDR_METHOD_SETAASA (1 << 1) + #endif --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from PH8PR06CU001.outbound.protection.outlook.com (mail-westus3azon11012042.outbound.protection.outlook.com [40.107.209.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B52F3DFC64; Thu, 23 Apr 2026 08:58:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.209.42 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934721; cv=fail; b=pPCEdTaZtClveWkgNgvDqMacrOw4RX0PsvC4LpOGt6Szz6KKMfFv774Hst1s6LagL9O2O4Vg6ELue91vqnBqXvuBMHqwgvKE0pfD2kt1FVwihwxVCOgXBhsuVlyxYAkbwE2tptt/KCghTpALlj2XUqoPL9001U5/VXNyl62npX4= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934721; c=relaxed/simple; bh=Vi5wB12SV1SDthdNPLFWrv0uI6q9IlEm018GjR+1Ol0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QH17GNFeVSmpjifarOrP+JIJMu5nEqwV4dLm8ZvL7ZCYh3fjIoK7YMja1YeR+Qi5axx1g6e3xJnBhlXrabelfLgFh/g5HTomj81163XyGNaC8EGYwdwkJrsJRrrMG2K/9GtlxTfuu619m5Q4507lsQei5W0mlVvODDz1RKRlNJQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=mBnvs5ZT; arc=fail smtp.client-ip=40.107.209.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="mBnvs5ZT" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=wfL2MXPN+5tHMvcMqmBaQWMyhOTpWvXDctzuHa3NqZw/oPmyw+IFnn5jEX4PrxSz5D7kgGZZy2YOKVyIY5RHLKzaiSLn2nhh/ccf2rtdYYrWdaxCrxnqAfziyNgTbVJLjIqNbX1VnoX6ELLzBSyD27hHyBIu4a9sQHePHpKoCTKvjDYDSjPwenqaYZisacfShmy1qxOXHori3eQ5NVJW0gxzY7rbhVqwNqzmbg/cGaWcQgHCQTRcDYSTFgFQzSx1nAFtCT6WfslC7aZjz+Rxx2549DQJsRqmkfV7cFU1kRvhSEK3fgES8fOHjBjqA5m3S0WeDraOVRFhmgmhM/QDwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=mH9YQfukEFqbQvx2cblCsK8OnqqFKsWsJ0xJ+4z5p4M=; b=W6LQ8VYMhjRf+HCHG/8aOLsfeyuxbbx+zBbgW7MgeaPzDnf1I4LjYtaTZxvd4pj6Qp3KfiAVJB3/v8iydR+Hqkf7xy01eHFPXYig/qfS1LJmCvTtjbCyVqT0u9zxB4KY9xh7iPj8w/lbRVJ+WJrG2yzXYzhem2Qhi70OKpUfI0mFJunb7vBFRAag+cv75szXhZaKpJP5yCOEmK1FSfOEegUa/VcQQ0c8E14LbIh4DqbGWtf1q+qQ1vg+nTvWdAChhu10QHcReD/syJW0mfFUy1bLNMOyOMbMC9NIQjkk5quY000ZBcATiMn/NJQt/1Y+EMfVOGhnAqemMqkZrHBLiw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mH9YQfukEFqbQvx2cblCsK8OnqqFKsWsJ0xJ+4z5p4M=; b=mBnvs5ZTHoOWG/qUE8xL6drgFH7OV7pXuPdmkBVRisPXiyX9VkOs9bb/YW7Oyh2W4SfS5F9oLvicCfasWASZHBm9/UM00Te9GUj5n8z2f6lpxWPwRsgaqCnehVj5cvdSNGWzrRu6k+smif4Kpc3dKo6TzI19TYrwT44tiITB0Xsx4GEvrHL2qj7lydWDUZx2otSp1v18okNYOiGD0TT2Bw9zjRDEepOjitJXz0BUB1E2e4dHUcM8uNOsiChoKZvjo4mhGjeknWTMeNfT3cnKfPEcVZCuUAFaAPvzglpQ36H1fWDjEtIPRAN4Sn0rO6L2U5iqGHWf0qmRNokt5V9CPg== Received: from CH0PR03CA0214.namprd03.prod.outlook.com (2603:10b6:610:e7::9) by IA0PR12MB7652.namprd12.prod.outlook.com (2603:10b6:208:434::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.22; Thu, 23 Apr 2026 08:58:35 +0000 Received: from CH3PEPF0000000B.namprd04.prod.outlook.com (2603:10b6:610:e7:cafe::77) by CH0PR03CA0214.outlook.office365.com (2603:10b6:610:e7::9) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9791.48 via Frontend Transport; Thu, 23 Apr 2026 08:58:35 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH3PEPF0000000B.mail.protection.outlook.com (10.167.244.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 08:58:34 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:58:17 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:58:17 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:58:08 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 02/13] ACPICA: Read LVR from the I2C resource descriptor Date: Thu, 23 Apr 2026 14:27:01 +0530 Message-ID: <20260423085718.70762-3-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000B:EE_|IA0PR12MB7652:EE_ X-MS-Office365-Filtering-Correlation-Id: f70134af-692a-4719-f879-08dea1168084 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|7416014|82310400026|1800799024|56012099003|22082099003|18002099003|921020|13003099007; X-Microsoft-Antispam-Message-Info: m+h/xb5bpBuuJok1hGvuL1oI5zrmTjPoF5Axw0kc3d39PRqonCj7HcqNNMauDooUTiq/LkWBJAykuORxa3YRPEf+LIHZjPxopaolkQECRstElQuw70Sh3bE2if6GEBJSBDG+XCSsmb0+Ea/CcdUrtGELr26YbOlLZ2PpOz65N4ccvqCZerzRChpp6YQegkApKMtI14dwm/2SYMJLnI+fiFk2wzjVb0ERxnBQ75OnP8ar4SdVmmxmW0BNEUcPh/uPKvbiELsO6xxbt4oT5xBqeepeTF5VI4kpUd+Q2TlqfowJKYTJKL90nE5O8ehrZRASmIhW4gNmqs9FKfZUN472HAva0MlXc1Jx6q+ommd8XUsQ6tGCdBLc4Qs3B+6aMrqCWMrgXziGGcjpJ+N3UaOCHdN03TKN6NSvarZbDO0NYl8HN15mxiG/61fKC2Ac7Q5vKLP/WK6UGSgHaGynQ4QnIMwiQmLuc/x32qW5vE+UEKWN6ixInCn6t14FFPxsGSnchEJjcsFz3svnY77ti3+024JYRj8uEUI4C4KMvLUugYIpJFqAdSPA92VJK2j/FfTgvLuBI0wltb68eNTXOprYPjNRGBd3+f3KJ8+myM5q1RDAhWRUQ/imZiAMeh5D/omVkVXqDHsOVReRSY1kBcEbxyq4P+JbMFRfgtRg6nGoRFpEna69MUFtf+3fjpzrcYwIkQm8Mb1l+jA5itaaRU8XIQ/zai/SJ0vYfrRfobkmuW4ZEXNtQ2uXV0zUOLFlmZmHHvoiLSdfuIoljLG3idCHos7GUPRilsd31oJR8IBDitekSGZGo8Vfm4GffqM3keFygA0UsAjfaNvxx2QtUdcpzQ== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(376014)(7416014)(82310400026)(1800799024)(56012099003)(22082099003)(18002099003)(921020)(13003099007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JEKxt6+wdhLfBmWXaHkjlsksm4FvVjUYPCICwfvk2PSVza0DgAKyjifWyiHD9SQdvXY+SwyiG4hgqFKJOBka/chHdHnUOOe9lYTZw7n0mAy3iOVFCS5I6C050RjtFINpv7yuglMzLM+ICrcmIHFLJXelK85s9RgLenssvwSurRdiUPLsUqX15zHObUWJ0cq3YY6caa+KORxFS0f8pcZhQ+j4+l0qzVt+mfjcFEiKPJwMXhA70VslI80tCdbiFxnTKvY0mFXl2H4b4ZkxE41Xi5z/yISAX2ctiqIoiBMgp8ZL5k6V3d1azx9C0FTcmc1HxJ3pdXkZk7d5SHBX9JvzQbXvGx9kjevc4NEvmct+2oZsP6NkpP4JMbEkVEjj9hzVutFIqivX/LjOib2Qtb8XqJ9x4ItwUwsleJKydb0rgGVFG/y8QK3042gx4DYtCtpJ X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 08:58:34.9094 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f70134af-692a-4719-f879-08dea1168084 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7652 Content-Type: text/plain; charset="utf-8" ACPI 6.3 specifies byte 8 of I2C Serial Bus Connection descriptor to be used for Legacy Virtual Register (LVR) data as specified in the MIPI I3C Specification for an I2C device connected to an I3C Host Controller. LVR will be read by I3C host controller drivers and it provides details about the specific speed and 50ns spike filter capabilities of I2C devices. Update the rsconvert_info to include this field. For I2C devices on an I2C bus, this field is Reserved and unused. Link: https://github.com/acpica/acpica/commit/70082dc8 Link: https://github.com/acpica/acpica/commit/b3c38dc9 Acked-by: Rafael J. Wysocki (Intel) # ACPI Signed-off-by: Akhil R --- drivers/acpi/acpica/rsserial.c | 6 +++++- include/acpi/acrestyp.h | 1 + 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/acpica/rsserial.c b/drivers/acpi/acpica/rsserial.c index 279bfa27da94..c06e918ab889 100644 --- a/drivers/acpi/acpica/rsserial.c +++ b/drivers/acpi/acpica/rsserial.c @@ -315,7 +315,7 @@ struct acpi_rsconvert_info acpi_rs_convert_csi2_serial_= bus[14] =3D { * *************************************************************************= *****/ =20 -struct acpi_rsconvert_info acpi_rs_convert_i2c_serial_bus[17] =3D { +struct acpi_rsconvert_info acpi_rs_convert_i2c_serial_bus[18] =3D { {ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_SERIAL_BUS, ACPI_RS_SIZE(struct acpi_resource_i2c_serialbus), ACPI_RSC_TABLE_SIZE(acpi_rs_convert_i2c_serial_bus)}, @@ -391,6 +391,10 @@ struct acpi_rsconvert_info acpi_rs_convert_i2c_serial_= bus[17] =3D { AML_OFFSET(i2c_serial_bus.type_specific_flags), 0}, =20 + {ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.i2c_serial_bus.lvr), + AML_OFFSET(i2c_serial_bus.type_specific_flags) + 1, + 1}, + {ACPI_RSC_MOVE32, ACPI_RS_OFFSET(data.i2c_serial_bus.connection_speed), AML_OFFSET(i2c_serial_bus.connection_speed), 1}, diff --git a/include/acpi/acrestyp.h b/include/acpi/acrestyp.h index 842f932e2c2b..38a19b1d19ac 100644 --- a/include/acpi/acrestyp.h +++ b/include/acpi/acrestyp.h @@ -423,6 +423,7 @@ struct acpi_resource_i2c_serialbus { ACPI_RESOURCE_SERIAL_COMMON u8 access_mode; u16 slave_address; u32 connection_speed; + u8 lvr; }; =20 /* Values for access_mode field above */ --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from PH8PR06CU001.outbound.protection.outlook.com (mail-westus3azon11012063.outbound.protection.outlook.com [40.107.209.63]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04A722F25F5; Thu, 23 Apr 2026 08:59:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.209.63 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934754; cv=fail; b=JE6l1dZS6FxrQN+nIu7itGf6s/+jnvUdV8P70vSkdS16SltNCHiXCTzFPZuDLdmjpWJlr/s1xedoxOv+fpRJTv8ln3eTyA3Y2t40WvtT0QUZS5A7JHDLAisDdAuej0GjIa5QqB+sQqFJWp8fMkr+vT8TUmSVfa0a8uieVYMfPJU= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934754; c=relaxed/simple; bh=Cz7qjfne4Sdd1aoiZitknkA959TpN1hPUxgpQL9FHqQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=CgvQAZiPNJU/3LCJSAp39pfVc6ZQ7ih2wNxYwOMBEj2BGuAM9Ycir932iKMcQ8b46MTKKuQhP8nGXs0NJx5TBsHTXLPcaNfcGZXU0ojRfnOGZ36GXovkInlawlGlk9jfMa/LBC8U/Tgjw4aYa6U5RraRYQTCHuHqpaeFhfAJU24= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=kHZabYLA; arc=fail smtp.client-ip=40.107.209.63 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="kHZabYLA" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=FvztL3n6QewUtNiAEdRMHR/FoRgTkXzAhpGvVz27QtHq87Q3bDwtjYE1+bmZzSqp5KVfHWzJUULMHn/J+aBo3q9O0QSxFUQszjKb+YcVml+k8beTtF7p5WMYwhjwAC1iEY/0JM+5wJDNgkl2TWLIiCU+zGeRSrzD14Wz/B6w/xxsTmCu/Tuqf6O5b1D+T4osEcvWNUF9YtsOUsWCkfeFeSxf4Or3NG+Yxs9Zsto6ZI91OmR9eoSgZlWGuIRjgLUOXnQT3inMhM4lFqjRAiKkjM1fjhZWmyqXhtCk8E6ghsQ58P0+bFrRjIZ8F/aSwp83SoMREH9Q6UUvR7GRlqer8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=cdJR/l7NuFumWPwb4nyp/FXVAJ1HR9ymMBiQPReyrCE=; b=VWvrUalPqpfkGIKQVAZqvPRYrnQyqn1CU5bSiu7dq6hPgJldJIazefxY90njkQEhTI7JVBWM/I7SSkeW0oF6HbGgexeERi5ika4e6uNfiFrI26/0sdiaxhEDrLNtwvWpfkLuOa4u7KofVrtiG4jONjNpdqgjcK4taEC8uNgQD5YPHzkJzcHTLsHkJz09ovcDIQkpprUhjmsFFUviMqUBiGHnSX38NkNllxREqxMxO7JJvDEQ3Lz8ks9xvVwoal86+5xcpHDsplqquv6UL7AMBqcdowTigXF7bU5hhNnzwmK0SEvDkR4JXqZVtJM7/XmvNPPkfSlY+8/dMPBPbOjsWQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cdJR/l7NuFumWPwb4nyp/FXVAJ1HR9ymMBiQPReyrCE=; b=kHZabYLAE/0Q61oeUDZMeohB5d6QRGIr4PihBCPC+hSLKZ3cAUNfkz9xXHBUbzdaQJweaHzBeNf/fj1uj2Oz7hPbgz7Hhu6/OrFiUy4YZeELsWO9du3B5GZkJREGTTM2cM19WjzOCsVPX7njLHdwC7baW5l8vVEvVDrUwCOIwYkFQzwJRdxiy+DaULIhypurT8SBwubFREGOCjNtKyl7LWeOZ0rq8xAOCVBiB35ZiX27PAq5z+YYjQj1EpIr1Qz6DNCZtFilPB49QU+9XFy+MEAg0Nqz+KNrA5AunkigTkv1kkFKKoBeFVwYWTgNksVmyM3ztB5RPOAW+2yUoq1HyQ== Received: from BYAPR05CA0072.namprd05.prod.outlook.com (2603:10b6:a03:74::49) by CH8PR12MB9767.namprd12.prod.outlook.com (2603:10b6:610:275::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.22; Thu, 23 Apr 2026 08:59:02 +0000 Received: from CO1PEPF000075F2.namprd03.prod.outlook.com (2603:10b6:a03:74:cafe::17) by BYAPR05CA0072.outlook.office365.com (2603:10b6:a03:74::49) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9846.20 via Frontend Transport; Thu, 23 Apr 2026 08:59:02 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000075F2.mail.protection.outlook.com (10.167.249.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 08:59:01 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:58:38 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:58:38 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:58:29 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 03/13] i3c: master: Use unified device property interface Date: Thu, 23 Apr 2026 14:27:02 +0530 Message-ID: <20260423085718.70762-4-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F2:EE_|CH8PR12MB9767:EE_ X-MS-Office365-Filtering-Correlation-Id: b7e22a13-9400-4393-3bde-08dea1169034 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|7416014|36860700016|921020|18002099003|22082099003|56012099003; X-Microsoft-Antispam-Message-Info: 7cm9xnxtx3lIzPnw/2cBNjqVHlfeNHdUFmQPjXoET0fSii/QlFcRPQY2sa2eg9ocKrLDZXpY58eEO0oviY4KmdZ3Mi+5Vqy5SU12oV3r30PwEmV8p+fZzrDXnANbH/Tpx6eesT61oLd/reqpFdztzKS5GeYLeQMKAbSfPhVKqER69dV45oA//3hXDRxYC4+SqM4E8kpdU7q09cSu2oOGYpMB007fsr3Y5sqamlG1TtNqovFbqm9Iz7eabdqMDYGKEO2l7kK2i9amTj9+UMvApnaeZUK5sIQOpLri0OOFBitos8FFx0ZdQeHF4v30oQiR+kjlXnm9JVf7eDTXaOC4VnxURGGG+0xmL6v7xHKX7BM79PEP4mW9N0/BKBJW9xcxHZAobHfOg2FAHsfWxrhCXUVDu7CxaLd23dkrKCO3ql78ftu+Q57o46r5NeFHbV9dfuLHi21Ke35C6tJl2L2FKbObwL0zMS8mdalPGa+HYWWu7TWVxfqv0AS9q1LD9Q/41wuRBSOX6Ex6RaHdeO/tVOXO2s14GG+SGODloL0AnXXn8WhkQOdUX8jVnvvdVlWwt6FO0FzkeUfSPdebjWYZstnszcloUzYjPu6sW8EAS5cQuttYf3O32uvKQqFG5Uv7U4zulqKDJMQ902w2O3w3sMJh3yl121al1dsHUwBTD0QEw5/bNGGEKuOAmy7j5ScT6YepOZ/6PpA0mLb5CVshRywp8JrGtsKRWMjIcSrqfGSdeTDrmuSQn7268JbmZou2Fq06fn/Mkoy3b5Zhm12dxXWAVuf2/NzhEL5NSR5yTORT7HejME15WaPxm9ONZ1r9 X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(7416014)(36860700016)(921020)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NordSlb6fRuSNzoI0ZH35xEMfbvazt380K6CDjvUgmP4g5j5EJtbw6I9oIEjAQz1KhH8/WWsC4awr3O/PkLBitcmSGy1SvEzJ44jZhwQfO9DsTKbDo/QS7n5ozHZI1S9LVAzGsesyahr29qmB7N2i06mqpM1k9Jn3LfmxJZ8Ke1ilhpF4tUvSyhfF8aCjKJ4hP25/Bh399kFGMcX14qssy12R8kS5FfkSrS3g/DaeUpta96wWIr6RkrBiUA9VFpV2PEgNJFERwJ3Mo12e9x4ada3KLHNYJli5P301aJAQOLu2P6ghGNdJNegyAth5PIGVFZjG73dMpcVhPzVA1lqipT70wfJe3ExVYl4GmMNXx1W67fjhtUQ9bW+OWpDUhYnYmydNgvnF/ltwFFpXzJVq/wcYLJEY2HdY0/Vd0T5fn9R8pHjsreVKwOqAzC333DX X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 08:59:01.2472 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b7e22a13-9400-4393-3bde-08dea1169034 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH8PR12MB9767 Content-Type: text/plain; charset="utf-8" Replace all OF-specific functions with unified device property functions as a prerequisite to support both ACPI and device tree. Reviewed-by: Frank Li Signed-off-by: Akhil R --- drivers/i3c/master.c | 77 +++++++++++++++++++++----------------- include/linux/i3c/master.h | 5 ++- 2 files changed, 46 insertions(+), 36 deletions(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 5cd4e5da2233..d0677061faab 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -11,10 +11,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include #include @@ -497,7 +499,7 @@ static void i3c_bus_cleanup(struct i3c_bus *i3cbus) mutex_unlock(&i3c_core_lock); } =20 -static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np) +static int i3c_bus_init(struct i3c_bus *i3cbus, struct fwnode_handle *fwno= de) { int ret, start, end, id =3D -1; =20 @@ -507,8 +509,8 @@ static int i3c_bus_init(struct i3c_bus *i3cbus, struct = device_node *np) i3c_bus_init_addrslots(i3cbus); i3cbus->mode =3D I3C_BUS_MODE_PURE; =20 - if (np) - id =3D of_alias_get_id(np, "i3c"); + if (fwnode && is_of_node(fwnode)) + id =3D of_alias_get_id(to_of_node(fwnode), "i3c"); =20 mutex_lock(&i3c_core_lock); if (id >=3D 0) { @@ -811,7 +813,7 @@ static void i3c_masterdev_release(struct device *dev) WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); i3c_bus_cleanup(bus); =20 - of_node_put(dev->of_node); + fwnode_handle_put(dev->fwnode); } =20 static const struct device_type i3c_masterdev_type =3D { @@ -993,7 +995,7 @@ static void i3c_device_release(struct device *dev) =20 WARN_ON(i3cdev->desc); =20 - of_node_put(i3cdev->dev.of_node); + fwnode_handle_put(dev->fwnode); kfree(i3cdev); } =20 @@ -1789,7 +1791,7 @@ i3c_master_register_new_i3c_devs(struct i3c_master_co= ntroller *master) desc->info.pid); =20 if (desc->boardinfo) - desc->dev->dev.of_node =3D desc->boardinfo->of_node; + device_set_node(&desc->dev->dev, desc->boardinfo->fwnode); =20 ret =3D device_register(&desc->dev->dev); if (ret) { @@ -2408,8 +2410,8 @@ EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); #define OF_I3C_REG1_IS_I2C_DEV BIT(31) =20 static int -of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, - struct device_node *node, u32 *reg) +i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, + struct fwnode_handle *fwnode, u32 *reg) { struct i2c_dev_boardinfo *boardinfo; struct device *dev =3D &master->dev; @@ -2419,9 +2421,13 @@ of_i3c_master_add_i2c_boardinfo(struct i3c_master_co= ntroller *master, if (!boardinfo) return -ENOMEM; =20 - ret =3D of_i2c_get_board_info(dev, node, &boardinfo->base); - if (ret) - return ret; + if (is_of_node(fwnode)) { + ret =3D of_i2c_get_board_info(dev, to_of_node(fwnode), &boardinfo->base); + if (ret) + return ret; + } else { + return -EINVAL; + } =20 /* * The I3C Specification does not clearly say I2C devices with 10-bit @@ -2437,14 +2443,14 @@ of_i3c_master_add_i2c_boardinfo(struct i3c_master_c= ontroller *master, boardinfo->lvr =3D reg[2]; =20 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); - of_node_get(node); + fwnode_handle_get(fwnode); =20 return 0; } =20 static int -of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, - struct device_node *node, u32 *reg) +i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, + struct fwnode_handle *fwnode, u32 *reg) { struct i3c_dev_boardinfo *boardinfo; struct device *dev =3D &master->dev; @@ -2467,7 +2473,7 @@ of_i3c_master_add_i3c_boardinfo(struct i3c_master_con= troller *master, =20 boardinfo->static_addr =3D reg[0]; =20 - if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { + if (!fwnode_property_read_u32(fwnode, "assigned-address", &init_dyn_addr)= ) { if (init_dyn_addr > I3C_MAX_ADDR) return -EINVAL; =20 @@ -2484,14 +2490,14 @@ of_i3c_master_add_i3c_boardinfo(struct i3c_master_c= ontroller *master, return -EINVAL; =20 boardinfo->init_dyn_addr =3D init_dyn_addr; - boardinfo->of_node =3D of_node_get(node); + boardinfo->fwnode =3D fwnode_handle_get(fwnode); list_add_tail(&boardinfo->node, &master->boardinfo.i3c); =20 return 0; } =20 -static int of_i3c_master_add_dev(struct i3c_master_controller *master, - struct device_node *node) +static int i3c_master_add_dev(struct i3c_master_controller *master, + struct fwnode_handle *fwnode) { u32 reg[3]; int ret; @@ -2499,7 +2505,7 @@ static int of_i3c_master_add_dev(struct i3c_master_co= ntroller *master, if (!master) return -EINVAL; =20 - ret =3D of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); + ret =3D fwnode_property_read_u32_array(fwnode, "reg", reg, ARRAY_SIZE(reg= )); if (ret) return ret; =20 @@ -2508,25 +2514,25 @@ static int of_i3c_master_add_dev(struct i3c_master_= controller *master, * dealing with an I2C device. */ if (!reg[1]) - ret =3D of_i3c_master_add_i2c_boardinfo(master, node, reg); + ret =3D i3c_master_add_i2c_boardinfo(master, fwnode, reg); else - ret =3D of_i3c_master_add_i3c_boardinfo(master, node, reg); + ret =3D i3c_master_add_i3c_boardinfo(master, fwnode, reg); =20 return ret; } =20 -static int of_populate_i3c_bus(struct i3c_master_controller *master) +static int fwnode_populate_i3c_bus(struct i3c_master_controller *master) { struct device *dev =3D &master->dev; - struct device_node *i3cbus_np =3D dev->of_node; + struct fwnode_handle *fwnode =3D dev_fwnode(dev); int ret; u32 val; =20 - if (!i3cbus_np) + if (!fwnode) return 0; =20 - for_each_available_child_of_node_scoped(i3cbus_np, node) { - ret =3D of_i3c_master_add_dev(master, node); + fwnode_for_each_available_child_node_scoped(fwnode, child) { + ret =3D i3c_master_add_dev(master, child); if (ret) return ret; } @@ -2536,10 +2542,10 @@ static int of_populate_i3c_bus(struct i3c_master_co= ntroller *master) * on the bus are not supporting typical rates, or if the bus topology * prevents it from using max possible rate. */ - if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) + if (!device_property_read_u32(dev, "i2c-scl-hz", &val)) master->bus.scl_rate.i2c =3D val; =20 - if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) + if (!device_property_read_u32(dev, "i3c-scl-hz", &val)) master->bus.scl_rate.i3c =3D val; =20 return 0; @@ -2594,7 +2600,7 @@ static u8 i3c_master_i2c_get_lvr(struct i2c_client *c= lient) u8 lvr =3D I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; u32 reg[3]; =20 - if (!of_property_read_u32_array(client->dev.of_node, "reg", reg, ARRAY_SI= ZE(reg))) + if (!fwnode_property_read_u32_array(client->dev.fwnode, "reg", reg, ARRAY= _SIZE(reg))) lvr =3D reg[2]; =20 return lvr; @@ -2713,7 +2719,8 @@ static int i3c_master_i2c_adapter_init(struct i3c_mas= ter_controller *master) struct i2c_adapter *adap =3D i3c_master_to_i2c_adapter(master); struct i2c_dev_desc *i2cdev; struct i2c_dev_boardinfo *i2cboardinfo; - int ret, id; + struct fwnode_handle *fwnode =3D dev_fwnode(&master->dev); + int ret, id =3D -1; =20 adap->dev.parent =3D master->dev.parent; adap->owner =3D master->dev.parent->driver->owner; @@ -2722,7 +2729,9 @@ static int i3c_master_i2c_adapter_init(struct i3c_mas= ter_controller *master) adap->timeout =3D HZ; adap->retries =3D 3; =20 - id =3D of_alias_get_id(master->dev.of_node, "i2c"); + if (fwnode && is_of_node(fwnode)) + id =3D of_alias_get_id(to_of_node(fwnode), "i2c"); + if (id >=3D 0) { adap->nr =3D id; ret =3D i2c_add_numbered_adapter(adap); @@ -3023,7 +3032,7 @@ int i3c_master_register(struct i3c_master_controller = *master, return ret; =20 master->dev.parent =3D parent; - master->dev.of_node =3D of_node_get(parent->of_node); + device_set_node(&master->dev, fwnode_handle_get(dev_fwnode(parent))); master->dev.bus =3D &i3c_bus_type; master->dev.type =3D &i3c_masterdev_type; master->dev.release =3D i3c_masterdev_release; @@ -3042,13 +3051,13 @@ int i3c_master_register(struct i3c_master_controlle= r *master, master->dev.coherent_dma_mask =3D parent->coherent_dma_mask; master->dev.dma_parms =3D parent->dma_parms; =20 - ret =3D i3c_bus_init(i3cbus, master->dev.of_node); + ret =3D i3c_bus_init(i3cbus, dev_fwnode(&master->dev)); if (ret) goto err_put_dev; =20 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); =20 - ret =3D of_populate_i3c_bus(master); + ret =3D fwnode_populate_i3c_bus(master); if (ret) goto err_put_dev; =20 diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h index 592b646f6134..6b03a3ce574c 100644 --- a/include/linux/i3c/master.h +++ b/include/linux/i3c/master.h @@ -177,7 +177,8 @@ struct i3c_device_ibi_info { * @pid: I3C Provisioned ID exposed by the device. This is a unique identi= fier * that may be used to attach boardinfo to i3c_dev_desc when the device * does not have a static address - * @of_node: optional DT node in case the device has been described in the= DT + * @fwnode: Firmware node (DT or ACPI) in case the device has been + * described in firmware * * This structure is used to attach board-level information to an I3C devi= ce. * Not all I3C devices connected on the bus will have a boardinfo. It's on= ly @@ -189,7 +190,7 @@ struct i3c_dev_boardinfo { u8 init_dyn_addr; u8 static_addr; u64 pid; - struct device_node *of_node; + struct fwnode_handle *fwnode; }; =20 /** --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from PH0PR06CU001.outbound.protection.outlook.com (mail-westus3azon11011035.outbound.protection.outlook.com [40.107.208.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92F523DFC6B; Thu, 23 Apr 2026 08:59:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.208.35 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934756; cv=fail; b=rNHBfoO3S2+9O1MmqipF1mkRtzmeuPCx9IEgFK1ZCqbu79F8UdEE/ghBfNd4sPOOSf9V5iAs+xbBxw308NBKVJsAcEv3l7rEsAASmXBleI64YKOvugiWETklt4eBtqwxP/7x0Hxl3oCb3y79ps/JJyHO6dA0tnmgt8JmcuhCWtQ= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934756; c=relaxed/simple; bh=Myjzc3Xch/GT2D5vkLkEObWRhP9v2wjnL0Lo3aE0U/I=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NxtWIsUWmQv8fXsq7gzAi9UnD2psMBU4bt9JbAnPka8H1B9aSbYDcT+8wHIo8WVpUy3fdXCGQtMLnctiDkPD99T249urULdU66FfuWTvMu8uhjCw/jlQJge2W4mCzhdioSqfVlIxGJeg1W6HEyRrC36QHQgVVNdMoRccuFpLPL0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=IrQSy/Ya; arc=fail smtp.client-ip=40.107.208.35 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="IrQSy/Ya" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=WYXCKGJIzUuZfWKYEliPHqOrjUZaggU8e8ZM3PEaAsyKt8CTRBjNfmVuGYKrG/zHbsFN3GPd9D8VqXurxyacoTmwIUTxOlvHJhvSg05DTIdgZgw4zc8dCxXL10Uvh2sYgqGoWBaAS6hf2rdsJZ6G5rD6jqfUQazxzE7dalEUpV9hkaGFuVyl7vSHHjzurSnaJJx2ouyn01cWvdbzck/yXcLFCkf2VIWoW7PoDKz4gUeKb2AA32sipFGSRQ2fg0oWpzlaYfDqM8KTPtWF0gDe10tQu3JjPmE413OJe0J3IM2vnEk8768HBguNnaDVD2/TZoSNRt7is06gQTnMG9Phvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=/oO13TN0bYaIX6MgiDPfO/k6cFCMqHGXAZ2+0IfZ6Gg=; b=K5Oi44JVxGQ0NyR1syxhha3k8Mr0PTj6ykOdaHuzsMeMYiHUtpFgRIRWcy2FLGe+A6Y+/Z/Yf0EB/5vQHLybpRkAxgbP+vO2WesdJR0rDFsnsfgjfC33qEW+3rxmyJpO0btuTtWMvH/qU/WDloJxXU/HFmJ1NBnCz8HpQ9C8Y0MTGSRoYzhg2cy+CcbRQf7Wwzw/SyzlDCtI8FJn40Kqru5uGCN5ocIYv4F74FYcPzv53ZQnuUEEfeauqOCU/u7/QvEXEectme/c9ezntlgmZGGrXzx9+yr49u9I3S1P958Ph46Jp2BDPr2mCUbeUkEIIaheQMB88JXSCcbjBAlkeA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/oO13TN0bYaIX6MgiDPfO/k6cFCMqHGXAZ2+0IfZ6Gg=; b=IrQSy/YaVRkx6H8th/JnPY7bWuUb5VQsj0kaL/O3KLmKs0yz49p5rptTqKEUdeR2TjN60Fms6OYTgDf9bS5fUqcwvPZYxJcqusu6emGEmwBf/aabEwBZLsqf8rRSAq5Qtah23jHd4b0LdSRuJqP4djEDoKLrvd8Dqr1XfYOOnu3CM2wPV4avcB15LvmPWpabY0jxWadDRaw4JIKw9ysRu3NmtWO+YEiLC/mWghrenlzGrOzUOjZp55mMQGy37f/uyvHX6feJSBtAV7W5KYB4R8WI7xB34p2qArNXNZebioH+S5hV6l+NYmAm4F96EmBHd8bx/rRNc5SQjAxcMVVfTg== Received: from CH0PR03CA0219.namprd03.prod.outlook.com (2603:10b6:610:e7::14) by DS0PR12MB999080.namprd12.prod.outlook.com (2603:10b6:8:2fe::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.15; Thu, 23 Apr 2026 08:59:08 +0000 Received: from CH3PEPF0000000B.namprd04.prod.outlook.com (2603:10b6:610:e7:cafe::90) by CH0PR03CA0219.outlook.office365.com (2603:10b6:610:e7::14) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9846.21 via Frontend Transport; Thu, 23 Apr 2026 08:59:08 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH3PEPF0000000B.mail.protection.outlook.com (10.167.244.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 08:59:08 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:58:53 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:58:53 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:58:44 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 04/13] i3c: master: Support ACPI enumeration of child devices Date: Thu, 23 Apr 2026 14:27:03 +0530 Message-ID: <20260423085718.70762-5-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000B:EE_|DS0PR12MB999080:EE_ X-MS-Office365-Filtering-Correlation-Id: ace60fd3-1eea-49b4-3db9-08dea1169465 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|7416014|1800799024|13003099007|56012099003|921020|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: H/kwA3HqXCKD5UUzX21VndCeVns/jDBLl76inPPilrQfb/+z3YbI40wpRB104E60LDVdeU6gTC+R7sWaOsxU/vn3r3qoQ7AIXmq2FIE7yOTCpM/kE1r6MQEGNbncUL0wjaEbXaMsLg9OegT9WNjrOvfaPaNRm5OrySf8NvMrctqrG7egN1XTa10S+dHPsfDrOVDDMx+2K7W5CLL6hTvd1TrLtjawpxPOOVEX63NnS0DY+drXDZBK9sFIBJlTFgiMnJX/MicFQgNuFI3o8WS8Q8yc/DW+jkdA5s7Zs6tXFCLGwiDjG1rj/kzLdrIJtfjuvuaJBXufVYv9eARfVKCWUc4zExScLBMCzkBMytxIZaPXWDhdq7kAkCxHd+tMhS7OEEjLEifG6gMFd45l8jcNCPVqk7P9P8IIEOY18tLfE1yF6wEGkwl0s87j5T9FTPivOKyL15X8VDBeiJmSNo1Tk33siXeoP8RBmPbgGcc6W++RfNyUtKMc5VN3NeymjGQDLhUyW924mYfwJkAm17fyopz1FywpzHv5+aPOu7jna92bRR5JFze3aU2zJVcVZ/E9clHEzuVqqGQb3GVpErUYlwqCT7vI0VcH+DItpnH18EfvUzbV524Gmcb/8zQ08mRIvTCl4AHh8tjedSkx/q6Y7nARLPnFWyhNhNLvQT32hDiaI3luBNHfeZ41/XJfh5bkzrK8oEQnqTg4Qc1L+kuL5aCRrx1Mf8Rai1OeKHbDZrk4XzKmvIGsNDsZ0zyaafHFh324HPNbLl0nG8lxyqyXcEgTuZAoYYYTMCyOjilWlXVEEjqpTfamfJTA1jETOTkdNAPNesR0uIk0tVWblDm50A== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700016)(7416014)(1800799024)(13003099007)(56012099003)(921020)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: owjvJYCVTfxa0uqJOrYu8+12ROnfQ6Ew7MYlPxQEhlTTYTfjC9nECh8e00qcc0WuMqvwe4Ybc5TujVc2kcrvWnULPwvZfoOnIupwyTdeEdWgU4DwyXR+CgdQ35la+ppBanwIRi95ME008qe9yFZYf4C4929XMIbvpegNSF7EeQB9v79o5AXKORaCkGx4h61w5G46jcjaYohv5m+NgVAfIUHB9q1EWWXxeALtsJiyjpELoBpeR1OF/tJrKW4VmKo3RVWHL99MOSVG32DU+HbVhk176LcVRrjNfyRkBPvZXEbxkyhMiv3KELdCRuaxc/h73kMQaR/35IR+xi6Te2CSYwW3QJcAlHiOXtywHg0UaphkS3NBLBXeKkA7cTAs90WO/nz2fxHZ2JGVZls5FE8Za5GjpjMU+QdhOjIHpSr3e+6l7OABqr/eO/IdFkJdbJ+Y X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 08:59:08.2712 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ace60fd3-1eea-49b4-3db9-08dea1169465 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB999080 Content-Type: text/plain; charset="utf-8" Although the existing subsystem allows host controllers to register through the ACPI table, it was not possible to describe I3C or I2C devices when using ACPI. This is because the driver relied on the reg property to retrieve the PID, static address, etc., whereas ACPI uses _ADR or serial resources to describe such devices. Read _ADR and LVR from the ACPI resources and extract the data as per the ACPI specification for an I3C bus. Also read mipi-i3c-static-address as per the MIPI DISCO specifications [1] to get the static address to be used. Hence enable describing the I3C or I2C devices in the ACPI table, which is required if the device is using a static address or if it needs some specific properties to be attached to it. [1] https://www.mipi.org/mipi-disco-for-i3c-download Signed-off-by: Akhil R --- drivers/i3c/master.c | 140 ++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 132 insertions(+), 8 deletions(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index d0677061faab..ffec97157d48 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -5,6 +5,7 @@ * Author: Boris Brezillon */ =20 +#include #include #include #include @@ -2409,6 +2410,53 @@ EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); =20 #define OF_I3C_REG1_IS_I2C_DEV BIT(31) =20 +#ifdef CONFIG_ACPI +static int i3c_acpi_get_i2c_resource(struct acpi_resource *ares, void *dat= a) +{ + struct i2c_dev_boardinfo *boardinfo =3D data; + struct acpi_resource_i2c_serialbus *sb; + + if (!i2c_acpi_get_i2c_resource(ares, &sb)) + return 1; + + boardinfo->base.addr =3D sb->slave_address; + if (sb->access_mode =3D=3D ACPI_I2C_10BIT_MODE) + boardinfo->base.flags |=3D I2C_CLIENT_TEN; + + boardinfo->lvr =3D sb->lvr; + + return 0; +} + +static int i3c_acpi_add_i2c_boardinfo(struct i2c_dev_boardinfo *boardinfo, + struct fwnode_handle *fwnode) +{ + struct acpi_device *adev =3D to_acpi_device_node(fwnode); + LIST_HEAD(resources); + int ret; + + boardinfo->base.fwnode =3D acpi_fwnode_handle(adev); + + ret =3D acpi_dev_get_resources(adev, &resources, + i3c_acpi_get_i2c_resource, boardinfo); + if (ret < 0) + return ret; + + acpi_dev_free_resource_list(&resources); + + if (!boardinfo->base.addr) + return -ENODEV; + + return 0; +} +#else +static inline int i3c_acpi_add_i2c_boardinfo(struct i2c_dev_boardinfo *boa= rdinfo, + struct fwnode_handle *fwnode) +{ + return -ENODEV; +} +#endif + static int i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, struct fwnode_handle *fwnode, u32 *reg) @@ -2425,6 +2473,13 @@ i3c_master_add_i2c_boardinfo(struct i3c_master_contr= oller *master, ret =3D of_i2c_get_board_info(dev, to_of_node(fwnode), &boardinfo->base); if (ret) return ret; + + /* LVR is encoded in reg[2] for Device Tree. */ + boardinfo->lvr =3D reg[2]; + } else if (is_acpi_device_node(fwnode)) { + ret =3D i3c_acpi_add_i2c_boardinfo(boardinfo, fwnode); + if (ret) + return ret; } else { return -EINVAL; } @@ -2439,9 +2494,6 @@ i3c_master_add_i2c_boardinfo(struct i3c_master_contro= ller *master, return -EOPNOTSUPP; } =20 - /* LVR is encoded in reg[2]. */ - boardinfo->lvr =3D reg[2]; - list_add_tail(&boardinfo->node, &master->boardinfo.i2c); fwnode_handle_get(fwnode); =20 @@ -2496,8 +2548,8 @@ i3c_master_add_i3c_boardinfo(struct i3c_master_contro= ller *master, return 0; } =20 -static int i3c_master_add_dev(struct i3c_master_controller *master, - struct fwnode_handle *fwnode) +static int i3c_master_add_of_dev(struct i3c_master_controller *master, + struct fwnode_handle *fwnode) { u32 reg[3]; int ret; @@ -2521,6 +2573,67 @@ static int i3c_master_add_dev(struct i3c_master_cont= roller *master, return ret; } =20 +#ifdef CONFIG_ACPI +static int i3c_master_add_acpi_dev(struct i3c_master_controller *master, + struct fwnode_handle *fwnode) +{ + struct acpi_device *adev =3D to_acpi_device_node(fwnode); + acpi_bus_address adr; + u32 reg[3] =3D { 0 }; + + /* + * If the ACPI table entry does not have _ADR method, it's an I2C device + * If the ACPI table entry has _ADR method, it's an I3C device + */ + if (!acpi_has_method(adev->handle, "_ADR")) + return i3c_master_add_i2c_boardinfo(master, fwnode, reg); + + adr =3D acpi_device_adr(adev); + + /* For I3C devices, _ADR will have the 48 bit PID of the device */ + reg[1] =3D upper_32_bits(adr); + reg[2] =3D lower_32_bits(adr); + + fwnode_property_read_u32(fwnode, "mipi-i3c-static-address", ®[0]); + + return i3c_master_add_i3c_boardinfo(master, fwnode, reg); +} + +static u8 i3c_acpi_i2c_get_lvr(struct i2c_client *client) +{ + struct acpi_device *adev =3D to_acpi_device_node(client->dev.fwnode); + struct i2c_dev_boardinfo boardinfo =3D {}; + LIST_HEAD(resources); + int ret; + u8 lvr; + + lvr =3D I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; + + ret =3D acpi_dev_get_resources(adev, &resources, + i3c_acpi_get_i2c_resource, &boardinfo); + if (ret < 0) + return lvr; + + if (boardinfo.base.addr) + lvr =3D boardinfo.lvr; + + acpi_dev_free_resource_list(&resources); + + return lvr; +} +#else +static inline int i3c_master_add_acpi_dev(struct i3c_master_controller *ma= ster, + struct fwnode_handle *fwnode) +{ + return -ENODEV; +} + +static inline u8 i3c_acpi_i2c_get_lvr(struct i2c_client *client) +{ + return I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; +} +#endif + static int fwnode_populate_i3c_bus(struct i3c_master_controller *master) { struct device *dev =3D &master->dev; @@ -2532,7 +2645,13 @@ static int fwnode_populate_i3c_bus(struct i3c_master= _controller *master) return 0; =20 fwnode_for_each_available_child_node_scoped(fwnode, child) { - ret =3D i3c_master_add_dev(master, child); + if (is_of_node(child)) + ret =3D i3c_master_add_of_dev(master, child); + else if (is_acpi_device_node(child)) + ret =3D i3c_master_add_acpi_dev(master, child); + else + continue; + if (ret) return ret; } @@ -2600,8 +2719,13 @@ static u8 i3c_master_i2c_get_lvr(struct i2c_client *= client) u8 lvr =3D I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE; u32 reg[3]; =20 - if (!fwnode_property_read_u32_array(client->dev.fwnode, "reg", reg, ARRAY= _SIZE(reg))) - lvr =3D reg[2]; + if (is_of_node(client->dev.fwnode)) { + if (!fwnode_property_read_u32_array(client->dev.fwnode, "reg", + reg, ARRAY_SIZE(reg))) + lvr =3D reg[2]; + } else if (is_acpi_device_node(client->dev.fwnode)) { + lvr =3D i3c_acpi_i2c_get_lvr(client); + } =20 return lvr; } --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from MW6PR02CU001.outbound.protection.outlook.com (mail-westus2azon11012021.outbound.protection.outlook.com [52.101.48.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC5142BE051; Thu, 23 Apr 2026 08:59:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.48.21 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934779; cv=fail; b=BlrokGGlviDRNgNGObNbnZKb3KahTHUE/FhpXBTAQ1Bky/nQU4eHwsKALqBkmyYl9MufUyZEbqnpejsgV0DZb7WV2b4isbXCP9AdjUa7wrZp9Kl1KGSrEaBkhzTlCCDGDVGETd2GPudEZkyG/0IJimuKs2rDj5TnNvo8BcaeOi8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934779; c=relaxed/simple; bh=fZ5XWuogKDmJ1lTD8A/rKfEtaUwiizHOaldw6wDOYMA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=T7U3SGJMjAUT28B44X5wqEfsfBBOVp9vq0xrcpRf9wvwBOSz+xYnZv5o1ZQ/9oj/Q4ux+0cBOQdPCPjOTdRTmCIL0Kl2zPaz8EGBK3CnQYeRGtA+Szm7CwfioHqFyJSo4NhGXQIAuK504rtNjjdnO+kokaJ8rRWns/NkPS3VOU0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=l2KrNN1Z; arc=fail smtp.client-ip=52.101.48.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="l2KrNN1Z" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=DHQUwGQzvKDidNWFiyBgICveKIHb6G58Mo5KzghSwHdC1vksgchFaTZjeqKmfo5CS1IfbfcsTvUJfpfi7Ik6bDwYxrlrW6JnyuWHpP2a12voz7aBIdd1FyXXLxL3IlXMmUXonRnPKOpA57os2T1UWDw3tWeCkXmH2bF0f00Vtxf+Hl72U4IU7I7rB/UA7qX9paK+BRyPi18l5ki9F3egJycRIl8AiwlNnsmJ/rTZd9lnpFA4c6OHf/feJq9uTMjScHtCe90T1a0LRT4lQgFGt1yrIre41G2ELkAsHcHB7L+liHOgJNbnpnu0Z8uqsQXMopChUrKY01h9wAIbb8l76g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ooaVzdn3sSlCMJLzWatycfbdzAExOJc0Dox7UopvLhw=; b=jAgRy3WBlVHR3vnbzrf9jphCmdAA99Xsje+QF3apVzDScmg4Sc6ZPRLjE9zC3bhzFM+i5gFHkpl1p+pBXOz/Bo+ygj4Dg1ry16WP6B8ioXIZG3qpm29j5mgOmKtEzGqWpMhhdIdTHVSW0l0TjKuE2pg5rFW3C+GyId34gM8Exk+yd2MVdhRg9Utx47+2n6YMKWVghM1WxX4mqt+/0UUqN9QhMkhwzUNkzQThUv2enrugfvLyPKZNHRuUin6GZLpZC97t2q1lAhb+RedTnh1b0Zvo+ktwT8Wf8kxee2FpGV33nLN9oWkX1n9EjE/xg5id6BIK9Q27qA3udeqp9h0klQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ooaVzdn3sSlCMJLzWatycfbdzAExOJc0Dox7UopvLhw=; b=l2KrNN1ZC9XBFDEsLVpEYsL6wY92znaXcubMDM29ABT4O15WeXMD16/6+RO5XkceSCe3yelXTc78kLh9QFDrrhMwdM2eey1nqGyc9zqUUMh8N3fMCGmjdlUYEw5ryfdTz20NamqegsuQQQZ3Myt5ifLKjNQ2Rcfyi37XwQMH5pyUfmp1vaCHOTR34oPJSWuXdSBRQiZismZoC3OHLVLZoZf60LKoLpBfy4hufPVl1XT2neqBYhmbntGX8fcY8jYCgB0jYSwh5CaZVMmzItAEZUL6VuCOBNYD5arnuLbGw8lddst62UezWnyoj43/b9NH1vLCntlt6iCttOeUL0gRUg== Received: from BYAPR05CA0069.namprd05.prod.outlook.com (2603:10b6:a03:74::46) by BL3PR12MB6379.namprd12.prod.outlook.com (2603:10b6:208:3b2::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.21; Thu, 23 Apr 2026 08:59:31 +0000 Received: from CO1PEPF000075ED.namprd03.prod.outlook.com (2603:10b6:a03:74:cafe::3f) by BYAPR05CA0069.outlook.office365.com (2603:10b6:a03:74::46) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9846.20 via Frontend Transport; Thu, 23 Apr 2026 08:59:30 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000075ED.mail.protection.outlook.com (10.167.249.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 08:59:29 +0000 Received: from rnnvmail203.nvidia.com (10.129.68.9) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:07 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:06 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:58:58 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 05/13] i3c: master: Add support for devices using SETAASA Date: Thu, 23 Apr 2026 14:27:04 +0530 Message-ID: <20260423085718.70762-6-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075ED:EE_|BL3PR12MB6379:EE_ X-MS-Office365-Filtering-Correlation-Id: 7a5f75fb-972d-4f76-789c-08dea116a150 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700016|82310400026|1800799024|22082099003|56012099003|18002099003|921020|13003099007; X-Microsoft-Antispam-Message-Info: E/z/eK1dtHKPjU5QxDGe1nEYau1o6lhP3Ge3OvYF1hadK4rP9DJnUMMqz3dvxNifZXlVXHVA/jhFm+iOS9vOjeVtJB3r08HX/+psb/W1yXpvBPzZpMx99TY2VRXWgfbJ1vBUfGiKhrkOCzumIihjXeIlPZWNMfd3yOau2v5zWCjTZsoXCP8BX3DKCvLpBxzEiOUEXARupUfVO1g35bsFCZdNMvXLgK/Nv2YkCCFutVWfvYdWY0KBkoabEaSHR0LpDnRd0ncck4c0vbxLrsfs/qks1L9iWTQM9YkN47GdB6yEyjJceFSSGwNX0oj3cA4IiExE1AfHRBtsJYsfy33pgtHbPqZDick4+W4cu5gimbdq7jWMcWJl00I+KP/SgwxOBju4Waz91bJoFnwniIgj07WBOX0YfzKb9a67YDn2BXpAhjVtTIwEQkawhuxP5AIFY3lZF2qm3+/PQ0BfzV7Wf3PEP+yOtHv1hxX9vFR0cDQtsVl0yJbFOFVAwy+a+L/9M5rXSwyFzbkBNXMThcMpvefkeUKVW1xMhwTNZzvEKO88aYybv9xJuZoWMdTra2QIS8OT1B2ZBfSxSom4bjfXxY2PKU+lHA8QjU1cbKIJkNediI3uwnpZeOulCHNIom0tYJPAbodppiDsdgZdbCRUAreAZzDxt2grCTgwfWFoOsRx+y2e55IkdQhsOVLlQkTRkUHRapWQk+4fOaursIb6G3P21lE+7eCYSBEt3Zj7OtQ1hvK+V1i5aMiUoBYUHQG1X4cVGDmmKTayo6DbWfKSLHUqqQYjx5WS2eD/WzkT9I6wskc8mWtLuEOGamJMEbuUHd1izkGA/R2p5DrFoM5soA== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700016)(82310400026)(1800799024)(22082099003)(56012099003)(18002099003)(921020)(13003099007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: V9S2VzXdAxs41heCM9h8nusJuPCIw0v1N9bLGQHffcFnO60OmIl4zLykktzwEdqaTCDi1761oj4m4DCJ8FNwBppl0xX92KFKQ1MBIKzSGT30i2t2acqHEDB3upu/cz1DEMV014Vg9xHBNWGD9JLlA79vWPPWQeAOl118AlhtBa692HwTYQmQNBm8rJzcamBv8WnCxwwl4mN1Kmjy0i2CZe/2qP+Ye9fu4AU8qfCMXfBNt7UQQMS2qJiS8efxEbIgoLK8mnidzGCx2I1qpd212BsW6mhIArB43seoIUEkjAFSj6+xCfQZjoMj+Yt48p+U2xrPS85Vuz9XY8f4monqxyKusYdNVO2LCH2O/Kg3NxzdDdRyXQQqWKEWtQZ/DALmLtAdFDhnkQx14qzuIRQC8MypyuuaWiuSMuoFZRJQ+i1/wupBptxbnKNi2oWEM0Pw X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 08:59:29.9545 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7a5f75fb-972d-4f76-789c-08dea116a150 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075ED.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6379 Content-Type: text/plain; charset="utf-8" Add support for devices using SETAASA, such as SPD5118 and SPD5108 attached to DDR5 memory modules that do not support ENTDAA. Follow the guidelines proposed by the MIPI Discovery and Configuration Specification [1] for discovering such devices. SETAASA (Set All Addresses to Static Address) differs from standard I3C address assignment that uses ENTDAA or SETDASA to assign dynamic addresses. Devices using SETAASA assign their pre-defined static addresses as their dynamic addresses during DAA, and it is not mandatory for these devices to implement standard CCC commands like GETPID, GETDCR, or GETBCR. For such devices, it is generally recommended to issue SETHID (specified by JEDEC JESD300) as a prerequisite for SETAASA to stop HID bit flipping. [1] https://www.mipi.org/mipi-disco-for-i3c-download Signed-off-by: Akhil R --- drivers/i3c/master.c | 70 +++++++++++++++++++++++++++++++++++++- include/linux/i3c/ccc.h | 1 + include/linux/i3c/master.h | 15 ++++++++ 3 files changed, 85 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index ffec97157d48..de72317c9a5c 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -5,6 +5,7 @@ * Author: Boris Brezillon */ =20 +#include #include #include #include @@ -1051,6 +1052,47 @@ static int i3c_master_rstdaa_locked(struct i3c_maste= r_controller *master, return ret; } =20 +/** + * i3c_master_setaasa_locked() - start a SETAASA procedure (Set All Addres= ses to Static Address) + * @master: I3C master object + * + * Send a SETAASA CCC command to set all attached I3C devices' dynamic add= resses to + * their static address. + * + * This function must be called with the bus lock held in write mode. + * + * First, the SETHID CCC command is sent, followed by the SETAASA CCC. + * + * Return: 0 in case of success, a positive I3C error code if the error is + * one of the official Mx error codes, and a negative error code otherwise. + */ +static int i3c_master_setaasa_locked(struct i3c_master_controller *master) +{ + struct i3c_ccc_cmd_dest dest; + struct i3c_ccc_cmd cmd; + int ret; + + /* + * Send SETHID CCC command. Though it is a standard CCC command specified + * in JESD300-5, we are not defining a separate macro to be explicit that + * the value falls under the vendor specific range. + */ + i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); + i3c_ccc_cmd_init(&cmd, false, I3C_CCC_VENDOR(0, true), &dest, 1); + ret =3D i3c_master_send_ccc_cmd_locked(master, &cmd); + i3c_ccc_cmd_dest_cleanup(&dest); + if (ret) + return ret; + + /* Send SETAASA CCC command */ + i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); + i3c_ccc_cmd_init(&cmd, false, I3C_CCC_SETAASA, &dest, 1); + ret =3D i3c_master_send_ccc_cmd_locked(master, &cmd); + i3c_ccc_cmd_dest_cleanup(&dest); + + return ret; +} + /** * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) * procedure @@ -1739,6 +1781,18 @@ static int i3c_master_early_i3c_dev_add(struct i3c_m= aster_controller *master, if (ret) goto err_free_dev; =20 + /* + * For devices using SETAASA instead of ENTDAA, the address is statically + * assigned. Update the dynamic address to the provided static address. + * Reattaching the I3C device is not useful. It is also not mandatory + * for such devices to implement CCC commands like GETPID, GETDCR etc. + * Hence, we can return here. + */ + if (i3cdev->boardinfo->static_addr_method & I3C_ADDR_METHOD_SETAASA) { + i3cdev->info.dyn_addr =3D i3cdev->boardinfo->static_addr; + return 0; + } + ret =3D i3c_master_setdasa_locked(master, i3cdev->info.static_addr, i3cdev->boardinfo->init_dyn_addr); if (ret) @@ -2145,6 +2199,12 @@ static int i3c_master_bus_init(struct i3c_master_con= troller *master) if (ret) goto err_bus_cleanup; =20 + if (master->addr_method & I3C_ADDR_METHOD_SETAASA) { + ret =3D i3c_master_setaasa_locked(master); + if (ret) + goto err_bus_cleanup; + } + /* * Reserve init_dyn_addr first, and then try to pre-assign dynamic * address and retrieve device information if needed. @@ -2507,7 +2567,7 @@ i3c_master_add_i3c_boardinfo(struct i3c_master_contro= ller *master, struct i3c_dev_boardinfo *boardinfo; struct device *dev =3D &master->dev; enum i3c_addr_slot_status addrstatus; - u32 init_dyn_addr =3D 0; + u32 init_dyn_addr =3D 0, static_addr_method =3D 0; =20 boardinfo =3D devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); if (!boardinfo) @@ -2535,6 +2595,13 @@ i3c_master_add_i3c_boardinfo(struct i3c_master_contr= oller *master, return -EINVAL; } =20 + if (!fwnode_property_read_u32(fwnode, "mipi-i3c-static-method", &static_a= ddr_method)) + boardinfo->static_addr_method =3D static_addr_method & + (I3C_ADDR_METHOD_SETDASA | I3C_ADDR_METHOD_SETAASA); + + /* Update the address methods required for device discovery */ + master->addr_method |=3D boardinfo->static_addr_method; + boardinfo->pid =3D ((u64)reg[1] << 32) | reg[2]; =20 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || @@ -3162,6 +3229,7 @@ int i3c_master_register(struct i3c_master_controller = *master, master->dev.release =3D i3c_masterdev_release; master->ops =3D ops; master->secondary =3D secondary; + master->addr_method =3D I3C_ADDR_METHOD_SETDASA; INIT_LIST_HEAD(&master->boardinfo.i2c); INIT_LIST_HEAD(&master->boardinfo.i3c); =20 diff --git a/include/linux/i3c/ccc.h b/include/linux/i3c/ccc.h index ad59a4ae60d1..a145d766ab6f 100644 --- a/include/linux/i3c/ccc.h +++ b/include/linux/i3c/ccc.h @@ -32,6 +32,7 @@ #define I3C_CCC_DEFSLVS I3C_CCC_ID(0x8, true) #define I3C_CCC_ENTTM I3C_CCC_ID(0xb, true) #define I3C_CCC_ENTHDR(x) I3C_CCC_ID(0x20 + (x), true) +#define I3C_CCC_SETAASA I3C_CCC_ID(0x29, true) =20 /* Unicast-only commands */ #define I3C_CCC_SETDASA I3C_CCC_ID(0x7, false) diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h index 6b03a3ce574c..5a6d217fa5eb 100644 --- a/include/linux/i3c/master.h +++ b/include/linux/i3c/master.h @@ -174,6 +174,14 @@ struct i3c_device_ibi_info { * assigned a dynamic address by the master. Will be used during * bus initialization to assign it a specific dynamic address * before starting DAA (Dynamic Address Assignment) + * @static_addr_method: Bitmap describing which methods of Dynamic Address + * Assignment from a Static Address are supported by this I3C Target. + * A value of 1 in a bit position indicates that the Bus Controller + * supports that method, and a value of 0 indicates that the Bus + * Controller does not support that method. + * Bit 0: SETDASA + * Bit 1: SETAASA + * All other bits are reserved. * @pid: I3C Provisioned ID exposed by the device. This is a unique identi= fier * that may be used to attach boardinfo to i3c_dev_desc when the device * does not have a static address @@ -189,6 +197,7 @@ struct i3c_dev_boardinfo { struct list_head node; u8 init_dyn_addr; u8 static_addr; + u8 static_addr_method; u64 pid; struct fwnode_handle *fwnode; }; @@ -516,6 +525,11 @@ struct i3c_master_controller_ops { * @boardinfo.i2c: list of I2C boardinfo objects * @boardinfo: board-level information attached to devices connected on th= e bus * @bus: I3C bus exposed by this master + * @addr_method: Bitmap describing which methods of Address Assignment req= uired + * to be run for discovering all the devices on the bus. + * Bit 0: SETDASA + * Bit 1: SETAASA + * All other bits are reserved. * @wq: workqueue which can be used by master * drivers if they need to postpone operations that need to take place * in a thread context. Typical examples are Hot Join processing which @@ -543,6 +557,7 @@ struct i3c_master_controller { struct list_head i2c; } boardinfo; struct i3c_bus bus; + u8 addr_method; struct workqueue_struct *wq; unsigned int dev_nack_retry_count; }; --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from CY3PR05CU001.outbound.protection.outlook.com (mail-westcentralusazon11013014.outbound.protection.outlook.com [40.93.201.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 337B23C3BF5; Thu, 23 Apr 2026 09:01:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.201.14 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934912; cv=fail; b=o4KHdh3mAztMljzj17ubvAUdZWxvW9ISyNaJ2a8yzmopKtNo0JgtAm1HZVyMwQ5lEmzev/GKS6gjEiAMyYyzjVpzZ3L9azdNtUhu7JrFThy+rgKC5lRHkdBa32kZxpWJJbt8T1PxeNol4+Vkm6750n0vo1hI0o2GhSfhd2VsCPs= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934912; c=relaxed/simple; bh=ouQxf2yeR3GDfQhsBUucR433sYP7U1NHXmQPQJSkKnU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UbpzfXO3+Pc+3+g9927yZCdON2hQUn2qNLtmIhHNiYFnMNiI3du68XIHRZmO7NCQmF4IoVKED25J2hHtVL2JrjcZQut1g41fLcHQ9jOKeq8PWiwnJj0VCfOe24Eq+ZujVZHpAMXmpCZfXocHKPkJK2LiTVEn5vRm7TDfcRlGHqA= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=Vg/wbKKZ; arc=fail smtp.client-ip=40.93.201.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Vg/wbKKZ" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=HOaD6d3yU9/uzvwB9ChiQ07BRHSobtsCBQEtZKepRsALKwglrR4/yr94awea38EU8vqM4Y9AeWMTQcW23axi3MsxnOUCg5JLrxP5ChVetdS8BpnTJ2Mlm177jOQmtrIUzD2DTlbvgEdKIhFfschHygUeSD/FUG1iUi/9QzWPyo0l+ZL3WTL9fAUOK12GgAc8VkCcb2GK3N8LaVjWk2kDLpaH4iZIZHbTdp+Incy/o9X19503G/Yfkpa2tsIn60w3sWFzvWrSQxLYrjDF9KvqqQ/s54sARrGJYQS6qlqGldUUgKmtxVScypSYkEJQSCuAqk3lSi2YLAUYKN6YiPDzKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=p1RYpER9w5vgm1emdd9+8WObQub7TyWTMBKSL6ztCwk=; b=SwSt8Ob8sxxmJt7IxpKvd+x4InWrv20vdnkCiE/pmThektn2WoezYkGEDSUlqLTs4DXlD1pjVeNrLyC5P48XJrf7O7kRkCkhT3noPaXLW5NPlcVXTesxpheu+pPuKdzGGHCN7eD11MvkUjVdzmKiLWcxKHO9Uhaw0KJ+sD9hpOKnS5RBurEyTI5HapbELM7fx8DgX6KaXsp58teLLRlxe1e6CETFaXSv01rwqoWzHIH7/rJAF6axTG82uTIzP19sGhwFV628sfNUlfAqLjPRdYE+1IZaHrJcOsX2Hy8hIRbCFTi8nMk8mSL7WXMLD87U22UUAHRT/78Fr1/8dW0ajw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=p1RYpER9w5vgm1emdd9+8WObQub7TyWTMBKSL6ztCwk=; b=Vg/wbKKZUdrE6wNnI/c6Q135hb8xhSoNUenxKcBosm8ISOfwBz0Q+Utv8KOSTZVI7u2ZEauwc0ccJb53ySt8Wm9MvLTPk9wJYH0QuWxsQNW3x813qRm7zW+cj5AxwuwlC3+T4RviFWmCKhvP6BYK7OV7HSicPJJ8o84Abux00KCzDoCNTTeCYatPvFLSc4pT7fps0bZ4YQWfhySLso+CXzgSgyWlbuumDiPFcGaqy45FlaLrV2P7vxaMCCMbjrTeL16JaBWb/uB6EgxqqSqXViQn7wYLJcVzkwQXEitR4e+DCaWiY/jFagnQ3JYE2/6d1zspGVL7ldr70rtsQWfOug== Received: from SJ0PR13CA0235.namprd13.prod.outlook.com (2603:10b6:a03:2c1::30) by CY1PR12MB9584.namprd12.prod.outlook.com (2603:10b6:930:fe::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.21; Thu, 23 Apr 2026 08:59:43 +0000 Received: from CO1PEPF000075F1.namprd03.prod.outlook.com (2603:10b6:a03:2c1:cafe::8c) by SJ0PR13CA0235.outlook.office365.com (2603:10b6:a03:2c1::30) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9846.19 via Frontend Transport; Thu, 23 Apr 2026 08:59:42 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000075F1.mail.protection.outlook.com (10.167.249.40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 08:59:41 +0000 Received: from rnnvmail202.nvidia.com (10.129.68.7) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:20 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail202.nvidia.com (10.129.68.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:19 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:59:10 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 06/13] i3c: master: Add support for devices without PID Date: Thu, 23 Apr 2026 14:27:05 +0530 Message-ID: <20260423085718.70762-7-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F1:EE_|CY1PR12MB9584:EE_ X-MS-Office365-Filtering-Correlation-Id: b82e10a9-da32-402e-c82c-08dea116a87d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|82310400026|36860700016|376014|1800799024|921020|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: KhA+q0wIsDdZP+EUypkgRANQpS/+ea++Ag8JddW1kKEvudE3wH6WcD7XqzLJLRQf7k4123vTS11J8shDk7tZDsZkkREyHN/sEAZlunn7BMzizjIR5WEyfJ0KO180bp3OBmxpaa0RejkFHk0iAJUk+b5Sa/LV+oaHMnfiLwWRdhA5q4RNjzhWrHf2cYflI/IpoccOq5/NeOzu1/+ZKOxK1QQYOqFRRRonDX1Ad88RjsPkBz4lwGEEMZ5kZ7DS6tzNnL78S9DrrRh/TQFwCIkhb5mtWbtm8o6U+Jf3w48Cg4yk28bxcy86bj7F2CUzwdF2ts3u23UYL9gMDGxMjj9mk4W0o86cH6bJknRCwljIAPjlJDuZ0tbr1oo+ECUr9vzVvNx8X1lhXkCXoaXaYOkt4oU9nWbnZSk1O6U+6lnUm26nUF3UbPgt4k2U/d9ABNK0WOLfAy6CCROo49+7J9TngOQvUXilmQTyj5J9YJRM7cORhU7WtiEWwj8FsgdBpxAFbFOjkazQe2UlOcX5nyDf+M9OSG6yz4uZ6wyFxdkL3yJfs7ta8xH9d/HHrBh8Aq8JiFgfuFfKdE5YuoI4DJybuCXPjklzvSbAzSCeQtkuEwsSHnzn+DNx9FIKXoNJ63Ixn/y25oKGQV+95S8glGGliegU0ZZCG0i+88MQICMTw7ychyC9W9z0wV/CXXKCxs+nc7kFO0t8ALptisLiRBzW9jSMj4NSai/zdDNOdz/C2vNQ+H8O8N2Q6G49b/qM7M0Akt5x+Wr4kAmb0g+CUZKr1YyZqI3Wsu1AbrV7qYtwTX1ISuXSZlqCu2y/8trvA3XR X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(82310400026)(36860700016)(376014)(1800799024)(921020)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: oAZIG16McKJjJkgdbT+HPTwxIsXJWJYtMvkn0wC5bKcebt24kvNaBMvE6QKbVzBvVW/lba8/NPJ0r/0yL6P9f8owgevebztHFVZy7LyquN8jbGPhTg/UuqwdcTOBynVS0uuCnktR39UrbB8t++OhJ4HFKS7hYKpUsIbqnzo2ybu6T3dTf1borvqLEVnaa5QcZ9le3kzSJNrBKzUCbuLZrV7QnWSPT6kznXOcUwx0SmMlrS4seTdkrbZI4TExcHvSyh0zxLlGha19ku3qrZKJ9NKYqcSUl6j3jgJutfIwsJ8ZUCDeE4lU2byQ0Ywm5ITq4aMcpU2l3X7AfRVExohZxFWarsAtGTJGGn8IgXzlPenzIPe9cd6L8nSp6gE817lyJF/Iww/fKiS+jDbxxYTFx5MNCzw3xmU6wDGqsSvMWcf3FVnFkv97YzY1ybmMemfK X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 08:59:41.9964 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b82e10a9-da32-402e-c82c-08dea116a87d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB9584 Content-Type: text/plain; charset="utf-8" Devices using SETAASA for address assignment are not required to have a 48-bit PID according to the I3C specification. Allow such devices to register and use the static address where PID was required. Reviewed-by: Frank Li Signed-off-by: Akhil R --- drivers/i3c/master.c | 51 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 40 insertions(+), 11 deletions(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index de72317c9a5c..fbe8710c4c56 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -1842,8 +1842,17 @@ i3c_master_register_new_i3c_devs(struct i3c_master_c= ontroller *master) desc->dev->dev.type =3D &i3c_device_type; desc->dev->dev.bus =3D &i3c_bus_type; desc->dev->dev.release =3D i3c_device_release; - dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, - desc->info.pid); + + /* + * For devices without PID (e.g., SETAASA devices), use + * static address for naming instead. + */ + if (desc->info.pid) + dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, + desc->info.pid); + else + dev_set_name(&desc->dev->dev, "%d-%02x", master->bus.id, + desc->info.static_addr); =20 if (desc->boardinfo) device_set_node(&desc->dev->dev, desc->boardinfo->fwnode); @@ -2288,8 +2297,18 @@ static void i3c_master_attach_boardinfo(struct i3c_d= ev_desc *i3cdev) struct i3c_dev_boardinfo *i3cboardinfo; =20 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { - if (i3cdev->info.pid !=3D i3cboardinfo->pid) - continue; + /* + * For devices without PID (e.g., SETAASA devices), match by + * static address. For devices with PID, match by PID. + */ + if (i3cboardinfo->pid) { + if (i3cdev->info.pid !=3D i3cboardinfo->pid) + continue; + } else { + if (!i3cboardinfo->static_addr || + i3cdev->info.static_addr !=3D i3cboardinfo->static_addr) + continue; + } =20 i3cdev->boardinfo =3D i3cboardinfo; i3cdev->info.static_addr =3D i3cboardinfo->static_addr; @@ -2303,8 +2322,12 @@ i3c_master_search_i3c_dev_duplicate(struct i3c_dev_d= esc *refdev) struct i3c_master_controller *master =3D i3c_dev_get_master(refdev); struct i3c_dev_desc *i3cdev; =20 + if (!refdev->info.pid) + return NULL; + i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { - if (i3cdev !=3D refdev && i3cdev->info.pid =3D=3D refdev->info.pid) + if (i3cdev !=3D refdev && i3cdev->info.pid && + i3cdev->info.pid =3D=3D refdev->info.pid) return i3cdev; } =20 @@ -2604,9 +2627,15 @@ i3c_master_add_i3c_boardinfo(struct i3c_master_contr= oller *master, =20 boardinfo->pid =3D ((u64)reg[1] << 32) | reg[2]; =20 - if ((boardinfo->pid & GENMASK_ULL(63, 48)) || - I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) - return -EINVAL; + /* For SETAASA devices, validate the static address instead of PID */ + if (boardinfo->static_addr_method & I3C_ADDR_METHOD_SETAASA) { + if (!boardinfo->static_addr) + return -EINVAL; + } else { + if ((boardinfo->pid & GENMASK_ULL(63, 48)) || + I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) + return -EINVAL; + } =20 boardinfo->init_dyn_addr =3D init_dyn_addr; boardinfo->fwnode =3D fwnode_handle_get(fwnode); @@ -2629,10 +2658,10 @@ static int i3c_master_add_of_dev(struct i3c_master_= controller *master, return ret; =20 /* - * The manufacturer ID can't be 0. If reg[1] =3D=3D 0 that means we're - * dealing with an I2C device. + * I3C device should have either the manufacturer ID specified or the + * address discovery method specified. Else treat it as an I2C device. */ - if (!reg[1]) + if (!reg[1] && !fwnode_property_present(fwnode, "mipi-i3c-static-method")) ret =3D i3c_master_add_i2c_boardinfo(master, fwnode, reg); else ret =3D i3c_master_add_i3c_boardinfo(master, fwnode, reg); --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from SN4PR2101CU001.outbound.protection.outlook.com (mail-southcentralusazon11012014.outbound.protection.outlook.com [40.93.195.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 61AD63DEFE4; Thu, 23 Apr 2026 08:59:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.195.14 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934795; cv=fail; b=MbfB1ZxIzuCVarZCg4x6etOqCkPsQCbYf6BTu4DAAd7aenBg+26FZJfWwDGM59SwN9tTvgFCZzTktf19zL5o/GJWcRtOaFswKrXr0wia5orOkKc4GKzwfQ0BeM2yg0fOUGCQ8bOmamfCS4+KUxDP68rYcvx++z+4tjYFnxLr7Ws= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934795; c=relaxed/simple; bh=LFADu6MpqpMZiRoddg5x1LqxWWTt/hAWNVeUz/OcXKk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=r+JBXPbKE8KVrKwdAEfWCLTEhP22oFQcPq/nf/ANRvfXQcmBnMiMLybbPac09Uftmsv4Xr8VSijyXASFkXLyyYsI5vhYjUH39beltYss6WKdAnpjMIYRFboYJNSoxWgMQU8Dxk6romMthFlXodkTPdk/ElcsHdUVF+B3lgyQK4M= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=Za+tE2Rg; arc=fail smtp.client-ip=40.93.195.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Za+tE2Rg" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=uhWXAbp/EnDKcwvMmVYXKZs6j4LEA/jLYV2cz4qiuN0XQFGOxzYxgL2nXab21cOs06F5dusxrmXqHMiuQwad5Er9K60alF6l2VWAQZ/HvHwQTM0CfufhDlV2aI+CF3He8/OkLbgqf3o6nFbuHJMX7v2/Q6yKFX2whRNSolHIbakIxp7NX4Za3Z2NT7/nj4dYJtn1C1lg8BaHvTObNlZQ8hqoX/mJ62hPTorKNkAIoxTGDPymKG+75G3dUhH0j8+gJ3ID5WR+UIU/djSgSPxsRNe2FAjfV2sQukW4NpH4mAfLW1gy2nLMTcc1qiJ/AyBKn6lU8RctUqf7JXip2pU6Yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=eseIOnmHxTTKeOuVAI9/TdaeIU75cQdfJNzDDpITkA8=; b=hq7r7NK/UESLCBlBe+5poZgiGyWh8drNHkYluUS5bzdzEoT4WofB46lOEUVR3rQJTDR8hDEy6B1mKoFEc0eKZeGgaMoM63HZ1wKxth6m0pu8Zq3m/bi25AH+gZJB1/imRinT3fS3HfucHHhaUGuv0ffKA2fujz/hbbW5C1gmeBeQW2fv+K9vfoPRsbyML3v6hgiyToJWvD7DigK89q6BmL5BsxokZvbN5A9cE7HRbx075xL2WwDwWKHpbodMJmSvx0ojj4P3+uHZaVi9WZSocII5KNPZ2ZAMUlP5sa1EGhs0cCKSju1hvmrDp6FoUOLCsz6J5YT0tvYPv3nvv98qpQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=eseIOnmHxTTKeOuVAI9/TdaeIU75cQdfJNzDDpITkA8=; b=Za+tE2Rg7YAny+RWkhpHokCn5qZ4x1uXUex775Au5Vwjp1CQz7++L6CyxnytJTl2cA+O/qfu4GmZR5qKWG0o8A8JeabtjHffh8PI0LtaVpmRot50pVuNl03SmqVl8CczwGS2FmuP33UFENpl7sPoTKLZ42XZpzCrkpfAmfVtiRRksqZ8mim7RIWbBmTJ6svzTuw6SGI48B7zTS0A8Ct2+We7khsTSVPSYxnzykFu7s+/bziRSi0N22Vm1BBW2+guVUP7scDRDKy3PDyRC4umD6kE5hCWuu+SaEkAUklGPxdCO42HiG9i3vMCEAEraWcHTEjgBn8vqZKg9QT0uhpcww== Received: from CH2PR10CA0028.namprd10.prod.outlook.com (2603:10b6:610:4c::38) by BL3PR12MB6545.namprd12.prod.outlook.com (2603:10b6:208:38c::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.20; Thu, 23 Apr 2026 08:59:48 +0000 Received: from CH3PEPF0000000D.namprd04.prod.outlook.com (2603:10b6:610:4c:cafe::a3) by CH2PR10CA0028.outlook.office365.com (2603:10b6:610:4c::38) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9791.48 via Frontend Transport; Thu, 23 Apr 2026 08:59:48 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH3PEPF0000000D.mail.protection.outlook.com (10.167.244.43) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 08:59:48 +0000 Received: from rnnvmail203.nvidia.com (10.129.68.9) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:32 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:31 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:59:22 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 07/13] i3c: master: match I3C device through DT and ACPI Date: Thu, 23 Apr 2026 14:27:06 +0530 Message-ID: <20260423085718.70762-8-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000D:EE_|BL3PR12MB6545:EE_ X-MS-Office365-Filtering-Correlation-Id: 195df2a3-1a3d-40ee-103d-08dea116ac4d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|36860700016|376014|82310400026|56012099003|18002099003|22082099003|921020; X-Microsoft-Antispam-Message-Info: TYdxs4gl9tL+0N1b5CJ53AF7OY6wH9sWrvdp3y1SACQbO9HcOu9lIqGuLGykiss4z8XlHY769Pb7oCS80coqwciRmVsbfOLfB9VcUZ38UaOESnan6Sqeol2RTVWsM0id3xOooVVTkZQIHiB6iqyWy0TXHPejyt8Upt+ILm/1nDo6BPmKoQp2JBb5B8nXsgyeZqji2m4JXhrihuNSiK3ObY0Q8UrdJvYkcMZnOHR5HtzFG/9UYE2tGb8dXKW4CB0WOPrATBcyw3GHBTzKoKtWECsV11NCgUYKpIiHWcJwzcZ4NDJ3pQg6BtqnVxsA6hEBPP0WBNx4LySFmBRYVOVzGH/RWeyiwLIFSFmtOpGfdrxn2TGgdezwquQlCyzgs0THVixdgm07o8e/CpHoNv75Aw+VR9Ynyg1bPqpQkTlKXHeGx0u5RM4fZSj3WSL73hQ0CqxsbHdKwce7GQp5E4/IcJwnby+Ou3ztZCOBrJxx6c+4cP4TddGts26AE+nAWNHyGV511HwcQxFSP3XxgSQPQtdZjxE/xgaYATg6jrEb7LvEilKEjP5GEZlvsuoq8VjHdnBwdplLboz6AAR5Tek4rv69MmgDXZEM35RB78fwKj2ETac1PBJYW4ryENsJEDfopv1TZjH3kqIoXZovMdsm2rGaIFweWBHLLNeEjLb16Mx0K6hvaQwj8Ri+ti9Ml6mLP4Y8yk5dfVYHlye582eeO/B7mP+LUsjtGC0PLXjRuchFNSJm72ajSAifLsoAcRabUiOay5gjWpJmnG+ytJXaTtue4k6XyXkCwmoh/uSchEiXaLPHnpXX7PMRDuz9pwN3 X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(36860700016)(376014)(82310400026)(56012099003)(18002099003)(22082099003)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: a4QAXe4lqEi220wlESf3vXKHRPk7Xr/rHilhXDEh4oicaXausqi2AtfQqTXZlhDUm+7W7qOVkDTPEbSWpRw6GtT5GCVL0Rh1ZBZ7BsU6qhSn4GoA37/dj1N7r2dblLK4Jjt+jxxboiluucpcj0GpBSVaKPlsSYLmxbu174tfnKkuDqln23eEBzXl+/SuT7oFFzNg2m641BBRo1BBjviJB9w6mMS9auMN18+epaB/jh23QO0bmyH31KyCA9X0gOy66ov1RIhiRjQQBbtEmg+reQhrNfUK4Ew+bpBDfvDH4wp/O+LDwLsbWdMUYEYO3/nv24IPDWHyGSDWDaU7OxMlKhAeZ9hisRxacMGHLUWchxgrf26P3LLqFu7RaAGjk9eZG9P4yCx9Jj1fyspkkhzR30PkXJKTSvbz39Yjc8X1DP4gWYGp6WW9/z8KZTXiNHIb X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 08:59:48.3752 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 195df2a3-1a3d-40ee-103d-08dea116ac4d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6545 Content-Type: text/plain; charset="utf-8" SETAASA-based devices cannot always be identified by PID or DCR; the standard I3C id_table matching may not be applicable. Allow such devices to be matched through Device Tree or ACPI. Reviewed-by: Frank Li Signed-off-by: Akhil R --- drivers/i3c/master.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index fbe8710c4c56..0be83bfdb563 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -343,15 +344,32 @@ static int i3c_device_match(struct device *dev, const= struct device_driver *drv) { struct i3c_device *i3cdev; const struct i3c_driver *i3cdrv; + u8 static_addr_method =3D 0; =20 if (dev->type !=3D &i3c_device_type) return 0; =20 i3cdev =3D dev_to_i3cdev(dev); i3cdrv =3D drv_to_i3cdrv(drv); - if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) + + if (i3cdev->desc && i3cdev->desc->boardinfo) + static_addr_method =3D i3cdev->desc->boardinfo->static_addr_method; + + /* + * SETAASA based device need not always have a matching ID since + * it is not mandatory for such devices to implement deviceinfo + * CCC commands. Allow them to register through DT or ACPI. + */ + if (i3cdrv->id_table && i3c_device_match_id(i3cdev, i3cdrv->id_table)) return 1; =20 + if (static_addr_method & I3C_ADDR_METHOD_SETAASA) { + if (of_driver_match_device(dev, drv)) + return 1; + if (acpi_driver_match_device(dev, drv)) + return 1; + } + return 0; } =20 --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from BL2PR02CU003.outbound.protection.outlook.com (mail-eastusazon11011026.outbound.protection.outlook.com [52.101.52.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BDCA36492A; Thu, 23 Apr 2026 09:00:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.52.26 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934809; cv=fail; b=LfUJNzuHESWvvauNS0NBHA4iAfLJ+QLko20TMDOoLKxniZYCvs+/LVJjseT2v7RNzMoDThNPuiiFiw5m9opDcKSBJeUCjsd3f65VpyTExtdDpA1QSR94WcoTXOGNLZrpnEvm/EXDsFxf8LWUw12lWBSY0T15cJfUCDK3PtDcwKs= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934809; c=relaxed/simple; bh=tyL6RgiJRdYXU2Fyf6YPahnXi1W0yTEtKI1qyFVxCuY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=sTF/JB8ndiEctBI+0+CEss2L+znTcc7++tPAWMtjge4BcBpMWA/+MDDzo4z9v3kfiAlSi3PvLwFNCA9z9Ea6XCDUEyauVnbwKE61ib6ih5iymbq7YS9TuUY8ehk4JsJRFK4I/ttjlVTu+TD2xk54UUCv1zscwTAng0nTGHs9lh8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=UHxi9AbY; arc=fail smtp.client-ip=52.101.52.26 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="UHxi9AbY" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=qLXilCoFis5YUb/SP6Tujv/PmWU/VuWwzNwZzksz6DCdi7LPNScms2luA4WYgKuTsjABNQH7ULAGSfmXCpRIbIG0qAo45G4+zikFw+zXtYv2uqBe50D5dtoABkf7MtZtI6ZxL7vfMjCjbDeRyJFcocBQXBc7HWEX59LpU42cdabjCiIA5DtmgnCLwAB/NWMvRbMMXJIsCbqlpGAQakzrKKLdJAG1GDJFpE7oPs9zm1LUViPqlHBXgamkSio680UNqDeG3yJCyTgjRlKdVP+y4D7JgWz7SjwBHe6QS2OoGsDBZkNu7TyiNlRR00Z8opx4Q+MWcRdRPiftTfGiAogXPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9XR8/qF1NXML8MzYD0wm1c9AGP/8DLVVfAwlHv2yliE=; b=Uk09MRXCuGGZPYvJtKFPiVg++E3SPlGXTSTuLESUX8cmB/zOLqfy1ZF4/T0SaGdsNtRfDoXS8JwvH+vQq/x3N1OoXsCV8TXeqZVOWr2MyXh+stV+agxvf6rMVDMLU/96l3Fb9Zy+xh2VlQvKZAUCsk+h7t9imLy12N09OdPICC+dw13yM+14szSVNr8fe9dzC3p1OnVCzCG7yruHcw2sUQQKUwKQeGrwKzTBcB2ywO4gLkUXNpF2tTo7cXm999nG23B1OYwraDOu877uK7eexQtfrpuOp+62oFfpeZxpqfdWvugBA8VwDzQxBQ7cBbx4lAlz0EfKzaz+MaHTCZEISQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9XR8/qF1NXML8MzYD0wm1c9AGP/8DLVVfAwlHv2yliE=; b=UHxi9AbYkzRblnD9LGUXcZyFt8EcTDiibnRBDzqPRv394hx65kT8L8z6fivtnMP6Q1s8g9OL6Ks3DG3cqxt5IsxchT68NXDtpBXrCIYmH7p/T3n2cjKX+TqnMmoGlv2Yefrj6Dqvxal+4ITSfhj87Izl60hL5mPtN12Cx2puUCTYi92j/A5PoZTLBta9Z0W7kqNUhqOZAUnZ3m7aEEsdfgHndSwAndsxqNGWlOn2QwC5sMluuFXq0cmUW/iwjhWoWSses1xI/Vw3rLGkdMO5XRsMtTQJD37DkYepXWT5mGieYrs3bbW+RpVUaXrpo7rUs07pc8gAEvXI9UgzZKVL7g== Received: from CH0PR04CA0053.namprd04.prod.outlook.com (2603:10b6:610:77::28) by PH7PR12MB7913.namprd12.prod.outlook.com (2603:10b6:510:27b::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.20; Thu, 23 Apr 2026 09:00:02 +0000 Received: from CH3PEPF0000000B.namprd04.prod.outlook.com (2603:10b6:610:77:cafe::1) by CH0PR04CA0053.outlook.office365.com (2603:10b6:610:77::28) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9791.48 via Frontend Transport; Thu, 23 Apr 2026 09:00:01 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH3PEPF0000000B.mail.protection.outlook.com (10.167.244.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 09:00:01 +0000 Received: from rnnvmail205.nvidia.com (10.129.68.10) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:43 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:43 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:59:34 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 08/13] i3c: dw-i3c-master: Add SETAASA as supported CCC Date: Thu, 23 Apr 2026 14:27:07 +0530 Message-ID: <20260423085718.70762-9-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000B:EE_|PH7PR12MB7913:EE_ X-MS-Office365-Filtering-Correlation-Id: 4fc871b5-8e64-4b4a-56d3-08dea116b412 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|7416014|376014|82310400026|921020|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: oh52OucviWcHmNli93g++9SZ3rU4JCaTTbw/Sh3bDOYzarRuXOEIaGkFR03Gjz3xAlwaz3T7MtIPyc/cQs6QNTUQEZY376X/4WsR5U1+T5LBGKVFp4XsA47hImJFHoqCs6V6NlssUx6O94ioF8aJIfPe3/+gd4wqUr9n2snpn9ccCFr85XJ98mHvXByK6+8zeiDVnUQeP0YJVZJVDQUJ5+M7pOpfNKIvoIeyCniIvXa4f0Ve6VgThpsZ46684/rYVx3pw4oqREM6/ylcTWMA6tXJCMebbMugI+znIqbyRigdyE+hcuw5IhYFPNDwMQilZ21OpZaHACljXk1ypvWnKtkCs+e4p5FlAALO4KjnxviPOrmC72vw8U0JmfI4Z6Zn1cfGcYogIkjGb59idAVUWA3rsFlQnwZpGrwKyCEaq7v9ebxI3mijinPWKRopjsw5PP16BpCxLe5E8RyJEuEo9eIOs1K7apxQhDz00ExWoO/SO9P+F8jEFUp14Mg+oPge+RLgxSVQerbw/qqsPH4VxEsBIDo6sjy0R0V9NaQbigJ4YTg/NVfBbGah9xKlp6uECVlb/T5TTAoHArDpz/JT7uCzhm+2URNM3MeCXFdEfIk5ThJ9c49kh6oQRow+sqaiRaF1FuiM91M/R6AuMR5kwlMwdqEWm9xMl8TIfybcRfyevXdgP3p0SNDgw1aTCh0bWHhrepNizkc4vpdTVbUYyU/v2MNRLxAu86aKPqdFNFuBSsIb0TeMZEjEVlPv5ynvFKNmmlOLm3n1Pa2u22JFYfCipnibjMGgAM31qwF/pZMeu5K6Ro8LaS5g8SA+yxet X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(1800799024)(7416014)(376014)(82310400026)(921020)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: frv3PJGqA9QS7RDgMlhSRkeogHZCTVzDu6WQYlYxYNLJ4IdGea51lsZAo8ZwzP4AwaOu10AOWcMpjqhKfwBMBj5wBQ3X6gb2H1ypXpDSaafOvDP5oOlwonGUCClDfIwcHQKlitVrCASCywJaPmvgH9/Dy05DbLo+F/7NjGCnrnODK+AwYuc12duZ7ViMDTp6a71V1YAO39Zrf6luy+MfcpZvNMieZC4R13Vs49v6Lr1PzCd5cz5E7G2F4kc4ROPyKXId7oTZFnVoieGpgX5Ujq7ZKY02F124gItqWn94z/m1whr/5tWs+Pkvu9y5r9PNy3UkOfB7ig5T2l/nJEGvI+WU/fDojMm/lpRZeU4+MRn0Urph3CObsSfMYfIQK8NM3rOBXxGXCc6awHaZpCwIaIC2KBA32V1fQ4BrZfDGEj8ZkZpBmDC/M1Y+l57+885b X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 09:00:01.3937 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4fc871b5-8e64-4b4a-56d3-08dea116b412 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7913 Content-Type: text/plain; charset="utf-8" Add SETAASA and SETHID to the supported list of CCC commands for DesignWare I3C host controller. SETAASA is a broadcast command that assigns predefined static addresses to all I3C devices on the bus. SETHID is to stop HID bit flipping by the SPD Hub to which the SPD devices are connected. It is a prerequisite command to be sent before SETAASA as recommended by JESD300-5 and JESD403 sideband bus specifications. Signed-off-by: Akhil R --- drivers/i3c/master/dw-i3c-master.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c= -master.c index 655693a2187e..edd42daf7553 100644 --- a/drivers/i3c/master/dw-i3c-master.c +++ b/drivers/i3c/master/dw-i3c-master.c @@ -309,6 +309,8 @@ static bool dw_i3c_master_supports_ccc_cmd(struct i3c_m= aster_controller *m, case I3C_CCC_GETSTATUS: case I3C_CCC_GETMXDS: case I3C_CCC_GETHDRCAP: + case I3C_CCC_SETAASA: + case I3C_CCC_VENDOR(0, true): /* SETHID */ return true; default: return false; --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from CH1PR05CU001.outbound.protection.outlook.com (mail-northcentralusazon11010001.outbound.protection.outlook.com [52.101.193.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D59683E0224; Thu, 23 Apr 2026 09:00:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.193.1 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934830; cv=fail; b=EgnNOUVGp/ewKlnaJukchgeCtCetaQ7rvH5u6Gf66no7vjydnA6sNjk1DD52A9beGRsKFCxmQIdZgfId/Xd6r9EEp5mQghuyV9qxCLa1jPJt80083suurY2enH2SSJe1WypOc8KFkaSq0vprG1w9A1IFhmwXbhU2mziGYZaOS98= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934830; c=relaxed/simple; bh=DN5mGreSeSkmYAGO0SgIABxIZdObp1vS6ukdFcieVuM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jPTT7uA3bnRiT8ydsr1XGt22Ub4SbOwIf0fms+A3EJFVY9CZ1Rb/oEmK9969vOrofla6+PK8hAZCSkklIfYksVMwcqwdWbuPrJLP/0nEMLmoXOF7kXoG34tENtGEawYeCnRY7lndaCFbLbM5HvI1BEWVRgQoRKZreqXgavPorFc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=dyIA0VQC; arc=fail smtp.client-ip=52.101.193.1 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="dyIA0VQC" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=W+kZxZ1ULhFgyhzCk4aMloyeNvkXBuHJZTAXkr6LjFY98MxPsnS0s/kSYIq5L4xVOiEEQ9HntBD+1nhQ2FTZBkU3K8AzH6Pdg4HtPLSFcUCduY6W/cmlxpSHlhfykVFNyQuRRjlG+AynNI1TF23pSCwJ/PrngqWHauffdGexIU5AUPbMsQTrX1pmDGoSAFmdfz+999OFrkiCr0h2UJ9/aoYjU4UN5NIcr44Gs2NDerPir7Ifb2JX0gEXrfv5W5OHWPlrSHQXoFkiM0XX31upFAlI/MWfBIHfk9sq8iWgpBYE+CgShgBVsG7YApmAYlLhKGLCqfDChVa5bQmxHr+52g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8uJBanFBW09xuPUHtSPbmlSlMq6/XJwVFb90HY665dE=; b=xU0ibjRpx3GWySULTtAQyyAK7JZcqcC5/SyQQCUnSWB+7Oahi/myBLn3cbjh5LHzaOMTokclAxYLdmEqMbR0e93y6n/JGriQQRsTIYsQTndxZr+AVr9A0geptomhzC5ECV9gF9YUbgr1z2WVQxFHviR/dH7eHMgVkVjppPaKY+bNbfRDNr8N1VoegEpXuKYw0Q1Gg6gR9DxSJ0P4MVRXoECKeWN7GRlCoD2YKa6DGiANkG3IE1VAPdOjBnbIfq1m6XPZQ8rJ9o1i2rWu8NYZ20JUGdhXjCXAArv42pYdasgjR401r9+86siQEt0ck3Idql52GfhfcsHh8uAI0mrOIQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=8uJBanFBW09xuPUHtSPbmlSlMq6/XJwVFb90HY665dE=; b=dyIA0VQCyPhcN8Rcc2ZzJA4sNk2HK7LwAXc7uUAiWwKwlQ1NOQ8XaREOQJpXBJZ33oG+s5SccXQY3GR4wwKmnrgunhRB1F2ZJz1s7/ykscSlgStqJfA6VqT7ar/WJ3XlFtGXpb4KjruA+1jJaj+bUAhc71X5oaf/fRSSPCT/g2gzIe81fejYQROizp4HtMucjnVm+GaF9vKMyLKaHOMytC5DOM11lduIp1kGFFCkFyBlrsGO00f4Ugw1rN9O3NxNV84a5kgpLrDS+lkKVKPNgWFFcAIy8UULgN9yiVCQx5Z9YoLZEAUvTpJj0vgO57ll0Yz8KcnZIyepyEmNBd4Mhw== Received: from BYAPR05CA0042.namprd05.prod.outlook.com (2603:10b6:a03:74::19) by CH1PR12MB9670.namprd12.prod.outlook.com (2603:10b6:610:2af::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.21; Thu, 23 Apr 2026 09:00:16 +0000 Received: from CO1PEPF000075F2.namprd03.prod.outlook.com (2603:10b6:a03:74:cafe::63) by BYAPR05CA0042.outlook.office365.com (2603:10b6:a03:74::19) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9846.20 via Frontend Transport; Thu, 23 Apr 2026 09:00:13 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000075F2.mail.protection.outlook.com (10.167.249.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 09:00:13 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:55 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 01:59:54 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:59:46 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 09/13] i3c: dw-i3c-master: Add a quirk to skip clock and reset Date: Thu, 23 Apr 2026 14:27:08 +0530 Message-ID: <20260423085718.70762-10-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F2:EE_|CH1PR12MB9670:EE_ X-MS-Office365-Filtering-Correlation-Id: 4c8bca67-68a5-4e63-8388-08dea116bb35 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|36860700016|1800799024|921020|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: 7mCTmjFMBS0/xrgqt9iENA6utWCS3vXj9SFFX7ZAIuEV6bpXZv7KJxzrX9icF5mdljgmYHFcBr6SLETiT6R7nF/mQTZPkQx0oBUWeMjJbzYjNsDiLQHUMcP0/yzIhfjBhwiwU6fKNUkqRvqhH7xbfMhwLYyMJjQiq9SCPspkN32TbicSLOVESisgp30uKT2THOFdVXGPeh35rag8uyGk0cD2lboOXgCJ1wqnq8vBg+9YOPiszO8qiLZQrDOKtlWJ7dw5fui2TK2BE9jmgJe0jvRkhxQQrjENrkf0zApRAXspXPBBP3Mv6UMnhQSFxFjz1dB7nUpL0tOKxkAKfce68yH/XxFHhZQc74LDrBig+7ymdgtEuNhM3CS9EfuSUB8fFWtAooE/OGUkXK5hZTher08pKN3I3rdMlYWAAySNkE9KGkq26TNB/AdzRBx5YXoDz1dzu92Z3InOxi8+oYGOIYjpU0LCe0kb/EIpb5t1lDHt4pxKXLfw0S3fz0tetRE4N01sXGYhi9d5tMLfbwe78ZHtldXGCYykRGr37GSXnuIYRGhQ1N6cbI/HjTBUNn/+C/wC8CSAIatnsDWL5eTNxFZzRU18R/9/+Yb6pIgv7BG/eWKIk13j22YeCjEcUs/vHjIEys0N/iswbNlyyu0TwvEQBkdzCRGcrpqAcUHjuMdCxwyAeiP0IZWuxmHkeRJDftBRX6k97YcBsvo9fd9WoA9/2gK0/8Akaqo6AqtDFsXB2eT6vQCLhmcfX5PGSWwn5c0fG3eCfWJX3pTGQf4pcREOss20Xke6Dgq2TbJIN4NCUtrHyqGyDSabcR+zp0xi X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(82310400026)(36860700016)(1800799024)(921020)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: oiZbWy+Es2im/JsOvx54PTbLAiiNTLNi3ln4eVYV+vQIbfrYcwIwLfWMgXmujxWWpC25IVFb4/xmYtbbtPcWEk50YTqSu+r4qz2JkVgieNK0KPnR/6P17QLVqWhhQwrieCRxotyAQbsY6fwMCi41nfiJhHFJDf5n13VwFmcGnZNhUMv4u1tOhiHVhgmlG82Y1rxp394DAXW/KaGjY2y6c1yfaoZoi17D4zF+Pz+nTW9WOWsva/BLlrZA2tXlML6W8H8UiO2NChjgbK8LQebaecAREN7vKNtRDh6yuL51QFfOqsaF0VKswba9n2TT2ef2ldNqaNFW8fFHlei0ayRpLhw1KSyo8oVssW8iqjp4O4nmC0KqIXYwaWSaqInCfHENMJNwH9rflFXEUJQQdnaBKaljzBPCbFAlRAq0CoeP80G7S8tkDBCyk9ID8TvfYk8D X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 09:00:13.3907 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4c8bca67-68a5-4e63-8388-08dea116bb35 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F2.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PR12MB9670 Content-Type: text/plain; charset="utf-8" Some ACPI-enumerated devices like Tegra410 do not have clock and reset resources exposed via the clk/reset frameworks. Unlike device tree, ACPI on Arm does not model such provider functions. The hardware is expected to be brought out of reset and have its clocks enabled by the firmware before the OS takes over. Any data to be shared with the OS is passed using the _DSD property. Add a match data for such devices to skip acquiring clock and reset controls during probe and read the clock rate from the "clock-frequency" _DSD property. Note that the "clock-frequency" here is the controller's core clock and not the bus speed. I3C specifies the bus speed separately using "i3c-scl-hz" and "i2c-scl-hz" and hence this should not cause any conflict. Also, move match data parsing before clock/reset acquisition so the quirk is available early enough. Signed-off-by: Akhil R --- drivers/i3c/master/dw-i3c-master.c | 57 ++++++++++++++++++++---------- 1 file changed, 38 insertions(+), 19 deletions(-) diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c= -master.c index edd42daf7553..b90756ade2db 100644 --- a/drivers/i3c/master/dw-i3c-master.c +++ b/drivers/i3c/master/dw-i3c-master.c @@ -242,6 +242,7 @@ /* List of quirks */ #define AMD_I3C_OD_PP_TIMING BIT(1) #define DW_I3C_DISABLE_RUNTIME_PM_QUIRK BIT(2) +#define DW_I3C_ACPI_SKIP_CLK_RST BIT(3) =20 struct dw_i3c_cmd { u32 cmd_lo; @@ -556,13 +557,26 @@ static void dw_i3c_master_set_intr_regs(struct dw_i3c= _master *master) writel(IBI_REQ_REJECT_ALL, master->regs + IBI_MR_REQ_REJECT); } =20 +static unsigned long dw_i3c_master_get_core_rate(struct dw_i3c_master *mas= ter) +{ + unsigned int core_rate_prop; + + if (!(master->quirks & DW_I3C_ACPI_SKIP_CLK_RST)) + return clk_get_rate(master->core_clk); + + if (device_property_read_u32(master->dev, "clock-frequency", &core_rate_p= rop)) + return 0; + + return core_rate_prop; +} + static int dw_i3c_clk_cfg(struct dw_i3c_master *master) { unsigned long core_rate, core_period; u32 scl_timing; u8 hcnt, lcnt; =20 - core_rate =3D clk_get_rate(master->core_clk); + core_rate =3D dw_i3c_master_get_core_rate(master); if (!core_rate) return -EINVAL; =20 @@ -615,7 +629,7 @@ static int dw_i2c_clk_cfg(struct dw_i3c_master *master) u16 hcnt, lcnt; u32 scl_timing; =20 - core_rate =3D clk_get_rate(master->core_clk); + core_rate =3D dw_i3c_master_get_core_rate(master); if (!core_rate) return -EINVAL; =20 @@ -1580,19 +1594,33 @@ int dw_i3c_common_probe(struct dw_i3c_master *maste= r, if (IS_ERR(master->regs)) return PTR_ERR(master->regs); =20 - master->core_clk =3D devm_clk_get_enabled(&pdev->dev, NULL); - if (IS_ERR(master->core_clk)) - return PTR_ERR(master->core_clk); + if (has_acpi_companion(&pdev->dev)) { + quirks =3D (unsigned long)device_get_match_data(&pdev->dev); + } else if (pdev->dev.of_node) { + drvdata =3D device_get_match_data(&pdev->dev); + if (drvdata) + quirks =3D drvdata->flags; + } + master->quirks =3D quirks; + + if (master->quirks & DW_I3C_ACPI_SKIP_CLK_RST) { + master->core_clk =3D NULL; + master->core_rst =3D NULL; + } else { + master->core_clk =3D devm_clk_get_enabled(&pdev->dev, NULL); + if (IS_ERR(master->core_clk)) + return PTR_ERR(master->core_clk); + + master->core_rst =3D devm_reset_control_get_optional_exclusive_deasserte= d(&pdev->dev, + "core_rst"); + if (IS_ERR(master->core_rst)) + return PTR_ERR(master->core_rst); + } =20 master->pclk =3D devm_clk_get_optional_enabled(&pdev->dev, "pclk"); if (IS_ERR(master->pclk)) return PTR_ERR(master->pclk); =20 - master->core_rst =3D devm_reset_control_get_optional_exclusive_deasserted= (&pdev->dev, - "core_rst"); - if (IS_ERR(master->core_rst)) - return PTR_ERR(master->core_rst); - spin_lock_init(&master->xferqueue.lock); INIT_LIST_HEAD(&master->xferqueue.list); =20 @@ -1625,15 +1653,6 @@ int dw_i3c_common_probe(struct dw_i3c_master *master, master->maxdevs =3D ret >> 16; master->free_pos =3D GENMASK(master->maxdevs - 1, 0); =20 - if (has_acpi_companion(&pdev->dev)) { - quirks =3D (unsigned long)device_get_match_data(&pdev->dev); - } else if (pdev->dev.of_node) { - drvdata =3D device_get_match_data(&pdev->dev); - if (drvdata) - quirks =3D drvdata->flags; - } - master->quirks =3D quirks; - /* Keep controller enabled by preventing runtime suspend */ if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK) pm_runtime_get_noresume(&pdev->dev); --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from SJ2PR03CU001.outbound.protection.outlook.com (mail-westusazon11012018.outbound.protection.outlook.com [52.101.43.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 718413E0226; Thu, 23 Apr 2026 09:00:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.43.18 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934836; cv=fail; b=UWYxxgJHITDpL81DIFZjsp6/79GHeHMZIuCQerQe2ZbZ90Q7bxLQeN7pJ9vwnr3n02z09NTJ33pHEeo7jsgnlL/pzFrBZ/DENwE4RerlOrqny1GT2S7DMFGVe4i2GPWdUlmsnC2j+yDo0pD2u5icAAISzDXDqEb2DJFSQM6MEk4= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934836; c=relaxed/simple; bh=LGoiupd+S/KSMMuz0eMqyVVV1bkxAx1HnvLRfuwR4ac=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Q8KSJeyxrxVmoQF6kCiE1VbrBo6xv8FI4NhdXfKHH65fzhJ/qiVpDp+S8noMQpH0z+vPXon3TGrEOuka8VQv0mBscOfLFICnr+N7Q975HHbpl9iAze+0XedsjnmYPSclM1aVCN3JVfwdw+Cv4FJvKbho49z3N7FvLPqx89BlxhY= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=g+QrZe3v; arc=fail smtp.client-ip=52.101.43.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="g+QrZe3v" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=HoSKQng7iAdfbWuRM2qKYH0ChOqs7lb+LXmKm71EBNHmsdgWG0MmHI7JircvZKtGEPno9mVtIOYM8lUSmcndmOsWm7exBxXUdcZO6kjoraoRwyRl//zPLsIYFw1hEIq7gBfgXggzpaRmZ07PPUtMCzl17OKJvMYUbKoVppisKzfs+eRYP5s8D6Kt0cxONgxQNU4+Nfu2VxhdJH5Eb+pQWHuJPWYziLTmNomo1WM4N3hh83REE+xjAvfZqhzb3v3k1kgPuPgs/63fboRpsC8cSDlEnglpPhGU+mENEURcrUPLMEava92awTEo1Rx5qG83R5uip/O1C7eAQV1wAeF0gQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=OI2jcnITSzA20Hq5OBpI8zQTN6J7vVg7OoWsecdwwbM=; b=leQVCqgYhA99sOQ7QLSk9Xy3Z90ijb5rASGuaqU0uALD7SqADNGF4PK/Pl4JAcFu8Zrl67iyJSw31UrMgoJCyYeHhY41wpwG08XukcPKdVrBWRlko96Irkwz6iwFVb5lrZbq703o5I409qTL0iVpbtQwHG4lUNL594DrSfX2kdfIjjoiiEjleANSI8NEtDn2DvJhqSPv5hKr/leARw6ZHARZhYUfxqMZKgDFYrpP58sHuP0xK43nFeYJ5SeMko8jy1/bi+F1w+gMeCX05gJHdVtOL3VsHf1PPJ4mfEci5llm2QBl575cSYu2EVdn7fIlhfY+lMgX4i8Hdt1//LT+Ig== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OI2jcnITSzA20Hq5OBpI8zQTN6J7vVg7OoWsecdwwbM=; b=g+QrZe3vWHm8sF2cHTdAfudjn5IMYsewfnxvcV3Gd1PA4QrZx1YyOdGUFSZ6Mg0nNfBzU1N4ywepsBrW+tJ/6Y7M/ApB9ablNowydjpjAWwzk7onii/E4rVxaDiKkj0UKdRjJoDLnDg+zBJmjzMU0CpqXWicHmwNyj1v00AqK0imqm+XqZpzvBWi5pVpA6VSaLcLNFHizr6neQMh+c386xPs0M7lwfYg6cyXEJRGY17/C2FO0J9wiW13Is1yqzWgUXhc3kFFXQFnOOjxN/ROoeL46iOgKOtTFaxmFYTO5oPU4d02I8/7IDq2xliPUspYMdvGKVoteBRvjYYbzGkH5g== Received: from MW4PR04CA0290.namprd04.prod.outlook.com (2603:10b6:303:89::25) by DM3PR12MB9391.namprd12.prod.outlook.com (2603:10b6:0:3d::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.21; Thu, 23 Apr 2026 09:00:24 +0000 Received: from CO1PEPF000075F3.namprd03.prod.outlook.com (2603:10b6:303:89:cafe::d8) by MW4PR04CA0290.outlook.office365.com (2603:10b6:303:89::25) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9791.48 via Frontend Transport; Thu, 23 Apr 2026 09:00:23 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000075F3.mail.protection.outlook.com (10.167.249.42) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 09:00:22 +0000 Received: from rnnvmail202.nvidia.com (10.129.68.7) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 02:00:06 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail202.nvidia.com (10.129.68.7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 02:00:05 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 01:59:56 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 10/13] i3c: dw-i3c-master: Add ACPI ID for Tegra410 Date: Thu, 23 Apr 2026 14:27:09 +0530 Message-ID: <20260423085718.70762-11-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F3:EE_|DM3PR12MB9391:EE_ X-MS-Office365-Filtering-Correlation-Id: 666227b9-4d4a-495e-8def-08dea116c0de X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|82310400026|36860700016|1800799024|921020|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: WxXZ27SU2uXUgKEoWQO95+CLDM/V+VeI9itb6IS2TZvYs3uGO9PXqY2NIN2nMUmk6LQZWiC3ZQg0zJ1FEZ66WMLEUxvLF3RMinqx2fGoxfmHzAGi7Q8Yx2T4eKHHhXkNdCbPu1O8QsX3BuhFoTZ6Ed8a1e+qvSFxhT/tmT4QGMSfD9ih4P6RCADiw8Pr0i9TtPJzP8I/M8pOQWIB2QllSfxdniTX3n2Iq9FjOo5OoMcM3HDkx9VN9avA5pxVc4tQaIyPyVjX1A5UYqx272ATXrO/V+UKkCsuHYW0X++asAVMMCVl+N1VfdLwmekuYKbviPJx+6vKMP1HNbEi8oilf5eDQZtiVNQqsg4V77/G4cK7K01+PsHA//u4gD6k6j9RlFDVdT+NhyjvXmeqpuTUUyGRP+XIDouO+y3piPU3M15TInXeXpVrZfKwLEwFh4el5uJqVySf23Qf/9ghGUpigLwAOMAyuA088G60q8K0SmSSJYGjEEeN6UTimJdiOtUi5qQEV0Pkzt2GUEWMMwGn0OzulomxtMs2d10HebAwpYkUI/EfN4tHfJJEvbefqIRuV1cNdF3KmELfcGCtzPO6rXfsNdjnh0HN0zjltvgmePe1m7cUlw2vZx4db8R+bDZ5HjiQyknOIUVvWyuZzu+VgLI07R251hWvY7VunabBQ827t/70ckLKHRe5xTK1FNKRn4AH5/vg4ozPphwLvtkdM3A3fkxo+9/ggU186GntOoCe4vvo7cgrvGJaMA1qFwyxO2UR7rykpYN0qh+4mg3FRheiTnWTAB7YRr6Qc6MYSJzrQWe6mfK9WW2UpuVmEASn X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(82310400026)(36860700016)(1800799024)(921020)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: MAWOT27d00JOCtYDK+v+1Q1sXlZaSmGdpYqWW+5A9gV2jaGAxFW31rhA3+IMWbj7LPqlB0512Ljb9tSzXeWH3S0zo62OTA88j3dfbWoGe1DO/TyhMlQQx7JKs2uW0djN+g6GDXwUa2D8orinYM0mZXDnsj8bjD8jFotA8i80duRbTPDWHjXLD96k5ql3FSHerof1UTYOl8jeq4KaFm0MNw23ou47jnu6xbX+1BEzusZ+qMlOTXP40Y++9VUPV9BFD8jlBhp+O1WvlXRZFPzeKCDHu+CjMEd5H53nYLLk52sdz2gLM1sMZJZEDFX3E2Kwfineb6gcVU7Vl1KR2lMvekAlKXKX9bOob5Q15dg1p/GwWdxWD9SaCXvKga+e5AMbtdWwZitTeLrnxYoT60E73cqHosnRy93xB99sBO23C3H9yl3H+/l95RX7dNIjFmOv X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 09:00:22.8967 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 666227b9-4d4a-495e-8def-08dea116c0de X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F3.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9391 Content-Type: text/plain; charset="utf-8" Update variable names to generic names and add Tegra410 ACPI ID to support the I3C controller in Tegra410, which is a DesignWare I3C host controller. Reviewed-by: Frank Li Signed-off-by: Akhil R --- drivers/i3c/master/dw-i3c-master.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c= -master.c index b90756ade2db..e63822df2ae4 100644 --- a/drivers/i3c/master/dw-i3c-master.c +++ b/drivers/i3c/master/dw-i3c-master.c @@ -1847,11 +1847,12 @@ static const struct of_device_id dw_i3c_master_of_m= atch[] =3D { }; MODULE_DEVICE_TABLE(of, dw_i3c_master_of_match); =20 -static const struct acpi_device_id amd_i3c_device_match[] =3D { +static const struct acpi_device_id dw_i3c_master_acpi_match[] =3D { { "AMDI0015", AMD_I3C_OD_PP_TIMING }, + { "NVDA2018", DW_I3C_ACPI_SKIP_CLK_RST }, { } }; -MODULE_DEVICE_TABLE(acpi, amd_i3c_device_match); +MODULE_DEVICE_TABLE(acpi, dw_i3c_master_acpi_match); =20 static struct platform_driver dw_i3c_driver =3D { .probe =3D dw_i3c_probe, @@ -1860,7 +1861,7 @@ static struct platform_driver dw_i3c_driver =3D { .driver =3D { .name =3D "dw-i3c-master", .of_match_table =3D dw_i3c_master_of_match, - .acpi_match_table =3D amd_i3c_device_match, + .acpi_match_table =3D dw_i3c_master_acpi_match, .pm =3D &dw_i3c_pm_ops, }, }; --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from CY3PR05CU001.outbound.protection.outlook.com (mail-westcentralusazon11013065.outbound.protection.outlook.com [40.93.201.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 785783E023E; Thu, 23 Apr 2026 09:00:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.201.65 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934855; cv=fail; b=ER2KwLbLOK9lFllU4ubIECXrqZro6FGoa60sz+gzyiFwUiIEu+NQjsDVDp44lCZaJQLAbmFZlDhSCi5krPuEFnxsWtL9OI59tElY4ogBh+HTqN6rh2splNFzlwWxkhplCSe1jee67JOdRdyDrz8V/UeejXNKrJAQFkCvpuKDybM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934855; c=relaxed/simple; bh=8X5fiZ4iTBUN72Hld2YNXk8vTOGm5BhsU+AY5Jj0wqY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HPDelndK814TK2vu8nt5C46J0yzTPc/itSeU5+tXWdT4y/QH7Z3w4XVJ91KkxmZTN22Bpaqkns/WYUK6sBiihfnnUWoy9+BFcMDekxnA+Uk/3n3EETAXU6dV20QNEjg/YVZx9g+UP/tvlW+OOiDh+/vSSEhbM6qa+X2JVn+oQ+U= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=SXPfJB+Y; arc=fail smtp.client-ip=40.93.201.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="SXPfJB+Y" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=btU4/sGiH0J+bKyPRF7+MecY5P8BdCbHkMO8aF7GJnyvoLn99J/LED+U1ESg3W0HjZyL91zTQDgjPJ7Uvns7DgIKSWCQWd2LLiiUB8zn5FVsy69gcNhPZxWlVxIpkcUbSHSjIA+XXJ4VFNYsUCXiQnFE5WIdn6JlJwFbVPVP0k69jfaTiWjASHHeWW+9OCXL6rjLTAaITZmmQx6EE6vc0K8SK1VU+8tipGbN2SD+9HAQKCosauf2MhxJYG5FhmYW3w9RcZBircCe9yGBDqzI/2efkLuPrj3C8otDGEWmVLAAznXDBKCVjmBS3a4n32KVPFpb3+4Pk3PKNOeF9FxxnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=CZBgN4uhzoTTgsILiIPmszUJ0nSluvCdQlqODzu5fCE=; b=KV8H8iZohz2KqQvCLFQuz72evG6bJy2Bq4tHde3oJiBRXjUEU8H54x2ZCeGcgmEW8JaOiR6ZCcH80tGQu2bDxToP+ldKqS/SdrwnzqtphYQ4juLaSXP3SpZKqnuxktim+fCqzwh/iMWh6iS2/URTOPG+ykrbkKIBryeoS+eRW7RPSOgRkaJUApsIultkJ3F02TmdQKUlVYxQjs53gYQ2rL/B9PiMt1ulJvt9SDCxuHMKtusF8eE2htcLRQGGhzn+gDaji1Tf+HeOM2XQ22TDytK69uTa9rLgehpV+07jA5234aqWJeU8Y3ozQMZ15RdK0Tjk9vih2U71VU8uHACenA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=CZBgN4uhzoTTgsILiIPmszUJ0nSluvCdQlqODzu5fCE=; b=SXPfJB+Y2+/OQKEtx+dkxn233uL/0raeZv9IrtlhBcTmp058h40bqRwczxvwfUCtrZ93E5vRE8gyNXBe8GzqbzI014CC5w99n4rAgUCTjn+dB8+rdjSHo7ZI089MoID1+6jex7k+xonFViRhOwXvawiH5n3YW3zLSQ1yPJm0rJSEeAYES4DGOTfZhgUl9lqmmRHHLrzlWVFMhjMrsMZ47bkV4BVDnpKhbeo9Zsg4B5LT4bk+RgxBg6+/Ol8Jcf2Jz3MFpXCe6cozPZi1G25Ao6Sdt2o36aUJCzQopwMYnao42JZV2+3qE21vUzTWdw1iWubgH0sfe0k+f5NB9A4dog== Received: from DS7PR05CA0039.namprd05.prod.outlook.com (2603:10b6:8:2f::16) by DM4PR12MB7741.namprd12.prod.outlook.com (2603:10b6:8:103::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.16; Thu, 23 Apr 2026 09:00:44 +0000 Received: from DM2PEPF00003FC3.namprd04.prod.outlook.com (2603:10b6:8:2f:cafe::a7) by DS7PR05CA0039.outlook.office365.com (2603:10b6:8:2f::16) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9846.20 via Frontend Transport; Thu, 23 Apr 2026 09:00:43 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by DM2PEPF00003FC3.mail.protection.outlook.com (10.167.23.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 09:00:42 +0000 Received: from rnnvmail203.nvidia.com (10.129.68.9) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 02:00:21 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 02:00:21 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 02:00:12 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 11/13] hwmon: spd5118: Remove 16-bit addressing Date: Thu, 23 Apr 2026 14:27:10 +0530 Message-ID: <20260423085718.70762-12-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM2PEPF00003FC3:EE_|DM4PR12MB7741:EE_ X-MS-Office365-Filtering-Correlation-Id: 5147b167-c63c-49d3-40c7-08dea116cc50 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|7416014|921020|22082099003|56012099003|18002099003; X-Microsoft-Antispam-Message-Info: pJnu2zWedIO80mJbPWwR40Q9/3UJSD0pgCX81wYoJ6w7lpkOVR9aV9RxzH8MtxbX3MuyWa8pUJTLe9ZKKxxcbUaWZsC/UBztTdx8ZcEoOEeLoU9yDliV4cuPbQXfBd8lRteWuPU90OHnHGRZD8XB+UKPpffy0wBtQT2yXpvnSaqSFLTiGCwAp5sv5j9Qjhg5dSF9hjVBuPm/Xo6xRFGe3nZ4bj/AMkJ3aQ56D//CKC3JD/IcpbBvAiMq+jkhvGGUAKT4gmqXG4N0cce8zgrpoaCw01kjIJN/SvhL/O0DNUr/1ItyolfXRQfxgTyv/sfKSUtcGEiRP/i00bpUxHw9rf5NjPQ6i9XEi4WCaZAiXIIcS/uMzl7tt6YlzIunZx8wOjUA27mxf3AvmhiOBzPX77cmblKDkTvvX7jrE6CTt9Fe1FvvBsydclL+Aiuzb7KnhrA7CZd11rz+hqLaFhaMeSwdzhsmHigvuTh0+9/U49C2u6UHMKwGenONdZvCNF68p9WnK90PBN2L3jlN46D11KcOyh5Cpx7SE4u0ZXxBUG/+BWwJNSCAIaq5cT610zIxF3miHqn2YtGez67mv1WtdgHpKTbiRscX7JsJ7CVSBG8Pb0HxsZ+exyKUyYD3EuegYM2B2+GYhEC1f5x/HCphL1NBYNSjWL7ckriwUiST1plfC12BkoCmqkAzSL6YZ+oWm9+Ck0u6yjfWwgYOE9eZOyqSiz509MKgrjG4xHOCywXFd4oQvbFpjaJKesIkkgHF/qYPKnpOZW2MPGuQyxe8g1Meevhf7zWbOf2Mqse2OTIaiLLhjiXhNbqplvdrpNsO X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700016)(376014)(7416014)(921020)(22082099003)(56012099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Qs5K0ZiwQ+97gekp2NrYIpEKqLRxRgF/JSoEgKL82WpOB3SxshrEde0Yt7aaHqoyJ42VP5C1s6HAtLtCoWdu4wtPCandRoqBz1YZwDxV3UdDLhL4jUu7atSfb9UiWY9o26OqEiv2JagPoP7jc55zbGB7+0ObAu/Dd7R4H5+LLqfLnSkeZX7sCOSuQKmQzdBj8IP/Bd+sKVx8u93P7FK1OS2vpl7BPG87PFixe4AJUJk9ghm75uEfZr0rqTguI1nQRrJSlFHJwM1XPyfr9tvLGpK33/scj34uGDlHxt5aK+dDMTE9303mgkQn6NzQ7nvWhA70nYz6Mi8+glTrW+m4Vr5gs0h40RHMOQBRoek0FS0g5Z8cTA3Ow+atTX9YKKljpXHofsiyHuXunKkTsMse+dRcPS3QZxwYWzj2nrLFc3Jff2UXewZZruHig1BqD4+Y X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 09:00:42.1263 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5147b167-c63c-49d3-40c7-08dea116cc50 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM2PEPF00003FC3.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7741 Content-Type: text/plain; charset="utf-8" The intent of introducing 16-bit addressing was to support I3C, but it turns out that I3C does not require reading the Legacy Mode register, nor any specific encoding for page translation. The testing of 16-bit code was limited and there are no known users for this feature. Remove the sections that support 16-bit addressing and prepare the driver to support I3C appropriately. Suggested-by: Guenter Roeck Acked-by: Guenter Roeck Signed-off-by: Akhil R --- drivers/hwmon/spd5118.c | 79 +++-------------------------------------- 1 file changed, 5 insertions(+), 74 deletions(-) diff --git a/drivers/hwmon/spd5118.c b/drivers/hwmon/spd5118.c index 5da44571b6a0..8fdde35e68cd 100644 --- a/drivers/hwmon/spd5118.c +++ b/drivers/hwmon/spd5118.c @@ -66,9 +66,6 @@ static const unsigned short normal_i2c[] =3D { #define SPD5118_EEPROM_BASE 0x80 #define SPD5118_EEPROM_SIZE (SPD5118_PAGE_SIZE * SPD5118_NUM_PAGES) =20 -#define PAGE_ADDR0(page) (((page) & BIT(0)) << 6) -#define PAGE_ADDR1_4(page) (((page) & GENMASK(4, 1)) >> 1) - /* Temperature unit in millicelsius */ #define SPD5118_TEMP_UNIT (MILLIDEGREE_PER_DEGREE / 4) /* Representable temperature range in millicelsius */ @@ -78,7 +75,6 @@ static const unsigned short normal_i2c[] =3D { struct spd5118_data { struct regmap *regmap; struct mutex nvmem_lock; - bool is_16bit; }; =20 /* hwmon */ @@ -348,12 +344,7 @@ static ssize_t spd5118_nvmem_read_page(struct spd5118_= data *data, char *buf, if (offset + count > SPD5118_PAGE_SIZE) count =3D SPD5118_PAGE_SIZE - offset; =20 - if (data->is_16bit) { - addr =3D SPD5118_EEPROM_BASE | PAGE_ADDR0(page) | - (PAGE_ADDR1_4(page) << 8); - } else { - addr =3D page * 0x100 + SPD5118_EEPROM_BASE; - } + addr =3D page * 0x100 + SPD5118_EEPROM_BASE; err =3D regmap_bulk_read(regmap, addr + offset, buf, count); if (err) return err; @@ -473,15 +464,6 @@ static const struct regmap_config spd5118_regmap8_conf= ig =3D { .num_ranges =3D ARRAY_SIZE(spd5118_i2c_regmap_range_cfg), }; =20 -static const struct regmap_config spd5118_regmap16_config =3D { - .reg_bits =3D 16, - .val_bits =3D 8, - .max_register =3D 0x7ff, - .writeable_reg =3D spd5118_writeable_reg, - .volatile_reg =3D spd5118_volatile_reg, - .cache_type =3D REGCACHE_MAPLE, -}; - static int spd5118_suspend(struct device *dev) { struct spd5118_data *data =3D dev_get_drvdata(dev); @@ -519,8 +501,7 @@ static int spd5118_resume(struct device *dev) =20 static DEFINE_SIMPLE_DEV_PM_OPS(spd5118_pm_ops, spd5118_suspend, spd5118_r= esume); =20 -static int spd5118_common_probe(struct device *dev, struct regmap *regmap, - bool is_16bit) +static int spd5118_common_probe(struct device *dev, struct regmap *regmap) { unsigned int capability, revision, vendor, bank; struct spd5118_data *data; @@ -537,8 +518,6 @@ static int spd5118_common_probe(struct device *dev, str= uct regmap *regmap, if (!(capability & SPD5118_CAP_TS_SUPPORT)) return -ENODEV; =20 - data->is_16bit =3D is_16bit; - err =3D regmap_read(regmap, SPD5118_REG_REVISION, &revision); if (err) return err; @@ -680,69 +659,21 @@ static int spd5118_i2c_init(struct i2c_client *client) return 0; } =20 -/* - * 16-bit addressing note: - * - * If I2C_FUNC_I2C is not supported by an I2C adapter driver, regmap uses - * SMBus operations as alternative. To simulate a read operation with a 16= -bit - * address, it writes the address using i2c_smbus_write_byte_data(), follo= wed - * by one or more calls to i2c_smbus_read_byte() to read the data. - * Per spd5118 standard, a read operation after writing the address must s= tart - * with (Repeat Start). However, a SMBus read byte operation starts w= ith - * (Start). This resets the register address in the spd5118 chip. As r= esult, - * i2c_smbus_read_byte() always returns data from register address 0x00. - * - * A working alternative to access chips with 16-bit register addresses in= the - * absence of I2C_FUNC_I2C support is not known. - * - * For this reason, 16-bit addressing can only be supported with I2C if the - * adapter supports I2C_FUNC_I2C. - * - * For I2C, the addressing mode selected by the BIOS must not be changed. - * Experiments show that at least some PC BIOS versions will not change the - * addressing mode on a soft reboot and end up in setup, claiming that some - * configuration change happened. This will happen again after a power cyc= le, - * which does reset the addressing mode. To prevent this from happening, - * detect if 16-bit addressing is enabled and always use the currently - * configured addressing mode. - */ - static int spd5118_i2c_probe(struct i2c_client *client) { - const struct regmap_config *config; struct device *dev =3D &client->dev; struct regmap *regmap; - int err, mode; - bool is_16bit; + int err; =20 err =3D spd5118_i2c_init(client); if (err) return err; =20 - mode =3D i2c_smbus_read_byte_data(client, SPD5118_REG_I2C_LEGACY_MODE); - if (mode < 0) - return mode; - - is_16bit =3D mode & SPD5118_LEGACY_MODE_ADDR; - if (is_16bit) { - /* - * See 16-bit addressing note above explaining why it is - * necessary to check for I2C_FUNC_I2C support here. - */ - if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { - dev_err(dev, "Adapter does not support 16-bit register addresses\n"); - return -ENODEV; - } - config =3D &spd5118_regmap16_config; - } else { - config =3D &spd5118_regmap8_config; - } - - regmap =3D devm_regmap_init_i2c(client, config); + regmap =3D devm_regmap_init_i2c(client, &spd5118_regmap8_config); if (IS_ERR(regmap)) return dev_err_probe(dev, PTR_ERR(regmap), "regmap init failed\n"); =20 - return spd5118_common_probe(dev, regmap, is_16bit); + return spd5118_common_probe(dev, regmap); } =20 static const struct i2c_device_id spd5118_i2c_id[] =3D { --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from BYAPR05CU005.outbound.protection.outlook.com (mail-westusazon11010018.outbound.protection.outlook.com [52.101.85.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9DA43D47CE; Thu, 23 Apr 2026 09:01:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.85.18 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934866; cv=fail; b=OqE5XQJO+kKnFr15RIhGXI37AGEGR7R43tKrFg2Y8N/Lm/yBbcawg0VRKSTrQZvyTNfhaRH4Fpqf8mqvl0W+0LS9xY1ocUimpLYgfWTipqNt0bHyi7GrD+qIHY22BzBfaitww+mo0YI3KwID7KBK8pYCPZVy6WGKtXttX/8vXI8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934866; c=relaxed/simple; bh=pC0Eh0NyxE/kcrGpPokepCA17o79hx0yx7ICIrn/CAM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eLGbr0WXQJRQUmaFABrYrSIMV58vvqw72W7spmSw9h/UX2fIZZRvROhDQbROXGfvAiZvRqt0XO24mXud6IN5L7//uxRJ8S7jXPWfnxT/qHp2FgYIgy4G+6OznI8ERwcfzcPNVFc2WKGBFCHEKoAo+YaxCa2zVDs25N4fd33VzmQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=XhQNzyK9; arc=fail smtp.client-ip=52.101.85.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="XhQNzyK9" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=PCsvtuqpossJgCvatILOjVXgnA8U7vXt5M2BbRahmWhAZjnPcNGlb/5dHsnf8chogW/fAd4H2lvJcVATfIF1dPOhQm3HNSUuShMCYKl/6x8O4xsZHvJpUZTxpo4TQxYvnytYuH3EYTWOr/ni+E0hq3uCIGmtpoj/8M3bAnHsv+HDyt8jaEycIQ55JvNeXSsgH8DKlWRo19nvASLk6EgS4cDGfOWQks40ukCvyxqQ6+rWEYbQSBYTmpJgnm9Qn9bPh7jiz0Iog/W3yxKV/Mmrwmozf3WeH1XdR/KDQGh8aS4BUWTxAnohhOOCGXgN89q5YeUtmlhmLlQHAmC50lXjFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=d0hZdO80FZ9vJCMzl2JOQ+kUQKQSDRmMqGLUDxkR4vE=; b=trJDfIibLM7igoW/Srys313bq/yCp13gXXW6Osv6G1bWwvMKQ+kMN8LxJExkVa83jwG4G5UKzl86qVCd+IEurQqi+XHystUehhm/XFCpPEWdTHlkznx8iMiHSla7Wj+/z0JKrgy/VziCEzYixAykw2lMS4xfCjjABA2k7BUywj0SME1uReQXvxbs2Yea3t6/K4pT+iFTqZj1l/e8usnSnzsIBiFCvDj6y11ftv9/fZd8ej68SwuEdnL7bet1Lg+75ebI7exsWRywS+uIn7Ziu3P1avCNH9mb4oOu9WvB3PgPMJtz3h0xne1H0Qc5pC73oUZ+LK20sQDjy2WXz8blTQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=d0hZdO80FZ9vJCMzl2JOQ+kUQKQSDRmMqGLUDxkR4vE=; b=XhQNzyK9QV1VEsra8t+O6lYmGAxQTjnCAai9Gjh6f4ROwJTf+8ihIJwBZWmh6KCcuQK8l1pipppuRDePSkmRgtezEfEv1fRfzIBXyu0By3NsGJkmkI8h4tZL+hLWhfmtyxh5S7l2Zmq5sdjhQW+XSWxWVBh5DfO9SVjR4aJxWGlUL1sQN1RLGs9FCcF9mTGjU+e8He2YCTWT8jV73cCBlGQkSscXnt/kZa8CxYMbBMyTTnPcWkbo4//DwHeLVbYARXkQo/7DCB1DSzp40wLAlgMqhgbkHb3JPc6X8K4wzmgOCoGOjaMxfEbcuVCi8+t//dy+nlcHIG8pAm51/x2qGA== Received: from DS7PR03CA0030.namprd03.prod.outlook.com (2603:10b6:5:3b8::35) by MN0PR12MB6152.namprd12.prod.outlook.com (2603:10b6:208:3c4::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.20; Thu, 23 Apr 2026 09:00:56 +0000 Received: from DM2PEPF00003FC2.namprd04.prod.outlook.com (2603:10b6:5:3b8:cafe::26) by DS7PR03CA0030.outlook.office365.com (2603:10b6:5:3b8::35) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9791.48 via Frontend Transport; Thu, 23 Apr 2026 09:00:55 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by DM2PEPF00003FC2.mail.protection.outlook.com (10.167.23.20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 09:00:55 +0000 Received: from rnnvmail204.nvidia.com (10.129.68.6) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 02:00:32 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail204.nvidia.com (10.129.68.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 02:00:32 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 02:00:23 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 12/13] hwmon: spd5118: Add I3C support Date: Thu, 23 Apr 2026 14:27:11 +0530 Message-ID: <20260423085718.70762-13-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM2PEPF00003FC2:EE_|MN0PR12MB6152:EE_ X-MS-Office365-Filtering-Correlation-Id: cccbf4d6-3bb3-4b54-11d9-08dea116d40c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700016|376014|7416014|921020|22082099003|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: 6Xl9A36w0lrwG2FlPTk55H3dDcEIrzKD5BcTJzdIT4Tu5s7LAhnTAUjpoExzIKFVq/ieqUZY/ByZDimzIN/U6i2nb59qYWPxQohwzSEzqKmwytGSfUWNh/4xPD/pi8q+vCF0bL07Xz88uNIyuWxk8KNBiPkMRkUi/Bw/Zr8wgigZerasLQIBU07UaGRGBHUOa0V/UUBziswzwUJzoiqRVQD8yxq20ueSt3CNhR1vnA0gHXQx/pwKJn7zma2FIzChLgr7OPjK3GuAAXIY/kUOH54YSfdBEx+ZZziCQkWl1VcS3LsQ+ewaIUbqXqVBc7TifBSBboBnINhlwjSp0zcOdBwQB1XFwbOio0jvVTHdl/GoXZNGMT9p7KTBxhMsd501hrWtf7XPkiXBaqM6tgeplJwYIrI0h4BdbqkhYrpZm5QtbCrporQkI+Y9ISejE8xnTQQBMz0OfDgch7B3/maFy5s4AijygJqVI62O0aOh84mc+ATYm46fvbw0o5olAmYmpJXwu9bAjxnK/leOHbj9PLbwlE5Fy3ifEL5bKQyL7Qj6X9WIceyosAWeLr3I/9r+OsM84iQuqK2rtDDL1h4rXlSmTG4owP+VhYxKOswvBfur5SDp8ywOhz+W96EjUDkDaND7uQ6Qf66VLOLSi+5uG+/irfteCGkqNr0W4ISBDATLLd9s+Jtg1Jztg3oHbtek59dREb5G0l55Bvdnbhm1I7oI0YHdnON0wRcsgWa3oTtdujlthDbjIXIXPsADK1cyWMNEhtFScZsJ7oT9R6ziBZQb3HAer7x+QXfYUiyKsvbasJl9m0MhZYozyUf70OKp X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700016)(376014)(7416014)(921020)(22082099003)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: G2z1BSe9lAleT0te6ap2sBoyCYvnpbeFQa6d8/Qd26eeJyEI4i0Q3f0sFnp+rEVcrJ8d/sxN0iZ231xzyvnSjNtlwD8HqMLlVFDPaotEhQfTbKxzcuFxpaO/EOZVoWHevVSqmmXznhqzvVUcosf9bE8LxjKsGJm2x8IguwLXQLemlxFKmnu1bOwLOJgGe6cuBP6FwgrdJcpVp9HzTopugpHZZ29mxnCPk2WsOtkFahEJSYG3VNpmxrYS7PeNbjZ4/dP3+Xt1H3ph3UAnCpHTS9aMB3vMdzAM7o51L/3J4KkBhBggXVxcrsveittPeGjPZGb1WAtkyWutvD45AGglY/OhmF9PVvfkiVw34d1jni742okKnXEid81QGhzzN6QBYw+m2BEQJImd7quR1EbuCj0Euc6QWjQCwzXgzSs1a7YzTSjGMPDAU5lAzgsx147h X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 09:00:55.0689 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cccbf4d6-3bb3-4b54-11d9-08dea116d40c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM2PEPF00003FC2.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6152 Add a regmap config and a probe function to support I3C-based communication with SPD5118 devices. On an I3C bus, SPD5118 devices are enumerated via SETAASA and always require an ACPI or device tree entry. The device matching is hence through the OF match tables only and do not need an I3C class match table. The device identity is verified in the type registers before proceeding to the common probe function. Acked-by: Guenter Roeck Signed-off-by: Akhil R --- drivers/hwmon/Kconfig | 9 ++++--- drivers/hwmon/spd5118.c | 56 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 61 insertions(+), 4 deletions(-) diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 14e4cea48acc..a7f60f8868eb 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -2309,12 +2309,15 @@ config SENSORS_INA3221 =20 config SENSORS_SPD5118 tristate "SPD5118 Compliant Temperature Sensors" - depends on I2C + depends on I3C_OR_I2C select REGMAP_I2C + select REGMAP_I3C if I3C help If you say yes here you get support for SPD5118 (JEDEC JESD300) - compliant temperature sensors. Such sensors are found on DDR5 memory - modules. + compliant temperature sensors using I2C or I3C bus interface. + Such sensors are found on DDR5 memory modules. + + This driver supports both I2C and I3C interfaces. =20 This driver can also be built as a module. If so, the module will be called spd5118. diff --git a/drivers/hwmon/spd5118.c b/drivers/hwmon/spd5118.c index 8fdde35e68cd..db66028d2f59 100644 --- a/drivers/hwmon/spd5118.c +++ b/drivers/hwmon/spd5118.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -464,6 +465,27 @@ static const struct regmap_config spd5118_regmap8_conf= ig =3D { .num_ranges =3D ARRAY_SIZE(spd5118_i2c_regmap_range_cfg), }; =20 +/* + * SPD5118 2-byte register address format (JESD300-5, Tables 7 & 20): + * Byte 1 (on wire first): MemReg | BlkAddr[0] | Address[5:0] + * Byte 2 (on wire second): 0000 | BlkAddr[4:1] + * + * The address byte (with MemReg and lower address bits) must be sent firs= t, + * followed by the upper block address byte. With regmap 16-bit register + * format, this maps to little-endian: the low byte of the 16-bit value is + * transmitted first. No range config is needed since I3C does not use MR11 + * page switching. + */ +static const struct regmap_config spd5118_regmap_i3c_config =3D { + .reg_bits =3D 16, + .val_bits =3D 8, + .max_register =3D 0x7ff, + .reg_format_endian =3D REGMAP_ENDIAN_LITTLE, + .writeable_reg =3D spd5118_writeable_reg, + .volatile_reg =3D spd5118_volatile_reg, + .cache_type =3D REGCACHE_MAPLE, +}; + static int spd5118_suspend(struct device *dev) { struct spd5118_data *data =3D dev_get_drvdata(dev); @@ -701,7 +723,39 @@ static struct i2c_driver spd5118_i2c_driver =3D { .address_list =3D IS_ENABLED(CONFIG_SENSORS_SPD5118_DETECT) ? normal_i2c = : NULL, }; =20 -module_i2c_driver(spd5118_i2c_driver); +/* I3C */ + +static int spd5118_i3c_probe(struct i3c_device *i3cdev) +{ + struct device *dev =3D i3cdev_to_dev(i3cdev); + struct regmap *regmap; + u8 regval[2]; + int err; + + regmap =3D devm_regmap_init_i3c(i3cdev, &spd5118_regmap_i3c_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "regmap init failed\n"); + + err =3D regmap_bulk_read(regmap, SPD5118_REG_TYPE, regval, 2); + if (err) + return err; + + if (regval[0] !=3D 0x51 || regval[1] !=3D 0x18) + return -ENODEV; + + return spd5118_common_probe(dev, regmap); +} + +static struct i3c_driver spd5118_i3c_driver =3D { + .driver =3D { + .name =3D "spd5118_i3c", + .of_match_table =3D spd5118_of_ids, + .pm =3D pm_sleep_ptr(&spd5118_pm_ops), + }, + .probe =3D spd5118_i3c_probe, +}; + +module_i3c_i2c_driver(spd5118_i3c_driver, &spd5118_i2c_driver); =20 MODULE_AUTHOR("Ren=C3=A9 Rebe "); MODULE_AUTHOR("Guenter Roeck "); --=20 2.50.1 From nobody Mon Jun 15 09:36:34 2026 Received: from SN4PR0501CU005.outbound.protection.outlook.com (mail-southcentralusazon11011027.outbound.protection.outlook.com [40.93.194.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CABF371D0F; Thu, 23 Apr 2026 09:01:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.194.27 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934882; cv=fail; b=TKH1sd/Le0SM03W3+Wbs+lW8MZJrQ2PXsefA561AJwgXLA3bjN5mc5GHJLUs7XKUvABpPCd0OEWD4/o/Aw+MOlZCXLsZxS/0Dnmyly04bj2/PLmqy5wzsa6MsuYPVMH2o+TzFQDcNnb6LckNyQuakIM0QXO7EH8OqM4S63vIp90= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776934882; c=relaxed/simple; bh=TNwcUhP5qfO3ev3RJPzdqYRA0vKXibsOfjiHbzcWnvs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=t0uSmVrgOScKRIE2HZt/q/I+bMOuHHc3jzxXspYXc8PK8kLzZc/qkGAM++oGNqD+GBOQiA6L1GkdmSKynMXSeDYwc7c7fPXsHoreUYL8XcapYctk9rovvzbFF/P6jjDdg48iYlokj9u25thUu/VCq+UKNMbft1xeFn5TqhzBgEs= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=O2hEvt7d; arc=fail smtp.client-ip=40.93.194.27 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="O2hEvt7d" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Skb/yu8IonPv+/3Qt0g2I3N424yvQnlWAaRtO/P92LUlx08rrr1WSRmHI5lByjvxDJPCDCHzsMaBTxb6Bz/H4y3JPvlDfuAMNI3AjEsio2y2ezYenvNibMzgW8qYRpiX2qcTFY/LuhfTUTvPRRN6sJpmF1Jq+ajmw2lo8h0FyJTY7RsayJjqUNStDxgongS+K0a4fFxMHt74U/1dIzk0rg7hBD7we6fg8joJ993pYfZKq7EP7zm5DmKo8wVOgSwAjyHxXmtTqOrhf7PWb24kNSObC3YTC3MgBX4su2Iq03hccfsiCoPbKksoTSDUauky7ZuIBzEa1wLwfZI6i7az+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=KGI3ilpEE38BNuKfVvcWfDpQJUuQuHhyd1Msbs63SHY=; b=Ty+WOAh1E4+YG+mgtdHi/ZKYGjugEeKzwM4Vszr12YGcJt77bURvgvPciUvybKSD3LSBoGokxyUkMH/yZETUh1GJtbTIi+ETE4JrLP+bOrv63GjBaq/xWBmOMb95ZQXhDh3GZ5xoWW7DmApyJQUBJTbwwlEfV1FG4fUhBNrpS7NNJjYl3obAD6fArruD1zzYhm3A+JbFd/aFeoAeQ1WODw2tBlxETv0YRshpL3WIEadDDz+m1/yx+psdFItcHGc5RsYxOfJWgoo9d8Ujybc8yUEIfrRJwZtcPyFwUSR9wgoCd6llDn6V1p4CcSujGOlzaIYo0Dr3h6L1w7B/wMeEpQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.160) smtp.rcpttodomain=bootlin.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KGI3ilpEE38BNuKfVvcWfDpQJUuQuHhyd1Msbs63SHY=; b=O2hEvt7dLfFMQtfIv729+PdI2Cdnuns3PVSC5hLncGzHFXYd9J4ckpLhKq9Hsyl1fJ6NAEYJ2zfMoB2m8aotSTvItzhHLoGmAQDMRbd7PgFU0Sf2ndzPU56sQU5396U2aqRzkjrfpzshuBnTEXMmEPj+puR2XLKjgAYVI3PTyjPo94wa94Fswcho5OjGd7x6qKKrvzQNYKGvHbnc4eBixQAKKYC/sO8aZHEdlUjRW5Ka46Le04cfnPP7DE9MANZ7pKB/i//XhIIdztakhrGS8A03nKbfxOgebwA4QMO0WhBDcCoZgaGJD6AJZjiUMn0STa5wCUz7AU+Q9uay2BpSYA== Received: from MW4PR03CA0299.namprd03.prod.outlook.com (2603:10b6:303:b5::34) by DM6PR12MB4235.namprd12.prod.outlook.com (2603:10b6:5:220::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.21; Thu, 23 Apr 2026 09:01:09 +0000 Received: from CO1PEPF000075F0.namprd03.prod.outlook.com (2603:10b6:303:b5:cafe::81) by MW4PR03CA0299.outlook.office365.com (2603:10b6:303:b5::34) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.20.9791.48 via Frontend Transport; Thu, 23 Apr 2026 09:01:09 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.160) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1PEPF000075F0.mail.protection.outlook.com (10.167.249.39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9846.18 via Frontend Transport; Thu, 23 Apr 2026 09:01:08 +0000 Received: from rnnvmail203.nvidia.com (10.129.68.9) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 02:00:45 -0700 Received: from rnnvmail202.nvidia.com (10.129.68.7) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 23 Apr 2026 02:00:44 -0700 Received: from BUILDSERVER-IO-L4T.nvidia.com (10.127.8.9) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.20 via Frontend Transport; Thu, 23 Apr 2026 02:00:35 -0700 From: Akhil R To: Alexandre Belloni , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J . Wysocki" , Saket Dumbre , "Len Brown" , Guenter Roeck , Philipp Zabel , Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Arnd Bergmann , "Eric Biggers" , Wolfram Sang , Miquel Raynal , Jon Hunter , "Thierry Reding" , , , , , , , CC: Akhil R Subject: [PATCH v3 13/13] arm64: defconfig: Enable I3C and SPD5118 hwmon Date: Thu, 23 Apr 2026 14:27:12 +0530 Message-ID: <20260423085718.70762-14-akhilrajeev@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260423085718.70762-1-akhilrajeev@nvidia.com> References: <20260423085718.70762-1-akhilrajeev@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F0:EE_|DM6PR12MB4235:EE_ X-MS-Office365-Filtering-Correlation-Id: 255f800a-d019-49e1-07ae-08dea116dc46 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|36860700016|82310400026|921020|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: rakJXFK2iMe5HG6fSEi/qCPeze9O21j9WaxxRv3RFHxqEqnA3MbGud4vozr5+et4bb1QL3+woD3MbirA8GC3PL8F4eR+cgCtoQfEwsAUxklgRHEs3UYjB6NbehBwMx41WnnmiBEiYFXZqs6Q0kqGXkiNpbxjBZ3uvmuF8lkB8OAWIYeoY+QAekBw+pCwKuQ6ca5WaWlOO/kL0QMa8+n1aX/TA2fglzwepim/x8OS/MZErxvRrhQQkpW6fULFfgY8C2CCGoRhdN16zBLhRuDP85rqiwo2jgzZnVhLav2sgNXKB+edRmCo4vhzo6PKzhTbstyfEzsM590Cjm7Vx+ANtQBxmpx+X8JsGuE7bGJGwCmXXqcgU66sGbTerSGj8U9NUpdF9DkqmSmnpbHSd0edBYooj7yI/ojc6COR3Q3YZKkbm9nHVSxlIIgPj0fkKEe0etoewYa9SzshzmltRjght47xoqpNYaJWoBLxQ3PqGBD0iua5ZVU/tnkprOpvMOObD1hUHmr3dLpt28uT3l8Ogj7Y3Uga5L7Ph4te0BiFmiAfRwMIq4Vge8w8TjbLmYeIdWNjN6agVNxr96STkWeu4wd0T8LqDRnI2sqrIwGsVlvPaxxaDivLyPGkb5X3mZXZoRlJoBaxuc+o2y4VdnCMxfN49wjhzZl4G/c1Vno6Vs8+CLVPzsTACXFvzzYp6XYUe1zPEWY4DZagle2BALI4TdPvgsKLAoYjkr8TuT2lJFHfZZumLmc7Mix+x7EtO7IhuccSmj9YpZhcKmmTISHVL/GNyJ4R/ISrDWi7kQRD3d3JmqqcVS5UE5lfZ12R6A+j X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(376014)(7416014)(36860700016)(82310400026)(921020)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: pbo9HAVIvEZe48ACblu5zVWU7xWOX7aIQwokqfCZmThpCS94oD73FLjO3lsEKRr+okrr8CFoQfudcZdC/vKRSW9Ycl2KyDN6+KAFRKX4MnvA0taW2Jna9xAruwphCHW5/uWS7AfAdGhsCdRZLGcJLp2ZpIpgKXOwlGoxjbgV4Cn0OWu8uUgPhxP/ouIm6PiZJJnHKy4vHVd86C67iCrKRR0X5WtrHYWklnAF/fe9wOeeIMLnxaKAmjEOvraAOv3zIorHPucXliJR9/OM9Jg9pi0Fnw92LLvXYVu/hlBIy70d9FIB9JCVGDP7uVG3ADngTqMLOtIs66vk+p3aB4BirOVyfHfMdoGbLHaDkv1Xpu8/sehhdYUBIzNI6/2ik5B+GApBE8EWS6BUKYR1UikKdKwboqxQqJ30por/V/N6pDFho3rCTQzZ0sTclNtPr1D+ X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Apr 2026 09:01:08.8713 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 255f800a-d019-49e1-07ae-08dea116dc46 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F0.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4235 Content-Type: text/plain; charset="utf-8" Enable I3C subsystem (I3C), Synopsys DesignWare I3C master controller (DW_I3C_MASTER), and SPD5118 hwmon temperature sensor (SENSORS_SPD5118) as modules. The NVIDIA Vera CPU uses SOCAMM LPDDR5X memory module, which contain SPD5118 (JEDEC JESD300) compliant temperature sensor. This sensor is accessible over the I3C bus through the DesignWare I3C controller present on the SoC. Enabling these configs allows monitoring memory module temperatures on platforms such as Vera Rubin. Vera is an ACPI-based platform and does not use device tree. Signed-off-by: Akhil R --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index dd1ac01ee29b..cc573c481c65 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -588,6 +588,8 @@ CONFIG_I2C_UNIPHIER_F=3Dy CONFIG_I2C_XILINX=3Dm CONFIG_I2C_RCAR=3Dy CONFIG_I2C_CROS_EC_TUNNEL=3Dy +CONFIG_I3C=3Dm +CONFIG_DW_I3C_MASTER=3Dm CONFIG_SPI=3Dy CONFIG_SPI_APPLE=3Dm CONFIG_SPI_ARMADA_3700=3Dy @@ -772,6 +774,7 @@ CONFIG_SENSORS_SL28CPLD=3Dm CONFIG_SENSORS_AMC6821=3Dm CONFIG_SENSORS_INA2XX=3Dm CONFIG_SENSORS_INA3221=3Dm +CONFIG_SENSORS_SPD5118=3Dm CONFIG_SENSORS_TMP102=3Dm CONFIG_MISC_RP1=3Dm CONFIG_THERMAL_GOV_POWER_ALLOCATOR=3Dy --=20 2.50.1