From nobody Wed Jun 10 16:04:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B03D823D7E3; Thu, 23 Apr 2026 09:21:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776936064; cv=none; b=X09TUSdbmkQNZC1Szv9Q9fE875nkiZe6S/D6CoUMz+QrkADf0YE/9S2hQ+69HCuFPotg/C72omy9WUc7PsMzLNQt+Ow+ftp8w3DInCKnNxqai2fFjO2VqL12pBQrtAlXP5D0rB9zOtXGg5HPMy7yfIBBvggynXrSe5Coi68o1/g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776936064; c=relaxed/simple; bh=dmYhvJWltKPlnfSCZp2xF0fuBjC8r/ExyToKNbYqzIg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=p+KUzrYzF1L5AMfl/4XEXI6dlNlIPYeZUAZITxh7q95QjhMBSrfCPJLZzTf80gylqUbHx0MzePkQ37diKJiy+ABdFNJqVtlWmn5Ci+h9UCh64cg0oqzzRWFcHzHnLW0Yj3+BW5ChAGeKKXvnU6ZAo6ddi7WLoByjDWodibzpQ4s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nLQClddp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nLQClddp" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6111AC2BCB2; Thu, 23 Apr 2026 09:21:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776936064; bh=dmYhvJWltKPlnfSCZp2xF0fuBjC8r/ExyToKNbYqzIg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=nLQClddprkUVMKpVt9a2wE3m6hEOaiGh+oudHhAd4ZR6GYADl6LhrqOqLSJmen+o5 iYOlkt2iFzhnHDlYKjUsPvtuhP7MbsL2dM88SABoV2k468zhRYL3uXEZvNrrMzrdQu 8zVKVsdRrY2W+zr4V/Rmze91hnMB4CbQoC2Os8071td1/uNk5vdqw8QzICBIGRqlp0 Q6E3hSlv+o3WZXBOf8NYVlQBG+2IiiQTZ3pygxFbbvuxujfM4QI4JlAQ1x/xUQ8VWi qVwWKy2hIRQFg4BPWWBPHUB7aOMrxEAh3xx5iklQNpBR2uk/vpJnBXB+y1IDqZty9b LpZiUc99xuIBw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E1DDF99344; Thu, 23 Apr 2026 09:21:04 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Thu, 23 Apr 2026 09:20:54 +0000 Subject: [PATCH v4 1/2] dt-bindings: arm: amlogic: add A311Y3 support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260423-a9-baisc-dts-v4-1-c26b480a068c@amlogic.com> References: <20260423-a9-baisc-dts-v4-0-c26b480a068c@amlogic.com> In-Reply-To: <20260423-a9-baisc-dts-v4-0-c26b480a068c@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776936062; l=1053; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=SsR9Sz9BWoMX3UnJeit5aTZNxRC651zrkqb0PjHBQcE=; b=2xZ4O+8hT57J5j91NjRw5Dlj2y5ZaxGMnY2QTx6MK38mhBHKj/hHbfWLmCzkrake3HYZa2jyB 7MdBkibXn76B+MtEWX1MY8XNwaT0I6BERkjTEKukkzIOjde/TBgzu0f X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add bindings for the Amlogic BY401 board, using A311Y3 Soc from Amlogic A9 family chip. Reviewed-by: Martin Blumenstingl Acked-by: Krzysztof Kozlowski Signed-off-by: Xianwei Zhao --- Documentation/devicetree/bindings/arm/amlogic.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documenta= tion/devicetree/bindings/arm/amlogic.yaml index a885278bc4e2..9f73a0054fb2 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -234,6 +234,12 @@ properties: - amlogic,av400 - const: amlogic,a5 =20 + - description: Boards with the Amlogic A9 A311Y3 SoC + items: + - enum: + - amlogic,by401 + - const: amlogic,a9 + - description: Boards with the Amlogic C3 C302X/C308L SoC items: - enum: --=20 2.52.0 From nobody Wed Jun 10 16:04:07 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9828E40DFB7; Thu, 23 Apr 2026 09:21:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776936064; cv=none; b=PE+H2WQiv+FDYHOZC2QaCxRP7duUejZubIKkWpesqcf/tvP6woQ+sF/oTqo0NPFBysDFJXaSVd1NhLRpIfAC5csv2JAfKRMqS0DY03dNeNsaEkyAs9Su1prLDCwaUbn7Fkr0wLHGTINraYVhQG1S+xsTSMmQqVgHAv5GCN+S1GA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776936064; c=relaxed/simple; bh=PetUpnJx5C7+NhQMMFIkvmCTank2kIq6ZT/21ZuHbG8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rXplUCiXFD+k+X5iJBHpucLwsqTILShdISYTsXFwD//13uia+9VhrcG9YV9ouo2pRzkHDdelh9yI5iCyKJbOXA2/24sTviklBZDwCRmG3cBE/0LSZP2R4XOw9EZbWcDB8gfu3cES/0YBcyUK8Ig+smjvCfoP6H3iiRLGy39tEfk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=orREK/cw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="orREK/cw" Received: by smtp.kernel.org (Postfix) with ESMTPS id 6E101C2BCB6; Thu, 23 Apr 2026 09:21:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776936064; bh=PetUpnJx5C7+NhQMMFIkvmCTank2kIq6ZT/21ZuHbG8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=orREK/cwBLWp2XIxgxqgyCasahjCn9q3SiN2sn9pkRMJjSStDrKw9L+IMN505iWUf 0EBuhhuDNpzV3y6Ia5J9M31sLt0nKGPEgau2fldr0FP/s+WMC9rJOIJ6X+nhIAhZ3s USZh3FDfQ01fUpQ41wfSAH5P8vHARLUIUZoEjw569HVDbvpIV48ArDSJvy9tcrHrd0 PNeOrwpyE2pBsprqcHWQVtbQVNSLh8DOZPK6ra29QG5ZCIkk3dXvoHyne03va+OeuB MENdXBf0MWX5r8AF+qnYDlYElEoUF2tUI6N7QEkSampfNW4MNqLni2VnsjL142ccye 5ZL9TeTYjQO5Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62419F99360; Thu, 23 Apr 2026 09:21:04 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Thu, 23 Apr 2026 09:20:55 +0000 Subject: [PATCH v4 2/2] arm64: dts: add support for A9 based Amlogic BY401 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260423-a9-baisc-dts-v4-2-c26b480a068c@amlogic.com> References: <20260423-a9-baisc-dts-v4-0-c26b480a068c@amlogic.com> In-Reply-To: <20260423-a9-baisc-dts-v4-0-c26b480a068c@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Martin Blumenstingl , Jerome Brunet , Kevin Hilman , Greg Kroah-Hartman , Jiri Slaby Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776936062; l=5425; i=xianwei.zhao@amlogic.com; s=20251216; h=from:subject:message-id; bh=UuTkmx8jn/3yRfQMRPR12iPtUnMRCPmNyHYH+u1zHrw=; b=fG6aoTn7zmaCP0aN8oqX6Rt0rgOMo7KkZnoBGHeaucOhc1/sC2m7oSlszmBzsZPLfsMHs4KH0 nLAlCnuw+MaAKN0POydxm5GsoAtcK1sJcsnv9aihvUuRUn8UWXAhMlB X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=dWwxtWCxC6FHRurOmxEtr34SuBYU+WJowV/ZmRJ7H+k= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20251216 with auth_id=578 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add basic support for the A9 based Amlogic BY401 board, which describes the following components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Reviewed-by: Martin Blumenstingl Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../boot/dts/amlogic/amlogic-a9-a311y3-by401.dts | 40 +++++++ arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 128 +++++++++++++++++= ++++ 3 files changed, 169 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/aml= ogic/Makefile index 15f9c817e502..57bc440fa55c 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a4-a113l2-ba400.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a5-a113x2-av400.dtb +dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-a9-a311y3-by401.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c302x-aw409.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-c3-c308l-aw419.dtb dtb-$(CONFIG_ARCH_MESON) +=3D amlogic-s6-s905x5-bl209.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts b/arch= /arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts new file mode 100644 index 000000000000..a6b380ca47a5 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9-a311y3-by401.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-a9.dtsi" +/ { + model =3D "Amlogic A311DY3 BY401 Development Board"; + compatible =3D "amlogic,by401", "amlogic,a9"; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &uart_b; + }; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x0 0x0 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* 35 MiB reserved for ARM Trusted Firmware */ + secmon_reserved: secmon@5000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x0 0x05000000 0x0 0x2300000>; + no-map; + }; + }; +}; + +&uart_b { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a9.dtsi new file mode 100644 index 000000000000..660c8556a864 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Amlogic, Inc. All rights reserved. + */ + +#include +#include +#include + +/ { + interrupt-parent =3D <&gic>; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x0>; + enable-method =3D "psci"; + }; + + cpu1: cpu@100 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x100>; + enable-method =3D "psci"; + }; + + cpu2: cpu@200 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x200>; + enable-method =3D "psci"; + }; + + cpu3: cpu@300 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x300>; + enable-method =3D "psci"; + }; + + cpu4: cpu@400 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x400>; + enable-method =3D "psci"; + }; + + cpu5: cpu@500 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a55"; + reg =3D <0x0 0x500>; + enable-method =3D "psci"; + }; + + cpu6: cpu@600 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0 0x600>; + enable-method =3D "psci"; + }; + + cpu7: cpu@700 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a78"; + reg =3D <0x0 0x700>; + enable-method =3D "psci"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + }; + + psci { + compatible =3D "arm,psci-1.0"; + method =3D "smc"; + }; + + xtal: xtal-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <24000000>; + clock-output-names =3D "xtal"; + #clock-cells =3D <0>; + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + gic: interrupt-controller@ff800000 { + compatible =3D "arm,gic-v3"; + #interrupt-cells =3D <3>; + #address-cells =3D <0>; + interrupt-controller; + reg =3D <0x0 0xff800000 0 0x10000>, + <0x0 0xff840000 0 0x100000>; + interrupts =3D ; + }; + + aobus: bus@ffa00000 { + compatible =3D "simple-bus"; + reg =3D <0x0 0xffa00000 0x0 0x100000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x0 0x0 0x0 0xffa00000 0x0 0x100000>; + + uart_b: serial@1e000 { + compatible =3D "amlogic,a9-uart", + "amlogic,meson-s4-uart"; + reg =3D <0x0 0x1e000 0x0 0x18>; + interrupts =3D ; + clocks =3D <&xtal>, <&xtal>, <&xtal>; + clock-names =3D "xtal", "pclk", "baud"; + status =3D "disabled"; + }; + }; + }; +}; --=20 2.52.0