From nobody Wed Jun 17 02:51:47 2026 Received: from mail-pj1-f48.google.com (mail-pj1-f48.google.com [209.85.216.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46CB633F598 for ; Wed, 22 Apr 2026 07:03:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776841413; cv=none; b=S68f2h2REKWo2zyBjeVdutKZVmKpQPNq5sKjRNZ2dDZ5yintAIwhCwiYGOdu24Rq5iox1r+InO12akGguryHOoj92T9QfO+L/JEbcmFRkA6ya9xNPjvl8TfyA+Ei1NujGBFaERS7MHfoA7j470W5sfIzRRU4WKbPTkDO2oQ3MtE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776841413; c=relaxed/simple; bh=IwG2wo6BkstFh+qMX/W8nOYuTZdNYDK51l8RlSVJlIk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TtKfLDkmZvuEpyteSbMW3ONMH5hG/u69GEPp9e86EqCEr5tuOeGFYWRx4QW+kyIMf7iSqVBIvZ2CnzBIgtFvr1OCiONO1DT77QNviRbF7k8zJoypRNZbb3DkXXhQ2Vr6MI8B91YTvsFpC/Acv8XOaRtM4l3LkSiyfIJP+hz4O7c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=GKcCdnsJ; arc=none smtp.client-ip=209.85.216.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="GKcCdnsJ" Received: by mail-pj1-f48.google.com with SMTP id 98e67ed59e1d1-3591cc98871so2329761a91.3 for ; Wed, 22 Apr 2026 00:03:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1776841412; x=1777446212; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z84dwc2PsPdYxwH32qOj6+DQ+b4iRKtcB2f35wW4+cg=; b=GKcCdnsJA4jAwK4go5WScOVmsFspv1XX2o9elbuNLp0eo1695GAGZ0OjHx9IxD/STT 6qG6lfzjDYP5KyPVG8S3T4qPru0A8tkB9W/23G7/abp6svgDtH5lW50vNdJSGSh9sFg+ xFSuX0CUZvVh2HJAuqWwyKZ9HcSvj7bW6HfSSPuybDiL0vDmUpXRnNdMd/ahRQ2EVyiW B0AZKdMtvXHIuTjJn6/6r5nQQtOLZxzp0OBGOw/peNVRnwOiEcSWUOi0eq8b320UFuZ4 eXcCwCMR6YkD2sU0t3pqGpQN+sn3b0WzqOi7mg4OGX8kXQo+HfuPopdf7h6vEluCXQ1H YPxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776841412; x=1777446212; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Z84dwc2PsPdYxwH32qOj6+DQ+b4iRKtcB2f35wW4+cg=; b=PBD/mqiKRM4J4QsnIEboITimT3QeCbDBWU9WNAc9MYGrd4tssuYt6o9GI+YCAQ7HxK fZn7TkNMdp3q6ebaAJdkcBdlP6YNuOfKAi0O2b0+R/IQes2mxC6XmXm0uDRhYgynUECB eUkpsxhXuZKUqxj8BXJDcDMGvMGDBl+gGtDElh7HQebOTUz0Ib8I1RJ9PwXQZHn3vSEI m6mDkQJ8t1u0W0Eado0b0BnMS3x9G/4ycbsv7Uf0pGZ8mEyi5HN78Seqt3RoP6uIVYxe HGIC/VrXOTUKrbhPkptYOuP9dJX8R61DcUYm9/KOpOiaDwLJo4Td5x0iVUkarm/NSi26 nFVQ== X-Forwarded-Encrypted: i=1; AFNElJ+vUZRQv1+Jr+bhAXI8PaozQUOIeAGvex9tp23E5fEDqR8D3DgPIcbDoIxEIK60uzgKI0SYx1VfUFu8Z7E=@vger.kernel.org X-Gm-Message-State: AOJu0YyKQoNBFafuwzuiq2AX45O1BAIQWQ9IpJPDvSHdaeXV1zoJvDFf aGxOZIbhMinHqRYPQo2e6c/TCBJTqc8oz56+7Pyzy1UMqKSh8CXayzE7 X-Gm-Gg: AeBDieuR/HxC99r4iT4EkPQNx2kaTJLxgF9Va2KGYrCAXiqjdSthVS1G1my+FP9IWx1 /t43J0S+wUg1SIDswTzY4BFgE7FC+oPAjO8HbxFI6ki3qkvgdyKcU2S+SCEWiPQjScvsjZkDKPS K46UoDiVRbfirui15NsZ6NK5pkqoELyG3rSd/V0VuRtPi3QzYACCwmF1L5RIgG/szfhAqrvo3L6 04pNzZWnuX9hLZRfzoFrpeSieogRBHMiLTG2asoEKN9OppQAth4CKTWU4Qh43bUhcBiWs0+7dXv bVRHbFZ9UZgj1x0sFapSE2exRewTD0duzmdmRvrCOfH/PA9kLsPA0LKO5kpax2dhJP+y1jxindI htTNRTFXhOwHXe/sN/oVaRRSiEvcwq/AeHcWNcrtFiORmp9i5LjoaBacZ9mJl5RfvIMkshCokhp ydhDtixg3A6rtwn1N0sJiHXwl2qO6IfQgyDaofnunMuPzsFn5Yfi5lSTlUpsQL2QrFzF8= X-Received: by 2002:a17:903:1b03:b0:2b2:5637:1480 with SMTP id d9443c01a7336-2b5f9ff44d3mr218370865ad.40.1776841411469; Wed, 22 Apr 2026 00:03:31 -0700 (PDT) Received: from twhmp6px (mxsmtp211.mxic.com.tw. [211.75.127.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b5fab0cdd1sm155088635ad.38.2026.04.22.00.03.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Apr 2026 00:03:30 -0700 (PDT) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id 21DED416A043; Wed, 22 Apr 2026 15:03:28 +0800 (CST) From: Cheng Ming Lin To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v9 1/3] dt-bindings: mtd: nand: Add nand-randomizer property Date: Wed, 22 Apr 2026 15:02:01 +0800 Message-Id: <20260422070203.698716-2-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260422070203.698716-1-linchengming884@gmail.com> References: <20260422070203.698716-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin Add the 'nand-randomizer' property to control the data randomizer feature. This is used to improve data reliability by reducing cell-to-cell interference. Depending on the hardware architecture, this property is designed to be generic and can apply to either the NAND chip's internal randomizer or the hardware randomizer engine embedded in the NAND host controller. This property is defined as a uint32 enum (0 or 1) instead of a simple boolean. This design choice explicitly supports the "not present" case. If the property is omitted, the driver will not interfere and will leave the randomizer in its current state (e.g., as already configured by the bootloader or hardware default). Signed-off-by: Cheng Ming Lin --- Documentation/devicetree/bindings/mtd/nand-chip.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/nand-chip.yaml b/Documen= tation/devicetree/bindings/mtd/nand-chip.yaml index 8800d1d07..effdc4f99 100644 --- a/Documentation/devicetree/bindings/mtd/nand-chip.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-chip.yaml @@ -23,6 +23,15 @@ properties: description: Contains the chip-select IDs. =20 + nand-randomizer: + description: | + Control the data randomizer feature. + 0: Disable randomizer. + 1: Enable randomizer. + If absent, the current hardware state is left unchanged. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + required: - reg =20 --=20 2.25.1 From nobody Wed Jun 17 02:51:47 2026 Received: from mail-pf1-f174.google.com (mail-pf1-f174.google.com [209.85.210.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E667223D7E3 for ; Wed, 22 Apr 2026 07:03:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776841414; cv=none; b=Ao0QrdTQyUN1/6xMpf0tjNeaxuuOm99mmPjXHSWjPACjKBATf9n1TD38K+0ARRsqQpwV48ISg/wFvteZ6TJgy9QjqxdcphTjaT7jV7n79v/K9/v2D/2RbPSooOc4hvLqNlgvzGXqywnbv7d6D0xn2HBMttxyD3d6bLykq2AOZW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776841414; c=relaxed/simple; bh=jJBb87yqQMsI3Xcl8dXaK3nFLeADXXMejAQxTrLcVTY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=p/NiGUsHNxYN4HE4OHr0/KwMuXX35HR0fQ9eGvH48aBtyJpXXj7YsXTuGNKcKDIraqUQqRgZnQ5AtoF8QX51iNcX3uoJcEcSIqiGfdtP8koYMerJeN3LBFaMzOOVi83oKwsAO4lT5s+t33qKR8hDaOkxCVAWKy9fJcFdkLcjSLE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=s52URz4/; arc=none smtp.client-ip=209.85.210.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="s52URz4/" Received: by mail-pf1-f174.google.com with SMTP id d2e1a72fcca58-82418b0178cso3179516b3a.1 for ; Wed, 22 Apr 2026 00:03:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1776841412; x=1777446212; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mSXRoXNyL2G9tTF3pCq4QLzdSdaD1DteZMo7+cFocEo=; b=s52URz4/isWxI+rJOYDo9nXHx2zqPX95F3fwrpRyvrpv7tPwxd7UvvRsFoUwYOtzUv Mx4Kgi4GFSgmQAqT2+fLZc8LWnF5XlHxrlquD++WqLqxxxDQyGQ9upLnIs2jNwFiJ2il /+HnlmZQX1tmV0r1B2rzKrsKubq4Be7YQ8HZU34dETf50x13cuYYb0sE2HoISexX6VIk vBa4OddKqgpQcJCjE14El8Hw2NwodsUyaKuKMqMgUFLm6JPmD6VKwfKxz+dWN59gJjk5 nbjNP5R4maObLElycUJdl9VvFS0R58AmVB2kER4rEKn9elDu5S8dZh7zV4qCDgdhy+lh jvDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776841412; x=1777446212; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mSXRoXNyL2G9tTF3pCq4QLzdSdaD1DteZMo7+cFocEo=; b=OXnRo2jIdfNefDEv3MeQjBQ3u6ldS7/cuKSYjoi0vZrhAw9pqHnqUtn1Og7q8oeeVe 9USOhNrYmY8MM/ZSuJRdEfPyzEbsE2pJF9+15mrcBFiHYxH2x3TLwR1CFKSvbLtLv5kP lXgR8SH2iyZZPzXAjpCGa9mkb/iBOJAOVG9pH9yqzHJmnuyGNaLyrCL0gq2EcHJx8IM8 +1fIn6CUezCQB4IsXihTkgCs+TJ7bkgsmLBQ3O0+epce6aJwQHZc48KYQv48PhWM0dAO pFyF6mPpbzAQwt9QZoE5bxVJH/c96RqN6Su921i8PjOQ8m+w9nMLhidV6wYggiZQfNo6 wrMw== X-Forwarded-Encrypted: i=1; AFNElJ8NEShxoAFdXu3SHjAkdi02mOtNR+wgVzGBuLKnVtnia5pr19xKhTycRnuL2mkynGrLnToFdJC7lePth8k=@vger.kernel.org X-Gm-Message-State: AOJu0Yw8ZH+UhhrVvsaFgTnRsr39T7EZR8miOuv4E4Di6XaDw1oYz18T jdC1tpzl1yvnOP6LxyxJ5pL3PAPsf9JxPmQyBxzueVEHpaJZk+VGjBOS X-Gm-Gg: AeBDieumAbo9x3SWpZ2dY0meu292/Tr+CmbeWKs9UdWPEYqATNJnQVeyhl6YmXWIBON pyLHtE7v0+d9v3vHhPIUfA1WjTrTRxktulnN/1urzrl2PF50pSbuNOXFNQ5pzrltTknfYhIKbKe Dlb9ZgKu5m0pmgYfo2WHyxRSR6oL74e+NJb5ZTod2VvDTgpr9RHfUJh+G0Yie1jlpZBN72N4HtP tsJu7RquH/A7A3f9qqn/JvRLbPi3P+m0Sb/U94v+gFDehP6XKVgV+x/fl8pqJptisifSCz3125C P2q2iU68dB2kN5lmh7gVFWJSS/2VB2+OpxNTvbiKp8fZMGoySsx6/Ur/N71G9+l4eUCNfuNAkFs 18SMMQTuhyt7CA2ByCsMcKoEffd5cqD+F+rq4Hk+slegtaVBuqcydUw0eH8BA20D4lCY0Rd+xxx bldTaeixlK8egzVB0Er8151ll/HttFV71+JBykuyad5DLuyTXmq0mhABdk X-Received: by 2002:a05:6a00:3498:b0:820:2f9b:fe31 with SMTP id d2e1a72fcca58-82f8c8bede5mr18881373b3a.30.1776841412109; Wed, 22 Apr 2026 00:03:32 -0700 (PDT) Received: from twhmp6px (mxsmtp211.mxic.com.tw. [211.75.127.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82f8e981829sm19411466b3a.12.2026.04.22.00.03.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Apr 2026 00:03:30 -0700 (PDT) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id 23E63416A045; Wed, 22 Apr 2026 15:03:28 +0800 (CST) From: Cheng Ming Lin To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v9 2/3] mtd: spi-nand: Add support for randomizer Date: Wed, 22 Apr 2026 15:02:02 +0800 Message-Id: <20260422070203.698716-3-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260422070203.698716-1-linchengming884@gmail.com> References: <20260422070203.698716-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin This patch adds support for the randomizer feature. It introduces a 'set_randomizer' callback in 'struct spinand_info' and 'struct spinand_device'. If a driver implements this callback, the core will invoke it during device initialization (spinand_init) to enable or disable the randomizer feature based on the device tree configuration. Signed-off-by: Cheng Ming Lin --- drivers/mtd/nand/spi/core.c | 20 ++++++++++++++++++++ include/linux/mtd/spinand.h | 9 +++++++++ 2 files changed, 29 insertions(+) diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 8aa3753aa..fee9a024d 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -1307,6 +1307,22 @@ static int spinand_create_dirmaps(struct spinand_dev= ice *spinand) return 0; } =20 +static int spinand_randomizer_init(struct spinand_device *spinand) +{ + struct device_node *np =3D spinand->spimem->spi->dev.of_node; + u32 rand_val; + int ret; + + if (!spinand->set_randomizer) + return 0; + + ret =3D of_property_read_u32(np, "nand-randomizer", &rand_val); + if (ret) + return 0; + + return spinand->set_randomizer(spinand, rand_val =3D=3D 1); +} + static const struct nand_ops spinand_ops =3D { .erase =3D spinand_erase, .markbad =3D spinand_markbad, @@ -1594,6 +1610,7 @@ int spinand_match_and_init(struct spinand_device *spi= nand, spinand->user_otp =3D &table[i].user_otp; spinand->read_retries =3D table[i].read_retries; spinand->set_read_retry =3D table[i].set_read_retry; + spinand->set_randomizer =3D table[i].set_randomizer; =20 /* I/O variants selection with single-spi SDR commands */ =20 @@ -1881,6 +1898,9 @@ static int spinand_init(struct spinand_device *spinan= d) * ECC initialization must have happened previously. */ spinand_cont_read_init(spinand); + ret =3D spinand_randomizer_init(spinand); + if (ret) + goto err_cleanup_nanddev; =20 mtd->_read_oob =3D spinand_mtd_read; mtd->_write_oob =3D spinand_mtd_write; diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 58abd306e..9ec45b727 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -585,6 +585,7 @@ enum spinand_bus_interface { * @user_otp: SPI NAND user OTP info. * @read_retries: the number of read retry modes supported * @set_read_retry: enable/disable read retry for data recovery + * @set_randomizer: enable/disable randomizer support * * Each SPI NAND manufacturer driver should have a spinand_info table * describing all the chips supported by the driver. @@ -613,6 +614,8 @@ struct spinand_info { unsigned int read_retries; int (*set_read_retry)(struct spinand_device *spinand, unsigned int read_retry); + int (*set_randomizer)(struct spinand_device *spinand, + bool enable); }; =20 #define SPINAND_ID(__method, ...) \ @@ -669,6 +672,9 @@ struct spinand_info { .read_retries =3D __read_retries, \ .set_read_retry =3D __set_read_retry =20 +#define SPINAND_RANDOMIZER(__set_randomizer) \ + .set_randomizer =3D __set_randomizer + #define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants, \ __flags, ...) \ { \ @@ -754,6 +760,7 @@ struct spinand_mem_ops { * @user_otp: SPI NAND user OTP info. * @read_retries: the number of read retry modes supported * @set_read_retry: Enable/disable the read retry feature + * @set_randomizer: Enable/disable the randomizer feature */ struct spinand_device { struct nand_device base; @@ -787,6 +794,8 @@ struct spinand_device { bool cont_read_possible; int (*set_cont_read)(struct spinand_device *spinand, bool enable); + int (*set_randomizer)(struct spinand_device *spinand, + bool enable); =20 const struct spinand_fact_otp *fact_otp; const struct spinand_user_otp *user_otp; --=20 2.25.1 From nobody Wed Jun 17 02:51:47 2026 Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D74F369965 for ; Wed, 22 Apr 2026 07:03:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776841415; cv=none; b=G7/xXvo4A1E06kMM5CLghN8t97+WG2u8C3pHrbaPENWhxMSYOK88tOQgOPDJx/OW9Q/pc3QFjX/deupgNs2yoKYfoWDz31YJF1Jygn+qNujIRszal3hnHzjH2bDoxqC+a40/i0gorak6sOZh0c7bmIu867SLre+aCzFgq9GMKek= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776841415; c=relaxed/simple; bh=nc9xzWGieI96ay597NLMvP3dG7sK3h1DVK1/mbeJvZo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UgzZCHdQrrJZbYcXR3AqQxtuQ0q/c/yd3+/rmFAPewZjXC8Gv/5wcUzAHJwWGALOKeTyHqWzr7gwxC5iBquTCQ5BsEp+Mb8vwp+2fD/lPXenbZzSqoMKMFvjh0zUxWpVwOsVW2KGYVACefSIDbuLw39DP41w5jYUjoRQlaOgZSE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Ln4FW9fO; arc=none smtp.client-ip=209.85.214.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ln4FW9fO" Received: by mail-pl1-f177.google.com with SMTP id d9443c01a7336-2ad617d5b80so28599905ad.1 for ; Wed, 22 Apr 2026 00:03:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1776841414; x=1777446214; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=csjPh52S+pcBTGEpydk3ocZJOCMxJr2uaOVx7ol9BXo=; b=Ln4FW9fO82iqFBYcKWaAEius6nIq/Myee+hXrV3VAyGpHiM0eNpiOZ5pITpJBnv9Ab Y4koNIzMLMOSmDR8m8cUMPfQYSS0VMQ6w1J0HsQJOc26PPyUQoUasbcgBqqeGq6g/S5X BYdUt6pwNjPUOuQ49qgAwEfzl1Cal1BmqW4NU+u4dSXKJIgX093LKH/eknyAleXSiJhn wKjuUr2ZVYzmsUUbrNAMusBnUSbWa9q65Qktf3i2I40rOi/hCw/OQ6ob0VoGjDb/oYcR ZX8gKHEWcJgHEJGdpQnJWprrn0sA6RL341wcwQauoWYCfd47Gp0/qMtAdrNLownR/HtB hINw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776841414; x=1777446214; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=csjPh52S+pcBTGEpydk3ocZJOCMxJr2uaOVx7ol9BXo=; b=OlfzabXbEYX+UkCyikkSYglQivrcvUYn97TqIuZjcMZZH50G3+6tmPxu2qmtO2XtO3 UXkUvKRE4p7VWfoX4hoCbiPiQPBOoFaGgcKb/jyY18OzoOw/eY/rp1yPCF723WdkcEfB 5SVqSsWxl0cpfUrPitjOkbBI4hBvm4XCIvmf+8aTKhyok4YQsrc7DIpFVxhzJXq23rcB 3/PqgXFUEfEWhsMI2rv5zvGDt+DThM9J7x4+4WB4WAzmyiMWPZRLBIbPypPfN9D+30/F sXYe/Kv627frP3cRXcTrwMQSDyz0kzLm4Pzg8/fx6r9gH8JNUMGk+YoTozDG/Na2iO8W QpEw== X-Forwarded-Encrypted: i=1; AFNElJ/OVmXXJoUjykAIFYbPVNj93PLcIfo8ylDFs5sy9vGxrUjRPXCSfAEzVL9Yk4h3OXl/xAhaITCelQTQPVY=@vger.kernel.org X-Gm-Message-State: AOJu0Yz23qe2x1AVowRvLGaOTP8WkxjzHPyX5fkFVRIeoZfxebs0KOqJ Zpu3vRPT4hjdPns5ag156xRzkAZdl739X4lD0xaKYlB/u6inbCydvAW7 X-Gm-Gg: AeBDievn08qS7hVjRXIZThf2G2dlDBAQ/7xyl+zxN7os5spdcvW1G6f3cOgGEZNR8kM R+8WFnsfoiREV0jQniOnpJNMDB2yMTFJyjAtAjdfMGlDO3yBlEyxMrQ/J5B2dNtkv7W0dsC2+NV ChEjsMjOf4jrckJsoAhK96lB59eTmCiB6bRxOTunWU7LZTLqqZV24qGJHapgDVjgrE6p+8eC4P0 dYnPvoE4qXn/8WPdS4jmVLPgjuM/sEKEfneplX0DaMnTB6Muv9GOmXzLxFS1VELV1TzTUlF8nEj oNTdbPITUEOTF8hMcWQlOzXonAxPDjkuCmo2Ibhff+h03wYpJL51RTazI4w1osLADmmKB5ud9WV FNyGfwTGnBScy76V1WPB4PWj2HrsIlQtePwczmDBW2bHwODYtnzg4OhuDlqNfGItss1/9uyRYew 8REIG5KZchBvdIKKHMWWYhL6+MKdeIypk+wQTT3oAn863KD9ujsmHwIYYb X-Received: by 2002:a17:903:46c8:b0:2b4:5f83:a9d6 with SMTP id d9443c01a7336-2b5f9fbba9cmr234292045ad.34.1776841413286; Wed, 22 Apr 2026 00:03:33 -0700 (PDT) Received: from twhmp6px (mxsmtp211.mxic.com.tw. [211.75.127.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b5fab32cfasm197713355ad.69.2026.04.22.00.03.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Apr 2026 00:03:30 -0700 (PDT) Received: from hqs-appsw-a2o.mp600.macronix.com (unknown [172.17.236.67]) by twhmp6px (Postfix) with ESMTPS id 30146416A046; Wed, 22 Apr 2026 15:03:28 +0800 (CST) From: Cheng Ming Lin To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alvinzhou@mxic.com.tw, Cheng Ming Lin Subject: [PATCH v9 3/3] mtd: spi-nand: macronix: Enable randomizer support Date: Wed, 22 Apr 2026 15:02:03 +0800 Message-Id: <20260422070203.698716-4-linchengming884@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260422070203.698716-1-linchengming884@gmail.com> References: <20260422070203.698716-1-linchengming884@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Cheng Ming Lin Implement the 'set_randomizer' callback for Macronix SPI NAND chips. The randomizer is enabled by setting bit 1 of the Configuration Register (address 0x10). This patch adds support for the following chips: - MX35LFxG24AD series - MX35UFxG24AD series When the randomizer is enabled, data is scrambled internally during program operations and automatically descrambled during read operations. This helps reduce bit errors caused by program disturbance. Please refer to the following link for randomizer feature: Link: https://www.mxic.com.tw/Lists/ApplicationNote/Attachments/2151/AN1051= V1-The%20Introduction%20of%20Randomizer%20Feature%20on%20MX30xFxG28AD_MX35x= FxG24AD.pdf Signed-off-by: Cheng Ming Lin --- drivers/mtd/nand/spi/macronix.c | 38 ++++++++++++++++++++++++--------- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macroni= x.c index 67cafa1bb..7dfcc34e9 100644 --- a/drivers/mtd/nand/spi/macronix.c +++ b/drivers/mtd/nand/spi/macronix.c @@ -14,6 +14,8 @@ #define MACRONIX_ECCSR_BF_LAST_PAGE(eccsr) FIELD_GET(GENMASK(3, 0), eccsr) #define MACRONIX_ECCSR_BF_ACCUMULATED_PAGES(eccsr) FIELD_GET(GENMASK(7, 4)= , eccsr) #define MACRONIX_CFG_CONT_READ BIT(2) +#define MACRONIX_CFG_RANDOMIZER_EN BIT(1) +#define MACRONIX_FEATURE_ADDR_RANDOMIZER 0x10 #define MACRONIX_FEATURE_ADDR_READ_RETRY 0x70 #define MACRONIX_NUM_READ_RETRY_MODES 5 =20 @@ -170,6 +172,12 @@ static int macronix_set_read_retry(struct spinand_devi= ce *spinand, return spi_mem_exec_op(spinand->spimem, &op); } =20 +static int macronix_set_randomizer(struct spinand_device *spinand, bool en= able) +{ + return spinand_write_reg_op(spinand, MACRONIX_FEATURE_ADDR_RANDOMIZER, + enable ? MACRONIX_CFG_RANDOMIZER_EN : 0); +} + static const struct spinand_info macronix_spinand_table[] =3D { SPINAND_INFO("MX35LF1GE4AB", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12), @@ -231,7 +239,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF2G24AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), @@ -243,7 +252,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_PROG_PLANE_SELECT_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF2G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x64, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -254,7 +264,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF4G24AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 2, 1, 1), @@ -266,7 +277,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_PROG_PLANE_SELECT_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35LF4G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x75, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -277,7 +289,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX31LF1GE4BC", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), @@ -327,7 +340,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF4G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xf5, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -340,7 +354,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF4GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xb7, 0x03), NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), @@ -381,7 +396,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF2G24AD-Z4I8", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xe4, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -394,7 +410,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF2GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xa6, 0x03), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -444,7 +461,8 @@ static const struct spinand_info macronix_spinand_table= [] =3D { SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, macronix_ecc_get_status), SPINAND_READ_RETRY(MACRONIX_NUM_READ_RETRY_MODES, - macronix_set_read_retry)), + macronix_set_read_retry), + SPINAND_RANDOMIZER(macronix_set_randomizer)), SPINAND_INFO("MX35UF1GE4AD", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x96, 0x03), NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), --=20 2.25.1