From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F98617A2FB; Mon, 20 Apr 2026 12:54:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776689678; cv=none; b=iAR3PPWgLcYmp6A5ZII6WJsfKPA8T/EfMrYmE66epEWYkySiKVHZ4VQ2FR0o5fhhOLBeYxpqbZHJJXlV7M9mlI6xs8j+4/5AsBBhTpaZcTh08v8l4iyFeBUOqQJRoGvgBXtm/wEsshlmz8NftxfMsWTuIB7TFoX5gA0CsON+aNQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776689678; c=relaxed/simple; bh=BQkAQsRSJV/BKvqWkVDSbgZZF5KbSieZBvu6S74X2tg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=T8XXajRGpAJieOhLIryx2ejUjJ0huRDjAaUu7qcNOv6/Y5LvvUAGrSWZmLH3AKCzfiSA1lQcyohxpEYwKN+lz5YupeE2A4eGrs8ShPWdTqC/U9NP6PVEq39L35OlMdk6bxAWIhr2uoo9IXvMde41+eG5O81MDsCDFDKFn4E+Ops= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=Tip7VlqJ; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="Tip7VlqJ" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 7C9F4265D; Mon, 20 Apr 2026 14:52:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1776689578; bh=BQkAQsRSJV/BKvqWkVDSbgZZF5KbSieZBvu6S74X2tg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Tip7VlqJPlE+7zUiS0g1vPCTn1ZQPmZoB7I8WqIEn9XCf4hB49mpw8zitbAJVgE6V LP6bYfHkYN8iMVLG0ZE6R0j4yCePTLure1xO1tIu8UuPW32F4RIzaJL6njGuo/3Cjl Mos8uhwcYLwTeWjtX2XrPdPP0QA2xG4IB6nB5dME= From: Tomi Valkeinen Date: Mon, 20 Apr 2026 15:54:08 +0300 Subject: [PATCH 01/15] dt-bindings: display: ti: Move ti,am62l-dss binding to a new binding file Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260420-beagley-ai-display-v1-1-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> In-Reply-To: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=10239; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=BQkAQsRSJV/BKvqWkVDSbgZZF5KbSieZBvu6S74X2tg=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBp5iID3NURbXzJgkljXH7TV5ZqVjLrIRPA0UhDt yQV2Zx7qDiJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaeYiAwAKCRD6PaqMvJYe 9eZtD/9ONa0f5GJXPjqZNArWC0sZjeUmoLQ/Dgl4yhbcUcOmqlzss+e+4zKDPr0uy7xdtBItR27 fvo6Gri97PfPvl3hGLfQIks1b0d6xOSmghbDhKWcVdNKOwd7xCvPtE2J6RYXK+Kx9VGmH6PbQEa LJrEHmk7C3SYgLiBEa/ad/8QaVfjMzmjyDLlGAANccwrhr2ZUUHHCpOOV2SkOPpsujAGnWxAQHJ kqC33cNTmkRP+ssAO1rlD+L5EterTaRTzVQGmETaqJ6p1BR+wMN2V8SWTCGpfK8vaRpu1xlYNUm 5Om4uL/2mFhrEz1JZEjV2jOSsDyl1JMqYoSDBnjNTz78kC+Kp85fLCK4LEcN5ZkvvRv0DXw2/iE zzB3m4nnI+5Ev30jgk2fbRWin56Z+lyilHzubvPVDKf7vpCsrLvmBYuFbzeaAoozqGLd9ZxcMdB LCkme4jv6xzTHwCQw+fn+/xgGXSAYwxUneO9RLpDU2l8JjxDzeIQ6XsEVaFh42SyepQE/y6c3Yq QpZE//egF+Ce4CJLHIVc2gNX9qsJ5ScMK95Wfa1izkDFptNZ9NiaFmEUAsFVI2TqRzLrUI62KRi miwjswibOj79TD5F5rirT4098GMpEiI4LBAPtjFahGheX6iC1uJCu6fMOoh2tR/0PVMFK7xi5O+ T8zjQw2F8l/ic1g== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 We currently have two binding files for different TI K3 DSS versions: ti,j721e-dss.yaml which contains bindings for the "full" DSS version, with four planes and outputs, and ti,am65x-dss.yaml which used to contain bindings for the "lite" DSS version, with two planes and outputs. ti,am62l-dss binding was added recently to the ti,am65x-dss.yaml file, which only has a single plane and a single output. To keep with the above "binding file per DSS model" style, and to simplify the ti,am65x-dss.yaml file, let's move the ti,am62l-dss to a separate, new file. Signed-off-by: Tomi Valkeinen Reviewed-by: Rob Herring (Arm) Tested-by: Swamil Jain --- .../bindings/display/ti/ti,am62l-dss.yaml | 136 +++++++++++++++++= ++++ .../bindings/display/ti/ti,am65x-dss.yaml | 94 +++----------- MAINTAINERS | 1 + 3 files changed, 156 insertions(+), 75 deletions(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am62l-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am62l-dss.yaml new file mode 100644 index 000000000000..ce6185dca18d --- /dev/null +++ b/Documentation/devicetree/bindings/display/ti/ti,am62l-dss.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2026 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/ti/ti,am62l-dss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments AM62L Display Subsystem + +maintainers: + - Tomi Valkeinen + +description: | + The AM62L display subsystem is a cut-down version of the TI Keystone + Display SubSystem. It has a single output port which supports DPI + format and a single video "lite plane" which does not support scaling. + The output port is routed to the SoC boundary via the DPI interface, + and the same DPI signals are also routed internally to the DSI Tx + controller present within the SoC. Due to clocking limitations only + one of the interfaces (DSI or DPI) can be used at a time. + +properties: + compatible: + const: ti,am62l-dss + + reg: + description: + Addresses to each DSS memory region described in the SoC's TRM. + items: + - description: common DSS register area + - description: VIDL1 light video plane + - description: OVR1 overlay manager for vp1 + - description: VP1 video port 1 + - description: common1 DSS register area + + reg-names: + items: + - const: common + - const: vidl1 + - const: ovr1 + - const: vp1 + - const: common1 + + clocks: + items: + - description: fck DSS functional clock + - description: vp1 Video Port 1 pixel clock + + clock-names: + items: + - const: fck + - const: vp1 + + assigned-clocks: + minItems: 1 + maxItems: 2 + + assigned-clock-parents: + minItems: 1 + maxItems: 2 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + description: phandle to the associated power domain + + dma-coherent: true + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + The DSS DPI output port node from video port 1, which may be + connected to the external DPI pins or to the internal DSI Tx + controller. + + required: + - port@0 + + max-memory-bandwidth: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Input memory (from main memory to dispc) bandwidth limit in + bytes per second + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + bus { + #address-cells =3D <2>; + #size-cells =3D <2>; + + dss: dss@30200000 { + compatible =3D "ti,am62l-dss"; + reg =3D <0x00 0x30200000 0x00 0x1000>, /* common */ + <0x00 0x30202000 0x00 0x1000>, /* vidl1 */ + <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ + <0x00 0x3020a000 0x00 0x1000>, /* vp1 */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ + reg-names =3D "common", "vidl1", "ovr1", "vp1", "common1"; + power-domains =3D <&scmi_pds 39>; + clocks =3D <&scmi_clk 162>, + <&scmi_clk 161>; + clock-names =3D "fck", "vp1"; + interrupts =3D ; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { + reg =3D <0>; + dpi0_out: endpoint { + remote-endpoint =3D <&dsi_in>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 49a007cbcd3a..75d9640398f0 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -18,68 +18,45 @@ description: | internally routed to 2 OLDI TXes. The second video port supports DPI format. The first plane is full video plane with all features and the second is a "lite plane" without scaling support. - The AM62L display subsystem has a single output port which supports DPI - format but it only supports single video "lite plane" which does not sup= port - scaling. The output port is routed to SoC boundary via DPI interface and= same - DPI signals are also routed internally to DSI Tx controller present with= in the - SoC. Due to clocking limitations only one of the interface i.e. either D= SI or - DPI can be used at once. =20 properties: compatible: enum: - ti,am625-dss - ti,am62a7-dss - - ti,am62l-dss - ti,am65x-dss =20 reg: description: Addresses to each DSS memory region described in the SoC's TRM. - oneOf: - - items: - - description: common DSS register area - - description: VIDL1 light video plane - - description: VID video plane - - description: OVR1 overlay manager for vp1 - - description: OVR2 overlay manager for vp2 - - description: VP1 video port 1 - - description: VP2 video port 2 - - description: common1 DSS register area - - items: - - description: common DSS register area - - description: VIDL1 light video plane - - description: OVR1 overlay manager for vp1 - - description: VP1 video port 1 - - description: common1 DSS register area + items: + - description: common DSS register area + - description: VIDL1 light video plane + - description: VID video plane + - description: OVR1 overlay manager for vp1 + - description: OVR2 overlay manager for vp2 + - description: VP1 video port 1 + - description: VP2 video port 2 + - description: common1 DSS register area =20 reg-names: - oneOf: - - items: - - const: common - - const: vidl1 - - const: vid - - const: ovr1 - - const: ovr2 - - const: vp1 - - const: vp2 - - const: common1 - - items: - - const: common - - const: vidl1 - - const: ovr1 - - const: vp1 - - const: common1 + items: + - const: common + - const: vidl1 + - const: vid + - const: ovr1 + - const: ovr2 + - const: vp1 + - const: vp2 + - const: common1 =20 clocks: - minItems: 2 items: - description: fck DSS functional clock - description: vp1 Video Port 1 pixel clock - description: vp2 Video Port 2 pixel clock =20 clock-names: - minItems: 2 items: - const: fck - const: vp1 @@ -113,8 +90,6 @@ properties: For AM625 DSS, the internal DPI output port node from video port 1. For AM62A7 DSS, the port is tied off inside the SoC. - For AM62L DSS, the DSS DPI output port node from video port 1 - or DSI Tx controller node connected to video port 1. properties: endpoint@0: $ref: /schemas/graph.yaml#/properties/endpoint @@ -189,38 +164,7 @@ allOf: properties: compatible: contains: - const: ti,am62l-dss - then: - properties: - ports: - properties: - port@1: false - reg: - maxItems: 5 - reg-names: - maxItems: 5 - clocks: - maxItems: 2 - clock-names: - maxItems: 2 - else: - properties: - reg: - minItems: 8 - reg-names: - minItems: 8 - clocks: - minItems: 3 - clock-names: - minItems: 3 - - - if: - properties: - compatible: - contains: - enum: - - ti,am62l-dss - - ti,am65x-dss + const: ti,am65x-dss then: properties: oldi-transmitters: false diff --git a/MAINTAINERS b/MAINTAINERS index d1cc0e12fe1f..902502e1d63c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8756,6 +8756,7 @@ L: dri-devel@lists.freedesktop.org S: Maintained T: git https://gitlab.freedesktop.org/drm/misc/kernel.git F: Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml +F: Documentation/devicetree/bindings/display/ti/ti,am62l-dss.yaml F: Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml F: Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml F: Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B44539FCA6; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260420-beagley-ai-display-v1-2-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> In-Reply-To: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=4076; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=fExIAih1V/hUxLXpMt7LVH1DfE+RqN2Y1ycWAegD0uk=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBp5iIDVQka58bN3HLS4c+NlZswqixlG/xqmGICs ymyuvYjy2uJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaeYiAwAKCRD6PaqMvJYe 9aGsD/9n256V6XjrpI6lnUsY3QZ9Uin8/hpZ2dn2RxWzS6WIJkT5ak5+hUNTBUeGgRbAe+7AUvR J5L/zug7O2P7r4DCiy6rfGyvvGg72AWaaehgIjfME8pyp4lpBNcDnPDobS1kAjHt7nH8pOIxTs4 wc+P4yppYNaFuLlBp2gWLrzGLSjZ9cEi1lAf+5LjP15SMqUYmzF3ka0fOjiv9WGFB6huFo8wgtJ fhrNybFqE4iDNLvfNY3ZhZwdpoISSQMaV9ZRkDEriGDefrF3dtrc9uI/sGw+Z5whWYHg8GFWkvH JmVkCFkFYE9d75hdbuKZvBjwNRwkGKPro0CoJlGqUjg8QFmLUZonasd6atlWrhWwFFUlCSz+Fvm rDFwE+WBvZKY/a567XZghGqkUv0ych5zbDp9/ciUGYFaLsDJtBcnS+0bjJJM1j1Ov4OxGveOnCE jpoh0zcIvAXrKYII7QArV90f5M/hpS1IuveCPmgxQIXX8MIySviHcRkEJhI+7KwhDPLVgBAhg5f XBrEZLCcGn5riJxaI3tyGgl6N9LC0EWRLtgGscs08mbneFGnMuRHvByKi2PGGscoetEULbgwp6z k3DHBGtk+fPfp54uO+tpEzRpEzWLBM4BiASygc703zmKVHHeS2xzZvUs7ZBOwuD7rHeltN6GVvI 5nYYmydQj26sqzw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 In principle the DT binding for the DSS IP should mainly cover the DSS IP. The current binding also covers the SoC integration topics outside the DSS, mainly via the endpoint related rules and descriptions. A more recent SoC, AM62P, has two instances of the DSS IP, and while both DSS IPs are identical, they are integrated slightly differently (e.g. which DSS output goes to an in-SoC DSI bridge, which goes to DPI pins, etc.). To make the bindings usable for both DSS instances, relax the binding slightly: remove the explicit endpoint rules, and generalize the descriptions. Signed-off-by: Tomi Valkeinen Reviewed-by: Rob Herring (Arm) Tested-by: Swamil Jain --- .../bindings/display/ti/ti,am65x-dss.yaml | 55 ++++++++----------= ---- 1 file changed, 20 insertions(+), 35 deletions(-) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 75d9640398f0..588d72d4ec0d 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -12,12 +12,21 @@ maintainers: - Tomi Valkeinen =20 description: | - The AM625 and AM65x TI Keystone Display SubSystem has two output - ports and two video planes. In AM65x DSS, the first video port - supports 1 OLDI TX and in AM625 DSS, the first video port output is - internally routed to 2 OLDI TXes. The second video port supports DPI - format. The first plane is full video plane with all features and the - second is a "lite plane" without scaling support. + The Display Subsystem (DSS) used in e.g. AM65x and AM625 SoCs has two ou= tput + video ports (VP) and two video planes. The integration varies from SoC t= o SoC, + affecting the routing of the video ports. + + The first plane is full video plane with all features and the second is a + "lite plane" without scaling support. + + On AM65x, the first VP has an integrated OLDI TX, thus the first output = port + is OLDI output. The second VP is routed to external MIPI DPI pins. + + On AM625, the first VP is connected to two OLDI TX instances, and the se= cond + VP is routed to external MIPI DPI pins. + + On AM62A7, the first VP is tied off in the SoC, and the second VP is rou= ted to + external MIPI DPI pins. =20 properties: compatible: @@ -85,34 +94,15 @@ properties: properties: port@0: $ref: /schemas/graph.yaml#/properties/port - description: - For AM65x DSS, the OLDI output port node from video port 1. - For AM625 DSS, the internal DPI output port node from video - port 1. - For AM62A7 DSS, the port is tied off inside the SoC. - properties: - endpoint@0: - $ref: /schemas/graph.yaml#/properties/endpoint - description: - For AM625 DSS, VP Connection to OLDI0. - For AM65X DSS, OLDI output from the SoC. - - endpoint@1: - $ref: /schemas/graph.yaml#/properties/endpoint - description: - For AM625 DSS, VP Connection to OLDI1. - - anyOf: - - required: - - endpoint - - required: - - endpoint@0 - - endpoint@1 + description: | + AM65x: OLDI output from video port 1 + AM62A7: Not available, tied off inside the SoC + Other SoCs: Parallel video from video port 1 =20 port@1: $ref: /schemas/graph.yaml#/properties/port description: - The DSS DPI output port node from video port 2 + Parallel video from video port 2 =20 ti,am65x-oldi-io-ctrl: $ref: /schemas/types.yaml#/definitions/phandle @@ -168,11 +158,6 @@ allOf: then: properties: oldi-transmitters: false - ports: - properties: - port@0: - properties: - endpoint@1: false =20 required: - compatible --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CAAD39FCD6; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260420-beagley-ai-display-v1-3-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> In-Reply-To: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3164; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=Oiz5DcZZ+DuJWvzr1nBXRDeSsfJx63ROnXwUjMVTm5E=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBp5iID3mds9SIGbvEfz3naXxh1VwFLf/K4KaPwa DniCJqKzDCJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaeYiAwAKCRD6PaqMvJYe 9RM2D/99FJ31zzsAadlo21e9gejFxnhb5q1nSdT9HU2ATpl2ylnO+m4rEbuSDHt+W+w/Ivk63Ec ylN4TYhj6N3SfQEabifUg+O1y/Qe50x8Be2MpHa+Vwh6F0+q/ANwHxRd/z9RucYf/xyJSbo7Bau S9koUaHDktjz5200XA2nqTmlGamu4PSWMHqC2z6fkUV0GJkeKQDLY0jp3ulKJDbmsMHl+809IZ+ EZP3nw0fJ3m1jN3/LY3pEgFRC5FIQEEreaRstmsszYDJKbopK7o7pkdIgc4hC1ZAkrGoMmvWhGi H8uD1YXL38SRyPYO50IcJaQqAWGirG+G11t2BOEjBGbHKl2si9J05ZOD93jyKOGG9kKgiVbd0OS Aik5EpIOWj5WitSWdWtNNPs5fW1fGrLv4eBZaHbML9Y9MndsVSsJgvCVvOxFKafoG1UEVQM5an3 eR7LLDUB5uL6I9qKRbZ8gtEQ4YYo2vvOT16m+V2TmOUlE6xdwhmheu9tatOxG8W0FPeZ+qWFSoC BrijYGMsJYYF6wO4VpUWJEKRoxfJ6XTWHv3Aygijv0b1uMlFPtGAeTuWESTJ+MAAmUramda0ag+ 2g4xzVY7NZk5HVGT31A2oPj7BcYhg9+xQSWy1WpskMY4pOK+yX/Y7O9O8VhwP3Y/1Nz0AZfC//J pIZU1A49H0xqAfA== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 The DPI output pipeline in K3 SoCs contains the display subsystem (DSS) which produces the in-SoC parallel video signal, and a DPI block which adjusts the signal to the external MIPI DPI output. The DSS IP has registers to configure whether the data and sync signals are driven on rising or falling clock edge, and on some SoCs these are automatically conveyed to the DPI block which needs that configuration to properly output the MIPI DPI signal. However, on some SoCs the DPI block configuration has to be done manually, using an extra register outside the DSS, DPI0_CLK_CTRL in MAIN_CTRL_MMR_CFG0 block, which controls the DPI block's behavior. Note that while the register is named "CLK_CTRL", it's not really related to clocks, but the sync and data signals. Currently the DPI0_CLK_CTRL is never written, so it's always 0, meaning the data and sync are always driven on a rising clock edge regardless of the DSS configuration. DPI0_CLK_CTRL register seems to be an independent "quirk" register, inside MAIN_CTRL_MMR_CFG0 block, which contains general purpose system registers. The registers surrounding DPI0_CLK_CTRL seem to be controlled by the system firmware or linux clock drivers. So, it is just this single register we can map, and we can't create a syscon node for the whole (or big parts of) MAIN_CTRL_MMR_CFG0. I see two options to handle the register: 1) We could add that single register to the DSS binding as a new reg block. That feels wrong, as it's not a DSS register. 2) Add it as a syscon node, which can then be used by tidss driver. It is a bit silly to create a syscon node for a single 32-bit register, though. Neither option feels good, but I do lean towards the latter approach. Add 'ti,am625-dss-dpi0-clk-ctrl' compatible to syscon.yaml so we can add the syscon node for the register. Original patch from Louis Chauvet Link: https://e2e.ti.com/support/processors-group/processors/f/processors-f= orum/1228207/am62a7-rgb-display-flickering-and-pixel-issue/ Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentat= ion/devicetree/bindings/mfd/syscon.yaml index e57add2bacd3..415cc21fd328 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -126,6 +126,7 @@ select: - ti,am62-opp-efuse-table - ti,am62-usb-phy-ctrl - ti,am625-dss-oldi-io-ctrl + - ti,am625-dss-dpi0-clk-ctrl - ti,am62p-cpsw-mac-efuse - ti,am654-dss-oldi-io-ctrl - ti,j784s4-acspcie-proxy-ctrl @@ -239,6 +240,7 @@ properties: - ti,am62-opp-efuse-table - ti,am62-usb-phy-ctrl - ti,am625-dss-oldi-io-ctrl + - ti,am625-dss-dpi0-clk-ctrl - ti,am62p-cpsw-mac-efuse - ti,am654-dss-oldi-io-ctrl - ti,j784s4-acspcie-proxy-ctrl --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08BF83A0EA5; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 On some SoCs the OLDI blocks belong to the same power-domain as the main DSS block, but on some more recent SoCs the OLDI blocks have a controllable power-domain. Add the power-domain to the DT binding. Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yam= l b/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml index 8203ec5e5bb3..61c3eb0a0776 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am625-oldi.yaml @@ -29,6 +29,10 @@ properties: clock-names: const: serial =20 + power-domains: + maxItems: 1 + description: phandle to the associated power domain + ti,companion-oldi: $ref: /schemas/types.yaml#/definitions/phandle description: --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36AB839FCC6; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260420-beagley-ai-display-v1-5-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> In-Reply-To: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3462; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=ZmMW7kTwbXZdsvuHYTpzWALj86bAemWeJcSUBZ5t3LY=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBp5iIEV2YFa0T86ABDYo8g2j/kYLA0ZEyDdJxsI NugLCCmjCmJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaeYiBAAKCRD6PaqMvJYe 9Z6PD/9cXR4IJWvQthQG8JJGdyAANllzwkUECbNxEatZPk40eF7Yx21lzbGRaNGeoywxR3zXjmN mVOylI3DswTjZ08MgaIN5NMmdyZ3H5Etk8dr3pMaWY3iTEDWpg3lGLRZpwkxIGVS78m+6WdC1KR il5PIq7KD1HntaaLnD9jSC1pIbfkEOQvRaDZYhyA6z+re3TYFlfZWJSDDg8jzUuCBcDz3JBNKSn eNEyPvoRPNqaBYkXxM5Qc2SNsoyI/Wvky6jPgpApIviJ0PYnmQrta+5g1g7VgnTWm/znwDH3vxV NY+xYlXPFHCWXS7IwHo4m/4XfkMTQ3+uYjvRfH1V/tJFX6hNjKfKKNNEHcJK4Ju4O5VFWpL+6Er ab1SLz31Hg62mnZm3cv2MF45DGMx/8AgJSmgxZ8IUSqj5r3qRRAoylHWFoCiCf/52xovzmcGYFW hpsXDqetZ7cbDIJFS/v6QdQZHRXZP0+EObHYv617ZFqMw2QX9WKAmZP/sERhBbpuuJCLulLlkbw K9uojLmYeniXqpmCFA+btEsuJVeMVFK0YuLL09WxqeZ1S4my01iZTvzkTH46ZFzlL3xnemZZ0Ew /uVnZx/p41CkoA62Xs6VMwGElU2o8isuE4v9TcnK870pRKf53V3N4ndP3E0K0B50zZ4fCTHKWQ0 x5L7lpc1zG6F91A== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 TI's AM62P, J722S and AM67A SoCs contain same implementation of the display subsystem (DSS). There are two instances of the DSS (DSS0 and DSS1), each with two video ports (VP) and two video planes. Additionally the SoCs contain two OLDI TXes (OLDI0 and OLDI1), a MIPI DSI TX and a MIPI DPI output path. DSS0 supports: - VP0: OLDI0 in single-link mode, or OLDI0 and OLDI1 in dual-link or clone mode. - VP1: DPI DSS1 supports: - VP0: OLDI1 in single-link mode, or DPI - VP1: DPI or DSI The DSI is only connected to VP1 of DSS1, but OLDI and DPI are shared between the DSS instances. Thus only a single VP can output to DPI, and a single VP can use an OLDI block. Note that in single-link configuration OLDI0 can be used by DSS0, and at the same time OLDI1 can be used by DSS1. The DSS IP itself is compatible with older SoCs. While we could use "ti,am625-dss" compatible string, we add a new one "ti,am62p-dss" to be on the safe side in case the driver needs to do something special for the dual-DSS case in the future. Original patch by Swamil Jain Signed-off-by: Tomi Valkeinen Reviewed-by: Rob Herring (Arm) Tested-by: Swamil Jain --- .../bindings/display/ti/ti,am65x-dss.yaml | 27 ++++++++++++++++++= ++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml= b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 588d72d4ec0d..fe6cbfa7cc8f 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -28,11 +28,38 @@ description: | On AM62A7, the first VP is tied off in the SoC, and the second VP is rou= ted to external MIPI DPI pins. =20 + AM62P SoC contains two instances of the DSS: + On AM62P DSS0, the first VP is connected to two OLDI TX instances (the s= econd + TX shared with DSS1), the second VP to external MIPI DPI pins (shared wi= th + DSS1). + On AM62P DSS1, the first VP is connected either to the second OLDI TX, or + external MIPI DPI pins. The second VP is connected to either the externa= l MIPI + DPI pins or a Cadence DSI TX. + + An important note about OLDIs on AM62P: + + There are two OLDI hardware blocks. Each OLDI has certain configuration = that + has to be done before it can be used. The OLDI blocks get this configura= tion + directly from the DSS block, via DSS registers. However, as a single OLDI + block can be used either with DSS0 or DSS1, the source for the configura= tion + changes according to a mux. This mux is set according to the OLDI + configuration registers in DSS0. Thus the OLDI control paths change at + runtime, and it is not obvious how to structure this in the DT bindings. + + The solution used here is that each DSS node contains the OLDI nodes tha= t can + be used with that DSS. Thus the DSS0 node has two OLDI child nodes, OLDI= 0 and + OLDI1, and the DSS1 node has one OLDI child node, OLDI1, so three OLDI DT + nodes in total. The two OLDI1 nodes thus refer to the same piece of hard= ware, + and they cannot be used at the same time. The selection which OLDI nodes= to + use are chosen in the board dts files, so assuming the dts files are cor= rect, + no resource conflict can happen. + properties: compatible: enum: - ti,am625-dss - ti,am62a7-dss + - ti,am62p-dss - ti,am65x-dss =20 reg: --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DBDC239FCC7; Mon, 20 Apr 2026 12:54:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776689686; cv=none; b=a2E+5zOedqIoVoXnC3a8OoJCiInY7JBJzlHm2qYwI2jg0jxQeWzU+Nbrku2k60/k87/ceIvIZWwSv2TOxm3Xp8sEuYDWDgVdxvbBslYLdycxsO1vy93aJ5jGgmpRUtWH4/kKm8Uyvsr3aV2fNLz0VxPtb6pxonP0tFIwoAdIghk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776689686; c=relaxed/simple; bh=pkHYfXpvclqEJ8daziW3Dv34yzf0Pm9I5IrucwaeY60=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Wzo6wj+ehsLOYqtSJ4k+T72xTEa0msIY9pA5ZHvNVbmfSsfNKSbbl/8/Gx7tyWG30SSHgm85/UR8730GnQu/0xog7RJgqJLlLtDlrAPwMUCqPNOuTJeg0jox2ST0aVXmFn5dUXyuzrmmbb/jJF7mViqZMYvDqk/U0eucQYVNq84= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=hcX0kIze; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="hcX0kIze" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 414CC2B57; Mon, 20 Apr 2026 14:53:03 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1776689584; bh=pkHYfXpvclqEJ8daziW3Dv34yzf0Pm9I5IrucwaeY60=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=hcX0kIzeHJPqq+bdxH6vuMZV/5Fqk0oaBjfvMvD11TFgqMTmWPP3D/Qni3wUvl8oh 46KlH4DsRpVYQ4kgVr/T/tgLNkAMSDKRTEL3IzUQW+go1FnhrknJYg/ujt1kem4e14 9dQX+IidMxqWdsaTcGa0v9jF55R0/YBtyXsFIKg8= From: Tomi Valkeinen Date: Mon, 20 Apr 2026 15:54:13 +0300 Subject: [PATCH 06/15] drm/tidss: Remove extra pm_runtime_mark_last_busy Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260420-beagley-ai-display-v1-6-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> In-Reply-To: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=713; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=pkHYfXpvclqEJ8daziW3Dv34yzf0Pm9I5IrucwaeY60=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBp5iIFk/3ZtYJiRZQy+gQj1AkKOh0XebZylKJX1 kqy6mxF8tiJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaeYiBQAKCRD6PaqMvJYe 9WJhD/9zKPK6I0cpMtb6xyjqzCbLCtxPLZsEvRbOwj8SIStgYripUBMf0Ib6O1EBb73bFWNvC3I gyR3PnKQsddT6j/+SW/SVd04FpqlrrXc1U8kPWA32E4lufTOPy/zBxAbEki2YScso1zqPiP0kp7 YOdSlB+gq4E9RCUC27lEONeM7IL/jEXGrYUXBkLyDj566aHS7lNnJMf9FhCfS8bXbS92BPOcLRQ gO+xfAjxgOh9KQG/76LdTPcArSYTh7BgemefE4uEbvQs1AOK1ig5q3i9RXDgw1CeL5/Rtzl7dlC wiQBSqRZJ/9VpTA/cv2NQgh8C7fxJlb0AH52EjUra4VQd4qse6HHpZYj/pxxib5n0v+yZ1EiEhH z9wbH75pRKUD59t09QTdA4cgSNfci9jiwqfeQ+9RaSqm+h3Hl9SSE2wH20iCfuUkZuialzWf4ic SIOISc0iCSTbopyfqBm0vjAGsEPHGfZ4M0EYBo9pRv8VVxVXq5sohLFhxe86iXDDNoiFQb1ZyWQ VjSdilj94IzIS0L9aOHqTahVhiG656mDTTNSnmdFrQWJmK7hkSIVyKzQ91LtgQfqG6zdIizMIo8 ranSO/QGUNJsQA8XNl4zDIFsYoV6trk8A8nAegrzMCTJlZhxUDkMgGzsdymF29nLmrNvjlEO74t xVd99F+UZo4fApw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 pm_runtime_put_autosuspend() calls pm_runtime_mark_last_busy(), so no need to call pm_runtime_mark_last_busy() explicitly in the driver. Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- drivers/gpu/drm/tidss/tidss_drv.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tids= s_drv.c index 1c8cc18bc53c..5cb3e746aeb3 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -42,8 +42,6 @@ void tidss_runtime_put(struct tidss_device *tidss) { int r; =20 - pm_runtime_mark_last_busy(tidss->dev); - r =3D pm_runtime_put_autosuspend(tidss->dev); WARN_ON(r < 0); } --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A5523A0EA5; Mon, 20 Apr 2026 12:54:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 OLDI_LB_CTRL define is not used, and doesn't seem to exist at least on some SoCs. Let's remove the define. Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- drivers/gpu/drm/tidss/tidss_oldi.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/tidss/tidss_oldi.h b/drivers/gpu/drm/tidss/tid= ss_oldi.h index 8cd535c5ee65..a361e6dbfce3 100644 --- a/drivers/gpu/drm/tidss/tidss_oldi.h +++ b/drivers/gpu/drm/tidss/tidss_oldi.h @@ -20,7 +20,6 @@ struct tidss_oldi; =20 /* Register offsets */ #define OLDI_PD_CTRL 0x100 -#define OLDI_LB_CTRL 0x104 =20 /* Power control bits */ #define OLDI_PWRDOWN_TX(n) BIT(n) --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83AAD3A1E8C; Mon, 20 Apr 2026 12:54:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="wej77hBe" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 88CA136FD; Mon, 20 Apr 2026 14:53:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1776689586; bh=Y+U+Pl2vnQ2ORRkJguQUwTzM9Fncg1unpScx2RJOHWw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=wej77hBe0kLQW4MaRDvBMQV+sim2O0uT8yl7YPpTRAuGQ3oTg/J9WQ7j7r1jmph65 cx0bfRGqt0KHc37UFrw4SAzsHVCpOn6pZnQgstrBNXpoREE4TwYzcIoEpTrsely5ka pHEVsA/f6XceDjYDLwPRlFKn8/PwzRLZ8deJruc8= From: Tomi Valkeinen Date: Mon, 20 Apr 2026 15:54:15 +0300 Subject: [PATCH 08/15] drm/tidss: Add mechanism to detect DPI output Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 There are situations where the driver needs to know if the output is going to the DPI output or not. There is no trivial way to get this information, as there is no "DPI bridge". We can only find this out in reverse: check if the output is NOT DPI, and if that is negative, then it must be DPI. At the moment we have two non-DPI outputs: DSI and OLDI. DSI always has "ti,j721e-dsi" DSI bridge connected to the DSI, so we can use that for checking. OLDI doesn't have a compatible property, but we can check if the DT node has "oldi-transmitters" node as a parent, and the dss node itself as a grand-parent. If the output is not connected to either of the above, it must be DPI. Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- drivers/gpu/drm/tidss/tidss_crtc.c | 10 +++++-- drivers/gpu/drm/tidss/tidss_crtc.h | 4 ++- drivers/gpu/drm/tidss/tidss_dispc.c | 5 +++- drivers/gpu/drm/tidss/tidss_dispc.h | 3 +- drivers/gpu/drm/tidss/tidss_kms.c | 55 +++++++++++++++++++++++++++++++++= +++- 5 files changed, 70 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c b/drivers/gpu/drm/tidss/tid= ss_crtc.c index a31c21c5f855..dfdf61b01dcd 100644 --- a/drivers/gpu/drm/tidss/tidss_crtc.c +++ b/drivers/gpu/drm/tidss/tidss_crtc.c @@ -192,7 +192,8 @@ static void tidss_crtc_atomic_flush(struct drm_crtc *cr= tc, return; =20 /* Write vp properties to HW if needed. */ - dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false); + dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false, + tcrtc->dpi_output); =20 /* Update plane positions if needed. */ tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false); @@ -235,7 +236,8 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *c= rtc, if (r !=3D 0) return; =20 - dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true); + dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true, + tcrtc->dpi_output); tidss_crtc_position_planes(tidss, crtc, old_state, true); =20 /* Turn vertical blanking interrupt reporting on. */ @@ -417,7 +419,8 @@ static const struct drm_crtc_funcs tidss_crtc_funcs =3D= { =20 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, u32 hw_videoport, - struct drm_plane *primary) + struct drm_plane *primary, + bool dpi_output) { struct tidss_crtc *tcrtc; struct drm_crtc *crtc; @@ -430,6 +433,7 @@ struct tidss_crtc *tidss_crtc_create(struct tidss_devic= e *tidss, return ERR_PTR(-ENOMEM); =20 tcrtc->hw_videoport =3D hw_videoport; + tcrtc->dpi_output =3D dpi_output; init_completion(&tcrtc->framedone_completion); =20 crtc =3D &tcrtc->crtc; diff --git a/drivers/gpu/drm/tidss/tidss_crtc.h b/drivers/gpu/drm/tidss/tid= ss_crtc.h index 040d1205496b..65df220698f6 100644 --- a/drivers/gpu/drm/tidss/tidss_crtc.h +++ b/drivers/gpu/drm/tidss/tidss_crtc.h @@ -20,6 +20,7 @@ struct tidss_crtc { struct drm_crtc crtc; =20 u32 hw_videoport; + bool dpi_output; =20 struct drm_pending_vblank_event *event; =20 @@ -44,5 +45,6 @@ void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqs= tatus); =20 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, u32 hw_videoport, - struct drm_plane *primary); + struct drm_plane *primary, + bool dpi_output); #endif diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/ti= dss_dispc.c index 58d5eb033bdb..c21ac3f51720 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -448,6 +448,7 @@ static const u16 *dispc_common_regmap; =20 struct dss_vp_data { u32 *gamma_table; + bool dpi_output; }; =20 struct dispc_device { @@ -2770,8 +2771,10 @@ static void dispc_vp_set_color_mgmt(struct dispc_dev= ice *dispc, } =20 void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport, - const struct drm_crtc_state *state, bool newmodeset) + const struct drm_crtc_state *state, bool newmodeset, + bool dpi_output) { + dispc->vp_data[hw_videoport].dpi_output =3D dpi_output; dispc_vp_set_default_color(dispc, hw_videoport, 0); dispc_vp_set_color_mgmt(dispc, hw_videoport, state, newmodeset); } diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/ti= dss_dispc.h index 739d211d0018..6f53d554259c 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -131,7 +131,8 @@ void dispc_vp_disable_clk(struct dispc_device *dispc, u= 32 hw_videoport); int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport, unsigned long rate); void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport, - const struct drm_crtc_state *state, bool newmodeset); + const struct drm_crtc_state *state, bool newmodeset, + bool dpi_output); =20 int dispc_runtime_suspend(struct dispc_device *dispc); int dispc_runtime_resume(struct dispc_device *dispc); diff --git a/drivers/gpu/drm/tidss/tidss_kms.c b/drivers/gpu/drm/tidss/tids= s_kms.c index 8bb93194e5ac..bc8b10af9a48 100644 --- a/drivers/gpu/drm/tidss/tidss_kms.c +++ b/drivers/gpu/drm/tidss/tidss_kms.c @@ -122,6 +122,50 @@ static const struct drm_mode_config_funcs mode_config_= funcs =3D { .atomic_commit =3D drm_atomic_helper_commit, }; =20 +static const char * const tidss_internal_bridge_compatibles[] =3D { + "ti,j721e-dsi", +}; + +/* + * Detect whether the bridge is internal to the SoC or not. This is needed + * to find out whether we are using DPI output (thus no internal bridge). + * We detect this via two means: + * - If the bridge's of_node has a compatible, compare to known internal v= alues. + * - If the bridge is a grand-child of DSS, and has "oldi-transmitters" pa= rent. + */ +static bool tidss_is_bridge_internal(struct tidss_device *tidss, + struct drm_bridge *bridge) +{ + struct device_node *parent, *grand_parent; + struct property *prop; + bool is_internal; + + if (WARN_ON(!bridge->of_node)) + return false; + + prop =3D of_find_property(bridge->of_node, "compatible", NULL); + for (const char *cp =3D of_prop_next_string(prop, NULL); cp; + cp =3D of_prop_next_string(prop, cp)) { + for (unsigned int i =3D 0; + i < ARRAY_SIZE(tidss_internal_bridge_compatibles); ++i) { + if (strcmp(cp, tidss_internal_bridge_compatibles[i]) =3D=3D 0) + return true; + } + } + + parent =3D of_get_parent(bridge->of_node); + grand_parent =3D of_get_parent(parent); + + is_internal =3D parent && grand_parent && + tidss->dev->of_node =3D=3D grand_parent && + of_node_name_eq(parent, "oldi-transmitters"); + + of_node_put(grand_parent); + of_node_put(parent); + + return is_internal; +} + static int tidss_dispc_modeset_init(struct tidss_device *tidss) { struct device *dev =3D tidss->dev; @@ -133,6 +177,7 @@ static int tidss_dispc_modeset_init(struct tidss_device= *tidss) u32 hw_videoport; struct drm_bridge *bridge; u32 enc_type; + bool dpi_output; }; =20 const struct dispc_features *feat =3D tidss->feat; @@ -149,6 +194,7 @@ static int tidss_dispc_modeset_init(struct tidss_device= *tidss) struct drm_panel *panel; struct drm_bridge *bridge; u32 enc_type =3D DRM_MODE_ENCODER_NONE; + bool dpi_output; int ret; =20 ret =3D drm_of_find_panel_or_bridge(dev->of_node, i, 0, @@ -160,6 +206,11 @@ static int tidss_dispc_modeset_init(struct tidss_devic= e *tidss) return dev_err_probe(dev, ret, "port %d probe failed\n", i); } =20 + if (bridge) + dpi_output =3D !tidss_is_bridge_internal(tidss, bridge); + else + dpi_output =3D true; + if (panel) { u32 conn_type; =20 @@ -199,6 +250,7 @@ static int tidss_dispc_modeset_init(struct tidss_device= *tidss) pipes[num_pipes].hw_videoport =3D i; pipes[num_pipes].bridge =3D bridge; pipes[num_pipes].enc_type =3D enc_type; + pipes[num_pipes].dpi_output =3D dpi_output; num_pipes++; } =20 @@ -224,7 +276,8 @@ static int tidss_dispc_modeset_init(struct tidss_device= *tidss) tidss->planes[tidss->num_planes++] =3D &tplane->plane; =20 tcrtc =3D tidss_crtc_create(tidss, pipes[i].hw_videoport, - &tplane->plane); + &tplane->plane, + pipes[i].dpi_output); if (IS_ERR(tcrtc)) { dev_err(tidss->dev, "crtc create failed\n"); return PTR_ERR(tcrtc); --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B6573A2561; Mon, 20 Apr 2026 12:54:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776689690; 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spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="rPUMCUty" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id AA8363836; Mon, 20 Apr 2026 14:53:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1776689587; bh=eECXnZn8vnRWVId75kkhXIP55XTyydw1o/Xi8IowENA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=rPUMCUtyjG5UVWO6zcGn4+JbcJzemkYSikQmCf6EUWZf95KpRmQocmPV5YxM3jVtP 0bO3d2mcHx75Ptn45m56jqMvFGiAr5BKHW1+uz+f1wFdXCO3K2r/ENbMChEs/KP0pp +9Ep6cAcYcplCRBbI8MY42/evIkLRr6leRh4otLc= From: Tomi Valkeinen Date: Mon, 20 Apr 2026 15:54:16 +0300 Subject: [PATCH 09/15] drm/tidss: Add external data and sync signal edge configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260420-beagley-ai-display-v1-9-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> In-Reply-To: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=3289; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=eECXnZn8vnRWVId75kkhXIP55XTyydw1o/Xi8IowENA=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBp5iIGgWMuo21BHn03Y0oLtgs9TLh/AJ97JqgUH Y0YFJGj2BqJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaeYiBgAKCRD6PaqMvJYe 9ZMSD/0f6Goa7w7n0Og5IkTlnxiXQEFmCIPd3kXeBkIT6Zo6noFeKY8v5cLeo+iispAQP6Fti89 wYhEe6l7OxOJL27px9Op1xtn5mX1IfAADJRBj6PlAPQKXwie51RjChtJh/KDLTNmUJVondV5Ftg r/oEg7SvV69ySu36r/CzIJiiAoIgCAh2lKiGn4lREqRcvclsez+KVa0teeYOmstkfNGBrQKrbXW p6RJq4OK0Vi5vPRRD2ET9Ti8HHT3gPTcGc+6H5JJoF/eQrw9kemXtPpsogs3c+8r33gAT6/hwPD pCjPuk9DzvAKa7Dbm87BWdXl4dW1sawsr2J9TWAswvip0zsaL3QMXWh9GLvRtClwBrWyu6SiNIL AAK69QzEGQgbBXQfFawD7sSXucUMiSvB1NsJw/9fhII+nDcS3FPrWARTj2Q5qU5jUVtboUyXfl4 rQwTo6WbkKahSGU6cO4KbgeTNPPDL2QepeDQoD/0SrXaO4lKXFlYwerL1psQVW3DU1R/nkkiP1e zGnm5RC180WPe+YIRX3Qf+tFs+qAZcKfxRhPWV96mipcEkblQrJfQFSHOSL6iOHQ4l41kGgCNrY YXHZ28u8OhOjL77/6dpFB/taB9Y+y1JNF+/ysVCSrmJiKwhWtscNbrZU36Y6LsMCrJWiHqnrxCK 8kA//2337ZRlL8g== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 The DPI output pipeline in K3 SoCs contains the display subsystem (DSS) which produces the in-SoC parallel video signal, and a DPI block which adjusts the signal to the external MIPI DPI output. The DSS IP has registers to configure whether the data and sync signals are driven on rising or falling clock edge, and on some SoCs these are automatically conveyed to the DPI block which needs that configuration to properly output the MIPI DPI signal. However, on some SoCs the DPI block configuration has to be done manually, using an extra register outside the DSS, DPI0_CLK_CTRL from MAIN_CTRL_MMR_CFG0 block, which controls the DPI block's behavior. The register is exposed to DSS via syscon 'ti,dpi-io-ctrl' node. Add the support to get the regmap to the register, and configure the bits before enabling the video output. Original patch from Louis Chauvet Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- drivers/gpu/drm/tidss/tidss_dispc.c | 18 ++++++++++++++++++ drivers/gpu/drm/tidss/tidss_dispc_regs.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/ti= dss_dispc.c index c21ac3f51720..0f68e60b902b 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -467,6 +467,7 @@ struct dispc_device { const struct dispc_features *feat; =20 struct clk *fclk; + struct regmap *syscon_dpi_io_ctrl; =20 bool is_enabled; =20 @@ -1201,6 +1202,12 @@ void dispc_vp_prepare(struct dispc_device *dispc, u3= 2 hw_videoport, mode->crtc_hdisplay - 1) | FIELD_PREP(DISPC_VP_SIZE_SCREEN_VDISPLAY_MASK, mode->crtc_vdisplay - 1)); + + if (dispc->vp_data[hw_videoport].dpi_output && dispc->syscon_dpi_io_ctrl)= { + regmap_write(dispc->syscon_dpi_io_ctrl, 0x0, + (!ipc ? DPI0_CLK_CTRL_DATA_CLK_INVDIS : 0) | + (rf ? DPI0_CLK_CTRL_SYNC_CLK_INVDIS : 0)); + } } =20 void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport) @@ -2989,6 +2996,17 @@ int dispc_init(struct tidss_device *tidss) =20 dispc_init_errata(dispc); =20 + dispc->syscon_dpi_io_ctrl =3D syscon_regmap_lookup_by_compatible("ti,am62= 5-dss-dpi0-clk-ctrl"); + if (IS_ERR(dispc->syscon_dpi_io_ctrl)) { + if (PTR_ERR(dispc->syscon_dpi_io_ctrl) !=3D -ENODEV) { + r =3D dev_err_probe(dispc->dev, PTR_ERR(dispc->syscon_dpi_io_ctrl), + "DISPC: syscon_regmap_lookup_by_phandle failed.\n"); + return r; + } + + dispc->syscon_dpi_io_ctrl =3D NULL; + } + dispc->fourccs =3D devm_kcalloc(dev, ARRAY_SIZE(dispc_color_formats), sizeof(*dispc->fourccs), GFP_KERNEL); if (!dispc->fourccs) diff --git a/drivers/gpu/drm/tidss/tidss_dispc_regs.h b/drivers/gpu/drm/tid= ss/tidss_dispc_regs.h index 382027dddce8..4cdde24d8372 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc_regs.h +++ b/drivers/gpu/drm/tidss/tidss_dispc_regs.h @@ -333,4 +333,8 @@ enum oldi_mode_reg_val { SPWG_18 =3D 0, JEIDA_24 =3D 1,= SPWG_24 =3D 2 }; =20 #define AM65X_OLDI_PWRDN_TX BIT(8) =20 +/* Bits in the MAIN_CTRL_MMR_CFG0_DPI0_CLK_CTRL register */ +#define DPI0_CLK_CTRL_DATA_CLK_INVDIS BIT(8) +#define DPI0_CLK_CTRL_SYNC_CLK_INVDIS BIT(9) + #endif /* __TIDSS_DISPC_REGS_H */ --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F1773A3818; Mon, 20 Apr 2026 12:54:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776689691; cv=none; b=btT+iDh/U0cflyol2xKzqLBJkj0vGfnLNEVi9bfmjcuM90EeDO60XI7xfvi+wmn/7DctPJBLen+9A1rmf5DXAIx4Udh7gtu9ZCxuR4ETgsgkPcTShI/PSOiLTMwoWuGOzuT47hRE3I5WgcT60pRzpyocEYg4Yr6mtm3Ap1r+vIE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Mon, 20 Apr 2026 14:53:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1776689588; bh=Og00WFj4OSyuhCTIsPmNlOJpuOxWVUShYLBe9vNBgZY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=I5zzBfavt/tVvsu3ljmY1RpIzwLvyb0Bci4E+6uP6IBvvRf3nJnMA3tY0cPU4OWD4 onf9YVzcxJ+R7cPyf7DTbVkBIHJeG4/y/mbBke/jePxCdYAaprJyBCLlutwBOOu0/R urdTVEa3w+MJcI/q6lqbsFo1PulHRYBdoww5lL1k= From: Tomi Valkeinen Date: Mon, 20 Apr 2026 15:54:17 +0300 Subject: [PATCH 10/15] drm/tidss: Add support for DPIENABLE bit Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260420-beagley-ai-display-v1-10-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> In-Reply-To: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Many (or even all?) K3 SoCs have DSS VP_CONTROL.DPIENABLE bit described in their documentation. This bit controls whether the DPI block is enabled, and is set to 1 by default (i.e. DPI is enabled at HW reset). However, in almost all SoCs the setting does not actually do anything, and at the moment the bit is not managed by the driver. The exception is AM62L, which does have DPIENABLE connected, and disabling the DPI block when it is not in use provides power savings. Let's add a new feature flag for this, 'has_vp_control_dpienable', and implement the support. Disable DPIENABLE for all videoports at resume time, so that it is 0 by default. Specifically enable and disable it in dispc_vp_enable() and dispc_vp_disable() for DPI output. Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- drivers/gpu/drm/tidss/tidss_dispc.c | 23 +++++++++++++++++++++-- drivers/gpu/drm/tidss/tidss_dispc.h | 2 ++ drivers/gpu/drm/tidss/tidss_dispc_regs.h | 1 + 3 files changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/ti= dss_dispc.c index 0f68e60b902b..9edce4a4873a 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -442,6 +442,8 @@ const struct dispc_features dispc_am62l_feats =3D { }, =20 .vid_order =3D {0}, + + .has_vp_control_dpienable =3D true, }; =20 static const u16 *dispc_common_regmap; @@ -1212,6 +1214,11 @@ void dispc_vp_prepare(struct dispc_device *dispc, u3= 2 hw_videoport, =20 void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport) { + if (dispc->feat->has_vp_control_dpienable && + dispc->vp_data[hw_videoport].dpi_output) + VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, + DISPC_VP_CONTROL_DPIENABLE_MASK); + VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, DISPC_VP_CONTROL_ENABLE_MASK); } @@ -1220,6 +1227,11 @@ void dispc_vp_disable(struct dispc_device *dispc, u3= 2 hw_videoport) { VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 0, DISPC_VP_CONTROL_ENABLE_MASK); + + if (dispc->feat->has_vp_control_dpienable && + dispc->vp_data[hw_videoport].dpi_output) + VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 0, + DISPC_VP_CONTROL_DPIENABLE_MASK); } =20 void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport) @@ -2443,10 +2455,17 @@ static void dispc_vp_init(struct dispc_device *disp= c) =20 dev_dbg(dispc->dev, "%s()\n", __func__); =20 - /* Enable the gamma Shadow bit-field for all VPs*/ - for (i =3D 0; i < dispc->feat->num_vps; i++) + for (i =3D 0; i < dispc->feat->num_vps; i++) { + /* Enable the gamma Shadow bit-field for all VPs*/ VP_REG_FLD_MOD(dispc, i, DISPC_VP_CONFIG, 1, DISPC_VP_CONFIG_GAMMAENABLE_MASK); + + if (dispc->feat->has_vp_control_dpienable) { + /* Disable DPIENABLE for all VPs */ + VP_REG_FLD_MOD(dispc, i, DISPC_VP_CONTROL, 0, + DISPC_VP_CONTROL_DPIENABLE_MASK); + } + } } =20 static void dispc_initial_config(struct dispc_device *dispc) diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/ti= dss_dispc.h index 6f53d554259c..0fbfb86adfbf 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -92,6 +92,8 @@ struct dispc_features { u32 num_vids; struct dispc_vid_info vid_info[TIDSS_MAX_PLANES]; u32 vid_order[TIDSS_MAX_PLANES]; + /* The DSS has VP_CONTROL.DPIENABLE bit */ + bool has_vp_control_dpienable; }; =20 extern const struct dispc_features dispc_k2g_feats; diff --git a/drivers/gpu/drm/tidss/tidss_dispc_regs.h b/drivers/gpu/drm/tid= ss/tidss_dispc_regs.h index 4cdde24d8372..4246c72efdd5 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc_regs.h +++ b/drivers/gpu/drm/tidss/tidss_dispc_regs.h @@ -230,6 +230,7 @@ enum dispc_common_regs { =20 #define DISPC_VP_CONTROL 0x4 #define DISPC_VP_CONTROL_DATALINES_MASK GENMASK(10, 8) +#define DISPC_VP_CONTROL_DPIENABLE_MASK GENMASK(6, 6) #define DISPC_VP_CONTROL_GOBIT_MASK GENMASK(5, 5) #define DISPC_VP_CONTROL_ENABLE_MASK GENMASK(0, 0) =20 --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 214743A0EB1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 OLDI has a few issues with how it handles the signal polarities: - It always sets OLDI_DEPOL, which means DE active low - It sets DRM_BUS_FLAG_DE_HIGH in struct drm_bridge_timings, i.e. reverse to the OLDI_DEPOL - It sets DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE in struct drm_bridge_timings, but the TRM says "The DSS interface is clocked on the rising edge of OLDI_FWD_P_CLK pixel clock", which I read as "OLDI samples on rising edge". - But the defined drm_bridge_timings is not actually used anywhere, even if it is set to bridge->timings, so the bus flags are just ignored. However, based on my testing, OLDI_DEPOL bit or the edge on which data and syncs are driven doesn't seem to affect the OLDI output. Possibly it's not as robust, but I did not see any effect with an oscilloscope. However, the code is still quite broken, so let's fix it: - Remove drm_bridge_timings - Set the correct input_bus_cfg.flags in tidss_oldi_atomic_check() - Set OLDI_DEPOL based on the DE bus flag Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- drivers/gpu/drm/tidss/tidss_oldi.c | 38 ++++++++++++++++++++++++++++------= ---- 1 file changed, 28 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_oldi.c b/drivers/gpu/drm/tidss/tid= ss_oldi.c index 17c535bfa057..e925ddaa4fd6 100644 --- a/drivers/gpu/drm/tidss/tidss_oldi.c +++ b/drivers/gpu/drm/tidss/tidss_oldi.c @@ -164,7 +164,8 @@ static void tidss_oldi_tx_power(struct tidss_oldi *oldi= , bool enable) regmap_update_bits(oldi->io_ctrl, OLDI_PD_CTRL, mask, enable ? 0 : mask); } =20 -static int tidss_oldi_config(struct tidss_oldi *oldi) +static int tidss_oldi_config(struct tidss_oldi *oldi, + struct drm_bridge_state *bridge_state) { const struct oldi_bus_format *bus_fmt =3D NULL; u32 oldi_cfg =3D 0; @@ -183,7 +184,8 @@ static int tidss_oldi_config(struct tidss_oldi *oldi) "OLDI%u: DSS port width %d not supported\n", oldi->oldi_instance, bus_fmt->data_width); =20 - oldi_cfg |=3D OLDI_DEPOL; + if (bridge_state->input_bus_cfg.flags & DRM_BUS_FLAG_DE_LOW) + oldi_cfg |=3D OLDI_DEPOL; /* 1 =3D active low */ =20 oldi_cfg =3D (oldi_cfg & (~OLDI_MAP)) | (bus_fmt->oldi_mode_reg_val << 1); =20 @@ -220,6 +222,22 @@ static int tidss_oldi_config(struct tidss_oldi *oldi) return ret; } =20 +static int tidss_oldi_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + bridge_state->input_bus_cfg.flags &=3D + ~(DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE | + DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE); + + bridge_state->input_bus_cfg.flags |=3D + DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE | + DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE; + + return 0; +} + static void tidss_oldi_atomic_pre_enable(struct drm_bridge *bridge, struct drm_atomic_state *state) { @@ -228,6 +246,7 @@ static void tidss_oldi_atomic_pre_enable(struct drm_bri= dge *bridge, struct drm_connector_state *conn_state; struct drm_crtc_state *crtc_state; struct drm_display_mode *mode; + struct drm_bridge_state *bridge_state; =20 if (oldi->link_type =3D=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) return; @@ -245,10 +264,14 @@ static void tidss_oldi_atomic_pre_enable(struct drm_b= ridge *bridge, if (WARN_ON(!crtc_state)) return; =20 + bridge_state =3D drm_atomic_get_new_bridge_state(state, bridge); + if (WARN_ON(!bridge_state)) + return; + mode =3D &crtc_state->adjusted_mode; =20 /* Configure the OLDI params*/ - tidss_oldi_config(oldi); + tidss_oldi_config(oldi, bridge_state); =20 /* Set the OLDI serial clock (7 times the pixel clock) */ tidss_oldi_set_serial_clk(oldi, mode->clock * 7 * 1000); @@ -329,7 +352,8 @@ tidss_oldi_mode_valid(struct drm_bridge *bridge, } =20 static const struct drm_bridge_funcs tidss_oldi_bridge_funcs =3D { - .attach =3D tidss_oldi_bridge_attach, + .attach =3D tidss_oldi_bridge_attach, + .atomic_check =3D tidss_oldi_atomic_check, .atomic_pre_enable =3D tidss_oldi_atomic_pre_enable, .atomic_post_disable =3D tidss_oldi_atomic_post_disable, .atomic_get_input_bus_fmts =3D tidss_oldi_atomic_get_input_bus_fmts, @@ -440,11 +464,6 @@ static int get_parent_dss_vp(struct device_node *oldi_= tx, u32 *parent_vp) return -ENODEV; } =20 -static const struct drm_bridge_timings default_tidss_oldi_timings =3D { - .input_bus_flags =3D DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE - | DRM_BUS_FLAG_DE_HIGH, -}; - void tidss_oldi_deinit(struct tidss_device *tidss) { for (int i =3D 0; i < tidss->num_oldis; i++) { @@ -598,7 +617,6 @@ int tidss_oldi_init(struct tidss_device *tidss) /* Register the bridge. */ oldi->bridge.of_node =3D child; oldi->bridge.driver_private =3D oldi; - oldi->bridge.timings =3D &default_tidss_oldi_timings; =20 tidss->oldis[tidss->num_oldis++] =3D oldi; tidss->is_ext_vp_clk[oldi->parent_vp] =3D true; --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A9CC3A3E7F; Mon, 20 Apr 2026 12:54:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; 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dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="sksCfAJv" Received: from [127.0.1.1] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 23708387C; Mon, 20 Apr 2026 14:53:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1776689591; bh=FJ3l/T1wkJyM6HbR8N3kJZPSeyuKzaZ1+AGIzNt5IZQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=sksCfAJvFRXRnzcMszTenwqWT7wo1oA1kKtjpODNAcEF145tiBtkRf+AjQ7wKoAOo 3vVlT4CzAYJMLUHJq0dKT9z0UckkhuA+aFm1QKC0L/aVGkiR4ZsRv6SOyrL0k1ZW9a Dk8omFVEEn9s+Phx1C3fylP33KJbs6Uf+WJheRc0= From: Tomi Valkeinen Date: Mon, 20 Apr 2026 15:54:19 +0300 Subject: [PATCH 12/15] drm/tidss: oldi: Convert OLDI to an aux driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Currently in the DT, OLDI is defined in child nodes under the DSS node. The tidss driver will parse the DT, and create DRM bridges for the OLDIs, and there are no Linux devices for the OLDIs. On new SoCs the OLDIs have their own power-domains which we need to control. The cleanest way to do this in DT is to add the PDs to the OLDI nodes. But this means the OLDI bridge code would somehow have to manually manage the PDs, the PDs not being under a Linux device, and there isn't much support for that kind of setup in the PD framework. A solution to this is to convert the OLDI to an auxiliary device/driver, created by tidss: - At module load time the tidss module will, in addition to registering the tidss DRM driver, register an oldi auxiliary driver. - At probe time tidss will parse the DT, and create an auxiliary device for each OLDI. The aux driver will probe, and as its of_node points to the OLDI node containing the PD, the driver framework will take care of enabling and disabling the PD when OLDI is used ("used" as in pm_runtime context). Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- drivers/gpu/drm/tidss/tidss_drv.c | 51 +++- drivers/gpu/drm/tidss/tidss_drv.h | 5 +- drivers/gpu/drm/tidss/tidss_oldi.c | 493 ++++++++++++++++++++++++++-------= ---- drivers/gpu/drm/tidss/tidss_oldi.h | 7 +- 4 files changed, 400 insertions(+), 156 deletions(-) diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tids= s_drv.c index 5cb3e746aeb3..aef945101be4 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -133,10 +133,6 @@ static int tidss_probe(struct platform_device *pdev) return ret; } =20 - ret =3D tidss_oldi_init(tidss); - if (ret) - return dev_err_probe(dev, ret, "failed to init OLDI\n"); - pm_runtime_enable(dev); =20 pm_runtime_set_autosuspend_delay(dev, 1000); @@ -147,24 +143,30 @@ static int tidss_probe(struct platform_device *pdev) dispc_runtime_resume(tidss->dispc); #endif =20 + ret =3D tidss_oldi_create_devices(tidss); + if (ret) { + dev_err_probe(dev, ret, "failed to create OLDI devices\n"); + goto err_runtime_suspend; + } + ret =3D tidss_modeset_init(tidss); if (ret < 0) { if (ret !=3D -EPROBE_DEFER) dev_err(dev, "failed to init DRM/KMS (%d)\n", ret); - goto err_runtime_suspend; + goto err_destroy_oldis; } =20 irq =3D platform_get_irq(pdev, 0); if (irq < 0) { ret =3D irq; - goto err_runtime_suspend; + goto err_destroy_oldis; } tidss->irq =3D irq; =20 ret =3D tidss_irq_install(ddev, irq); if (ret) { dev_err(dev, "tidss_irq_install failed: %d\n", ret); - goto err_runtime_suspend; + goto err_destroy_oldis; } =20 drm_kms_helper_poll_init(ddev); @@ -194,6 +196,9 @@ static int tidss_probe(struct platform_device *pdev) err_irq_uninstall: tidss_irq_uninstall(ddev); =20 +err_destroy_oldis: + tidss_oldi_destroy_devices(tidss); + err_runtime_suspend: #ifndef CONFIG_PM dispc_runtime_suspend(tidss->dispc); @@ -201,8 +206,6 @@ static int tidss_probe(struct platform_device *pdev) pm_runtime_dont_use_autosuspend(dev); pm_runtime_disable(dev); =20 - tidss_oldi_deinit(tidss); - return ret; } =20 @@ -218,6 +221,8 @@ static void tidss_remove(struct platform_device *pdev) =20 tidss_irq_uninstall(ddev); =20 + tidss_oldi_destroy_devices(tidss); + #ifndef CONFIG_PM /* If we don't have PM, we need to call suspend manually */ dispc_runtime_suspend(tidss->dispc); @@ -225,8 +230,6 @@ static void tidss_remove(struct platform_device *pdev) pm_runtime_dont_use_autosuspend(dev); pm_runtime_disable(dev); =20 - tidss_oldi_deinit(tidss); - /* devm allocated dispc goes away with the dev so mark it NULL */ dispc_remove(tidss); =20 @@ -262,7 +265,31 @@ static struct platform_driver tidss_platform_driver = =3D { }, }; =20 -drm_module_platform_driver(tidss_platform_driver); +static int __init tidss_platform_driver_init(void) +{ + int ret; + + ret =3D tidss_oldi_register_driver(); + if (ret) + return ret; + + ret =3D drm_platform_driver_register(&tidss_platform_driver); + if (ret) { + tidss_oldi_unregister_driver(); + return ret; + } + + return 0; +} +module_init(tidss_platform_driver_init); + +static void __exit tidss_platform_driver_exit(void) +{ + platform_driver_unregister(&tidss_platform_driver); + tidss_oldi_unregister_driver(); +} +module_exit(tidss_platform_driver_exit); + =20 MODULE_AUTHOR("Tomi Valkeinen "); MODULE_DESCRIPTION("TI Keystone DSS Driver"); diff --git a/drivers/gpu/drm/tidss/tidss_drv.h b/drivers/gpu/drm/tidss/tids= s_drv.h index e1c1f41d8b4b..d3dba639b278 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.h +++ b/drivers/gpu/drm/tidss/tidss_drv.h @@ -16,7 +16,8 @@ #define TIDSS_MAX_OLDI_TXES 2 =20 typedef u32 dispc_irq_t; -struct tidss_oldi; + +struct auxiliary_device; =20 struct tidss_device { struct drm_device ddev; /* DRM device for DSS */ @@ -34,7 +35,7 @@ struct tidss_device { struct drm_plane *planes[TIDSS_MAX_PLANES]; =20 unsigned int num_oldis; - struct tidss_oldi *oldis[TIDSS_MAX_OLDI_TXES]; + struct auxiliary_device *oldis[TIDSS_MAX_OLDI_TXES]; =20 unsigned int irq; =20 diff --git a/drivers/gpu/drm/tidss/tidss_oldi.c b/drivers/gpu/drm/tidss/tid= ss_oldi.c index e925ddaa4fd6..86a1e029fdb1 100644 --- a/drivers/gpu/drm/tidss/tidss_oldi.c +++ b/drivers/gpu/drm/tidss/tidss_oldi.c @@ -5,11 +5,13 @@ * Aradhya Bhatia */ =20 +#include #include #include #include #include #include +#include #include =20 #include @@ -20,6 +22,12 @@ #include "tidss_dispc_regs.h" #include "tidss_oldi.h" =20 +static DEFINE_IDA(tidss_oldi_ida); + +struct tidss_oldi_platform_data { + struct tidss_device *tidss; +}; + struct tidss_oldi { struct tidss_device *tidss; struct device *dev; @@ -251,6 +259,8 @@ static void tidss_oldi_atomic_pre_enable(struct drm_bri= dge *bridge, if (oldi->link_type =3D=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) return; =20 + WARN_ON(pm_runtime_get_sync(oldi->dev)); + connector =3D drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); if (WARN_ON(!connector)) @@ -296,6 +306,8 @@ static void tidss_oldi_atomic_post_disable(struct drm_b= ridge *bridge, =20 /* Clear OLDI Config */ tidss_disable_oldi(oldi->tidss, oldi->parent_vp); + + pm_runtime_put_autosuspend(oldi->dev); } =20 #define MAX_INPUT_SEL_FORMATS 1 @@ -464,174 +476,375 @@ static int get_parent_dss_vp(struct device_node *ol= di_tx, u32 *parent_vp) return -ENODEV; } =20 -void tidss_oldi_deinit(struct tidss_device *tidss) -{ - for (int i =3D 0; i < tidss->num_oldis; i++) { - if (tidss->oldis[i]) { - drm_bridge_remove(&tidss->oldis[i]->bridge); - tidss->is_ext_vp_clk[tidss->oldis[i]->parent_vp] =3D false; - tidss->oldis[i] =3D NULL; - } - } -} - -int tidss_oldi_init(struct tidss_device *tidss) +static int tidss_oldi_probe(struct auxiliary_device *auxdev, + const struct auxiliary_device_id *id) { - struct tidss_oldi *oldi; - struct device_node *child; - struct drm_bridge *bridge; - u32 parent_vp, oldi_instance; - int companion_instance =3D -1; + struct device *dev =3D &auxdev->dev; + struct tidss_oldi_platform_data *oldi_pdata =3D dev_get_platdata(dev); + struct tidss_device *tidss =3D oldi_pdata->tidss; + struct device_node *node =3D auxdev->dev.of_node; enum tidss_oldi_link_type link_type =3D OLDI_MODE_UNSUPPORTED; - struct device_node *oldi_parent; - int ret =3D 0; - - tidss->num_oldis =3D 0; + int companion_instance =3D -1; + struct drm_bridge *bridge; + struct device_link *link; + struct tidss_oldi *oldi; + u32 oldi_instance; + u32 parent_vp; + int ret; =20 - oldi_parent =3D of_get_child_by_name(tidss->dev->of_node, "oldi-transmitt= ers"); - if (!oldi_parent) - /* Return gracefully */ - return 0; + ret =3D of_property_read_u32(node, "reg", &oldi_instance); + if (ret) + return ret; =20 - for_each_available_child_of_node(oldi_parent, child) { - ret =3D get_parent_dss_vp(child, &parent_vp); - if (ret) { - if (ret =3D=3D -ENODEV) { - /* - * ENODEV means that this particular OLDI node - * is not connected with the DSS, which is not - * a harmful case. There could be another OLDI - * which may still be connected. - * Continue to search for that. - */ - continue; - } - goto err_put_node; - } + ret =3D get_parent_dss_vp(node, &parent_vp); + if (ret) + return ret; =20 - ret =3D of_property_read_u32(child, "reg", &oldi_instance); - if (ret) - goto err_put_node; + /* + * Now that it's confirmed that OLDI is connected with DSS, + * let's continue getting the OLDI sinks ahead and other OLDI + * properties. + */ + bridge =3D devm_drm_of_get_bridge(dev, node, OLDI_OUTPUT_PORT, 0); + if (IS_ERR(bridge)) { + /* + * Either there was no OLDI sink in the devicetree, or the OLDI + * sink has not been added yet. In any case, return. + */ + ret =3D dev_err_probe(dev, PTR_ERR(bridge), + "no panel/bridge for OLDI%u.\n", + oldi_instance); + goto err_put_node; + } =20 + link_type =3D get_oldi_mode(node, &companion_instance); + if (link_type =3D=3D OLDI_MODE_UNSUPPORTED) { + ret =3D dev_err_probe(dev, -EINVAL, + "OLDI%u: Unsupported OLDI connection.\n", + oldi_instance); + goto err_put_node; + } else if ((link_type =3D=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) || + (link_type =3D=3D OLDI_MODE_CLONE_SINGLE_LINK)) { /* - * Now that it's confirmed that OLDI is connected with DSS, - * let's continue getting the OLDI sinks ahead and other OLDI - * properties. + * The OLDI driver cannot support OLDI clone mode properly at + * present. The clone mode requires 2 working encoder-bridge + * pipelines, generating from the same crtc. The DRM framework + * does not support this at present. If there were to be, say, 2 + * OLDI sink bridges each connected to an OLDI TXes, they + * couldn't both be supported simultaneously. This driver still + * has some code pertaining to OLDI clone mode configuration in + * DSS hardware for future, when there is a better + * infrastructure in the DRM framework to support 2 + * encoder-bridge pipelines simultaneously. Till that time, this + * driver shall error out if it detects a clone mode + * configuration. */ - bridge =3D devm_drm_of_get_bridge(tidss->dev, child, - OLDI_OUTPUT_PORT, 0); - if (IS_ERR(bridge)) { - /* - * Either there was no OLDI sink in the devicetree, or - * the OLDI sink has not been added yet. In any case, - * return. - * We don't want to have an OLDI node connected to DSS - * but not to any sink. - */ - ret =3D dev_err_probe(tidss->dev, PTR_ERR(bridge), - "no panel/bridge for OLDI%u.\n", + ret =3D dev_err_probe(dev, -EOPNOTSUPP, + "The OLDI driver does not support Clone Mode at present.\n"); + goto err_put_node; + } + + oldi =3D devm_drm_bridge_alloc(dev, struct tidss_oldi, bridge, + &tidss_oldi_bridge_funcs); + if (IS_ERR(oldi)) { + ret =3D PTR_ERR(oldi); + goto err_put_node; + } + + oldi->parent_vp =3D parent_vp; + oldi->oldi_instance =3D oldi_instance; + oldi->companion_instance =3D companion_instance; + oldi->link_type =3D link_type; + oldi->dev =3D dev; + oldi->next_bridge =3D bridge; + oldi->tidss =3D tidss; + + auxiliary_set_drvdata(auxdev, oldi); + + /* + * Only the primary OLDI needs to reference the io-ctrl system + * registers, and the serial clock. + * We don't require a check for secondary OLDI in dual-link mode + * because the driver will not create a drm_bridge instance. + * But the driver will need to create a drm_bridge instance, + * for secondary OLDI in clone mode (once it is supported). + */ + if (link_type !=3D OLDI_MODE_SECONDARY_DUAL_LINK && + link_type !=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) { + oldi->io_ctrl =3D syscon_regmap_lookup_by_phandle(node, + "ti,oldi-io-ctrl"); + if (IS_ERR(oldi->io_ctrl)) { + ret =3D dev_err_probe(oldi->dev, PTR_ERR(oldi->io_ctrl), + "OLDI%u: syscon_regmap_lookup_by_phandle failed.\n", oldi_instance); goto err_put_node; } =20 - link_type =3D get_oldi_mode(child, &companion_instance); - if (link_type =3D=3D OLDI_MODE_UNSUPPORTED) { - ret =3D dev_err_probe(tidss->dev, -EINVAL, - "OLDI%u: Unsupported OLDI connection.\n", + oldi->serial =3D of_clk_get_by_name(node, "serial"); + if (IS_ERR(oldi->serial)) { + ret =3D dev_err_probe(oldi->dev, PTR_ERR(oldi->serial), + "OLDI%u: Failed to get serial clock.\n", oldi_instance); goto err_put_node; - } else if ((link_type =3D=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) || - (link_type =3D=3D OLDI_MODE_CLONE_SINGLE_LINK)) { - /* - * The OLDI driver cannot support OLDI clone mode - * properly at present. - * The clone mode requires 2 working encoder-bridge - * pipelines, generating from the same crtc. The DRM - * framework does not support this at present. If - * there were to be, say, 2 OLDI sink bridges each - * connected to an OLDI TXes, they couldn't both be - * supported simultaneously. - * This driver still has some code pertaining to OLDI - * clone mode configuration in DSS hardware for future, - * when there is a better infrastructure in the DRM - * framework to support 2 encoder-bridge pipelines - * simultaneously. - * Till that time, this driver shall error out if it - * detects a clone mode configuration. - */ - ret =3D dev_err_probe(tidss->dev, -EOPNOTSUPP, - "The OLDI driver does not support Clone Mode at present.\n"); - goto err_put_node; - } else if (link_type =3D=3D OLDI_MODE_SECONDARY_DUAL_LINK) { - /* - * This is the secondary OLDI node, which serves as a - * companion to the primary OLDI, when it is configured - * for the dual-link mode. Since the primary OLDI will - * be a part of bridge chain, no need to put this one - * too. Continue onto the next OLDI node. - */ - continue; } + } =20 - oldi =3D devm_drm_bridge_alloc(tidss->dev, struct tidss_oldi, bridge, - &tidss_oldi_bridge_funcs); - if (IS_ERR(oldi)) { - ret =3D PTR_ERR(oldi); - goto err_put_node; - } + if (link_type !=3D OLDI_MODE_SECONDARY_DUAL_LINK) { + /* Register the bridge. */ + oldi->bridge.of_node =3D node; + oldi->bridge.driver_private =3D oldi; =20 - oldi->parent_vp =3D parent_vp; - oldi->oldi_instance =3D oldi_instance; - oldi->companion_instance =3D companion_instance; - oldi->link_type =3D link_type; - oldi->dev =3D tidss->dev; - oldi->next_bridge =3D bridge; + tidss->is_ext_vp_clk[oldi->parent_vp] =3D true; =20 - /* - * Only the primary OLDI needs to reference the io-ctrl system - * registers, and the serial clock. - * We don't require a check for secondary OLDI in dual-link mode - * because the driver will not create a drm_bridge instance. - * But the driver will need to create a drm_bridge instance, - * for secondary OLDI in clone mode (once it is supported). - */ - if (link_type !=3D OLDI_MODE_SECONDARY_CLONE_SINGLE_LINK) { - oldi->io_ctrl =3D syscon_regmap_lookup_by_phandle(child, - "ti,oldi-io-ctrl"); - if (IS_ERR(oldi->io_ctrl)) { - ret =3D dev_err_probe(oldi->dev, PTR_ERR(oldi->io_ctrl), - "OLDI%u: syscon_regmap_lookup_by_phandle failed.\n", - oldi_instance); - goto err_put_node; - } + drm_bridge_add(&oldi->bridge); + } + + link =3D device_link_add(&auxdev->dev, tidss->dev, + DL_FLAG_PM_RUNTIME | + DL_FLAG_AUTOREMOVE_CONSUMER); + if (!link) { + ret =3D -EINVAL; + goto err_bridge_remove; + } + + pm_runtime_enable(dev); + pm_runtime_set_autosuspend_delay(dev, 500); + pm_runtime_use_autosuspend(dev); + + return 0; + +err_bridge_remove: + if (link_type !=3D OLDI_MODE_SECONDARY_DUAL_LINK) { + drm_bridge_remove(&oldi->bridge); + tidss->is_ext_vp_clk[oldi->parent_vp] =3D false; + } + +err_put_node: + return ret; +} + +static void tidss_oldi_remove(struct auxiliary_device *auxdev) +{ + struct tidss_oldi *oldi =3D auxiliary_get_drvdata(auxdev); + struct tidss_device *tidss =3D oldi->tidss; + struct device *dev =3D &auxdev->dev; + + pm_runtime_dont_use_autosuspend(dev); + pm_runtime_disable(dev); + + if (oldi->link_type !=3D OLDI_MODE_SECONDARY_DUAL_LINK) { + drm_bridge_remove(&oldi->bridge); =20 - oldi->serial =3D of_clk_get_by_name(child, "serial"); - if (IS_ERR(oldi->serial)) { - ret =3D dev_err_probe(oldi->dev, PTR_ERR(oldi->serial), - "OLDI%u: Failed to get serial clock.\n", - oldi_instance); - goto err_put_node; + tidss->is_ext_vp_clk[oldi->parent_vp] =3D false; + } +} + +static const struct auxiliary_device_id tidss_oldi_aux_id_table[] =3D { + { .name =3D "tidss.oldi" }, + {} +}; + +static struct auxiliary_driver oldi_aux_driver =3D { + .name =3D "oldi", + .probe =3D tidss_oldi_probe, + .remove =3D tidss_oldi_remove, + .id_table =3D tidss_oldi_aux_id_table, +}; + +static void tidss_oldi_aux_device_release(struct device *dev) +{ + struct auxiliary_device *auxdev =3D to_auxiliary_dev(dev); + + ida_free(&tidss_oldi_ida, auxdev->id); + + of_node_put(auxdev->dev.of_node); + + kfree(auxdev->dev.platform_data); + kfree(auxdev); +} + +static struct auxiliary_device * +tidss_oldi_create_device(struct tidss_device *tidss, + struct device_node *oldi_tx) +{ + struct tidss_oldi_platform_data *oldi_pdata; + struct auxiliary_device *companion_auxdev; + struct auxiliary_device *auxdev; + u32 oldi_aux_id; + int ret; + + /* + * Allocate the ID first, so that we get a lower ID for the primary + * OLDI, instead of the companion grabbing it in the call below. Note + * that the ID allocated here often matches the OLDI hardware index, + * but not always. + * The OLDI hardware index cannot be used as an ID, as, say, OLDI 1 on + * two DSS instances would produce the exact same device name + * ("tidss.oldi.1"). + */ + ret =3D ida_alloc(&tidss_oldi_ida, GFP_KERNEL); + if (ret < 0) + return ERR_PTR(ret); + + oldi_aux_id =3D ret; + + companion_auxdev =3D NULL; + + /* + * If this is the primary OLDI and there is a companion, create the + * auxdev for the secondary OLDI first, as the secondary will act as + * a supplier for the primary OLDI. + */ + if (!of_property_read_bool(oldi_tx, "ti,secondary-oldi")) { + struct device_node *companion_node; + + companion_node =3D of_parse_phandle(oldi_tx, "ti,companion-oldi", 0); + if (companion_node) { + companion_auxdev =3D + tidss_oldi_create_device(tidss, companion_node); + + of_node_put(companion_node); + + if (IS_ERR(companion_auxdev)) { + dev_err(tidss->dev, + "Failed to create secondary oldi device\n"); + ret =3D PTR_ERR(companion_auxdev); + goto err_free_ida; } } + } =20 - /* Register the bridge. */ - oldi->bridge.of_node =3D child; - oldi->bridge.driver_private =3D oldi; + oldi_pdata =3D kzalloc_obj(*oldi_pdata); + if (!oldi_pdata) { + ret =3D -ENOMEM; + goto err_free_ida; + } =20 - tidss->oldis[tidss->num_oldis++] =3D oldi; - tidss->is_ext_vp_clk[oldi->parent_vp] =3D true; - oldi->tidss =3D tidss; + oldi_pdata->tidss =3D tidss; =20 - drm_bridge_add(&oldi->bridge); + auxdev =3D kzalloc_obj(*auxdev); + if (!auxdev) { + ret =3D -ENOMEM; + goto err_free_pdata; + } + + *auxdev =3D (struct auxiliary_device) { + .name =3D "oldi", + .id =3D oldi_aux_id, + .dev =3D { + .parent =3D tidss->dev, + .of_node =3D of_node_get(oldi_tx), + .release =3D tidss_oldi_aux_device_release, + .platform_data =3D oldi_pdata, + }, + }; + + ret =3D auxiliary_device_init(auxdev); + if (ret) { + dev_err(tidss->dev, "OLDI auxiliary_device_init failed: %d\n", + ret); + goto err_free_auxdev; + } + + /* + * Create a device-link between the primary and the secondary, so that + * the secondary will be powered on when the primary is used. + */ + if (companion_auxdev) { + struct device_link *link; + + link =3D device_link_add(&auxdev->dev, &companion_auxdev->dev, + DL_FLAG_PM_RUNTIME | + DL_FLAG_AUTOREMOVE_CONSUMER | + DL_FLAG_AUTOREMOVE_SUPPLIER); + if (!link) { + dev_err(tidss->dev, + "device_link_add failed between primary and secondary OLDI\n"); + ret =3D -EINVAL; + goto err_uninit_auxdev; + } + } + + ret =3D auxiliary_device_add(auxdev); + if (ret) { + dev_err(tidss->dev, "OLDI auxiliary_device_add failed: %d\n", + ret); + goto err_uninit_auxdev; } =20 - of_node_put(child); - of_node_put(oldi_parent); + tidss->oldis[tidss->num_oldis++] =3D auxdev; + + return auxdev; + +err_uninit_auxdev: + auxiliary_device_uninit(auxdev); + /* return here, as the rest are done in auxdev's release */ + return ERR_PTR(ret); + +err_free_auxdev: + kfree(auxdev); +err_free_pdata: + kfree(oldi_pdata); +err_free_ida: + ida_free(&tidss_oldi_ida, oldi_aux_id); + + return ERR_PTR(ret); +} + +int tidss_oldi_create_devices(struct tidss_device *tidss) +{ + struct device_node *oldi_txes; + struct device_node *oldi_tx; + int ret; + + oldi_txes =3D of_get_child_by_name(tidss->dev->of_node, + "oldi-transmitters"); + if (!oldi_txes) + return 0; + + /* + * Look for primary OLDIs and create devices for them. For dual-link + * cases, the primary's create_device call will also create the + * secondary device. + */ + for_each_available_child_of_node(oldi_txes, oldi_tx) { + struct auxiliary_device *auxdev; + + if (of_property_read_bool(oldi_tx, "ti,secondary-oldi")) + continue; + + auxdev =3D tidss_oldi_create_device(tidss, oldi_tx); + if (IS_ERR(auxdev)) { + ret =3D PTR_ERR(auxdev); + goto err_destroy_oldis; + } + } + + of_node_put(oldi_txes); =20 return 0; =20 -err_put_node: - of_node_put(child); - of_node_put(oldi_parent); +err_destroy_oldis: + tidss_oldi_destroy_devices(tidss); + + of_node_put(oldi_tx); + of_node_put(oldi_txes); + return ret; } + +void tidss_oldi_destroy_devices(struct tidss_device *tidss) +{ + for (unsigned int i =3D 0; i < tidss->num_oldis; ++i) + auxiliary_device_destroy(tidss->oldis[i]); +} + +int tidss_oldi_register_driver(void) +{ + return auxiliary_driver_register(&oldi_aux_driver); +} + +void tidss_oldi_unregister_driver(void) +{ + auxiliary_driver_unregister(&oldi_aux_driver); +} diff --git a/drivers/gpu/drm/tidss/tidss_oldi.h b/drivers/gpu/drm/tidss/tid= ss_oldi.h index a361e6dbfce3..2069bd46aaae 100644 --- a/drivers/gpu/drm/tidss/tidss_oldi.h +++ b/drivers/gpu/drm/tidss/tidss_oldi.h @@ -36,7 +36,10 @@ enum tidss_oldi_link_type { OLDI_MODE_SECONDARY_DUAL_LINK, }; =20 -int tidss_oldi_init(struct tidss_device *tidss); -void tidss_oldi_deinit(struct tidss_device *tidss); +int tidss_oldi_create_devices(struct tidss_device *tidss); +void tidss_oldi_destroy_devices(struct tidss_device *tidss); + +int tidss_oldi_register_driver(void); +void tidss_oldi_unregister_driver(void); =20 #endif /* __TIDSS_OLDI_H__ */ --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0311A3A1688; Mon, 20 Apr 2026 12:54:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Swamil Jain The DSS controller on TI's AM62P SoC features two instances of the TI DSS. Each DSS instance supports two video ports, similar to the DSS controller found on the TI AM62X SoC. This allows three independent video streams to be supported: OLDI, DPI, and DSI. Since the DSS instances on AM62P are architecturally similar to those on the AM62X DSS controller, the existing dispc_am625_feats configuration can be reused for the AM62P DSS support. This commit adds the necessary device tree compatibility entry for "ti,am62p-dss" in the tidss driver, pointing to dispc_am625_feats, thereby enabling DSS support on AM62P devices. Signed-off-by: Swamil Jain Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- drivers/gpu/drm/tidss/tidss_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/tidss/tidss_drv.c b/drivers/gpu/drm/tidss/tids= s_drv.c index aef945101be4..2d056dc1c5ff 100644 --- a/drivers/gpu/drm/tidss/tidss_drv.c +++ b/drivers/gpu/drm/tidss/tidss_drv.c @@ -246,6 +246,7 @@ static const struct of_device_id tidss_of_table[] =3D { { .compatible =3D "ti,am625-dss", .data =3D &dispc_am625_feats, }, { .compatible =3D "ti,am62a7-dss", .data =3D &dispc_am62a7_feats, }, { .compatible =3D "ti,am62l-dss", .data =3D &dispc_am62l_feats, }, + { .compatible =3D "ti,am62p-dss", .data =3D &dispc_am625_feats, }, { .compatible =3D "ti,am65x-dss", .data =3D &dispc_am65x_feats, }, { .compatible =3D "ti,j721e-dss", .data =3D &dispc_j721e_feats, }, { } --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17AEE3A0EB1; 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a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Jayesh Choudhary TI's AM62P and J722S SoCs support 2 display subsystems (DSS), DSS0 and DSS1, each with two video ports (VP) and two video planes. The outputs from the DSS VPs can be routed to two OLDI TXes (OLDI0, OLDI1), a DSI TX, or parallel DPI output. DSS0 supports: - VP0: OLDI0 in single-link mode or OLDI0 and OLDI1 in dual-link or clone mode. - VP1: DPI DSS1 supports: - VP0: OLDI1 in single-link mode, or DPI - VP1: DPI or DSI The DSI is only connected to VP1 of DSS1, but OLDI and DPI are shared between the DSS instances. Thus only a single VP can output to DPI, and a single VP can use an OLDI block. Note that in single-link configuration OLDI0 can be used by DSS0, and at the same time OLDI1 can be used by DSS1. Add the necessary nodes to k3-am62p-j722s-common-main.dtsi, including DSS0, DSS1, OLDI0, OLDI1, DPHY and DSI. An important note about OLDIs: We have two OLDI hardware blocks. Each OLDI has certain configuration that has to be done before it can be used. The OLDI blocks get this configuration directly from the DSS block, via DSS registers. However, as a single OLDI block can be used either with DSS0 or DSS1, the source for the configuration changes according to (probably, this is unclear) a DSS related clock mux. So, afaics, when thinking about Linux device hierarchy wrt. control busses, OLDI blocks are children of DSS blocks, and they reside in a special DSS bus. And the OLDI parent changes according to the mux. As far as I know, there is no way we can represent this in the DT. Thus the solution used here (and in the driver) is that each DSS node contains the OLDI nodes that can be used with that DSS. Thus the DSS0 node has two child nodes, OLDI0 and OLDI1, and the DSS1 node has one child node, OLDI1. The OLDI1 nodes thus refer to the same piece of hardware, and they cannot be used at the same time. The selection which OLDI nodes to use are chosen in the board dts files, so assuming the dts files are correct, no resource conflict can happen. This is not a very nice solution, but the hardware doesn't make it easy to have a clean solution, and, most importantly, this works. A note about DPI0_CLK_CTRL: The SoCs also have a separate quirk/fix register for DPI data/sync edge. See commit "dt-bindings: display: ti,am65x-dss: Add dpi-io-ctrl property for data/sync edge synchronization" for details. Here we add that quirk register, with the dss_dpi0_clk_ctrl node, and refer to it from the DSS nodes. Signed-off-by: Aradhya Bhatia [j-choudhary@ti.com: Refactor changes for k3-am62p-j722s-common-main.dtsi and add changes for new OLDI driver support] Signed-off-by: Jayesh Choudhary Signed-off-by: Swamil Jain [tomi.valkeinen: various fixes and improvements] Signed-off-by: Tomi Valkeinen Tested-by: Swamil Jain --- .../boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 112 +++++++++++++++++= ++++ arch/arm64/boot/dts/ti/k3-am62p.dtsi | 16 +++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 16 +++ 3 files changed, 144 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/= arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 0e1af2a69ca2..263bab009021 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -64,6 +64,16 @@ audio_refclk1: clock-controller@82e4 { #clock-cells =3D <0>; }; =20 + dss_dpi0_clk_ctrl: dss-dpi0-clk-ctrl@8300 { + compatible =3D "ti,am625-dss-dpi0-clk-ctrl", "syscon"; + reg =3D <0x8300 0x4>; + }; + + dss_oldi_io_ctrl: dss-oldi-io-ctrl@8600 { + compatible =3D "ti,am625-dss-oldi-io-ctrl", "syscon"; + reg =3D <0x8600 0x200>; + }; + phy_gmii_sel: phy@4044 { compatible =3D "ti,am654-phy-gmii-sel"; reg =3D <0x4044 0x8>; @@ -1110,6 +1120,108 @@ dphy0: phy@30110000 { status =3D "disabled"; }; =20 + dss0: dss@30200000 { + compatible =3D "ti,am62p-dss"; + reg =3D <0x00 0x30200000 0x00 0x1000>, /* common */ + <0x00 0x30202000 0x00 0x1000>, /* vidl1 */ + <0x00 0x30206000 0x00 0x1000>, /* vid */ + <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ + <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ + <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ + <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI */ + <0x00 0x30201000 0x00 0x1000>; /* common1 */ + reg-names =3D "common", "vidl1", "vid", + "ovr1", "ovr2", "vp1", "vp2", "common1"; + power-domains =3D <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; /* DSS0 */ + clocks =3D <&k3_clks 186 6>, + <&dss0_vp1_clk>, + <&k3_clks 186 2>; + clock-names =3D "fck", "vp1", "vp2"; + interrupts =3D ; + status =3D "disabled"; + + oldi-transmitters { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dss0_oldi0: oldi@0 { + reg =3D <0>; + clocks =3D <&k3_clks 186 0>; + clock-names =3D "serial"; + ti,oldi-io-ctrl =3D <&dss_oldi_io_ctrl>; + status =3D "disabled"; + power-domains =3D <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>; /* OLDI0_VD */ + }; + + dss0_oldi1: oldi@1 { + reg =3D <1>; + status =3D "disabled"; + power-domains =3D <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>; /* OLDI1_VD */ + }; + }; + }; + + dss1: dss@30220000 { + compatible =3D "ti,am62p-dss"; + reg =3D <0x00 0x30220000 0x00 0x1000>, /* common */ + <0x00 0x30222000 0x00 0x1000>, /* vidl1 */ + <0x00 0x30226000 0x00 0x1000>, /* vid */ + <0x00 0x30227000 0x00 0x1000>, /* ovr1 */ + <0x00 0x30228000 0x00 0x1000>, /* ovr2 */ + <0x00 0x3022a000 0x00 0x1000>, /* vp1: Used for DPI/OLDI */ + <0x00 0x3022b000 0x00 0x1000>, /* vp2: Used DPI/DSI */ + <0x00 0x30221000 0x00 0x1000>; /* common1 */ + reg-names =3D "common", "vidl1", "vid", + "ovr1", "ovr2", "vp1", "vp2", "common1"; + power-domains =3D <&k3_pds 232 TI_SCI_PD_EXCLUSIVE>; /* DSS1 */ + clocks =3D <&k3_clks 232 8>, + <&dss1_vp1_clk>, + <&k3_clks 232 4>; + clock-names =3D "fck", "vp1", "vp2"; + interrupts =3D ; + status =3D "disabled"; + + oldi-transmitters { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dss1_oldi1: oldi@1 { + reg =3D <1>; + clocks =3D <&k3_clks 232 0>; + clock-names =3D "serial"; + ti,oldi-io-ctrl =3D <&dss_oldi_io_ctrl>; + status =3D "disabled"; + power-domains =3D <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>; /* OLDI1_VD */ + }; + }; + }; + + dphy_tx0: phy@301c0000 { + compatible =3D "ti,j721e-dphy"; + reg =3D <0x0 0x301c0000 0x0 0x1000>; + clocks =3D <&k3_clks 238 16>, <&k3_clks 238 1>; + clock-names =3D "psm", "pll_ref"; + #phy-cells =3D <0>; + power-domains =3D <&k3_pds 238 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 238 1>; + assigned-clock-parents =3D <&k3_clks 238 2>; + assigned-clock-rates =3D <25000000>; + status =3D "disabled"; + }; + + dsi0: dsi@30500000 { + compatible =3D "ti,j721e-dsi"; + reg =3D <0x0 0x30500000 0x0 0x100000>, <0x0 0x30270000 0x0 0x100>; + clocks =3D <&k3_clks 231 2>, <&k3_clks 231 5>; + clock-names =3D "dsi_p_clk", "dsi_sys_clk"; + power-domains =3D <&k3_pds 231 TI_SCI_PD_EXCLUSIVE>; + interrupt-parent =3D <&gic500>; + interrupts =3D ; + phys =3D <&dphy_tx0>; + phy-names =3D "dphy"; + status =3D "disabled"; + }; + vpu: video-codec@30210000 { compatible =3D "ti,j721s2-wave521c", "cnm,wave521c"; reg =3D <0x00 0x30210000 0x00 0x10000>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p.dtsi b/arch/arm64/boot/dts/ti/= k3-am62p.dtsi index 9d6266d6ddb8..074dc44ec049 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p.dtsi @@ -144,6 +144,22 @@ cbass_wakeup: bus@b00000 { }; }; =20 + dss0_vp1_clk: clock-divider-oldi-dss0 { + compatible =3D "fixed-factor-clock"; + clocks =3D <&k3_clks 186 0>; + #clock-cells =3D <0>; + clock-div =3D <7>; + clock-mult =3D <1>; + }; + + dss1_vp1_clk: clock-divider-oldi-dss1 { + compatible =3D "fixed-factor-clock"; + clocks =3D <&k3_clks 232 0>; + #clock-cells =3D <0>; + clock-div =3D <7>; + clock-mult =3D <1>; + }; + #include "k3-am62p-j722s-common-thermal.dtsi" }; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/= k3-j722s.dtsi index 059c65ece183..f5b74281ab3d 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi @@ -227,6 +227,22 @@ cbass_wakeup: bus@b00000 { }; }; =20 + dss0_vp1_clk: clock-divider-oldi-dss0 { + compatible =3D "fixed-factor-clock"; + clocks =3D <&k3_clks 186 0>; + #clock-cells =3D <0>; + clock-div =3D <7>; + clock-mult =3D <1>; + }; + + dss1_vp1_clk: clock-divider-oldi-dss1 { + compatible =3D "fixed-factor-clock"; + clocks =3D <&k3_clks 232 0>; + #clock-cells =3D <0>; + clock-div =3D <7>; + clock-mult =3D <1>; + }; + #include "k3-am62p-j722s-common-thermal.dtsi" }; =20 --=20 2.43.0 From nobody Thu Jun 18 08:19:45 2026 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D340C3A4F30; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260420-beagley-ai-display-v1-15-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> In-Reply-To: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> To: Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Aradhya Bhatia , Nishanth Menon , Vignesh Raghavendra , Swamil Jain , Devarsh Thakkar , Louis Chauvet Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tomi Valkeinen , Andrew Davis X-Mailer: b4 0.15-dev-c25d1 X-Developer-Signature: v=1; a=openpgp-sha256; l=7630; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=ef00AEEpZLBoZS13pee46fVX47tvacOEQxIpd0yH3/4=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBp5iIIpMXK+ys3lB6QqFrLhAroXUwaPU9mySplY 8qXUHRF3umJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCaeYiCAAKCRD6PaqMvJYe 9eMYD/4xWdOQUmY/A99L949Yd+Z93eoPbFuQihhQZcI7w8PKRrLRuWKx24XT0uQnocVejlteWlm vhQP4xSO2z6hNe/ubS8kuY0/Fk5vpK4sxVCJEsISAq+3cSRgIqJIOcWkxkwC/eg/e40e3kh58cw HhtT0y5oeExyLGYTSBUpRRJlA4RQmn6h3ms1oIG7divwDxhWmSdRyf6QnQrYs5MZsoKVn/mx9Ai 3AFXhp/23OS4wQpv4m9cADwp4CM5Y7yTUQS5sSWNZUalnmRCdrns4WpieyjTXKofNA6EtxvIat3 8oBt21ag+/5tegsclp61rYRZ32Mk36aLOrFf5M3CFBJl6t5IOdUWyFKqlr7CFUG2lVPjzxEBq3M kIl6HSUbtZ0iHd7s5WAd8hY37eW1Is6ojHw1jrsBvhU1m6WALQjvpV0fu+dqxfoc0G68T7mMgYx boqpvibQPToTGq0NMVA+Rnn4oe4HPMNzbIfDt4ssAFZ2CU3eE/HCfW730zZjaxUdMjksy/ALQ2/ tVRYRi6d0WyjdgKRJtueh8oJfusN48Z7qZkqYhy0WFrFDqVivU45oTThAnwryvbwp9r4KUdwByZ H2NC5lmPI7l8WpdIW7rUfUlV0A4OwmVcgx89e/mgav4AQITo5zUPBxiTeCO/hGDw8+P2KGtl3yM Q2lP9PXK93rbRVw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 From: Andrew Davis Enable HDMI support for BeagleY-AI platform. The display controller used is TIDSS and the HDMI bridge used is IT66122. Based on DT by: Robert Nelson Signed-off-by: Andrew Davis Signed-off-by: Swamil Jain [tomi.valkeinen: cosmetic fixes] Signed-off-by: Tomi Valkeinen Tested-by: Robert Nelson Tested-by: Swamil Jain --- arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 197 +++++++++++++++++++++= ++++ 1 file changed, 197 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/bo= ot/dts/ti/k3-am67a-beagley-ai.dts index 5255e04b9ac7..b7bcc90005d7 100644 --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts @@ -146,6 +146,34 @@ led-1 { default-state =3D "on"; }; }; + + hdmi0: connector-hdmi { + compatible =3D "hdmi-connector"; + label =3D "hdmi"; + type =3D "d"; + port { + hdmi_connector_in: endpoint { + remote-endpoint =3D <&it66122_out>; + }; + }; + }; + + sound0: sound { + compatible =3D "simple-audio-card"; + simple-audio-card,name =3D "it66122 HDMI"; + simple-audio-card,format =3D "i2s"; + simple-audio-card,bitclock-master =3D <&hdmi_dailink_master>; + simple-audio-card,frame-master =3D <&hdmi_dailink_master>; + + hdmi_dailink_master: simple-audio-card,cpu { + sound-dai =3D <&mcasp1>; + system-clock-direction-out; + }; + + simple-audio-card,codec { + sound-dai =3D <&it66122>; + }; + }; }; =20 &main_pmx0 { @@ -185,6 +213,20 @@ J722S_IOPAD(0x0240, PIN_INPUT, 7) /* (B24) MMC1_SDCD.G= PIO1_48 */ bootph-all; }; =20 + main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins =3D < + J722S_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */ + J722S_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A22) I2C1_SDA */ + >; + bootph-all; + }; + + main_gpio0_ioexp_intr_pins_default: main-gpio0-ioexp-intr-default-pins { + pinctrl-single,pins =3D < + J722S_IOPAD(0x0110, PIN_INPUT, 7) /* (G27) MMC2_DAT1.GPIO0_67 */ + >; + }; + mdio_pins_default: mdio-default-pins { pinctrl-single,pins =3D < J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */ @@ -227,6 +269,47 @@ vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins { J722S_IOPAD(0x0254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */ >; }; + + dss1_pins_default: dss1-default-pins { + pinctrl-single,pins =3D < + J722S_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AB23) VOUT0_VSYNC */ + J722S_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */ + J722S_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC26) VOUT0_PCLK */ + J722S_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (AC27) VOUT0_DE */ + J722S_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (W27) VOUT0_DATA0 */ + J722S_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA1 */ + J722S_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA2 */ + J722S_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W23) VOUT0_DATA3 */ + J722S_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA4 */ + J722S_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA5 */ + J722S_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y26) VOUT0_DATA6 */ + J722S_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (Y27) VOUT0_DATA7 */ + J722S_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA8 */ + J722S_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (AA27) VOUT0_DATA9 */ + J722S_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA10 */ + J722S_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA11 */ + J722S_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA12 */ + J722S_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA22) VOUT0_DATA13 */ + J722S_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (AB26) VOUT0_DATA14 */ + J722S_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AB27) VOUT0_DATA15 */ + J722S_IOPAD(0x005c, PIN_OUTPUT, 1) /* (AC25) GPMC0_AD8.VOUT0_DATA16 */ + J722S_IOPAD(0x0060, PIN_OUTPUT, 1) /* (U26) GPMC0_AD9.VOUT0_DATA17 */ + J722S_IOPAD(0x0064, PIN_OUTPUT, 1) /* (V27) GPMC0_AD10.VOUT0_DATA18 */ + J722S_IOPAD(0x0068, PIN_OUTPUT, 1) /* (V25) GPMC0_AD11.VOUT0_DATA19 */ + J722S_IOPAD(0x006c, PIN_OUTPUT, 1) /* (V26) GPMC0_AD12.VOUT0_DATA20 */ + J722S_IOPAD(0x0070, PIN_OUTPUT, 1) /* (V24) GPMC0_AD13.VOUT0_DATA21 */ + J722S_IOPAD(0x0074, PIN_OUTPUT, 1) /* (V22) GPMC0_AD14.VOUT0_DATA22 */ + J722S_IOPAD(0x0078, PIN_OUTPUT, 1) /* (V23) GPMC0_AD15.VOUT0_DATA23 */ + >; + }; + + main_mcasp1_pins_default: main-mcasp1-default-pins { + pinctrl-single,pins =3D < + J722S_IOPAD(0x0090, PIN_INPUT, 2) /* (P27) GPMC0_BE0n_CLE.MCASP1_ACLKX = */ + J722S_IOPAD(0x0098, PIN_INPUT, 2) /* (V21) GPMC0_WAIT0.MCASP1_AFSX */ + J722S_IOPAD(0x008c, PIN_INPUT, 2) /* (N23) GPMC0_WEn.MCASP1_AXR0 */ + >; + }; }; =20 &cpsw3g { @@ -284,6 +367,13 @@ J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (C6) WK= UP_I2C1_SDA */ >; bootph-all; }; + + hdmi_gpio_pins_default: hdmi-gpio-default-pins { + pinctrl-single,pins =3D < + J722S_MCU_IOPAD(0x0038, PIN_INPUT_PULLUP | PIN_DEBOUNCE_CONF6, 7) /* (D= 8) MCU_MCAN0_RX.MCU_GPIO0_14 HDMI_INTn */ + J722S_MCU_IOPAD(0x0034, PIN_OUTPUT_PULLUP, 7) /* (B2) MCU_MCAN0_TX.MCU_= GPIO0_13 HDMI_RSTn */ + >; + }; }; =20 &wkup_uart0 { @@ -385,6 +475,63 @@ rtc: rtc@68 { }; }; =20 +&main_i2c1 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_i2c1_pins_default>; + clock-frequency =3D <400000>; + bootph-all; + + it66122: bridge-hdmi@4c { + compatible =3D "ite,it66122"; + reg =3D <0x4c>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdmi_gpio_pins_default>; + vcn33-supply =3D <&vdd_3v3>; + vcn18-supply =3D <&buck2_reg>; + vrf12-supply =3D <&ldo2_reg>; + reset-gpios =3D <&mcu_gpio0 13 GPIO_ACTIVE_LOW>; + interrupt-parent =3D <&mcu_gpio0>; + interrupts =3D <14 IRQ_TYPE_EDGE_FALLING>; + #sound-dai-cells =3D <0>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* + * HDMI can be serviced with 3 potential VPs - + * (DSS0 VP1 / DSS1 VP0 / DSS1 VP1). + * For now, we will service it with DSS1 VP1. + */ + port@0 { + reg =3D <0>; + + it66122_in: endpoint { + bus-width =3D <24>; + remote-endpoint =3D <&dss1_dpi0_out>; + }; + }; + + port@1 { + reg =3D <1>; + + it66122_out: endpoint { + remote-endpoint =3D <&hdmi_connector_in>; + }; + }; + }; + }; +}; + +&main_gpio0 { + status =3D "okay"; +}; + +&mcu_gpio0 { + status =3D "okay"; +}; + &sdhci1 { /* SD/MMC */ vmmc-supply =3D <&vdd_mmc1>; @@ -399,4 +546,54 @@ &sdhci1 { status =3D "okay"; }; =20 +&dss1 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&dss1_pins_default>; + + clocks =3D <&k3_clks 232 8>, + <&k3_clks 232 0>, + <&k3_clks 232 4>; + + assigned-clocks =3D <&k3_clks 241 0>, /* DSS1-VP0 */ + <&k3_clks 240 0>, /* DSS1-VP1 */ + <&k3_clks 245 0>; /* DPI Output */ + + assigned-clock-parents =3D <&k3_clks 241 2>, /* PLL 17 HDMI */ + <&k3_clks 240 1>, /* PLL 18 DSI */ + <&k3_clks 245 2>; /* DSS1-DPI0 */ + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* DSS1-VP1: DPI/HDMI Output */ + port@0 { + reg =3D <0>; + + dss1_dpi0_out: endpoint { + remote-endpoint =3D <&it66122_in>; + }; + }; + }; +}; + +&mcasp1 { + status =3D "okay"; + #sound-dai-cells =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_mcasp1_pins_default>; + auxclk-fs-ratio =3D <2177>; + op-mode =3D <0>; /* MCASP_IIS_MODE */ + tdm-slots =3D <2>; + serial-dir =3D < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 0 0 0 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tx-num-evt =3D <32>; + rx-num-evt =3D <32>; +}; + #include "k3-j722s-ti-ipc-firmware.dtsi" --=20 2.43.0