From nobody Thu Jun 11 13:37:28 2026 Received: from fr5000-r.dnsiaas.com (fr5000-r.dnsiaas.com [92.42.104.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE68733EAE4; Sun, 19 Apr 2026 12:00:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.42.104.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776600012; cv=none; b=aYFDFli11alvsO6YVzaGCynmpdLrx6PNuESV2JYMHGjEK+jLu2AHxZ1aONyAagkvGa89/NH8LPkkfiVvC3V7ZP/4S/HiTMLGEJbq64NzZR7UFImQQcFM/W2sRP+1t2Kr5ESeabMluXOFek3NVznIE9Py51fCekjupyg3tFKcmOk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776600012; c=relaxed/simple; bh=s/jc/s6Rzr1Mg/JbVnbKEPF1NVKRtlMfsACn6kbFdKc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GONHiTNpqZHSquADeCVvWHahVC0ukv8NGPQsNpFR3NNVl+gbMgWGvlcvH8oQ3W9WtxnvW9HR7VijRxPdYRnWSlQlEFgMnRQOu45BFpFN08z+Cl1/9AtxVfkxiyR1tGoqZV6DhAYZ6RwQxfaSq8EIccRPyUKDqDT3+JOPQCQDZtA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=superkali.me; spf=pass smtp.mailfrom=superkali.me; dkim=pass (2048-bit key) header.d=superkali.me header.i=@superkali.me header.b=iVSs40kM; arc=none smtp.client-ip=92.42.104.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=superkali.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=superkali.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=superkali.me header.i=@superkali.me header.b="iVSs40kM" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=superkali.me; s=default; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=4r6wkkKWx0HfcJZH7gXeKF9oJ6zCw/C5ilURSEcdU7I=; b=iVSs40kMSXExWxcYbEJbIbjbDf ECnVYZWEBKwfGf0YIINpQ162mgyPLpr28/iFUwwUxAnXTGbfdENdTKw75J/fhYIDDLR0XBd2OMxNx swfnoyMhOpOsDvHDhQPi0+c4zkTMpdJVUdY/GgzzYamn63axl1nQbtm368NqB91iINv7f4FT5wgDP KNx5TJZXxKhCWb+GE/0O262KZQcJix4nTJX1A44NST7+eEFtxJZGfs/fu1b7X/3BXX1tPyy6ExF+Q a4/IkefBTkZ6tBfNMOdTmcj1WKEnlSbw6IgQI8kMqP+SvKTW0VVf4ZP02q2grZOqEXR1NBoiOXj1S sUMS1V/A==; Received: from [2a0d:52c0:500f:0:89e7:36b:a29f:1abe] (port=50188 helo=1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.ip6.arpa) by fr5000-r.dnsiaas.com with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.99.1) (envelope-from ) id 1wEQYa-00000000aDt-0lKr; Sun, 19 Apr 2026 13:43:19 +0200 From: Daniele Briguglio Date: Sun, 19 Apr 2026 13:43:06 +0200 Subject: [PATCH v4 1/5] dt-bindings: clock: rockchip,rk3588-cru: add I2S MCLK output to IO clock IDs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260419-rk3588-mclk-gate-grf-v4-1-513a42dd1dcc@superkali.me> References: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Nicolas Frattaroli , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Daniele Briguglio , Krzysztof Kozlowski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776598989; l=975; i=hello@superkali.me; s=20260316; h=from:subject:message-id; bh=s/jc/s6Rzr1Mg/JbVnbKEPF1NVKRtlMfsACn6kbFdKc=; b=jw66JKq81FohyP0tMKSSjcJsOwW+DXQwziYnEDIpT+1Q2qulTJ8m59TDX2Zh03coMQCR6OY8R 0EvaB9eLU0EAHNvi77q+yT+5gWokt5HSY562mq/tLJW43Nq2cFjkdel X-Developer-Key: i=hello@superkali.me; a=ed25519; pk=5tynRWQdL93CDcapJ73FkcCRY2PeBOJOIAoIhRig53U= X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - fr5000-r.dnsiaas.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - superkali.me X-Get-Message-Sender-Via: fr5000-r.dnsiaas.com: authenticated_id: hello@superkali.me X-Authenticated-Sender: fr5000-r.dnsiaas.com: hello@superkali.me X-Source: X-Source-Args: X-Source-Dir: Add clock identifiers for the four I2S MCLK output to IO gate clocks on RK3588, needed by board DTS files where the codec requires MCLK from the SoC on an external IO pin. Acked-by: Krzysztof Kozlowski Signed-off-by: Daniele Briguglio --- include/dt-bindings/clock/rockchip,rk3588-cru.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-b= indings/clock/rockchip,rk3588-cru.h index 0c7d3ca2d5bc..7528034cff56 100644 --- a/include/dt-bindings/clock/rockchip,rk3588-cru.h +++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h @@ -734,6 +734,10 @@ #define PCLK_AV1_PRE 719 #define HCLK_SDIO_PRE 720 #define PCLK_VO1GRF 721 +#define I2S0_8CH_MCLKOUT_TO_IO 722 +#define I2S1_8CH_MCLKOUT_TO_IO 723 +#define I2S2_2CH_MCLKOUT_TO_IO 724 +#define I2S3_2CH_MCLKOUT_TO_IO 725 =20 /* scmi-clocks indices */ =20 --=20 2.53.0 From nobody Thu Jun 11 13:37:28 2026 Received: from fr5000-r.dnsiaas.com (fr5000-r.dnsiaas.com [92.42.104.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E28FB1339B1; Sun, 19 Apr 2026 11:43:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Received: from [2a0d:52c0:500f:0:89e7:36b:a29f:1abe] (port=50188 helo=1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.ip6.arpa) by fr5000-r.dnsiaas.com with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.99.1) (envelope-from ) id 1wEQYe-00000000aDt-0794; Sun, 19 Apr 2026 13:43:23 +0200 From: Daniele Briguglio Date: Sun, 19 Apr 2026 13:43:07 +0200 Subject: [PATCH v4 2/5] clk: rockchip: allow grf_type_sys lookup in aux_grf_table Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260419-rk3588-mclk-gate-grf-v4-2-513a42dd1dcc@superkali.me> References: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Nicolas Frattaroli , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Daniele Briguglio X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776598989; l=1708; i=hello@superkali.me; s=20260316; h=from:subject:message-id; bh=WL4AZHxfBGBXO8GMVo8sFDi5dqnXuP+ssvyAyb87JKI=; b=5VqU7APGADLVd+zkuPwb667zDrM45YTOPSrvYA0INwI2AXiQrDTV9haJ3c3wRGex6+Weu/f6F 6DOsVhyLvwDCvSHfsAu1IlMSpEOMtCJy38IWjaonWcgyQtG7arLj8VY X-Developer-Key: i=hello@superkali.me; a=ed25519; pk=5tynRWQdL93CDcapJ73FkcCRY2PeBOJOIAoIhRig53U= X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - fr5000-r.dnsiaas.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - superkali.me X-Get-Message-Sender-Via: fr5000-r.dnsiaas.com: authenticated_id: hello@superkali.me X-Authenticated-Sender: fr5000-r.dnsiaas.com: hello@superkali.me X-Source: X-Source-Args: X-Source-Dir: Remove the grf_type_sys exclusion from the auxiliary GRF table lookup in rockchip_clk_register_branches(). Previously, branches with grf_type_sys always used ctx->grf directly, bypassing the aux_grf_table. This is a problem on SoCs like RK3588 where ctx->grf points to the PHP_GRF (set via the CRU's rockchip,grf phandle), but GATE_GRF clock entries need to access the SYS_GRF instead. With this change, grf_type_sys branches first check the aux_grf_table, and fall back to ctx->grf if no entry is found. This is backwards compatible: on SoCs that do not register grf_type_sys in the aux_grf_table, the behavior is unchanged. Reviewed-by: Nicolas Frattaroli Signed-off-by: Daniele Briguglio --- drivers/clk/rockchip/clk.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index e8b3b0b9a4f8..911e6b610618 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -509,10 +509,9 @@ void rockchip_clk_register_branches(struct rockchip_cl= k_provider *ctx, clk =3D NULL; =20 /* for GRF-dependent branches, choose the right grf first */ - if ((list->branch_type =3D=3D branch_grf_mux || - list->branch_type =3D=3D branch_grf_gate || - list->branch_type =3D=3D branch_grf_mmc) && - list->grf_type !=3D grf_type_sys) { + if (list->branch_type =3D=3D branch_grf_mux || + list->branch_type =3D=3D branch_grf_gate || + list->branch_type =3D=3D branch_grf_mmc) { hash_for_each_possible(ctx->aux_grf_table, agrf, node, list->grf_type) { if (agrf->type =3D=3D list->grf_type) { grf =3D agrf->grf; --=20 2.53.0 From nobody Thu Jun 11 13:37:28 2026 Received: from fr5000-r.dnsiaas.com (fr5000-r.dnsiaas.com [92.42.104.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 260971339B1; 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Received: from [2a0d:52c0:500f:0:89e7:36b:a29f:1abe] (port=50188 helo=1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.ip6.arpa) by fr5000-r.dnsiaas.com with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.99.1) (envelope-from ) id 1wEQYh-00000000aDt-3K1H; Sun, 19 Apr 2026 13:43:27 +0200 From: Daniele Briguglio Date: Sun, 19 Apr 2026 13:43:08 +0200 Subject: [PATCH v4 3/5] clk: rockchip: add helper to register auxiliary GRFs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260419-rk3588-mclk-gate-grf-v4-3-513a42dd1dcc@superkali.me> References: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Nicolas Frattaroli , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Daniele Briguglio X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776598989; l=2139; i=hello@superkali.me; s=20260316; h=from:subject:message-id; bh=xA2GFZB8SzFD5608ibTQ/WmfI41xporUbQa+lsAS6LQ=; b=VDYFtGvJ5aGaeqR2rmblNWgQDR05FgbIqovQcFPPKoOMj8JlvOR2hcl+gx4XyexfORQ77gzCW PZKAXO6SNTKAwSW4ysZFg/O9t+ZF9c7JLcIrmbDj2tpBTokZppBx1Df X-Developer-Key: i=hello@superkali.me; a=ed25519; pk=5tynRWQdL93CDcapJ73FkcCRY2PeBOJOIAoIhRig53U= X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - fr5000-r.dnsiaas.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - superkali.me X-Get-Message-Sender-Via: fr5000-r.dnsiaas.com: authenticated_id: hello@superkali.me X-Authenticated-Sender: fr5000-r.dnsiaas.com: hello@superkali.me X-Source: X-Source-Args: X-Source-Dir: Add rockchip_clk_add_grf() as a helper to register an auxiliary GRF into the clock provider's aux_grf_table. This encapsulates the struct rockchip_aux_grf allocation and hashtable insertion, so SoC clock drivers do not need to open-code it. Suggested-by: Heiko Stuebner Signed-off-by: Daniele Briguglio --- drivers/clk/rockchip/clk.c | 18 ++++++++++++++++++ drivers/clk/rockchip/clk.h | 3 +++ 2 files changed, 21 insertions(+) diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index 911e6b610618..ee8c79b938d3 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -429,6 +429,24 @@ void rockchip_clk_of_add_provider(struct device_node *= np, } EXPORT_SYMBOL_GPL(rockchip_clk_of_add_provider); =20 +int rockchip_clk_add_grf(struct rockchip_clk_provider *ctx, + struct regmap *grf, + enum rockchip_grf_type type) +{ + struct rockchip_aux_grf *aux_grf; + + aux_grf =3D kzalloc_obj(*aux_grf); + if (!aux_grf) + return -ENOMEM; + + aux_grf->grf =3D grf; + aux_grf->type =3D type; + hash_add(ctx->aux_grf_table, &aux_grf->node, type); + + return 0; +} +EXPORT_SYMBOL_GPL(rockchip_clk_add_grf); + void rockchip_clk_register_plls(struct rockchip_clk_provider *ctx, struct rockchip_pll_clock *list, unsigned int nr_pll, int grf_lock_offset) diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index cf0f5f11c34b..9e3503e2ffc2 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -1329,6 +1329,9 @@ struct rockchip_clk_provider *rockchip_clk_init_early= (struct device_node *np, void rockchip_clk_finalize(struct rockchip_clk_provider *ctx); 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Sun, 19 Apr 2026 13:43:34 +0200 From: Daniele Briguglio Date: Sun, 19 Apr 2026 13:43:09 +0200 Subject: [PATCH v4 4/5] soc: rockchip: rk3588: add SYS_GRF SOC_CON6 register offset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260419-rk3588-mclk-gate-grf-v4-4-513a42dd1dcc@superkali.me> References: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Nicolas Frattaroli , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Daniele Briguglio X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776598989; 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This register contains the I2S MCLK output to IO gate bits, needed by the clock driver. Signed-off-by: Daniele Briguglio Reviewed-by: Nicolas Frattaroli --- include/soc/rockchip/rk3588_grf.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/soc/rockchip/rk3588_grf.h b/include/soc/rockchip/rk358= 8_grf.h index 02a7b2432d99..db0092fc66ad 100644 --- a/include/soc/rockchip/rk3588_grf.h +++ b/include/soc/rockchip/rk3588_grf.h @@ -19,4 +19,6 @@ /* Whether the LPDDR5 is in 2:1 (=3D 0) or 4:1 (=3D 1) CKR a.k.a. DQS mode= */ #define RK3588_PMUGRF_OS_REG6_LP5_CKR BIT(0) =20 +#define RK3588_SYSGRF_SOC_CON6 0x0318 + #endif /* __SOC_RK3588_GRF_H */ --=20 2.53.0 From nobody Thu Jun 11 13:37:28 2026 Received: from fr5000-r.dnsiaas.com (fr5000-r.dnsiaas.com [92.42.104.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB1D7326D51; Sun, 19 Apr 2026 11:43:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.42.104.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776599027; cv=none; b=Ru9t5QMXr3eealj/jA4LIJhpCB3+pjJLRs7AFSOTr2mkeiOWkssRyNiWjVZgiNociiNEp0R9HoUCD1iCQxA5dljhI0kwGIQ9xJat+sEIwxc1TXk6lvBrjARS6fD8c3lbnq0cUNBl8Coj9biz7Z/PGNty7p6VaVSPnNFT3Om4kvw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776599027; c=relaxed/simple; bh=E5BqUjj4224d7F+19+gOLdFvqyOlAwq5LxZGChEF6AQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cvCLuH4h7FSnjm+S3y5JB80qhU010so/eJGAsAf1RA50ME7f5B2mhSP4z1kIM62WtM7CKpkOhWw6xF+L4lUVeb1Pxdo+xptT3wR0CqMRbUhGR6aIEtWFJ5diBjEHsAjHfXw1joVg/Iww3YsPXLIbFuSSiQ4Yant6AGQrI3I0Ooc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=superkali.me; spf=pass smtp.mailfrom=superkali.me; dkim=pass (2048-bit key) header.d=superkali.me header.i=@superkali.me header.b=ZlBBmEN4; arc=none smtp.client-ip=92.42.104.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=superkali.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=superkali.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=superkali.me header.i=@superkali.me header.b="ZlBBmEN4" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=superkali.me; s=default; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=pGPuojZtQa+aGP3J82GrVMOfXWUytm5kFNVlScsfUH8=; b=ZlBBmEN4pqXQ13wUE+cZQt/Etv jnOddPule3KwzV3KwdaPzV5QSZRum6pB80ugIh8RNriL/Chn7oCCF4Z73s9w6ftmgMUh/lM6wePvn Wr80gXvpgKNSDtLeEtYuHhNXtu0nOXaVrZFxH7TKeSIesrDdLUYDQGst85HhYEEl72uVu2yo6QEnN FxvDk0uQIKTKsx4LUOA8B2nrUn3uYx0e1vHGFFGwAxGsib/HUJMXyVzsgGhTY3rQ/O8xNdoc1pi3/ pQYdaX9GYRQmhevT12ewe+/O0TFD3TXBcLtfVKvwU3+5UpetftmUPiU5cz79a6kpTZxvFTy9hTt8o Q2kYnB+Q==; Received: from [2a0d:52c0:500f:0:89e7:36b:a29f:1abe] (port=50188 helo=1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.ip6.arpa) by fr5000-r.dnsiaas.com with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.99.1) (envelope-from ) id 1wEQYt-00000000aDt-0HjS; Sun, 19 Apr 2026 13:43:38 +0200 From: Daniele Briguglio Date: Sun, 19 Apr 2026 13:43:10 +0200 Subject: [PATCH v4 5/5] clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260419-rk3588-mclk-gate-grf-v4-5-513a42dd1dcc@superkali.me> References: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> In-Reply-To: <20260419-rk3588-mclk-gate-grf-v4-0-513a42dd1dcc@superkali.me> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Nicolas Frattaroli , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Daniele Briguglio , Ricardo Pardini X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776598989; l=4850; i=hello@superkali.me; s=20260316; h=from:subject:message-id; bh=E5BqUjj4224d7F+19+gOLdFvqyOlAwq5LxZGChEF6AQ=; b=m0Wb5jh+bAonlQ5X8Zxu4qR/yBDOOVeWpHaAgSjvGD/R9F5cFqnelwyc7t3UhYEByQIcPqDOy ID+f36JRt7yCIxIkoae2Yesa6P33xtHjB+okmYrfSCFXaxpAR+Apy+I X-Developer-Key: i=hello@superkali.me; a=ed25519; pk=5tynRWQdL93CDcapJ73FkcCRY2PeBOJOIAoIhRig53U= X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - fr5000-r.dnsiaas.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - superkali.me X-Get-Message-Sender-Via: fr5000-r.dnsiaas.com: authenticated_id: hello@superkali.me X-Authenticated-Sender: fr5000-r.dnsiaas.com: hello@superkali.me X-Source: X-Source-Args: X-Source-Dir: The I2S MCLK outputs on RK3588 are gated by bits in the SYS_GRF register SOC_CON6 (offset 0x318). These gates control whether the internal CRU MCLK signals reach the external IO pins connected to audio codecs. The kernel should explicitly manage these gates so that audio functionality does not depend on bootloader register state. This is analogous to what was done for RK3576 SAI MCLK outputs [1]. Register the SYS_GRF as an auxiliary GRF with grf_type_sys using rockchip_clk_add_grf(), and add GATE_GRF entries for all four I2S MCLK output gates: - I2S0_8CH_MCLKOUT_TO_IO (bit 0) - I2S1_8CH_MCLKOUT_TO_IO (bit 1) - I2S2_2CH_MCLKOUT_TO_IO (bit 2) - I2S3_2CH_MCLKOUT_TO_IO (bit 7) Board DTS files that need MCLK on an IO pin can reference these clocks, e.g.: clocks =3D <&cru I2S0_8CH_MCLKOUT_TO_IO>; Tested on the Youyeetoo YY3588 (RK3588) with an ES8388 codec on I2S0. [1] https://lore.kernel.org/r/20250305-rk3576-sai-v1-2-64e6cf863e9a@collabo= ra.com/ Tested-by: Ricardo Pardini Signed-off-by: Daniele Briguglio --- drivers/clk/rockchip/clk-rk3588.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/clk/rockchip/clk-rk3588.c b/drivers/clk/rockchip/clk-r= k3588.c index 1694223f4f84..2ba9976654cf 100644 --- a/drivers/clk/rockchip/clk-rk3588.c +++ b/drivers/clk/rockchip/clk-rk3588.c @@ -5,11 +5,13 @@ */ =20 #include +#include #include #include #include #include #include +#include #include "clk.h" =20 #define RK3588_GRF_SOC_STATUS0 0x600 @@ -892,6 +894,8 @@ static struct rockchip_clk_branch rk3588_early_clk_bran= ches[] __initdata =3D { RK3588_CLKGATE_CON(8), 0, GFLAGS), MUX(I2S2_2CH_MCLKOUT, "i2s2_2ch_mclkout", i2s2_2ch_mclkout_p, CLK_SET_RAT= E_PARENT, RK3588_CLKSEL_CON(30), 2, 1, MFLAGS), + GATE_GRF(I2S2_2CH_MCLKOUT_TO_IO, "i2s2_2ch_mclkout_to_io", "i2s2_2ch_mclk= out", + 0, RK3588_SYSGRF_SOC_CON6, 2, GFLAGS, grf_type_sys), =20 COMPOSITE(CLK_I2S3_2CH_SRC, "clk_i2s3_2ch_src", gpll_aupll_p, 0, RK3588_CLKSEL_CON(30), 8, 1, MFLAGS, 3, 5, DFLAGS, @@ -907,6 +911,8 @@ static struct rockchip_clk_branch rk3588_early_clk_bran= ches[] __initdata =3D { RK3588_CLKGATE_CON(8), 4, GFLAGS), MUX(I2S3_2CH_MCLKOUT, "i2s3_2ch_mclkout", i2s3_2ch_mclkout_p, CLK_SET_RAT= E_PARENT, RK3588_CLKSEL_CON(32), 2, 1, MFLAGS), + GATE_GRF(I2S3_2CH_MCLKOUT_TO_IO, "i2s3_2ch_mclkout_to_io", "i2s3_2ch_mclk= out", + 0, RK3588_SYSGRF_SOC_CON6, 7, GFLAGS, grf_type_sys), GATE(PCLK_ACDCDIG, "pclk_acdcdig", "pclk_audio_root", 0, RK3588_CLKGATE_CON(7), 11, GFLAGS), GATE(HCLK_I2S0_8CH, "hclk_i2s0_8ch", "hclk_audio_root", 0, @@ -935,6 +941,8 @@ static struct rockchip_clk_branch rk3588_early_clk_bran= ches[] __initdata =3D { RK3588_CLKGATE_CON(7), 10, GFLAGS), MUX(I2S0_8CH_MCLKOUT, "i2s0_8ch_mclkout", i2s0_8ch_mclkout_p, CLK_SET_RAT= E_PARENT, RK3588_CLKSEL_CON(28), 2, 2, MFLAGS), + GATE_GRF(I2S0_8CH_MCLKOUT_TO_IO, "i2s0_8ch_mclkout_to_io", "i2s0_8ch_mclk= out", + 0, RK3588_SYSGRF_SOC_CON6, 0, GFLAGS, grf_type_sys), =20 GATE(HCLK_PDM1, "hclk_pdm1", "hclk_audio_root", 0, RK3588_CLKGATE_CON(9), 6, GFLAGS), @@ -2220,6 +2228,8 @@ static struct rockchip_clk_branch rk3588_early_clk_br= anches[] __initdata =3D { RK3588_PMU_CLKGATE_CON(2), 13, GFLAGS), MUX(I2S1_8CH_MCLKOUT, "i2s1_8ch_mclkout", i2s1_8ch_mclkout_p, CLK_SET_RAT= E_PARENT, RK3588_PMU_CLKSEL_CON(9), 2, 2, MFLAGS), + GATE_GRF(I2S1_8CH_MCLKOUT_TO_IO, "i2s1_8ch_mclkout_to_io", "i2s1_8ch_mclk= out", + 0, RK3588_SYSGRF_SOC_CON6, 1, GFLAGS, grf_type_sys), GATE(PCLK_PMU1, "pclk_pmu1", "pclk_pmu0_root", CLK_IS_CRITICAL, RK3588_PMU_CLKGATE_CON(1), 0, GFLAGS), GATE(CLK_DDR_FAIL_SAFE, "clk_ddr_fail_safe", "clk_pmu0", CLK_IGNORE_UNUSE= D, @@ -2439,6 +2449,7 @@ static struct rockchip_clk_branch rk3588_clk_branches= [] =3D { static void __init rk3588_clk_early_init(struct device_node *np) { struct rockchip_clk_provider *ctx; + struct regmap *sys_grf; unsigned long clk_nr_clks, max_clk_id1, max_clk_id2; void __iomem *reg_base; =20 @@ -2479,6 +2490,11 @@ static void __init rk3588_clk_early_init(struct devi= ce_node *np) &rk3588_cpub1clk_data, rk3588_cpub1clk_rates, ARRAY_SIZE(rk3588_cpub1clk_rates)); =20 + /* Register SYS_GRF for I2S MCLK output to IO gate clocks */ + sys_grf =3D syscon_regmap_lookup_by_compatible("rockchip,rk3588-sys-grf"); + if (!IS_ERR(sys_grf)) + rockchip_clk_add_grf(ctx, sys_grf, grf_type_sys); + rockchip_clk_register_branches(ctx, rk3588_early_clk_branches, ARRAY_SIZE(rk3588_early_clk_branches)); =20 --=20 2.53.0