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Fri, 17 Apr 2026 08:20:21 -0700 (PDT) Received: from hu-swatagar-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b5fa9ff390sm23491605ad.9.2026.04.17.08.20.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2026 08:20:21 -0700 (PDT) From: Swati Agarwal To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Swati Agarwal Subject: [PATCH] arm64: dts: qcom: monaco-evk: Enable primary USB controller in host mode Date: Fri, 17 Apr 2026 20:50:14 +0530 Message-Id: <20260417152014.3000797-1-swati.agarwal@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=d6/FDxjE c=1 sm=1 tr=0 ts=69e24fb7 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=MCf0qIOZ10eql2xmLHUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-GUID: dCIdRvcKSLyGo624RUrk2cPxaVECz59s X-Proofpoint-ORIG-GUID: dCIdRvcKSLyGo624RUrk2cPxaVECz59s X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDE1NCBTYWx0ZWRfX5Z+NTiGn1JJZ pFIxdfdboSXgRKVUoTZbM1Ixw2GhCdHmQokD/8TloNgiHtTwVYhlfadjRS+dpulcc7tjcDP2/mg c7xi1WuRLX6e10xum8tpc4NompgrRJoUX9LqcdlG8gHbjhraq6QDe/LdQmg7hfmw9vPKTk4qzXY zXoYMydLvAd/n26UOsrK02AyqrgdCANnxcf2johLeNj1b4jDIqzIeueG4iEUuPAqAZTvIA7L8kG vUvvn+9N78P0goDs62zeSudRkIe8smci4BC83Pok8Bxu0Qv0AHPCSxd3jUgdpDji1oyEn0M/Zyi uFJ3MkZdjViKotcQfuwxkzdJNyRqUOH4VbNT575LGaukW+4Wb5E5YJLb02j3rR/4mRg5H3mYLEE BLRVOWlCyzDw9xgoM24ax4mxVD5CHw9cS1O6NmQC/bbXC1E73MMhJXHcQZmwQAFmVaRPclSJRq8 eV5i988wLt/u93aORyQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-17_01,2026-04-17_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170154 Enable primary USB controller in host mode on monaco EVK Platform. Primary USB controller is connected to a Genesys Logic USB HUB GL3590 having 4 ports. The ports of hub that are present on lemans EVK standalone board are used as follows:- 1) port-1 is connected to HD3SS3220 Type-C port controller. 2) port-4 is used for the M.2 E key on corekit. Standard core kit uses UART for Bluetooth. This port is to be used only if user optionally replaces the WiFi card with the NFA765 chip which uses USB for Bluetooth. Remaining 2 ports will become functional when the interface plus mezzanine board is stacked on top of corekit: 3) port-2 is connected to another hub which is present on the mezz through which 4 type-A ports are connected. 4) port-3 is used for the M.2 B key for a 5G card when the mezz is connected. Primary USB Controller =E2=86=93 GL3590 USB Hub (4 ports) | |-- Port 1 =E2=86=92 HD3SS3220 Type=E2=80=91C Port Controller =E2=86=92= USB=E2=80=91C Connector | |-- Port 2 =E2=86=92 Mezzanine USB Hub (when mezz attached) | |-- Port 3 =E2=86=92 M.2 B=E2=80=91Key Slot (when mezz attached) | |-- Port 4 =E2=86=92 M.2 E=E2=80=91Key Slot (Default: BT via UART; USB only if NFA765 module is installed) Mark the primary USB controller as host only capable and add the HD3SS3220 Type-C port controller along with Type-c connector for controlling vbus supply. In hardware, there are dip switches provided to operate between USB1 port 0 and port 1 for primary Type-C USB controller. By default, switches will be off operating at USB0 port. After bootup to HLOS, it will be operated in USB1 port. Added support in the software for both HS and SS switches as usb1_hs_sel_switch and usb1_ss_sel_switch to avoid manually changing the dip switch position for USB1 port to function. Also, added usb1_hub_reset pin for USB1 hub to get detected after bootup as USB1 hub will be in inactive state before bootup. Signed-off-by: Swati Agarwal --- .../boot/dts/qcom/monaco-evk-common.dtsi | 173 +++++++++++++++++- 1 file changed, 172 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi b/arch/arm64/b= oot/dts/qcom/monaco-evk-common.dtsi index 12c847c03757..6316a8270f57 100644 --- a/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi @@ -23,6 +23,37 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 + connector-1 { + compatible =3D "usb-c-connector"; + label =3D "USB1-Type-C"; + data-role =3D "host"; + power-role =3D "source"; + + vbus-supply =3D <&usb1_vbus>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + usb1_con_hs_ep: endpoint { + remote-endpoint =3D <&usb_hub_2_1>; + }; + }; + + port@1 { + reg =3D <1>; + + usb1_con_ss_ep: endpoint { + remote-endpoint =3D <&hd3ss3220_1_in_ep>; + }; + + }; + }; + }; + connector-2 { compatible =3D "gpio-usb-b-connector", "usb-b-connector"; label =3D "micro-USB"; @@ -77,6 +108,15 @@ dp1_connector_in: endpoint { }; }; =20 + usb1_vbus: regulator-usb1-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "usb1_vbus"; + gpio =3D <&expander1 3 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + }; + usb2_vbus: regulator-usb2-vbus { compatible =3D "regulator-fixed"; regulator-name =3D "usb2_vbus"; @@ -445,6 +485,39 @@ lt8713sx_dp1_out: endpoint { }; }; }; + + usb-typec@47 { + compatible =3D "ti,hd3ss3220"; + reg =3D <0x47>; + + interrupts-extended =3D <&tlmm 45 IRQ_TYPE_EDGE_FALLING>; + + id-gpios =3D <&tlmm 13 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb1_id>, <&usb1_intr>; + pinctrl-names =3D "default"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + hd3ss3220_1_in_ep: endpoint { + remote-endpoint =3D <&usb1_con_ss_ep>; + }; + }; + + port@1 { + reg =3D <1>; + + hd3ss3220_1_out_ep: endpoint { + remote-endpoint =3D <&usb_hub_3_1>; + }; + }; + }; + }; }; =20 &i2c1 { @@ -556,6 +629,13 @@ expander5: gpio@3d { interrupts-extended =3D <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 =3D <&expander5_int>; pinctrl-names =3D "default"; + + gpio5-hog { + gpio-hog; + gpios =3D <5 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "usb1_ss_sel_switch"; + }; }; =20 expander6: gpio@3e { @@ -742,6 +822,28 @@ expander5_int: expander5-int-state { bias-pull-up; }; =20 + usb1_hub_reset: usb1-hub-reset-state { + pins =3D "gpio7"; + function =3D "gpio"; + output-enable; + output-high; + bias-disable; + }; + + usb1_id: usb1-id-state { + pins =3D "gpio13"; + function =3D "gpio"; + bias-pull-up; + }; + + usb1_hs_sel_switch: usb1-hs-sel-switch-state { + pins =3D "gpio14"; + function =3D "gpio"; + output-enable; + output-high; + bias-disable; + }; + expander1_int: expander1-int-state { pins =3D "gpio16"; function =3D "gpio"; @@ -784,6 +886,12 @@ expander3_int: expander3-int-state { bias-pull-up; }; =20 + usb1_intr: usb1-intr-state { + pins =3D "gpio45"; + function =3D "gpio"; + bias-pull-up; + }; + expander6_int: expander6-int-state { pins =3D "gpio52"; function =3D "gpio"; @@ -863,9 +971,72 @@ &ufs_mem_phy { }; =20 &usb_1 { - dr_mode =3D "peripheral"; + dr_mode =3D "host"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb1_hub_reset &usb1_hs_sel_switch>; =20 status =3D "okay"; + + usb_hub_2_x: hub@1 { + compatible =3D "usb5e3,610"; + reg =3D <1>; + + peer-hub =3D <&usb_hub_3_x>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1 { + reg =3D <1>; + + usb_hub_2_1: endpoint { + remote-endpoint =3D <&usb1_con_hs_ep>; + }; + }; + + /* + * Port-4 is connected to M.2 E key connector on corekit. + */ + port@4 { + reg =3D <4>; + + usb_hub_2_4: endpoint { + }; + }; + }; + }; + + usb_hub_3_x: hub@2 { + compatible =3D "usb5e3,625"; + reg =3D <2>; + + peer-hub =3D <&usb_hub_2_x>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1 { + reg =3D <1>; + + usb_hub_3_1: endpoint { + remote-endpoint =3D <&hd3ss3220_1_out_ep>; + }; + }; + + port@4 { + reg =3D <4>; + + usb_hub_3_4: endpoint { + }; + }; + }; + }; }; =20 &usb_1_hsphy { --=20 2.34.1