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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2e53ccd2564sm1135168eec.18.2026.04.17.00.33.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2026 00:33:59 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Rob Herring Subject: [PATCH v14 1/7] dt-bindings: arm: Add support for Qualcomm TGU trace Date: Fri, 17 Apr 2026 00:33:30 -0700 Message-Id: <20260417073336.2712426-2-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> References: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA3NCBTYWx0ZWRfX9/xgVWfrfe6H bYBny+M6IwyqW+vPuLxRqPEOliV8KePsNlt1jWvXoWBcZggX6qlgNZABVhgW2O1o70QVNenGD8j In5VpvKm9lEOBVMQTn+PWXA2sKVNS06/r+knZ1bi7NjRtH5fpAXNacpbO0S8l0C9r6SGsKvi1GD tBIXh+EWGcrPi2BJoRsgXlU/02S0CA6FzHnKtz2a3fwzf3jtRPkKCQCYjZgjhxDXukR30svhQ41 aKWS8eMv37T7FXorGmpC1tLlgEUIL2YvA1j0jRxYwav8TsIBidjdu614ZBkG/TsdmL4eFMHAB0D Z/fnQSO4LgyIEYglc53K+NXSDrpvOgG9fnuIgIVwxF6dor7fvaQ8hod3zhq+n38ISkRIQp55Ylg GTmD6SDoYk27XAmBZCzSPh+7CZyDWW7Nr1e6UXBlcYsJ2nmPym8xVFkWmHg3TMnwNLiEoJJCtTr J+oy5x9vd9HlSzdfFpg== X-Proofpoint-GUID: 7Z1V2wQP8_HRQ6USDNQAsb9QwolCOCRK X-Proofpoint-ORIG-GUID: 7Z1V2wQP8_HRQ6USDNQAsb9QwolCOCRK X-Authority-Analysis: v=2.4 cv=GcInWwXL c=1 sm=1 tr=0 ts=69e1e2ab cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=gEfo2CItAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=N3VNWiZ0WD7Ir0aJMQYA:9 a=PxkB5W3o20Ba91AHUih5:22 a=sptkURWiP4Gy88Gu7hUp:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 phishscore=0 suspectscore=0 bulkscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170074 Content-Type: text/plain; charset="utf-8" The Trigger Generation Unit (TGU) is designed to detect patterns or sequences within a specific region of the System on Chip (SoC). Once configured and activated, it monitors sense inputs and can detect a pre-programmed state or sequence across clock cycles, subsequently producing a trigger. TGU configuration space offset table x-------------------------x | | | | | | Step configuration | | space layout | coresight management | x-------------x | registers | |---> | | | | | | reserve | | | | | | |-------------------------| | |-------------| | | | | priority[3] | | step[7] |<-- | |-------------| |-------------------------| | | | priority[2] | | | | | |-------------| | ... | |Steps region | | priority[1] | | | | | |-------------| |-------------------------| | | | priority[0] | | |<-- | |-------------| | step[0] |--------------------> | | |-------------------------| | condition | | | | | | control and status | x-------------x | space | | | x-------------------------x |Timer/Counter| | | x-------------x TGU Configuration in Hardware The TGU provides a step region for user configuration, similar to a flow chart. Each step region consists of three register clusters: 1.Priority Region: Sets the required signals with priority. 2.Condition Region: Defines specific requirements (e.g., signal A reaches three times) and the subsequent action once the requirement is met. 3.Timer/Counter (Optional): Provides timing or counting functionality. Add a new tgu.yaml file to describe the bindings required to define the TGU in the device trees. Reviewed-by: Rob Herring (Arm) Signed-off-by: Songwei Chai --- .../devicetree/bindings/arm/qcom,tgu.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/qcom,tgu.yaml diff --git a/Documentation/devicetree/bindings/arm/qcom,tgu.yaml b/Document= ation/devicetree/bindings/arm/qcom,tgu.yaml new file mode 100644 index 000000000000..76440f2497b9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +# Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/qcom,tgu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Trigger Generation Unit - TGU + +description: | + The Trigger Generation Unit (TGU) is a Data Engine which can be utilized + to sense a plurality of signals and create a trigger into the CTI or + generate interrupts to processors. The TGU is like the trigger circuit + of a Logic Analyzer. The corresponding trigger logic can be realized by + configuring the conditions for each step after sensing the signal. + Once setup and enabled, it will observe sense inputs and based upon + the activity of those inputs, even over clock cycles, may detect a + preprogrammed state/sequence and then produce a trigger or interrupt. + + The primary use case of the TGU is to detect patterns or sequences on a + given set of signals within some region to identify the issue in time + once there is abnormal behavior in the subsystem. + +maintainers: + - Mao Jinlong + - Songwei Chai + +# Need a custom select here or 'arm,primecell' will match on lots of nodes +select: + properties: + compatible: + contains: + enum: + - qcom,tgu + required: + - compatible + +properties: + compatible: + items: + - const: qcom,tgu + - const: arm,primecell + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + tgu@10b0e000 { + compatible =3D "qcom,tgu", "arm,primecell"; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2e53ccd2564sm1135168eec.18.2026.04.17.00.34.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2026 00:34:01 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org Subject: [PATCH v14 2/7] qcom-tgu: Add TGU driver Date: Fri, 17 Apr 2026 00:33:31 -0700 Message-Id: <20260417073336.2712426-3-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> References: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA3NCBTYWx0ZWRfX07bkEI5Tf2LI gizA4Q+Whd2+lstXeFPYgmwbdXKAAw/S3dO1hkPfYM7+F3W/TKqQZAKMURwsJ0kswUPngeK8fg6 S8rdskhMNl1DPAlJhUno8znbi0C/TIVqXC8lQVR1xtHooMNOLo2Z50dQRW+JiasLQAwHAZww+m3 bZi17B9wTu3JMqxkA1Egj13bJJgKlmj7a02kETmVzxaZzN8bCosGU7NjzhP3xk1wrQFN4C2Dwyo oZ2DpSNoSWfloy6rRjMdxf+z1o8HZL1LQH0geYWPfCqruX2c3sHpfgRFDwNmXLv1J2sXKfG2ztz 5tnJEfuQOIWmrAep2P95SfDh7qD0GQl9YV9W9XgM0xF2isx+3abfyto+vd1zsP/+cnDTRy/7eVp 6hCj7qQ2hjN9HdI5mnJE9yNOiPw2GUAVRgekffXhmi3ur/xtBcdH082/KfojsH48i1wjK26BRkc EwOBQqW3D+cywSOWn6Q== X-Proofpoint-GUID: KPP9CllnNvmagpgfjHTokSooQKpv85sk X-Proofpoint-ORIG-GUID: KPP9CllnNvmagpgfjHTokSooQKpv85sk X-Authority-Analysis: v=2.4 cv=GcInWwXL c=1 sm=1 tr=0 ts=69e1e26e cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=h99DN6MNysFgGb7_OMAA:9 a=6Ab_bkdmUrQuMsNx7PHu:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 phishscore=0 suspectscore=0 bulkscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170074 Content-Type: text/plain; charset="utf-8" Add driver to support device TGU (Trigger Generation Unit). TGU is a Data Engine which can be utilized to sense a plurality of signals and create a trigger into the CTI or generate interrupts to processors. Add probe/enable/disable functions for tgu. Signed-off-by: Songwei Chai Acked-by: Konrad Dybcio --- .../ABI/testing/sysfs-bus-amba-devices-tgu | 9 + drivers/Makefile | 1 + drivers/hwtracing/Kconfig | 2 + drivers/hwtracing/qcom/Kconfig | 20 ++ drivers/hwtracing/qcom/Makefile | 3 + drivers/hwtracing/qcom/tgu.c | 193 ++++++++++++++++++ drivers/hwtracing/qcom/tgu.h | 51 +++++ 7 files changed, 279 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-amba-devices-tgu create mode 100644 drivers/hwtracing/qcom/Kconfig create mode 100644 drivers/hwtracing/qcom/Makefile create mode 100644 drivers/hwtracing/qcom/tgu.c create mode 100644 drivers/hwtracing/qcom/tgu.h diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documen= tation/ABI/testing/sysfs-bus-amba-devices-tgu new file mode 100644 index 000000000000..f877a00fcaa5 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu @@ -0,0 +1,9 @@ +What: /sys/bus/amba/devices//enable_tgu +Date: April 2026 +KernelVersion: 7.1 +Contact: Jinlong Mao , Songwei Chai +Description: + (RW) Set/Get the enable/disable status of TGU + Accepts only one of the 2 values - 0 or 1. + 0 : disable TGU. + 1 : enable TGU. diff --git a/drivers/Makefile b/drivers/Makefile index 53fbd2e0acdd..82b712a12a26 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -177,6 +177,7 @@ obj-$(CONFIG_RAS) +=3D ras/ obj-$(CONFIG_USB4) +=3D thunderbolt/ obj-$(CONFIG_CORESIGHT) +=3D hwtracing/coresight/ obj-y +=3D hwtracing/intel_th/ +obj-y +=3D hwtracing/qcom/ obj-$(CONFIG_STM) +=3D hwtracing/stm/ obj-$(CONFIG_HISI_PTT) +=3D hwtracing/ptt/ obj-y +=3D android/ diff --git a/drivers/hwtracing/Kconfig b/drivers/hwtracing/Kconfig index 911ee977103c..8a640218eed8 100644 --- a/drivers/hwtracing/Kconfig +++ b/drivers/hwtracing/Kconfig @@ -7,4 +7,6 @@ source "drivers/hwtracing/intel_th/Kconfig" =20 source "drivers/hwtracing/ptt/Kconfig" =20 +source "drivers/hwtracing/qcom/Kconfig" + endmenu diff --git a/drivers/hwtracing/qcom/Kconfig b/drivers/hwtracing/qcom/Kconfig new file mode 100644 index 000000000000..5c94c75ffa39 --- /dev/null +++ b/drivers/hwtracing/qcom/Kconfig @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# QCOM specific hwtracing drivers +# +menu "Qualcomm specific hwtracing drivers" + +config QCOM_TGU + tristate "QCOM Trigger Generation Unit driver" + depends on ARCH_QCOM || COMPILE_TEST + depends on ARM_AMBA + help + This driver provides support for Trigger Generation Unit that is + used to detect patterns or sequences on a given set of signals. + TGU is used to monitor a particular bus within a given region to + detect illegal transaction sequences or slave responses. It is also + used to monitor a data stream to detect protocol violations and to + provide a trigger point for centering data around a specific event + within the trace data buffer. + +endmenu diff --git a/drivers/hwtracing/qcom/Makefile b/drivers/hwtracing/qcom/Makef= ile new file mode 100644 index 000000000000..5a0a868c1ea0 --- /dev/null +++ b/drivers/hwtracing/qcom/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-$(CONFIG_QCOM_TGU) +=3D tgu.o diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c new file mode 100644 index 000000000000..49c8f710b931 --- /dev/null +++ b/drivers/hwtracing/qcom/tgu.c @@ -0,0 +1,193 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "tgu.h" + +static void tgu_write_all_hw_regs(struct tgu_drvdata *drvdata) +{ + TGU_UNLOCK(drvdata->base); + /* Enable TGU to program the triggers */ + writel(1, drvdata->base + TGU_CONTROL); + TGU_LOCK(drvdata->base); +} + +static int tgu_enable(struct device *dev) +{ + struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); + + guard(spinlock)(&drvdata->lock); + drvdata->enabled =3D true; + + tgu_write_all_hw_regs(drvdata); + + return 0; +} + +static void tgu_do_disable(struct tgu_drvdata *drvdata) +{ + TGU_UNLOCK(drvdata->base); + writel(0, drvdata->base + TGU_CONTROL); + TGU_LOCK(drvdata->base); + + drvdata->enabled =3D false; +} + +static void tgu_disable(struct device *dev) +{ + struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); + + guard(spinlock)(&drvdata->lock); + if (!drvdata->enabled) + return; + + tgu_do_disable(drvdata); +} + +static ssize_t enable_tgu_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); + bool enabled; + + guard(spinlock)(&drvdata->lock); + enabled =3D drvdata->enabled; + + return sysfs_emit(buf, "%d\n", !!enabled); +} + +/* enable_tgu_store - Configure Trace and Gating Unit (TGU) triggers. */ +static ssize_t enable_tgu_store(struct device *dev, + struct device_attribute *attr, + const char *buf, + size_t size) +{ + struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); + unsigned long val; + int ret; + + ret =3D kstrtoul(buf, 0, &val); + if (ret || val > 1) + return -EINVAL; + + if (val) { + scoped_guard(spinlock, &drvdata->lock) { + if (drvdata->enabled) + return -EBUSY; + } + + ret =3D pm_runtime_resume_and_get(dev); + if (ret) + return ret; + + ret =3D tgu_enable(dev); + if (ret) { + pm_runtime_put(dev); + return ret; + } + } else { + scoped_guard(spinlock, &drvdata->lock) { + if (!drvdata->enabled) + return -EINVAL; + } + + tgu_disable(dev); + pm_runtime_put(dev); + } + + return size; +} +static DEVICE_ATTR_RW(enable_tgu); + +static struct attribute *tgu_common_attrs[] =3D { + &dev_attr_enable_tgu.attr, + NULL, +}; + +static const struct attribute_group tgu_common_grp =3D { + .attrs =3D tgu_common_attrs, + NULL, +}; + +static const struct attribute_group *tgu_attr_groups[] =3D { + &tgu_common_grp, + NULL, +}; + +static int tgu_probe(struct amba_device *adev, const struct amba_id *id) +{ + struct device *dev =3D &adev->dev; + struct tgu_drvdata *drvdata; + int ret; + + drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + drvdata->dev =3D &adev->dev; + dev_set_drvdata(dev, drvdata); + + drvdata->base =3D devm_ioremap_resource(dev, &adev->res); + if (IS_ERR(drvdata->base)) + return PTR_ERR(drvdata->base); + + spin_lock_init(&drvdata->lock); + + ret =3D sysfs_create_groups(&dev->kobj, tgu_attr_groups); + if (ret) { + dev_err(dev, "failed to create sysfs groups: %d\n", ret); + return ret; + } + + drvdata->enabled =3D false; + + pm_runtime_put(&adev->dev); + + return 0; +} + +static void tgu_remove(struct amba_device *adev) +{ + struct device *dev =3D &adev->dev; + + sysfs_remove_groups(&dev->kobj, tgu_attr_groups); + + tgu_disable(dev); +} + +static const struct amba_id tgu_ids[] =3D { + { + .id =3D 0x000f0e00, + .mask =3D 0x000fffff, + }, + { 0, 0, NULL }, +}; + +MODULE_DEVICE_TABLE(amba, tgu_ids); + +static struct amba_driver tgu_driver =3D { + .drv =3D { + .name =3D "qcom-tgu", + .suppress_bind_attrs =3D true, + }, + .probe =3D tgu_probe, + .remove =3D tgu_remove, + .id_table =3D tgu_ids, +}; + +module_amba_driver(tgu_driver); + +MODULE_AUTHOR("Songwei Chai "); +MODULE_AUTHOR("Jinlong Mao "); +MODULE_DESCRIPTION("Qualcomm Trigger Generation Unit driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h new file mode 100644 index 000000000000..dd7533b9d735 --- /dev/null +++ b/drivers/hwtracing/qcom/tgu.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef _QCOM_TGU_H +#define _QCOM_TGU_H + +/* Register addresses */ +#define TGU_CONTROL 0x0000 +#define TGU_LAR 0xfb0 +#define TGU_UNLOCK_OFFSET 0xc5acce55 + +static inline void TGU_LOCK(void __iomem *addr) +{ + do { + /* Wait for things to settle */ + mb(); + writel_relaxed(0x0, addr + TGU_LAR); + } while (0); +} + +static inline void TGU_UNLOCK(void __iomem *addr) +{ + do { + writel_relaxed(TGU_UNLOCK_OFFSET, addr + TGU_LAR); + /* Make sure everyone has seen this */ + mb(); + } while (0); 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2e53ccd2564sm1135168eec.18.2026.04.17.00.34.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2026 00:34:02 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Jie Gan Subject: [PATCH v14 3/7] qcom-tgu: Add signal priority support Date: Fri, 17 Apr 2026 00:33:32 -0700 Message-Id: <20260417073336.2712426-4-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> References: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA3NCBTYWx0ZWRfX2uZ0MIzgOIl7 wiZV2MX6CZzR50kvftPL9JsG4tQzZNeXehe9kFn7uXnRmlemJA6WwAZxbcMq2jnGY7RVSvYa5NO 0kFPa2nBw71ghU6spb7QDjL7QEqsUH2a3So2ZnsNkRGJe4c7B/sYIBHCnInvUvKkWd+77p1oxs9 C84NHjkpIbDFOU3uYiF4y85194gZF04A4efRZsHpRPVEbNjhh4/d2TbCjAkXfRz/5ah/itJhW+j JfEIw7zXCiSGbgAS8tGlq3YVbaaFp5Y9QTwuNV5HMIPV4Av93M/cKZGR64+ru5siMByTfe44H10 Zwxjg21Lb9BMfFvtjnzBWPOEkyFlsYh3tmAUiBlStzD3VVhxuhvEF4bmnpnhHs4DIBkofgBT+NQ B2+ktuXsrFGjU3y0VXNSuMicAU93KqtDClnW4yMxpGXjLyZIr2iKDZJgQW1ZPA9bhH088ndZUFu P99pONZs6QE2qTNM8gg== X-Proofpoint-GUID: 3fLT-NYE7RtJbUBVqjaRoddp1EIf6CtE X-Proofpoint-ORIG-GUID: 3fLT-NYE7RtJbUBVqjaRoddp1EIf6CtE X-Authority-Analysis: v=2.4 cv=GcInWwXL c=1 sm=1 tr=0 ts=69e1e26e cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=aHbVEu0FunmFpxPyS6YA:9 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 phishscore=0 suspectscore=0 bulkscore=0 spamscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170074 Content-Type: text/plain; charset="utf-8" Like circuit of a Logic analyzer, in TGU, the requirement could be configured in each step and the trigger will be created once the requirements are met. Add priority functionality here to sort the signals into different priorities. The signal which is wanted could be configured in each step's priority node, the larger number means the higher priority and the signal with higher priority will be sensed more preferentially. Reviewed-by: Jie Gan Signed-off-by: Songwei Chai --- .../ABI/testing/sysfs-bus-amba-devices-tgu | 7 + drivers/hwtracing/qcom/tgu.c | 161 ++++++++++++++++++ drivers/hwtracing/qcom/tgu.h | 114 +++++++++++++ 3 files changed, 282 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documen= tation/ABI/testing/sysfs-bus-amba-devices-tgu index f877a00fcaa5..223873789ca6 100644 --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu @@ -7,3 +7,10 @@ Description: Accepts only one of the 2 values - 0 or 1. 0 : disable TGU. 1 : enable TGU. + +What: /sys/bus/amba/devices//step[0:7]_priority[0:3]/reg[0:17] +Date: April 2026 +KernelVersion: 7.1 +Contact: Jinlong Mao , Songwei Chai +Description: + (RW) Set/Get the sensed signal with specific step and priority for TGU. diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c index 49c8f710b931..7d69986c3e3d 100644 --- a/drivers/hwtracing/qcom/tgu.c +++ b/drivers/hwtracing/qcom/tgu.c @@ -14,14 +14,123 @@ =20 #include "tgu.h" =20 +static int calculate_array_location(struct tgu_drvdata *drvdata, + int step_index, int operation_index, + int reg_index) +{ + return operation_index * (drvdata->num_step) * (drvdata->num_reg) + + step_index * (drvdata->num_reg) + reg_index; +} + +static ssize_t tgu_dataset_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); + struct tgu_attribute *tgu_attr =3D + container_of(attr, struct tgu_attribute, attr); + int index; + + index =3D calculate_array_location(drvdata, tgu_attr->step_index, + tgu_attr->operation_index, + tgu_attr->reg_num); + + return sysfs_emit(buf, "0x%x\n", + drvdata->value_table->priority[index]); +} + +static ssize_t tgu_dataset_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + struct tgu_drvdata *tgu_drvdata =3D dev_get_drvdata(dev); + struct tgu_attribute *tgu_attr =3D + container_of(attr, struct tgu_attribute, attr); + unsigned long val; + int index; + int ret; + + ret =3D kstrtoul(buf, 0, &val); + if (ret) + return ret; + + guard(spinlock)(&tgu_drvdata->lock); + index =3D calculate_array_location(tgu_drvdata, tgu_attr->step_index, + tgu_attr->operation_index, + tgu_attr->reg_num); + + tgu_drvdata->value_table->priority[index] =3D val; + + return size; +} + +static umode_t tgu_node_visible(struct kobject *kobject, + struct attribute *attr, + int n) +{ + struct device *dev =3D kobj_to_dev(kobject); + struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); + struct device_attribute *dev_attr =3D + container_of(attr, struct device_attribute, attr); + struct tgu_attribute *tgu_attr =3D + container_of(dev_attr, struct tgu_attribute, attr); + + if (tgu_attr->step_index >=3D drvdata->num_step) + return SYSFS_GROUP_INVISIBLE; + + if (tgu_attr->reg_num >=3D drvdata->num_reg) + return 0; + + return attr->mode; +} + static void tgu_write_all_hw_regs(struct tgu_drvdata *drvdata) { + int i, j, k, index; + TGU_UNLOCK(drvdata->base); + for (i =3D 0; i < drvdata->num_step; i++) { + for (j =3D 0; j < MAX_PRIORITY; j++) { + for (k =3D 0; k < drvdata->num_reg; k++) { + index =3D calculate_array_location( + drvdata, i, j, k); + + writel(drvdata->value_table->priority[index], + drvdata->base + + PRIORITY_REG_STEP(i, j, k)); + } + } + } /* Enable TGU to program the triggers */ writel(1, drvdata->base + TGU_CONTROL); TGU_LOCK(drvdata->base); } =20 +static void tgu_set_reg_number(struct tgu_drvdata *drvdata) +{ + int num_sense_input; + int num_reg; + u32 devid; + + devid =3D readl(drvdata->base + TGU_DEVID); + + num_sense_input =3D TGU_DEVID_SENSE_INPUT(devid); + num_reg =3D (num_sense_input * TGU_BITS_PER_SIGNAL) / LENGTH_REGISTER; + + if ((num_sense_input * TGU_BITS_PER_SIGNAL) % LENGTH_REGISTER) + num_reg++; + + drvdata->num_reg =3D num_reg; +} + +static void tgu_set_steps(struct tgu_drvdata *drvdata) +{ + u32 devid; + + devid =3D readl(drvdata->base + TGU_DEVID); + + drvdata->num_step =3D TGU_DEVID_STEPS(devid); +} + static int tgu_enable(struct device *dev) { struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); @@ -121,6 +230,38 @@ static const struct attribute_group tgu_common_grp =3D= { =20 static const struct attribute_group *tgu_attr_groups[] =3D { &tgu_common_grp, + PRIORITY_ATTRIBUTE_GROUP_INIT(0, 0), + PRIORITY_ATTRIBUTE_GROUP_INIT(0, 1), + PRIORITY_ATTRIBUTE_GROUP_INIT(0, 2), + PRIORITY_ATTRIBUTE_GROUP_INIT(0, 3), + PRIORITY_ATTRIBUTE_GROUP_INIT(1, 0), + PRIORITY_ATTRIBUTE_GROUP_INIT(1, 1), + PRIORITY_ATTRIBUTE_GROUP_INIT(1, 2), + PRIORITY_ATTRIBUTE_GROUP_INIT(1, 3), + PRIORITY_ATTRIBUTE_GROUP_INIT(2, 0), + PRIORITY_ATTRIBUTE_GROUP_INIT(2, 1), + PRIORITY_ATTRIBUTE_GROUP_INIT(2, 2), + PRIORITY_ATTRIBUTE_GROUP_INIT(2, 3), + PRIORITY_ATTRIBUTE_GROUP_INIT(3, 0), + PRIORITY_ATTRIBUTE_GROUP_INIT(3, 1), + PRIORITY_ATTRIBUTE_GROUP_INIT(3, 2), + PRIORITY_ATTRIBUTE_GROUP_INIT(3, 3), + PRIORITY_ATTRIBUTE_GROUP_INIT(4, 0), + PRIORITY_ATTRIBUTE_GROUP_INIT(4, 1), + PRIORITY_ATTRIBUTE_GROUP_INIT(4, 2), + PRIORITY_ATTRIBUTE_GROUP_INIT(4, 3), + PRIORITY_ATTRIBUTE_GROUP_INIT(5, 0), + PRIORITY_ATTRIBUTE_GROUP_INIT(5, 1), + PRIORITY_ATTRIBUTE_GROUP_INIT(5, 2), + PRIORITY_ATTRIBUTE_GROUP_INIT(5, 3), + PRIORITY_ATTRIBUTE_GROUP_INIT(6, 0), + PRIORITY_ATTRIBUTE_GROUP_INIT(6, 1), + PRIORITY_ATTRIBUTE_GROUP_INIT(6, 2), + PRIORITY_ATTRIBUTE_GROUP_INIT(6, 3), + PRIORITY_ATTRIBUTE_GROUP_INIT(7, 0), + PRIORITY_ATTRIBUTE_GROUP_INIT(7, 1), + PRIORITY_ATTRIBUTE_GROUP_INIT(7, 2), + PRIORITY_ATTRIBUTE_GROUP_INIT(7, 3), NULL, }; =20 @@ -128,6 +269,8 @@ static int tgu_probe(struct amba_device *adev, const st= ruct amba_id *id) { struct device *dev =3D &adev->dev; struct tgu_drvdata *drvdata; + unsigned int *priority; + size_t priority_size; int ret; =20 drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); @@ -143,12 +286,30 @@ static int tgu_probe(struct amba_device *adev, const = struct amba_id *id) =20 spin_lock_init(&drvdata->lock); =20 + tgu_set_reg_number(drvdata); + tgu_set_steps(drvdata); + ret =3D sysfs_create_groups(&dev->kobj, tgu_attr_groups); if (ret) { dev_err(dev, "failed to create sysfs groups: %d\n", ret); return ret; } =20 + drvdata->value_table =3D + devm_kzalloc(dev, sizeof(*drvdata->value_table), GFP_KERNEL); + if (!drvdata->value_table) + return -ENOMEM; + + priority_size =3D MAX_PRIORITY * drvdata->num_reg * drvdata->num_step; + + priority =3D devm_kcalloc(dev, priority_size, + sizeof(*drvdata->value_table->priority), + GFP_KERNEL); + if (!priority) + return -ENOMEM; + + drvdata->value_table->priority =3D priority; + drvdata->enabled =3D false; =20 pm_runtime_put(&adev->dev); diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h index dd7533b9d735..f994d83acb1d 100644 --- a/drivers/hwtracing/qcom/tgu.h +++ b/drivers/hwtracing/qcom/tgu.h @@ -10,6 +10,114 @@ #define TGU_CONTROL 0x0000 #define TGU_LAR 0xfb0 #define TGU_UNLOCK_OFFSET 0xc5acce55 +#define TGU_DEVID 0xfc8 + +#define TGU_DEVID_SENSE_INPUT(devid_val) \ + ((int)FIELD_GET(GENMASK(17, 10), devid_val)) +#define TGU_DEVID_STEPS(devid_val) \ + ((int)FIELD_GET(GENMASK(6, 3), devid_val)) +#define TGU_BITS_PER_SIGNAL 4 +#define LENGTH_REGISTER 32 + +/* + * TGU configuration space Step configuration + * offset table space layout + * x-------------------------x$ x-------------x$ + * | |$ | |$ + * | | | reserve |$ + * | | | |$ + * |coresight management | |-------------|ba= se+n*0x1D8+0x1F4$ + * | registers | |---> |priority[3] |$ + * | | | |-------------|ba= se+n*0x1D8+0x194$ + * | | | |priority[2] |$ + * |-------------------------| | |-------------|ba= se+n*0x1D8+0x134$ + * | | | |priority[1] |$ + * | step[7] | | |-------------|ba= se+n*0x1D8+0xD4$ + * |-------------------------|->base+0x40+7*0x1D8 | |priority[0] |$ + * | | | |-------------|ba= se+n*0x1D8+0x74$ + * | ... | | | condition |$ + * | | | | select |$ + * |-------------------------|->base+0x40+1*0x1D8 | |-------------|ba= se+n*0x1D8+0x60$ + * | | | | condition |$ + * | step[0] |--------------------> | decode |$ + * |-------------------------|-> base+0x40 |-------------|ba= se+n*0x1D8+0x50$ + * | | | |$ + * | Control and status space| |Timer/Counter|$ + * | space | | |$ + * x-------------------------x->base x-------------x b= ase+n*0x1D8+0x40$ + * + */ +#define STEP_OFFSET 0x1D8 +#define PRIORITY_START_OFFSET 0x0074 +#define PRIORITY_OFFSET 0x60 +#define REG_OFFSET 0x4 + +/* Calculate compare step addresses */ +#define PRIORITY_REG_STEP(step, priority, reg)\ + (PRIORITY_START_OFFSET + PRIORITY_OFFSET * priority +\ + REG_OFFSET * reg + STEP_OFFSET * step) + +#define tgu_dataset_rw(name, step_index, type, reg_num) \ + (&((struct tgu_attribute[]){ { \ + __ATTR(name, 0644, tgu_dataset_show, tgu_dataset_store), \ + step_index, \ + type, \ + reg_num, \ + } })[0].attr.attr) + +#define STEP_PRIORITY(step_index, reg_num, priority) \ + tgu_dataset_rw(reg##reg_num, step_index, TGU_PRIORITY##priority, \ + reg_num) + +#define STEP_PRIORITY_LIST(step_index, priority) \ + {STEP_PRIORITY(step_index, 0, priority), \ + STEP_PRIORITY(step_index, 1, priority), \ + STEP_PRIORITY(step_index, 2, priority), \ + STEP_PRIORITY(step_index, 3, priority), \ + STEP_PRIORITY(step_index, 4, priority), \ + STEP_PRIORITY(step_index, 5, priority), \ + STEP_PRIORITY(step_index, 6, priority), \ + STEP_PRIORITY(step_index, 7, priority), \ + STEP_PRIORITY(step_index, 8, priority), \ + STEP_PRIORITY(step_index, 9, priority), \ + STEP_PRIORITY(step_index, 10, priority), \ + STEP_PRIORITY(step_index, 11, priority), \ + STEP_PRIORITY(step_index, 12, priority), \ + STEP_PRIORITY(step_index, 13, priority), \ + STEP_PRIORITY(step_index, 14, priority), \ + STEP_PRIORITY(step_index, 15, priority), \ + STEP_PRIORITY(step_index, 16, priority), \ + STEP_PRIORITY(step_index, 17, priority), \ + NULL \ + } + +#define PRIORITY_ATTRIBUTE_GROUP_INIT(step, priority)\ + (&(const struct attribute_group){\ + .attrs =3D (struct attribute*[])STEP_PRIORITY_LIST(step, priority),\ + .is_visible =3D tgu_node_visible,\ + .name =3D "step" #step "_priority" #priority \ + }) + +enum operation_index { + TGU_PRIORITY0, + TGU_PRIORITY1, + TGU_PRIORITY2, + TGU_PRIORITY3, +}; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2e53ccd2564sm1135168eec.18.2026.04.17.00.34.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2026 00:34:04 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Jie Gan Subject: [PATCH v14 4/7] qcom-tgu: Add TGU decode support Date: Fri, 17 Apr 2026 00:33:33 -0700 Message-Id: <20260417073336.2712426-5-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> References: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA3NCBTYWx0ZWRfXyJ3PQyxN76qQ 8IM7VGy2yopFGhvLf4hqdDlePgo5WYsKrfCNKv1stzpils3Ku7sh5EijJIke8ZS3atoIZussrwH uRqnjHmmPB8EdbmMy+dR2zq7HWXtgPxek6dZMhtPcP2D36AGrRciAVPbI0oznq++GWqBioAJsgg 5vjinV4wTs11c7BMqXPlEAUcDqe8Q9Tgcd8tSRGTRyo3hhnXMGHuShYoKFvgct2oIEomDFAGjEL azTKE+b+Q1zI7VrRfWAE+6haIO4Kz1XfHQIbOP/J1/+fJp2Ju126bCxHs72OP/aAHVWAwkpsgYY GbJZACspQsxDi8qcWGm0RuK/wNXAZsF5ejxJsK32gW5p01Fq7BKmPK/uWZsRCa/1M1h46WMkchJ 2PA6zQ4H0vQtGW799HevuUBxrxZH9qvXcdWMe7xmW2q1S2ssP5t637GTrCmEAn2bVv9VbwAta8p 7Hsxq6p37iXcT8ojEdA== X-Authority-Analysis: v=2.4 cv=ZPznX37b c=1 sm=1 tr=0 ts=69e1e2b2 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=p0PFFVR7nGJo5X-0Br8A:9 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-ORIG-GUID: L222S-lkvrHyy15Jye__Ls4zez0hDhug X-Proofpoint-GUID: L222S-lkvrHyy15Jye__Ls4zez0hDhug X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 bulkscore=0 malwarescore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170074 Content-Type: text/plain; charset="utf-8" Decoding is when all the potential pieces for creating a trigger are brought together for a given step. Example - there may be a counter keeping track of some occurrences and a priority-group that is being used to detect a pattern on the sense inputs. These 2 inputs to condition_decode must be programmed, for a given step, to establish the condition for the trigger, or movement to another steps. Reviewed-by: Jie Gan Signed-off-by: Songwei Chai --- .../ABI/testing/sysfs-bus-amba-devices-tgu | 7 + drivers/hwtracing/qcom/tgu.c | 157 +++++++++++++++--- drivers/hwtracing/qcom/tgu.h | 27 +++ 3 files changed, 170 insertions(+), 21 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documen= tation/ABI/testing/sysfs-bus-amba-devices-tgu index 223873789ca6..4ef0d696d3d0 100644 --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu @@ -14,3 +14,10 @@ KernelVersion: 7.1 Contact: Jinlong Mao , Songwei Chai Description: (RW) Set/Get the sensed signal with specific step and priority for TGU. + +What: /sys/bus/amba/devices//step[0:7]_condition_decode/reg[0:3] +Date: April 2026 +KernelVersion: 7.1 +Contact: Jinlong Mao , Songwei Chai +Description: + (RW) Set/Get the decode mode with specific step for TGU. diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c index 7d69986c3e3d..937211923d93 100644 --- a/drivers/hwtracing/qcom/tgu.c +++ b/drivers/hwtracing/qcom/tgu.c @@ -18,8 +18,33 @@ static int calculate_array_location(struct tgu_drvdata *= drvdata, int step_index, int operation_index, int reg_index) { - return operation_index * (drvdata->num_step) * (drvdata->num_reg) + - step_index * (drvdata->num_reg) + reg_index; + switch (operation_index) { + case TGU_PRIORITY0: + case TGU_PRIORITY1: + case TGU_PRIORITY2: + case TGU_PRIORITY3: + return operation_index * (drvdata->num_step) * + (drvdata->num_reg) + + step_index * (drvdata->num_reg) + reg_index; + case TGU_CONDITION_DECODE: + return step_index * (drvdata->num_condition_decode) + + reg_index; + default: + break; + } + + return -EINVAL; +} + +static int check_array_location(struct tgu_drvdata *drvdata, int step, + int ops, int reg) +{ + int result =3D calculate_array_location(drvdata, step, ops, reg); + + if (result =3D=3D -EINVAL) + dev_err(drvdata->dev, "check array location - Fail\n"); + + return result; } =20 static ssize_t tgu_dataset_show(struct device *dev, @@ -30,12 +55,26 @@ static ssize_t tgu_dataset_show(struct device *dev, container_of(attr, struct tgu_attribute, attr); int index; =20 - index =3D calculate_array_location(drvdata, tgu_attr->step_index, - tgu_attr->operation_index, - tgu_attr->reg_num); - - return sysfs_emit(buf, "0x%x\n", - drvdata->value_table->priority[index]); + index =3D check_array_location(drvdata, tgu_attr->step_index, + tgu_attr->operation_index, tgu_attr->reg_num); + + if (index =3D=3D -EINVAL) + return index; + + switch (tgu_attr->operation_index) { + case TGU_PRIORITY0: + case TGU_PRIORITY1: + case TGU_PRIORITY2: + case TGU_PRIORITY3: + return sysfs_emit(buf, "0x%x\n", + drvdata->value_table->priority[index]); + case TGU_CONDITION_DECODE: + return sysfs_emit(buf, "0x%x\n", + drvdata->value_table->condition_decode[index]); + default: + break; + } + return -EINVAL; } =20 static ssize_t tgu_dataset_store(struct device *dev, @@ -54,13 +93,31 @@ static ssize_t tgu_dataset_store(struct device *dev, return ret; =20 guard(spinlock)(&tgu_drvdata->lock); - index =3D calculate_array_location(tgu_drvdata, tgu_attr->step_index, + index =3D check_array_location(tgu_drvdata, tgu_attr->step_index, tgu_attr->operation_index, tgu_attr->reg_num); =20 - tgu_drvdata->value_table->priority[index] =3D val; + if (index =3D=3D -EINVAL) + return index; + + switch (tgu_attr->operation_index) { + case TGU_PRIORITY0: + case TGU_PRIORITY1: + case TGU_PRIORITY2: + case TGU_PRIORITY3: + tgu_drvdata->value_table->priority[index] =3D val; + ret =3D size; + break; + case TGU_CONDITION_DECODE: + tgu_drvdata->value_table->condition_decode[index] =3D val; + ret =3D size; + break; + default: + ret =3D -EINVAL; + break; + } =20 - return size; + return ret; } =20 static umode_t tgu_node_visible(struct kobject *kobject, @@ -77,13 +134,26 @@ static umode_t tgu_node_visible(struct kobject *kobjec= t, if (tgu_attr->step_index >=3D drvdata->num_step) return SYSFS_GROUP_INVISIBLE; =20 - if (tgu_attr->reg_num >=3D drvdata->num_reg) - return 0; + switch (tgu_attr->operation_index) { + case TGU_PRIORITY0: + case TGU_PRIORITY1: + case TGU_PRIORITY2: + case TGU_PRIORITY3: + if (tgu_attr->reg_num < drvdata->num_reg) + return attr->mode; + break; + case TGU_CONDITION_DECODE: + if (tgu_attr->reg_num < drvdata->num_condition_decode) + return attr->mode; + break; + default: + break; + } =20 - return attr->mode; + return 0; } =20 -static void tgu_write_all_hw_regs(struct tgu_drvdata *drvdata) +static ssize_t tgu_write_all_hw_regs(struct tgu_drvdata *drvdata) { int i, j, k, index; =20 @@ -91,8 +161,10 @@ static void tgu_write_all_hw_regs(struct tgu_drvdata *d= rvdata) for (i =3D 0; i < drvdata->num_step; i++) { for (j =3D 0; j < MAX_PRIORITY; j++) { for (k =3D 0; k < drvdata->num_reg; k++) { - index =3D calculate_array_location( + index =3D check_array_location( drvdata, i, j, k); + if (index =3D=3D -EINVAL) + goto exit; =20 writel(drvdata->value_table->priority[index], drvdata->base + @@ -100,9 +172,23 @@ static void tgu_write_all_hw_regs(struct tgu_drvdata *= drvdata) } } } + + for (i =3D 0; i < drvdata->num_step; i++) { + for (j =3D 0; j < drvdata->num_condition_decode; j++) { + index =3D check_array_location(drvdata, i, + TGU_CONDITION_DECODE, j); + if (index =3D=3D -EINVAL) + goto exit; + + writel(drvdata->value_table->condition_decode[index], + drvdata->base + CONDITION_DECODE_STEP(i, j)); + } + } /* Enable TGU to program the triggers */ writel(1, drvdata->base + TGU_CONTROL); +exit: TGU_LOCK(drvdata->base); + return index >=3D 0 ? 0 : -EINVAL; } =20 static void tgu_set_reg_number(struct tgu_drvdata *drvdata) @@ -131,16 +217,26 @@ static void tgu_set_steps(struct tgu_drvdata *drvdata) drvdata->num_step =3D TGU_DEVID_STEPS(devid); } =20 +static void tgu_set_conditions(struct tgu_drvdata *drvdata) +{ + u32 devid; + + devid =3D readl(drvdata->base + TGU_DEVID); + drvdata->num_condition_decode =3D TGU_DEVID_CONDITIONS(devid); +} + static int tgu_enable(struct device *dev) { struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 guard(spinlock)(&drvdata->lock); - drvdata->enabled =3D true; =20 - tgu_write_all_hw_regs(drvdata); + ret =3D tgu_write_all_hw_regs(drvdata); + if (!ret) + drvdata->enabled =3D true; =20 - return 0; + return ret; } =20 static void tgu_do_disable(struct tgu_drvdata *drvdata) @@ -262,6 +358,14 @@ static const struct attribute_group *tgu_attr_groups[]= =3D { PRIORITY_ATTRIBUTE_GROUP_INIT(7, 1), PRIORITY_ATTRIBUTE_GROUP_INIT(7, 2), PRIORITY_ATTRIBUTE_GROUP_INIT(7, 3), + CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(0), + CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(1), + CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(2), + CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(3), + CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(4), + CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(5), + CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(6), + CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(7), NULL, }; =20 @@ -269,8 +373,8 @@ static int tgu_probe(struct amba_device *adev, const st= ruct amba_id *id) { struct device *dev =3D &adev->dev; struct tgu_drvdata *drvdata; - unsigned int *priority; - size_t priority_size; + unsigned int *priority, *condition; + size_t priority_size, condition_size; int ret; =20 drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); @@ -288,6 +392,7 @@ static int tgu_probe(struct amba_device *adev, const st= ruct amba_id *id) =20 tgu_set_reg_number(drvdata); tgu_set_steps(drvdata); + tgu_set_conditions(drvdata); =20 ret =3D sysfs_create_groups(&dev->kobj, tgu_attr_groups); if (ret) { @@ -310,6 +415,16 @@ static int tgu_probe(struct amba_device *adev, const s= truct amba_id *id) =20 drvdata->value_table->priority =3D priority; =20 + condition_size =3D drvdata->num_condition_decode * drvdata->num_step; + + condition =3D devm_kcalloc(dev, condition_size, + sizeof(*(drvdata->value_table->condition_decode)), + GFP_KERNEL); + if (!condition) + return -ENOMEM; + + drvdata->value_table->condition_decode =3D condition; + drvdata->enabled =3D false; =20 pm_runtime_put(&adev->dev); diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h index f994d83acb1d..56e4161a8bc2 100644 --- a/drivers/hwtracing/qcom/tgu.h +++ b/drivers/hwtracing/qcom/tgu.h @@ -16,6 +16,8 @@ ((int)FIELD_GET(GENMASK(17, 10), devid_val)) #define TGU_DEVID_STEPS(devid_val) \ ((int)FIELD_GET(GENMASK(6, 3), devid_val)) +#define TGU_DEVID_CONDITIONS(devid_val) \ + ((int)FIELD_GET(GENMASK(2, 0), devid_val)) #define TGU_BITS_PER_SIGNAL 4 #define LENGTH_REGISTER 32 =20 @@ -49,6 +51,7 @@ */ #define STEP_OFFSET 0x1D8 #define PRIORITY_START_OFFSET 0x0074 +#define CONDITION_DECODE_OFFSET 0x0050 #define PRIORITY_OFFSET 0x60 #define REG_OFFSET 0x4 =20 @@ -57,6 +60,9 @@ (PRIORITY_START_OFFSET + PRIORITY_OFFSET * priority +\ REG_OFFSET * reg + STEP_OFFSET * step) =20 +#define CONDITION_DECODE_STEP(step, decode) \ + (CONDITION_DECODE_OFFSET + REG_OFFSET * decode + STEP_OFFSET * step) + #define tgu_dataset_rw(name, step_index, type, reg_num) \ (&((struct tgu_attribute[]){ { \ __ATTR(name, 0644, tgu_dataset_show, tgu_dataset_store), \ @@ -68,6 +74,8 @@ #define STEP_PRIORITY(step_index, reg_num, priority) \ tgu_dataset_rw(reg##reg_num, step_index, TGU_PRIORITY##priority, \ reg_num) +#define STEP_DECODE(step_index, reg_num) \ + tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_DECODE, reg_num) =20 #define STEP_PRIORITY_LIST(step_index, priority) \ {STEP_PRIORITY(step_index, 0, priority), \ @@ -91,6 +99,14 @@ NULL \ } =20 +#define STEP_DECODE_LIST(n) \ + {STEP_DECODE(n, 0), \ + STEP_DECODE(n, 1), \ + STEP_DECODE(n, 2), \ + STEP_DECODE(n, 3), \ + NULL \ + } + #define PRIORITY_ATTRIBUTE_GROUP_INIT(step, priority)\ (&(const struct attribute_group){\ .attrs =3D (struct attribute*[])STEP_PRIORITY_LIST(step, priority),\ @@ -98,11 +114,19 @@ .name =3D "step" #step "_priority" #priority \ }) =20 +#define CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(step)\ + (&(const struct attribute_group){\ + .attrs =3D (struct attribute*[])STEP_DECODE_LIST(step),\ + .is_visible =3D tgu_node_visible,\ + .name =3D "step" #step "_condition_decode" \ + }) + enum operation_index { TGU_PRIORITY0, TGU_PRIORITY1, TGU_PRIORITY2, TGU_PRIORITY3, + TGU_CONDITION_DECODE, }; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2e53ccd2564sm1135168eec.18.2026.04.17.00.34.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2026 00:34:06 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Jie Gan Subject: [PATCH v14 5/7] qcom-tgu: Add support to configure next action Date: Fri, 17 Apr 2026 00:33:34 -0700 Message-Id: <20260417073336.2712426-6-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> References: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA3NCBTYWx0ZWRfXyPLfR5fdWqPq bfT8JeY8StSRYg3csy2lCjv1iYOPBNzfOVUX41cj0FCu7XyPH1Y2ioRWrQdaAHLzaXzl1C+3bjt nXHx+nJhZbyRmusN8G56plUhhxDlmwxuJ96keX8/fKtgtk/D07hUVAFVoiPfkdYOjqb5JmQhhDh 5ZOSProjy2Adtf8QbBrXvVJYSOO4BbY2+K5ORxaIG1tObDzsP1/cY50mwKEqcDNU3ftpNctQ93K fb1dxWVglM+15JWARUk3GN5KPpO5eQGNm8ZrgWMybM+cq9drVUnqaLT7HWLqG0MVjQVtiTQKVx0 Wu/wAuAXOhrzZ5X/PEVe7mWWcPI+x7el2Qn3JV1xtqlcyOOMbc2btQW3wTsteTpfMiNpgU7dHk6 f31SSadVZRGA0u41Hd53rhlCk/2Y2ULTMOmbjSHR5/SlmN0p4ygzNHyPY3xU1Xw9kwcBvZ7hZb7 FZXhMOpnnbn5aaS+oWQ== X-Proofpoint-ORIG-GUID: zYLc4y83yCrmLwdHuNTxs2qhZKf1PDmI X-Proofpoint-GUID: zYLc4y83yCrmLwdHuNTxs2qhZKf1PDmI X-Authority-Analysis: v=2.4 cv=DfInbPtW c=1 sm=1 tr=0 ts=69e1e2ad cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=s623Ih-0px1LxcEVn60A:9 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 clxscore=1015 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 spamscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170074 Content-Type: text/plain; charset="utf-8" Add "select" node for each step to determine if another step is taken, trigger(s) are generated, counters/timers incremented/decremented, etc. Reviewed-by: Jie Gan Signed-off-by: Songwei Chai --- .../ABI/testing/sysfs-bus-amba-devices-tgu | 7 +++ drivers/hwtracing/qcom/tgu.c | 53 ++++++++++++++++++- drivers/hwtracing/qcom/tgu.h | 26 +++++++++ 3 files changed, 84 insertions(+), 2 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documen= tation/ABI/testing/sysfs-bus-amba-devices-tgu index 4ef0d696d3d0..786cb852bbe5 100644 --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu @@ -21,3 +21,10 @@ KernelVersion: 7.1 Contact: Jinlong Mao , Songwei Chai Description: (RW) Set/Get the decode mode with specific step for TGU. + +What: /sys/bus/amba/devices//step[0:7]_condition_select/reg[0:3] +Date: April 2026 +KernelVersion: 7.1 +Contact: Jinlong Mao , Songwei Chai +Description: + (RW) Set/Get the next action with specific step for TGU. diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c index 937211923d93..fefe932059cb 100644 --- a/drivers/hwtracing/qcom/tgu.c +++ b/drivers/hwtracing/qcom/tgu.c @@ -29,6 +29,9 @@ static int calculate_array_location(struct tgu_drvdata *d= rvdata, case TGU_CONDITION_DECODE: return step_index * (drvdata->num_condition_decode) + reg_index; + case TGU_CONDITION_SELECT: + return step_index * (drvdata->num_condition_select) + + reg_index; default: break; } @@ -71,6 +74,9 @@ static ssize_t tgu_dataset_show(struct device *dev, case TGU_CONDITION_DECODE: return sysfs_emit(buf, "0x%x\n", drvdata->value_table->condition_decode[index]); + case TGU_CONDITION_SELECT: + return sysfs_emit(buf, "0x%x\n", + drvdata->value_table->condition_select[index]); default: break; } @@ -112,6 +118,10 @@ static ssize_t tgu_dataset_store(struct device *dev, tgu_drvdata->value_table->condition_decode[index] =3D val; ret =3D size; break; + case TGU_CONDITION_SELECT: + tgu_drvdata->value_table->condition_select[index] =3D val; + ret =3D size; + break; default: ret =3D -EINVAL; break; @@ -146,6 +156,13 @@ static umode_t tgu_node_visible(struct kobject *kobjec= t, if (tgu_attr->reg_num < drvdata->num_condition_decode) return attr->mode; break; + case TGU_CONDITION_SELECT: + /* 'default' register is at the end of 'select' region */ + if (tgu_attr->reg_num =3D=3D drvdata->num_condition_select - 1) + attr->name =3D "default"; + if (tgu_attr->reg_num < drvdata->num_condition_select) + return attr->mode; + break; default: break; } @@ -184,6 +201,18 @@ static ssize_t tgu_write_all_hw_regs(struct tgu_drvdat= a *drvdata) drvdata->base + CONDITION_DECODE_STEP(i, j)); } } + + for (i =3D 0; i < drvdata->num_step; i++) { + for (j =3D 0; j < drvdata->num_condition_select; j++) { + index =3D check_array_location(drvdata, i, + TGU_CONDITION_SELECT, j); + if (index =3D=3D -EINVAL) + goto exit; + + writel(drvdata->value_table->condition_select[index], + drvdata->base + CONDITION_SELECT_STEP(i, j)); + } + } /* Enable TGU to program the triggers */ writel(1, drvdata->base + TGU_CONTROL); exit: @@ -223,6 +252,8 @@ static void tgu_set_conditions(struct tgu_drvdata *drvd= ata) =20 devid =3D readl(drvdata->base + TGU_DEVID); drvdata->num_condition_decode =3D TGU_DEVID_CONDITIONS(devid); + /* select region has an additional 'default' register */ + drvdata->num_condition_select =3D TGU_DEVID_CONDITIONS(devid) + 1; } =20 static int tgu_enable(struct device *dev) @@ -366,6 +397,14 @@ static const struct attribute_group *tgu_attr_groups[]= =3D { CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(5), CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(6), CONDITION_DECODE_ATTRIBUTE_GROUP_INIT(7), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(0), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(1), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(2), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(3), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(4), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(5), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(6), + CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(7), NULL, }; =20 @@ -373,8 +412,8 @@ static int tgu_probe(struct amba_device *adev, const st= ruct amba_id *id) { struct device *dev =3D &adev->dev; struct tgu_drvdata *drvdata; - unsigned int *priority, *condition; - size_t priority_size, condition_size; + unsigned int *priority, *condition, *select; + size_t priority_size, condition_size, select_size; int ret; =20 drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); @@ -425,6 +464,16 @@ static int tgu_probe(struct amba_device *adev, const s= truct amba_id *id) =20 drvdata->value_table->condition_decode =3D condition; =20 + select_size =3D drvdata->num_condition_select * drvdata->num_step; + + select =3D devm_kcalloc(dev, select_size, + sizeof(*(drvdata->value_table->condition_select)), + GFP_KERNEL); + if (!select) + return -ENOMEM; + + drvdata->value_table->condition_select =3D select; + drvdata->enabled =3D false; =20 pm_runtime_put(&adev->dev); diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h index 56e4161a8bc2..c61aa8dc51b0 100644 --- a/drivers/hwtracing/qcom/tgu.h +++ b/drivers/hwtracing/qcom/tgu.h @@ -52,6 +52,7 @@ #define STEP_OFFSET 0x1D8 #define PRIORITY_START_OFFSET 0x0074 #define CONDITION_DECODE_OFFSET 0x0050 +#define CONDITION_SELECT_OFFSET 0x0060 #define PRIORITY_OFFSET 0x60 #define REG_OFFSET 0x4 =20 @@ -63,6 +64,9 @@ #define CONDITION_DECODE_STEP(step, decode) \ (CONDITION_DECODE_OFFSET + REG_OFFSET * decode + STEP_OFFSET * step) =20 +#define CONDITION_SELECT_STEP(step, select) \ + (CONDITION_SELECT_OFFSET + REG_OFFSET * select + STEP_OFFSET * step) + #define tgu_dataset_rw(name, step_index, type, reg_num) \ (&((struct tgu_attribute[]){ { \ __ATTR(name, 0644, tgu_dataset_show, tgu_dataset_store), \ @@ -76,6 +80,8 @@ reg_num) #define STEP_DECODE(step_index, reg_num) \ tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_DECODE, reg_num) +#define STEP_SELECT(step_index, reg_num) \ + tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_SELECT, reg_num) =20 #define STEP_PRIORITY_LIST(step_index, priority) \ {STEP_PRIORITY(step_index, 0, priority), \ @@ -107,6 +113,15 @@ NULL \ } =20 +#define STEP_SELECT_LIST(n) \ + {STEP_SELECT(n, 0), \ + STEP_SELECT(n, 1), \ + STEP_SELECT(n, 2), \ + STEP_SELECT(n, 3), \ + STEP_SELECT(n, 4), \ + NULL \ + } + #define PRIORITY_ATTRIBUTE_GROUP_INIT(step, priority)\ (&(const struct attribute_group){\ .attrs =3D (struct attribute*[])STEP_PRIORITY_LIST(step, priority),\ @@ -121,12 +136,20 @@ .name =3D "step" #step "_condition_decode" \ }) =20 +#define CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(step)\ + (&(const struct attribute_group){\ + .attrs =3D (struct attribute*[])STEP_SELECT_LIST(step),\ + .is_visible =3D tgu_node_visible,\ + .name =3D "step" #step "_condition_select" \ + }) + enum operation_index { TGU_PRIORITY0, TGU_PRIORITY1, TGU_PRIORITY2, TGU_PRIORITY3, TGU_CONDITION_DECODE, + TGU_CONDITION_SELECT, }; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2e53ccd2564sm1135168eec.18.2026.04.17.00.34.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2026 00:34:07 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Jie Gan Subject: [PATCH v14 6/7] qcom-tgu: Add timer/counter functionality for TGU Date: Fri, 17 Apr 2026 00:33:35 -0700 Message-Id: <20260417073336.2712426-7-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> References: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=buR8wkai c=1 sm=1 tr=0 ts=69e1e302 cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=eGDQztGCVwpQsGOtWZEA:9 a=6Ab_bkdmUrQuMsNx7PHu:22 X-Proofpoint-GUID: ND6pkUcCV-pa4bPgMYSsEhiTApPiiMQF X-Proofpoint-ORIG-GUID: ND6pkUcCV-pa4bPgMYSsEhiTApPiiMQF X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA3NSBTYWx0ZWRfX406QdyrYaSf4 SBXUJPrzdSA1Cr8BIxQYsQLT5/RLSMC9RmiyAD5uuZk64mVm7TUE0TF6ctamB5EVua+msYOGLHu boEEjVqO7nynCdyl3L7E8GjfeDRuA5Ac7ApjHtYbZ50V2U5CzWNzt/zIuHi9/5v+Qs+rFl8S5tI Sw5afbFPM+wezOf6FPJZSzOUdLPHaN9q/YRHGuiK6kzksNuBbNPx/Io0OZlw5Xb5f0v+Y1gKVlL DnhsEmYdT8cITK1J4dE9zkXxK7G3EtSPAU9FFTV77BVVKLSgjiwiPDJ7VHF1c5R/HqQezrA0Od6 cJxOgeeye30nrjxS56G85dHIdvBHKeqy4M1nFaW+TPzifIzlregP3Vv0u8lQtpvWvbeYqUC56ow HbxP79/Ye0PR+krx+BiZReoQ+uF5oNp04LgSw/ZiC/rYQnff82bkd3NwMmpwH3W3XdiXRuF7f8y dl49YGr9NP6/MuTj1cQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 spamscore=0 malwarescore=0 phishscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170075 Content-Type: text/plain; charset="utf-8" Add counter and timer node for each step which could be programed if they are to be utilized in trigger event/sequence. Reviewed-by: Jie Gan Signed-off-by: Songwei Chai --- .../ABI/testing/sysfs-bus-amba-devices-tgu | 14 +++ drivers/hwtracing/qcom/tgu.c | 116 +++++++++++++++++- drivers/hwtracing/qcom/tgu.h | 57 +++++++++ 3 files changed, 185 insertions(+), 2 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documen= tation/ABI/testing/sysfs-bus-amba-devices-tgu index 786cb852bbe5..7a3573e03e27 100644 --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu @@ -28,3 +28,17 @@ KernelVersion: 7.1 Contact: Jinlong Mao , Songwei Chai Description: (RW) Set/Get the next action with specific step for TGU. + +What: /sys/bus/amba/devices//step[0:7]_timer/reg[0:1] +Date: April 2026 +KernelVersion: 7.1 +Contact: Jinlong Mao , Songwei Chai +Description: + (RW) Set/Get the timer value with specific step for TGU. + +What: /sys/bus/amba/devices//step[0:7]_counter/reg[0:1] +Date: April 2026 +KernelVersion: 7.1 +Contact: Jinlong Mao , Songwei Chai +Description: + (RW) Set/Get the counter value with specific step for TGU. diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c index fefe932059cb..6d5bf2621cb0 100644 --- a/drivers/hwtracing/qcom/tgu.c +++ b/drivers/hwtracing/qcom/tgu.c @@ -32,6 +32,10 @@ static int calculate_array_location(struct tgu_drvdata *= drvdata, case TGU_CONDITION_SELECT: return step_index * (drvdata->num_condition_select) + reg_index; + case TGU_COUNTER: + return step_index * (drvdata->num_counter) + reg_index; + case TGU_TIMER: + return step_index * (drvdata->num_timer) + reg_index; default: break; } @@ -77,6 +81,12 @@ static ssize_t tgu_dataset_show(struct device *dev, case TGU_CONDITION_SELECT: return sysfs_emit(buf, "0x%x\n", drvdata->value_table->condition_select[index]); + case TGU_TIMER: + return sysfs_emit(buf, "0x%x\n", + drvdata->value_table->timer[index]); + case TGU_COUNTER: + return sysfs_emit(buf, "0x%x\n", + drvdata->value_table->counter[index]); default: break; } @@ -122,6 +132,14 @@ static ssize_t tgu_dataset_store(struct device *dev, tgu_drvdata->value_table->condition_select[index] =3D val; ret =3D size; break; + case TGU_TIMER: + tgu_drvdata->value_table->timer[index] =3D val; + ret =3D size; + break; + case TGU_COUNTER: + tgu_drvdata->value_table->counter[index] =3D val; + ret =3D size; + break; default: ret =3D -EINVAL; break; @@ -163,6 +181,18 @@ static umode_t tgu_node_visible(struct kobject *kobjec= t, if (tgu_attr->reg_num < drvdata->num_condition_select) return attr->mode; break; + case TGU_COUNTER: + if (!drvdata->num_counter) + break; + if (tgu_attr->reg_num < drvdata->num_counter) + return attr->mode; + break; + case TGU_TIMER: + if (!drvdata->num_timer) + break; + if (tgu_attr->reg_num < drvdata->num_timer) + return attr->mode; + break; default: break; } @@ -213,6 +243,30 @@ static ssize_t tgu_write_all_hw_regs(struct tgu_drvdat= a *drvdata) drvdata->base + CONDITION_SELECT_STEP(i, j)); } } + + for (i =3D 0; i < drvdata->num_step; i++) { + for (j =3D 0; j < drvdata->num_timer; j++) { + index =3D check_array_location(drvdata, i, TGU_TIMER, j); + + if (index =3D=3D -EINVAL) + goto exit; + + writel(drvdata->value_table->timer[index], + drvdata->base + TIMER_COMPARE_STEP(i, j)); + } + } + + for (i =3D 0; i < drvdata->num_step; i++) { + for (j =3D 0; j < drvdata->num_counter; j++) { + index =3D check_array_location(drvdata, i, TGU_COUNTER, j); + + if (index =3D=3D -EINVAL) + goto exit; + + writel(drvdata->value_table->counter[index], + drvdata->base + COUNTER_COMPARE_STEP(i, j)); + } + } /* Enable TGU to program the triggers */ writel(1, drvdata->base + TGU_CONTROL); exit: @@ -256,6 +310,27 @@ static void tgu_set_conditions(struct tgu_drvdata *drv= data) drvdata->num_condition_select =3D TGU_DEVID_CONDITIONS(devid) + 1; } =20 +static void tgu_set_timer_counter(struct tgu_drvdata *drvdata) +{ + int num_timers =3D 0, num_counters =3D 0; + u32 devid2; + + devid2 =3D readl(drvdata->base + CORESIGHT_DEVID2); + + if (TGU_DEVID2_TIMER0(devid2)) + num_timers++; + if (TGU_DEVID2_TIMER1(devid2)) + num_timers++; + + if (TGU_DEVID2_COUNTER0(devid2)) + num_counters++; + if (TGU_DEVID2_COUNTER1(devid2)) + num_counters++; + + drvdata->num_timer =3D num_timers; + drvdata->num_counter =3D num_counters; +} + static int tgu_enable(struct device *dev) { struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); @@ -405,6 +480,22 @@ static const struct attribute_group *tgu_attr_groups[]= =3D { CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(5), CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(6), CONDITION_SELECT_ATTRIBUTE_GROUP_INIT(7), + TIMER_ATTRIBUTE_GROUP_INIT(0), + TIMER_ATTRIBUTE_GROUP_INIT(1), + TIMER_ATTRIBUTE_GROUP_INIT(2), + TIMER_ATTRIBUTE_GROUP_INIT(3), + TIMER_ATTRIBUTE_GROUP_INIT(4), + TIMER_ATTRIBUTE_GROUP_INIT(5), + TIMER_ATTRIBUTE_GROUP_INIT(6), + TIMER_ATTRIBUTE_GROUP_INIT(7), + COUNTER_ATTRIBUTE_GROUP_INIT(0), + COUNTER_ATTRIBUTE_GROUP_INIT(1), + COUNTER_ATTRIBUTE_GROUP_INIT(2), + COUNTER_ATTRIBUTE_GROUP_INIT(3), + COUNTER_ATTRIBUTE_GROUP_INIT(4), + COUNTER_ATTRIBUTE_GROUP_INIT(5), + COUNTER_ATTRIBUTE_GROUP_INIT(6), + COUNTER_ATTRIBUTE_GROUP_INIT(7), NULL, }; =20 @@ -412,8 +503,8 @@ static int tgu_probe(struct amba_device *adev, const st= ruct amba_id *id) { struct device *dev =3D &adev->dev; struct tgu_drvdata *drvdata; - unsigned int *priority, *condition, *select; - size_t priority_size, condition_size, select_size; + unsigned int *priority, *condition, *select, *timer, *counter; + size_t priority_size, condition_size, select_size, timer_size, counter_si= ze; int ret; =20 drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); @@ -432,6 +523,7 @@ static int tgu_probe(struct amba_device *adev, const st= ruct amba_id *id) tgu_set_reg_number(drvdata); tgu_set_steps(drvdata); tgu_set_conditions(drvdata); + tgu_set_timer_counter(drvdata); =20 ret =3D sysfs_create_groups(&dev->kobj, tgu_attr_groups); if (ret) { @@ -474,6 +566,26 @@ static int tgu_probe(struct amba_device *adev, const s= truct amba_id *id) =20 drvdata->value_table->condition_select =3D select; =20 + timer_size =3D drvdata->num_step * drvdata->num_timer; + + timer =3D devm_kcalloc(dev, timer_size, + sizeof(*(drvdata->value_table->timer)), + GFP_KERNEL); + if (!timer) + return -ENOMEM; + + drvdata->value_table->timer =3D timer; + + counter_size =3D drvdata->num_step * drvdata->num_counter; + + counter =3D devm_kcalloc(dev, counter_size, + sizeof(*(drvdata->value_table->counter)), + GFP_KERNEL); + if (!counter) + return -ENOMEM; + + drvdata->value_table->counter =3D counter; + drvdata->enabled =3D false; =20 pm_runtime_put(&adev->dev); diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h index c61aa8dc51b0..1bcbc99169de 100644 --- a/drivers/hwtracing/qcom/tgu.h +++ b/drivers/hwtracing/qcom/tgu.h @@ -11,6 +11,7 @@ #define TGU_LAR 0xfb0 #define TGU_UNLOCK_OFFSET 0xc5acce55 #define TGU_DEVID 0xfc8 +#define CORESIGHT_DEVID2 0xfc0 =20 #define TGU_DEVID_SENSE_INPUT(devid_val) \ ((int)FIELD_GET(GENMASK(17, 10), devid_val)) @@ -18,6 +19,16 @@ ((int)FIELD_GET(GENMASK(6, 3), devid_val)) #define TGU_DEVID_CONDITIONS(devid_val) \ ((int)FIELD_GET(GENMASK(2, 0), devid_val)) +#define TGU_DEVID2_TIMER0(devid_val) \ + ((int)FIELD_GET(GENMASK(23, 18), devid_val)) +#define TGU_DEVID2_TIMER1(devid_val) \ + ((int)FIELD_GET(GENMASK(17, 13), devid_val)) +#define TGU_DEVID2_COUNTER0(devid_val) \ + ((int)FIELD_GET(GENMASK(11, 6), devid_val)) +#define TGU_DEVID2_COUNTER1(devid_val) \ + ((int)FIELD_GET(GENMASK(5, 0), devid_val)) + + #define TGU_BITS_PER_SIGNAL 4 #define LENGTH_REGISTER 32 =20 @@ -53,6 +64,8 @@ #define PRIORITY_START_OFFSET 0x0074 #define CONDITION_DECODE_OFFSET 0x0050 #define CONDITION_SELECT_OFFSET 0x0060 +#define TIMER_START_OFFSET 0x0040 +#define COUNTER_START_OFFSET 0x0048 #define PRIORITY_OFFSET 0x60 #define REG_OFFSET 0x4 =20 @@ -67,6 +80,12 @@ #define CONDITION_SELECT_STEP(step, select) \ (CONDITION_SELECT_OFFSET + REG_OFFSET * select + STEP_OFFSET * step) =20 +#define TIMER_COMPARE_STEP(step, timer) \ + (TIMER_START_OFFSET + REG_OFFSET * timer + STEP_OFFSET * step) + +#define COUNTER_COMPARE_STEP(step, counter) \ + (COUNTER_START_OFFSET + REG_OFFSET * counter + STEP_OFFSET * step) + #define tgu_dataset_rw(name, step_index, type, reg_num) \ (&((struct tgu_attribute[]){ { \ __ATTR(name, 0644, tgu_dataset_show, tgu_dataset_store), \ @@ -82,6 +101,10 @@ tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_DECODE, reg_num) #define STEP_SELECT(step_index, reg_num) \ tgu_dataset_rw(reg##reg_num, step_index, TGU_CONDITION_SELECT, reg_num) +#define STEP_TIMER(step_index, reg_num) \ + tgu_dataset_rw(reg##reg_num, step_index, TGU_TIMER, reg_num) +#define STEP_COUNTER(step_index, reg_num) \ + tgu_dataset_rw(reg##reg_num, step_index, TGU_COUNTER, reg_num) =20 #define STEP_PRIORITY_LIST(step_index, priority) \ {STEP_PRIORITY(step_index, 0, priority), \ @@ -122,6 +145,18 @@ NULL \ } =20 +#define STEP_TIMER_LIST(n) \ + {STEP_TIMER(n, 0), \ + STEP_TIMER(n, 1), \ + NULL \ + } + +#define STEP_COUNTER_LIST(n) \ + {STEP_COUNTER(n, 0), \ + STEP_COUNTER(n, 1), \ + NULL \ + } + #define PRIORITY_ATTRIBUTE_GROUP_INIT(step, priority)\ (&(const struct attribute_group){\ .attrs =3D (struct attribute*[])STEP_PRIORITY_LIST(step, priority),\ @@ -143,6 +178,20 @@ .name =3D "step" #step "_condition_select" \ }) =20 +#define TIMER_ATTRIBUTE_GROUP_INIT(step)\ + (&(const struct attribute_group){\ + .attrs =3D (struct attribute*[])STEP_TIMER_LIST(step),\ + .is_visible =3D tgu_node_visible,\ + .name =3D "step" #step "_timer" \ + }) + +#define COUNTER_ATTRIBUTE_GROUP_INIT(step)\ + (&(const struct attribute_group){\ + .attrs =3D (struct attribute*[])STEP_COUNTER_LIST(step),\ + .is_visible =3D tgu_node_visible,\ + .name =3D "step" #step "_counter" \ + }) + enum operation_index { TGU_PRIORITY0, TGU_PRIORITY1, @@ -150,6 +199,8 @@ enum operation_index { TGU_PRIORITY3, TGU_CONDITION_DECODE, TGU_CONDITION_SELECT, + TGU_TIMER, + TGU_COUNTER, }; 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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2e53ccd2564sm1135168eec.18.2026.04.17.00.34.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Apr 2026 00:34:09 -0700 (PDT) From: Songwei Chai To: andersson@kernel.org, alexander.shishkin@linux.intel.com, mike.leach@linaro.org, konrad.dybcio@oss.qualcomm.com, suzuki.poulose@arm.com, james.clark@arm.com, krzk+dt@kernel.org, conor+dt@kernel.org Cc: Songwei Chai , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, coresight@lists.linaro.org, devicetree@vger.kernel.org, gregkh@linuxfoundation.org Subject: [PATCH v14 7/7] qcom-tgu: Add reset node to initialize Date: Fri, 17 Apr 2026 00:33:36 -0700 Message-Id: <20260417073336.2712426-8-songwei.chai@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> References: <20260417073336.2712426-1-songwei.chai@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: ZnJIXdaQT_OaXZJRGPkkUjmv84YlFLwO X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDE3MDA3NSBTYWx0ZWRfX3Hbzcbm/Dhdx aq9tsLePfyBLPjuIKAwymY6US48DgDMQfwDrQ7tUHt8gPzjILqO7muSAzN0I5S2YJQ79Zir04IE SY8l1bTcyZulwXTkHNGRR5PPNVxkr9I3xXCkwzt3UPrQtKxQzWyMmOUp4pugPvTSftVUqW6hXXf 9NldOE2Lt/EHLcgGypQOPAlY7hMlSnXEpZDT5jNmG0mycD5fHLnk2bbg5t2yNKMbii77d4cGN9Z rfxRrbVE+OfscXmPVuYANWA4nlp8dpM9iD9ilotE0wJUcTSNLU1OHS0G3G84QL95bp5Stcytcu2 iqtSZSFxdot6t+7NFyE4PiexQh6+Vkj4omCDUhVINp6clpmcCbW7hgbZtdGS+fN8/V8nX+1PRjQ r7HnZNYcy1qm69IJDaoCsNWtniLiS3nPNmA2moNoqBsJSFL2ywjzYVgw0wXWAYiFRX/FWUFCjU8 ib+7e/PrkBwYJHMgr5w== X-Authority-Analysis: v=2.4 cv=b4mCJNGx c=1 sm=1 tr=0 ts=69e1e2b1 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=IgPCHI2mAnvcCQI4J_AA:9 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-GUID: ZnJIXdaQT_OaXZJRGPkkUjmv84YlFLwO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 adultscore=0 bulkscore=0 phishscore=0 clxscore=1015 spamscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170075 Content-Type: text/plain; charset="utf-8" Add reset node to initialize the value of priority/condition_decode/condition_select/timer/counter nodes. Signed-off-by: Songwei Chai --- .../ABI/testing/sysfs-bus-amba-devices-tgu | 7 ++ drivers/hwtracing/qcom/tgu.c | 74 +++++++++++++++++++ 2 files changed, 81 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu b/Documen= tation/ABI/testing/sysfs-bus-amba-devices-tgu index 7a3573e03e27..a6b6019c8ef1 100644 --- a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu @@ -42,3 +42,10 @@ KernelVersion: 7.1 Contact: Jinlong Mao , Songwei Chai Description: (RW) Set/Get the counter value with specific step for TGU. + +What: /sys/bus/amba/devices//reset_tgu +Date: April 2026 +KernelVersion: 7.1 +Contact: Jinlong Mao , Songwei Chai +Description: + (Write) Write 1 to reset the dataset for TGU. diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c index 6d5bf2621cb0..9fb51f2a912f 100644 --- a/drivers/hwtracing/qcom/tgu.c +++ b/drivers/hwtracing/qcom/tgu.c @@ -420,8 +420,82 @@ static ssize_t enable_tgu_store(struct device *dev, } static DEVICE_ATTR_RW(enable_tgu); =20 +/* reset_tgu_store - Reset Trace and Gating Unit (TGU) configuration. */ +static ssize_t reset_tgu_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t size) +{ + struct tgu_drvdata *drvdata =3D dev_get_drvdata(dev); + struct value_table *vt =3D drvdata->value_table; + u32 *cond_decode =3D drvdata->value_table->condition_decode; + unsigned long value; + int i, j, ret; + + if (kstrtoul(buf, 0, &value) || value !=3D 1) + return -EINVAL; + + spin_lock(&drvdata->lock); + if (!drvdata->enabled) { + spin_unlock(&drvdata->lock); + ret =3D pm_runtime_resume_and_get(drvdata->dev); + if (ret) + return ret; + spin_lock(&drvdata->lock); + } + + tgu_do_disable(drvdata); + + if (vt->priority) { + size_t size =3D MAX_PRIORITY * drvdata->num_step * + drvdata->num_reg * sizeof(unsigned int); + memset(vt->priority, 0, size); + } + + if (vt->condition_decode) { + size_t size =3D drvdata->num_condition_decode * + drvdata->num_step * sizeof(unsigned int); + memset(vt->condition_decode, 0, size); + } + + /* Initialize all condition registers to NOT(value=3D0x1000000) */ + for (i =3D 0; i < drvdata->num_step; i++) { + for (j =3D 0; j < drvdata->num_condition_decode; j++) { + cond_decode[calculate_array_location(drvdata, i, + TGU_CONDITION_DECODE, j)] =3D 0x1000000; + } + } + + if (vt->condition_select) { + size_t size =3D drvdata->num_condition_select * + drvdata->num_step * sizeof(unsigned int); + memset(vt->condition_select, 0, size); + } + + if (vt->timer) { + size_t size =3D (drvdata->num_step) * (drvdata->num_timer) * + sizeof(unsigned int); + memset(vt->timer, 0, size); + } + + if (vt->counter) { + size_t size =3D (drvdata->num_step) * (drvdata->num_counter) * + sizeof(unsigned int); + memset(vt->counter, 0, size); + } + + spin_unlock(&drvdata->lock); + + dev_dbg(dev, "Qualcomm-TGU reset complete\n"); + + pm_runtime_put(drvdata->dev); + + return size; +} +static DEVICE_ATTR_WO(reset_tgu); + static struct attribute *tgu_common_attrs[] =3D { &dev_attr_enable_tgu.attr, + &dev_attr_reset_tgu.attr, NULL, }; =20 --=20 2.34.1