From nobody Tue Jun 16 02:36:01 2026 Received: from mail-pj1-f53.google.com (mail-pj1-f53.google.com [209.85.216.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AD051396585 for ; Wed, 15 Apr 2026 13:15:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776258903; cv=none; b=n844ik9v38v07e+UrtYLcD2O7vhk7SQND00MGyBwL41Rj4BuS7TxMP+c3E7Qp+/O8/C+bxbLPH6rQhYOjAJZWE3xlhFE5xNaGkLH0wSzUScSeqyjinqJsHdIk8nASq5cZvOAOSEFrgJTyu7wZ+J3s1I3NIhN1OdTH4C+ynkcXFc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776258903; c=relaxed/simple; bh=nYGUtFmrE7NFnwEteDS0bxvruck9Gt4KBftRooMcZlM=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=SL2KmV6fVrAyU9jBHsi8hhp4itT4T/g2jgmPK2jTV41TwNonwbOrCCU4Yo+D0m3dJFYzP8/SjhNWzGbieLy9dZ5OR5MXUAxiBeTpNUPIB8lslC6l9SnyoJQJDvDcsCqKPtynDp0RSeWx/Gn5od7VUtEZMOeQGslpVgDB6IUvEG0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=a4D2y3zt; arc=none smtp.client-ip=209.85.216.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="a4D2y3zt" Received: by mail-pj1-f53.google.com with SMTP id 98e67ed59e1d1-35dac556bb2so3967801a91.1 for ; Wed, 15 Apr 2026 06:15:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1776258900; x=1776863700; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=tNPyJA5HM8VYEeeR34CvWajirDL/QwxofztcaoCL5/I=; b=a4D2y3zt04LM0iX9VSW3xxwqKv05h3PNmQiAgSWHgdfDDwXw4qQnkxFpgLzPBPX24f W5UE9ZQFjcNV37KsUEzYRyXXs25Rx8lLsKgaVjViJSwFv0SXM2JxW8zd+23VLF841MeQ QnRzBvYL/aexaz0/AOAWd8srz4szpfnGYw8vZRQPIsIuCTkEJKuFEUCPq3qUUMuzb4TU DQkGIojOtV3Bwy8vn9lFq/aw7h3ovFGzRvysuiAtj8kemJBudKb6onsxwqNp2Nlfar9M 8BkSbaDSseeWhWOfefWhWoMgm57qCkLBk0s66SyXYJyw/Ozftr/xkp/EsFhA2GFiTZbe qmJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776258900; x=1776863700; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=tNPyJA5HM8VYEeeR34CvWajirDL/QwxofztcaoCL5/I=; b=kOvYBETm9dRKP6cSHnlvZw9TgXj1kBWkBZHsGQErLMqIT7OER8R/vrZLy0Vu1Fn3tM Bou4N3qTl0mObW1YuZ7iyDnORAEKQLWW2ChvOuNUr0ZR66G/VqCq2vQR96ugN/KuBMX6 m5FLI1Ypvjp1JGmVoYxOv/qbXwv5S8kZqed16IUBmJ4/SkHMIPr61L3veHkSNwkwEwID kTs8UwkPDdR0yV9svQkOsdT2eZTm41aTwT1kp9sk53ogcW2hmWa6bzGFZXswXyI6HH0H WLZn0iBYGPtoA7hoZQ55UlK6BQtNH7tPKSj6v5O2/9gNTFIqHYKaIg5czLMCo5AISPdv ggrA== X-Forwarded-Encrypted: i=1; AFNElJ9+pTW/afa0AIIvZgmxixsPR2rXF4FNGzdkJlvWFQew6GbjYjP0/8nc/4B1IymrCuC10f8OBHihs+q5UKE=@vger.kernel.org X-Gm-Message-State: AOJu0Yx4oqNxatwGGRD0Ed3AHJffb56T4jpjVtgCPG3zKkn4HF6vMuDw 2uF+wTa/UQdgHpVtMhx6RPOquvnO0gvYHj+uDKfjGaxcQ3WE/Qv2AKoy X-Gm-Gg: AeBDiev90UUYjmsgScQxurXaJ+IhzdBcOncSsYWkgOeCx3iWqrGqs8gLb+j2cNsfU6U dCwGd7gkhqSIjbyitMpB2CC9waQJM9DhA5yUP37DQuAjF12PGK8nWZS6GN8pNqXMkFCBcCHexA9 ww9D9j/00vyl4YLERbjSGAHmYL4uOmf+p+5H4zb50+tK54VlHfBsD8TaAZOIVYfnDwhE4HjW0jl duCbWmDO2mNHkJk0dhG/izW8nWzzt6DcF8pukRZrhDHYjhF47z7GUIBzhPRGug9eQJr8BH2peWQ quwuaGPhtioC8R7zipk7JyFMfCQCNfn7u+IByNFeWv+4MNZrGn8DmA5nqhMuXLcgJ/9RB+CgGfU jSfh9lJ/rM6hpgWTOiSlGIt8bBvwORMYS4RNYqTWYhu0obK7rpkLENJoVhgP68RdmqKppNe61Pc YwD1tBCA1yioJb96rbx0l/gHYWwctXN87d6VNQn7SV40M= X-Received: by 2002:a17:90b:3d01:b0:35f:b4c1:91f6 with SMTP id 98e67ed59e1d1-35fb4c19544mr12015375a91.10.1776258899959; Wed, 15 Apr 2026 06:14:59 -0700 (PDT) Received: from ampere-server.example.org ([103.68.183.118]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c7957eeaabesm1774118a12.10.2026.04.15.06.14.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Apr 2026 06:14:59 -0700 (PDT) From: "chunzhi.lin" To: Frank.Sae@motor-comm.com Cc: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, chunzhi.lin@sophgo.com, "chunzhi.lin" Subject: [PATCH net] net: phy: motorcomm: use device properties for firmware tuning Date: Wed, 15 Apr 2026 21:14:52 +0800 Message-Id: <20260415131452.3492671-1-linchunzhi0@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Motorcomm PHY driver reads optional firmware properties via of_property_read_*() from phydev->mdio.dev.of_node. This works for Device Tree based systems, but causes ACPI platforms to ignore the same properties when they are supplied through _DSD. As a result, ACPI-described Motorcomm PHY devices fall back to default settings instead of applying firmware-provided tuning such as rx/tx internal delay, drive strength, clock output frequency, and optional boolean controls like auto-sleep-disabled, keep-pll-enabled, and tx clock inversion. Switch these lookups to device_property_read_*() so the driver uses the generic firmware node interface and can consume the same property names from either Device Tree or ACPI. This keeps the existing DT behavior unchanged while allowing ACPI platforms to honor PHY configuration from firmware. We have completed testing on Sophgo RISC-V architecture server SD3-10. This server has a 64-core Thead C920 CPU whose DWMAC is connected to Motorcomm's PHY YT8531. This server supports UEFI boot and it would like to use the ACPI table. Signed-off-by: chunzhi.lin --- drivers/net/phy/motorcomm.c | 41 ++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index 4d62f7b36212..708491bc198a 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include =20 #define PHY_ID_YT8511 0x0000010a #define PHY_ID_YT8521 0x0000011a @@ -843,12 +843,12 @@ static u32 ytphy_get_delay_reg_value(struct phy_devic= e *phydev, u16 *rxc_dly_en, u32 dflt) { - struct device_node *node =3D phydev->mdio.dev.of_node; + struct device *dev =3D &phydev->mdio.dev; int tb_size_half =3D tb_size / 2; u32 val; int i; =20 - if (of_property_read_u32(node, prop_name, &val)) + if (device_property_read_u32(dev, prop_name, &val)) goto err_dts_val; =20 /* when rxc_dly_en is NULL, it is get the delay for tx, only half of @@ -996,12 +996,12 @@ static int yt8531_get_ds_map(struct phy_device *phyde= v, u32 cur) =20 static int yt8531_set_ds(struct phy_device *phydev) { - struct device_node *node =3D phydev->mdio.dev.of_node; + struct device *dev =3D &phydev->mdio.dev; u32 ds_field_low, ds_field_hi, val; int ret, ds; =20 /* set rgmii rx clk driver strength */ - if (!of_property_read_u32(node, "motorcomm,rx-clk-drv-microamp", &val)) { + if (!device_property_read_u32(dev, "motorcomm,rx-clk-drv-microamp", &val)= ) { ds =3D yt8531_get_ds_map(phydev, val); if (ds < 0) return dev_err_probe(&phydev->mdio.dev, ds, @@ -1018,7 +1018,7 @@ static int yt8531_set_ds(struct phy_device *phydev) return ret; =20 /* set rgmii rx data driver strength */ - if (!of_property_read_u32(node, "motorcomm,rx-data-drv-microamp", &val)) { + if (!device_property_read_u32(dev, "motorcomm,rx-data-drv-microamp", &val= )) { ds =3D yt8531_get_ds_map(phydev, val); if (ds < 0) return dev_err_probe(&phydev->mdio.dev, ds, @@ -1051,7 +1051,6 @@ static int yt8531_set_ds(struct phy_device *phydev) */ static int yt8521_probe(struct phy_device *phydev) { - struct device_node *node =3D phydev->mdio.dev.of_node; struct device *dev =3D &phydev->mdio.dev; struct yt8521_priv *priv; int chip_config; @@ -1101,7 +1100,7 @@ static int yt8521_probe(struct phy_device *phydev) return ret; } =20 - if (of_property_read_u32(node, "motorcomm,clk-out-frequency-hz", &freq)) + if (device_property_read_u32(dev, "motorcomm,clk-out-frequency-hz", &freq= )) freq =3D YTPHY_DTS_OUTPUT_CLK_DIS; =20 if (phydev->drv->phy_id =3D=3D PHY_ID_YT8521) { @@ -1169,11 +1168,11 @@ static int yt8521_probe(struct phy_device *phydev) =20 static int yt8531_probe(struct phy_device *phydev) { - struct device_node *node =3D phydev->mdio.dev.of_node; + struct device *dev =3D &phydev->mdio.dev; u16 mask, val; u32 freq; =20 - if (of_property_read_u32(node, "motorcomm,clk-out-frequency-hz", &freq)) + if (device_property_read_u32(dev, "motorcomm,clk-out-frequency-hz", &freq= )) freq =3D YTPHY_DTS_OUTPUT_CLK_DIS; =20 switch (freq) { @@ -1665,7 +1664,7 @@ static int yt8521_resume(struct phy_device *phydev) */ static int yt8521_config_init(struct phy_device *phydev) { - struct device_node *node =3D phydev->mdio.dev.of_node; + struct device *dev =3D &phydev->mdio.dev; int old_page; int ret =3D 0; =20 @@ -1680,7 +1679,7 @@ static int yt8521_config_init(struct phy_device *phyd= ev) goto err_restore_page; } =20 - if (of_property_read_bool(node, "motorcomm,auto-sleep-disabled")) { + if (device_property_read_bool(dev, "motorcomm,auto-sleep-disabled")) { /* disable auto sleep */ ret =3D ytphy_modify_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1_REG, YT8521_ESC1R_SLEEP_SW, 0); @@ -1688,7 +1687,7 @@ static int yt8521_config_init(struct phy_device *phyd= ev) goto err_restore_page; } =20 - if (of_property_read_bool(node, "motorcomm,keep-pll-enabled")) { + if (device_property_read_bool(dev, "motorcomm,keep-pll-enabled")) { /* enable RXC clock when no wire plug */ ret =3D ytphy_modify_ext(phydev, YT8521_CLOCK_GATING_REG, YT8521_CGR_RX_CLK_EN, 0); @@ -1801,14 +1800,14 @@ static int yt8521_led_hw_control_get(struct phy_dev= ice *phydev, u8 index, =20 static int yt8531_config_init(struct phy_device *phydev) { - struct device_node *node =3D phydev->mdio.dev.of_node; + struct device *dev =3D &phydev->mdio.dev; int ret; =20 ret =3D ytphy_rgmii_clk_delay_config_with_lock(phydev); if (ret < 0) return ret; =20 - if (of_property_read_bool(node, "motorcomm,auto-sleep-disabled")) { + if (device_property_read_bool(dev, "motorcomm,auto-sleep-disabled")) { /* disable auto sleep */ ret =3D ytphy_modify_ext_with_lock(phydev, YT8521_EXTREG_SLEEP_CONTROL1_REG, @@ -1817,7 +1816,7 @@ static int yt8531_config_init(struct phy_device *phyd= ev) return ret; } =20 - if (of_property_read_bool(node, "motorcomm,keep-pll-enabled")) { + if (device_property_read_bool(dev, "motorcomm,keep-pll-enabled")) { /* enable RXC clock when no wire plug */ ret =3D ytphy_modify_ext_with_lock(phydev, YT8521_CLOCK_GATING_REG, @@ -1844,7 +1843,7 @@ static int yt8531_config_init(struct phy_device *phyd= ev) */ static void yt8531_link_change_notify(struct phy_device *phydev) { - struct device_node *node =3D phydev->mdio.dev.of_node; + struct device *dev =3D &phydev->mdio.dev; bool tx_clk_1000_inverted =3D false; bool tx_clk_100_inverted =3D false; bool tx_clk_10_inverted =3D false; @@ -1852,17 +1851,17 @@ static void yt8531_link_change_notify(struct phy_de= vice *phydev) u16 val =3D 0; int ret; =20 - if (of_property_read_bool(node, "motorcomm,tx-clk-adj-enabled")) + if (device_property_read_bool(dev, "motorcomm,tx-clk-adj-enabled")) tx_clk_adj_enabled =3D true; =20 if (!tx_clk_adj_enabled) return; =20 - if (of_property_read_bool(node, "motorcomm,tx-clk-10-inverted")) + if (device_property_read_bool(dev, "motorcomm,tx-clk-10-inverted")) tx_clk_10_inverted =3D true; - if (of_property_read_bool(node, "motorcomm,tx-clk-100-inverted")) + if (device_property_read_bool(dev, "motorcomm,tx-clk-100-inverted")) tx_clk_100_inverted =3D true; - if (of_property_read_bool(node, "motorcomm,tx-clk-1000-inverted")) + if (device_property_read_bool(dev, "motorcomm,tx-clk-1000-inverted")) tx_clk_1000_inverted =3D true; =20 if (phydev->speed < 0) --=20 2.34.1