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charset="utf-8" ams_event_to_channel() may return a pointer past the end of dev->channels when no matching scan_index is found. This can lead to invalid memory access in ams_handle_event(). Add a bounds check in ams_event_to_channel() and return NULL when no channel is found. Also guard the caller to safely handle this case. Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver") Signed-off-by: Guilherme Ivo Bozi --- drivers/iio/adc/xilinx-ams.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c index 124470c92529..f364e69a5a0d 100644 --- a/drivers/iio/adc/xilinx-ams.c +++ b/drivers/iio/adc/xilinx-ams.c @@ -871,6 +871,9 @@ static const struct iio_chan_spec *ams_event_to_channel= (struct iio_dev *dev, if (dev->channels[i].scan_index =3D=3D scan_index) break; =20 + if (i >=3D dev->num_channels) + return NULL; + return &dev->channels[i]; } =20 @@ -1012,6 +1015,8 @@ static void ams_handle_event(struct iio_dev *indio_de= v, u32 event) const struct iio_chan_spec *chan; =20 chan =3D ams_event_to_channel(indio_dev, event); + if (!chan) + return; =20 if (chan->type =3D=3D IIO_TEMP) { /* --=20 2.47.3 From nobody Sat Jun 20 14:15:06 2026 Received: from mail-dy1-f182.google.com (mail-dy1-f182.google.com [74.125.82.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F07093D6698 for ; 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charset="utf-8" Replace open-coded mutex_lock()/mutex_unlock() pairs with guard(mutex) to simplify locking and ensure proper unlock on all control flow paths. This removes explicit unlock handling, reduces boilerplate, and avoids potential mistakes in error paths while keeping the behavior unchanged. Signed-off-by: Guilherme Ivo Bozi Reviewed-by: Andy Shevchenko --- drivers/iio/adc/xilinx-ams.c | 24 ++++++++---------------- 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c index f364e69a5a0d..1d84310b61a9 100644 --- a/drivers/iio/adc/xilinx-ams.c +++ b/drivers/iio/adc/xilinx-ams.c @@ -720,22 +720,20 @@ static int ams_read_raw(struct iio_dev *indio_dev, int ret; =20 switch (mask) { - case IIO_CHAN_INFO_RAW: - mutex_lock(&ams->lock); + case IIO_CHAN_INFO_RAW: { + guard(mutex)(&ams->lock); if (chan->scan_index >=3D AMS_CTRL_SEQ_BASE) { ret =3D ams_read_vcc_reg(ams, chan->address, val); if (ret) - goto unlock_mutex; + return ret; ams_enable_channel_sequence(indio_dev); } else if (chan->scan_index >=3D AMS_PS_SEQ_MAX) *val =3D readl(ams->pl_base + chan->address); else *val =3D readl(ams->ps_base + chan->address); =20 - ret =3D IIO_VAL_INT; -unlock_mutex: - mutex_unlock(&ams->lock); - return ret; + return IIO_VAL_INT; + } case IIO_CHAN_INFO_SCALE: switch (chan->type) { case IIO_VOLTAGE: @@ -939,7 +937,7 @@ static int ams_write_event_config(struct iio_dev *indio= _dev, =20 alarm =3D ams_get_alarm_mask(chan->scan_index); =20 - mutex_lock(&ams->lock); + guard(mutex)(&ams->lock); =20 if (state) ams->alarm_mask |=3D alarm; @@ -948,8 +946,6 @@ static int ams_write_event_config(struct iio_dev *indio= _dev, =20 ams_update_alarm(ams, ams->alarm_mask); =20 - mutex_unlock(&ams->lock); - return 0; } =20 @@ -962,15 +958,13 @@ static int ams_read_event_value(struct iio_dev *indio= _dev, struct ams *ams =3D iio_priv(indio_dev); unsigned int offset =3D ams_get_alarm_offset(chan->scan_index, dir); =20 - mutex_lock(&ams->lock); + guard(mutex)(&ams->lock); =20 if (chan->scan_index >=3D AMS_PS_SEQ_MAX) *val =3D readl(ams->pl_base + offset); else *val =3D readl(ams->ps_base + offset); =20 - mutex_unlock(&ams->lock); - return IIO_VAL_INT; } =20 @@ -983,7 +977,7 @@ static int ams_write_event_value(struct iio_dev *indio_= dev, struct ams *ams =3D iio_priv(indio_dev); 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charset="utf-8" Replace multiple open-coded switch statements that map between scan_index, alarm bits, and register offsets with a centralized table-driven approach. Introduce a struct-based alarm_map to describe the relationship between scan indices and alarm offsets, and add a helper to translate scan_index to event IDs. This removes duplicated logic across ams_get_alarm_offset(), ams_event_to_channel(), and ams_get_alarm_mask(). The new approach improves maintainability, reduces code size, and makes it easier to extend or modify alarm mappings in the future, while preserving existing behavior. Signed-off-by: Guilherme Ivo Bozi --- drivers/iio/adc/xilinx-ams.c | 161 +++++++++++++---------------------- 1 file changed, 58 insertions(+), 103 deletions(-) diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c index 1d84310b61a9..90343d94cf95 100644 --- a/drivers/iio/adc/xilinx-ams.c +++ b/drivers/iio/adc/xilinx-ams.c @@ -102,6 +102,7 @@ #define AMS_PS_SEQ_MASK GENMASK(21, 0) #define AMS_PL_SEQ_MASK GENMASK_ULL(59, 22) =20 +#define AMS_ALARM_NONE 0x000 /* not a real offset */ #define AMS_ALARM_TEMP 0x140 #define AMS_ALARM_SUPPLY1 0x144 #define AMS_ALARM_SUPPLY2 0x148 @@ -763,9 +764,49 @@ static int ams_read_raw(struct iio_dev *indio_dev, } } =20 +struct ams_alarm_map { + enum ams_ps_pl_seq scan_index; + unsigned int base_offset; +}; + +/* + * Array index matches enum ams_alarm_bit. + * Entries with base_offset =3D=3D AMS_ALARM_NONE are unused/invalid + * (e.g. RESERVED) and must be skipped. + */ +static const struct ams_alarm_map alarm_map[] =3D { + [AMS_ALARM_BIT_TEMP] =3D { AMS_SEQ_TEMP, AMS_ALARM_TEMP }, + [AMS_ALARM_BIT_SUPPLY1] =3D { AMS_SEQ_SUPPLY1, AMS_ALARM_SUPPLY1 }, + [AMS_ALARM_BIT_SUPPLY2] =3D { AMS_SEQ_SUPPLY2, AMS_ALARM_SUPPLY2 }, + [AMS_ALARM_BIT_SUPPLY3] =3D { AMS_SEQ_SUPPLY3, AMS_ALARM_SUPPLY3 }, + [AMS_ALARM_BIT_SUPPLY4] =3D { AMS_SEQ_SUPPLY4, AMS_ALARM_SUPPLY4 }, + [AMS_ALARM_BIT_SUPPLY5] =3D { AMS_SEQ_SUPPLY5, AMS_ALARM_SUPPLY5 }, + [AMS_ALARM_BIT_SUPPLY6] =3D { AMS_SEQ_SUPPLY6, AMS_ALARM_SUPPLY6 }, + [AMS_ALARM_BIT_RESERVED] =3D { 0, AMS_ALARM_NONE }, + [AMS_ALARM_BIT_SUPPLY7] =3D { AMS_SEQ_SUPPLY7, AMS_ALARM_SUPPLY7 }, + [AMS_ALARM_BIT_SUPPLY8] =3D { AMS_SEQ_SUPPLY8, AMS_ALARM_SUPPLY8 }, + [AMS_ALARM_BIT_SUPPLY9] =3D { AMS_SEQ_SUPPLY9, AMS_ALARM_SUPPLY9 }, + [AMS_ALARM_BIT_SUPPLY10] =3D { AMS_SEQ_SUPPLY10, AMS_ALARM_SUPPLY10 }, + [AMS_ALARM_BIT_VCCAMS] =3D { AMS_SEQ_VCCAMS, AMS_ALARM_VCCAMS }, + [AMS_ALARM_BIT_TEMP_REMOTE] =3D { AMS_SEQ_TEMP_REMOTE, AMS_ALARM_TEMP_REM= OTE } +}; + +static int ams_scan_index_to_event(int scan_index) +{ + for (unsigned int i =3D 0; i < ARRAY_SIZE(alarm_map); i++) { + if (alarm_map[i].base_offset =3D=3D AMS_ALARM_NONE) + continue; + + if (alarm_map[i].scan_index =3D=3D scan_index) + return i; + } + + return -EINVAL; +} + static int ams_get_alarm_offset(int scan_index, enum iio_event_direction d= ir) { - int offset; + int offset, event; =20 if (scan_index >=3D AMS_PS_SEQ_MAX) scan_index -=3D AMS_PS_SEQ_MAX; @@ -779,36 +820,11 @@ static int ams_get_alarm_offset(int scan_index, enum = iio_event_direction dir) offset =3D 0; } =20 - switch (scan_index) { - case AMS_SEQ_TEMP: - return AMS_ALARM_TEMP + offset; - case AMS_SEQ_SUPPLY1: - return AMS_ALARM_SUPPLY1 + offset; - case AMS_SEQ_SUPPLY2: - return AMS_ALARM_SUPPLY2 + offset; - case AMS_SEQ_SUPPLY3: - return AMS_ALARM_SUPPLY3 + offset; - case AMS_SEQ_SUPPLY4: - return AMS_ALARM_SUPPLY4 + offset; - case AMS_SEQ_SUPPLY5: - return AMS_ALARM_SUPPLY5 + offset; - case AMS_SEQ_SUPPLY6: - return AMS_ALARM_SUPPLY6 + offset; - case AMS_SEQ_SUPPLY7: - return AMS_ALARM_SUPPLY7 + offset; - case AMS_SEQ_SUPPLY8: - return AMS_ALARM_SUPPLY8 + offset; - case AMS_SEQ_SUPPLY9: - return AMS_ALARM_SUPPLY9 + offset; - case AMS_SEQ_SUPPLY10: - return AMS_ALARM_SUPPLY10 + offset; - case AMS_SEQ_VCCAMS: - return AMS_ALARM_VCCAMS + offset; - case AMS_SEQ_TEMP_REMOTE: - return AMS_ALARM_TEMP_REMOTE + offset; - default: + event =3D ams_scan_index_to_event(scan_index); + if (event < 0 || alarm_map[event].base_offset =3D=3D AMS_ALARM_NONE) return 0; - } + + return alarm_map[event].base_offset + offset; } =20 static const struct iio_chan_spec *ams_event_to_channel(struct iio_dev *de= v, @@ -821,49 +837,13 @@ static const struct iio_chan_spec *ams_event_to_chann= el(struct iio_dev *dev, scan_index =3D AMS_PS_SEQ_MAX; } =20 - switch (event) { - case AMS_ALARM_BIT_TEMP: - scan_index +=3D AMS_SEQ_TEMP; - break; - case AMS_ALARM_BIT_SUPPLY1: - scan_index +=3D AMS_SEQ_SUPPLY1; - break; - case AMS_ALARM_BIT_SUPPLY2: - scan_index +=3D AMS_SEQ_SUPPLY2; - break; - case AMS_ALARM_BIT_SUPPLY3: - scan_index +=3D AMS_SEQ_SUPPLY3; - break; - case AMS_ALARM_BIT_SUPPLY4: - scan_index +=3D AMS_SEQ_SUPPLY4; - break; - case AMS_ALARM_BIT_SUPPLY5: - scan_index +=3D AMS_SEQ_SUPPLY5; - break; - case AMS_ALARM_BIT_SUPPLY6: - scan_index +=3D AMS_SEQ_SUPPLY6; - break; - case AMS_ALARM_BIT_SUPPLY7: - scan_index +=3D AMS_SEQ_SUPPLY7; - break; - case AMS_ALARM_BIT_SUPPLY8: - scan_index +=3D AMS_SEQ_SUPPLY8; - break; - case AMS_ALARM_BIT_SUPPLY9: - scan_index +=3D AMS_SEQ_SUPPLY9; - break; - case AMS_ALARM_BIT_SUPPLY10: - scan_index +=3D AMS_SEQ_SUPPLY10; - break; - case AMS_ALARM_BIT_VCCAMS: - scan_index +=3D AMS_SEQ_VCCAMS; - break; - case AMS_ALARM_BIT_TEMP_REMOTE: - scan_index +=3D AMS_SEQ_TEMP_REMOTE; - break; - default: - break; - } + if (event < 0 || event >=3D ARRAY_SIZE(alarm_map)) + return NULL; + + if (alarm_map[event].base_offset =3D=3D AMS_ALARM_NONE) + return NULL; + + scan_index +=3D alarm_map[event].scan_index; =20 for (i =3D 0; i < dev->num_channels; i++) if (dev->channels[i].scan_index =3D=3D scan_index) @@ -877,43 +857,18 @@ static const struct iio_chan_spec *ams_event_to_chann= el(struct iio_dev *dev, =20 static int ams_get_alarm_mask(int scan_index) { - int bit =3D 0; + int bit =3D 0, event; =20 if (scan_index >=3D AMS_PS_SEQ_MAX) { bit =3D AMS_PL_ALARM_START; scan_index -=3D AMS_PS_SEQ_MAX; } =20 - switch (scan_index) { - case AMS_SEQ_TEMP: - return BIT(AMS_ALARM_BIT_TEMP + bit); - case AMS_SEQ_SUPPLY1: - return BIT(AMS_ALARM_BIT_SUPPLY1 + bit); - case AMS_SEQ_SUPPLY2: - return BIT(AMS_ALARM_BIT_SUPPLY2 + bit); - case AMS_SEQ_SUPPLY3: - return BIT(AMS_ALARM_BIT_SUPPLY3 + bit); - case AMS_SEQ_SUPPLY4: - return BIT(AMS_ALARM_BIT_SUPPLY4 + bit); - case AMS_SEQ_SUPPLY5: - return BIT(AMS_ALARM_BIT_SUPPLY5 + bit); - case AMS_SEQ_SUPPLY6: - return BIT(AMS_ALARM_BIT_SUPPLY6 + bit); - case AMS_SEQ_SUPPLY7: - return BIT(AMS_ALARM_BIT_SUPPLY7 + bit); - case AMS_SEQ_SUPPLY8: - return BIT(AMS_ALARM_BIT_SUPPLY8 + bit); - case AMS_SEQ_SUPPLY9: - return BIT(AMS_ALARM_BIT_SUPPLY9 + bit); - case AMS_SEQ_SUPPLY10: - return BIT(AMS_ALARM_BIT_SUPPLY10 + bit); - case AMS_SEQ_VCCAMS: - return BIT(AMS_ALARM_BIT_VCCAMS + bit); - case AMS_SEQ_TEMP_REMOTE: - return BIT(AMS_ALARM_BIT_TEMP_REMOTE + bit); - default: + event =3D ams_scan_index_to_event(scan_index); + if (event < 0) return 0; - } + + return BIT(event + bit); } =20 static int ams_read_event_config(struct iio_dev *indio_dev, --=20 2.47.3