From nobody Mon Jun 15 22:06:46 2026 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED4373B774B for ; Tue, 14 Apr 2026 09:12:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776157981; cv=none; b=ZdU104Q9C55RMcipiVCw1XsyupaVUYZ5n3LnURBW9iVGAlxlxZTn6wbz1Fp8Yqv/yD9wNVdm9U+pdW1UkMdS8xQZP0NH/WsoT/7kPReWiCxDw0ASubqH9S/3JNCRa8afyWDKaFeKbGRVtMRK4Ze7fcmoq//JiUlGvLypWSidx34= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776157981; c=relaxed/simple; bh=b2vABH9CUTGVy1b/2pVmKvFnsTTGQEzVcL53yfqfBH8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=g6dgFwoO6IZCgcm69NCvcgNMrGHMK9yQTpik+r87yrFN8h0oD6p4C0/nztIQu9bqrHKd4mH+huMOCjkVmIQwHzv0QzEU9n7d8bH/FLuMtbZPqxu+mTab+BMC5e//dwP7ZxZgA9vW62yRI8qAjTS8XVV0NwN9178vngihxXlFclU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=DlVNWBxL; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="DlVNWBxL" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4852a9c6309so50658315e9.0 for ; Tue, 14 Apr 2026 02:12:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1776157978; x=1776762778; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EDSOwTMIxUubFUHj5t2nw1K3vQ5AcGm2RW0GMElvL0c=; b=DlVNWBxLilFDc1CxFhvDlUr5Aub04sDCdyUqsAxifkTNh3/oa3JXjdGE4SNbkebluH nPYOrl1qTaVEouYqwuoPn/vMQnud+FT6c9ocG+r4y00WZ3n6mftqxy/Olr9f25YJ2S0r Ewh3JW+1m9D/HrBvxB3N1qXOHgDetNEOJlJOBjBX2RrsQNiVMmkXwzMf47TB+MD9/Jyf 1LRzthhq5LpEW/SUhoEqTl9yGJoVu9G2FaxE/kP0PEOTa+gq+ypxaM9BGJkq0mRV11Kr A3h/EBpSn3nfWnOiukvc2xsco7gsyaMnUgTV0+h91VJChFYp3WWG+2M3THfls0MvH4D0 fNKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776157978; x=1776762778; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=EDSOwTMIxUubFUHj5t2nw1K3vQ5AcGm2RW0GMElvL0c=; b=Lfo0mwrE32o3HHwiM+KaH4LI/cxdJNXPCDqv9IrEtqbl7PoLIaQOj5gdW5Yy3OHET8 +hiaHZt0T0RV7qErlBe2Evboqp8mVQ3R59JaViOfeHp4L67raaIHG7/MSrhOg7Qpg1OA LN/gOxs9wQdNsgh5hzLeaeHDshsP7e6JUiueYK5rP8mi2if9Arn1pNs0Yh3KPlZTxyO9 iRgbFicouhyP8dqWUl/QtEcyg4jaa41QktMhXklxodryZAC9y1JHo3MdhupPrHWbAFNk /3N3SXSJYf2dDy+8NUxkp2bKRF3eTz0d6+cw5HVHC4FCPa0qKtRLqFm5hQU6Q92Eh/xB sxXg== X-Forwarded-Encrypted: i=1; AFNElJ++Qkzzk4Kq7DaAYQUSk3C6LeU6W701TUD3bt3v5xG2hDq6qO3xFRSIu5WlfhVlZxiHjYvM820Fj0hnCos=@vger.kernel.org X-Gm-Message-State: AOJu0YwmReTUYaOuGDfVNrm66n5dFBjv2NedEej/zneeSK4i5oWBNOBT AI8I8YPpcJwNjrt6o41kMqDvmgpRyqmaKd9oeinW8oKLFDKGml6jpa1m X-Gm-Gg: AeBDievlfJqy/F8UecvC+zlrbXTTof48bsCdd33OHnr4rEF6AICwGBYZK3thETuObtf oOttt/2JYRVqr2HrYPWIhqyaaEvTwrQvZu5DnCkXcRjvY1Mx5CRifcH/dNwBCTaBzTD4hzUJVNF E5b7D4fneB3iw+XjWcX2V2+fKr0Q4pionUJlXaiy+Hbf4CJ8cyg61EEFM3KY0YkS+XEkwUpSWV7 ZR+JioyPQWoLIJkycB+NTBQ1A9j8NhVacwOzznI+0Ewz32MTGSq/KGR1Tayl0ZlWkde0d0Kipgq Azzz9yy+ZPnH/4vmQUUEnPx/NAyygFqxd6Mg5chufpbpp7mQS7FwLtPVdomw3naBxY1ZKvv127S PS1FVJ8e6RfNOomG31f9Fk8lVlT4Iqds7ah1dpF5iAw71DCxW4k9zDmvK9ozp3oga1mTDKkSmTv VUhpWNUlv3g0XLw14DH1P79pGub2+5VpENO0mU6fdhXH1AbByXw/ZeVakrnWmKTJ4FfTZ2ffouW rigAkE3tA== X-Received: by 2002:a05:600c:4fcb:b0:488:c120:480a with SMTP id 5b1f17b1804b1-488d6891181mr241537365e9.31.1776157978248; Tue, 14 Apr 2026 02:12:58 -0700 (PDT) Received: from [127.0.1.1] (cust-east-par-46-193-119-166.cust.wifirst.net. [46.193.119.166]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-488eddba112sm37720175e9.0.2026.04.14.02.12.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2026 02:12:58 -0700 (PDT) From: Fidelio Lawson X-Google-Original-From: Fidelio Lawson Date: Tue, 14 Apr 2026 11:12:34 +0200 Subject: [PATCH v3 1/3] net: dsa: microchip: implement KSZ87xx Module 3 low-loss cable errata Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260414-ksz87xx_errata_low_loss_connections-v3-1-0e3838ca98c9@exotec.com> References: <20260414-ksz87xx_errata_low_loss_connections-v3-0-0e3838ca98c9@exotec.com> In-Reply-To: <20260414-ksz87xx_errata_low_loss_connections-v3-0-0e3838ca98c9@exotec.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Marek Vasut , Maxime Chevallier , Simon Horman , Heiner Kallweit , Russell King Cc: Woojung Huh , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Fidelio Lawson X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776157976; l=7009; i=fidelio.lawson@exotec.com; s=20260326; h=from:subject:message-id; bh=b2vABH9CUTGVy1b/2pVmKvFnsTTGQEzVcL53yfqfBH8=; b=1EdUKsDD5kIx0r/m1y1jf+NIHZjI939g6JX7+0sZbH92Eh6h8RlGaG7dStAAsPGCeMkgh6zEQ oN9nBsoHh7kA3fzag/cdtOHqo5tLS2bECSYcgE6p6ivvs4BHPXSJYm/ X-Developer-Key: i=fidelio.lawson@exotec.com; a=ed25519; pk=866eH9Bmmpjc+ctgkr5T1uXxBefZzob3tEEuiVWZ6BI= Implement the "Module 3: Equalizer fix for short cables" erratum from Microchip document DS80000687C for KSZ87xx switches. The issue affects short or low-loss cable links (e.g. CAT5e/CAT6), where the PHY receiver equalizer may amplify high-amplitude signals excessively, resulting in internal distortion and link establishment failures. KSZ87xx devices require a workaround for the Module 3 low-loss cable condition, controlled through the switch TABLE_LINK_MD_V indirect registers. The affected registers are part of the switch address space and are not directly accessible from the PHY driver. To keep the PHY-facing API clean and avoid leaking switch-specific details, model this errata control as vendor-specific Clause 22 PHY registers. A vendor-specific Clause 22 PHY register is introduced as a mode selector in PHY_REG_LOW_LOSS_CTRL, and ksz8_r_phy() / ksz8_w_phy() translate accesses to these bits into the appropriate indirect TABLE_LINK_MD_V accesses. The control register defines the following modes: 0: disabled (default behavior) 1: EQ training workaround 2: LPF 90 MHz 3: LPF 62 MHz 4: LPF 55 MHz 5: LPF 44 MHz Workaround 1: Adjusts the DSP EQ training behavior via LinkMD register 0x3C. Widens and optimizes the DSP EQ compensation range, and is expected to solve most short/low-loss cable issues. Workaround 2: for the cases where Workaround 1 is not sufficient. This one adjusts the receiver low-pass filter bandwidth, effectively reducing the high-frequency component of the received signal The register is accessible through standard PHY read/write operations (e.g. phytool), without requiring any switch-specific userspace interface. This allows robust link establishment on short or low-loss cabling without requiring DTS properties and without constraining hardware design choices. The erratum affects the shared PHY analog front-end and therefore applies globally to the switch. Signed-off-by: Fidelio Lawson --- drivers/net/dsa/microchip/ksz8.c | 45 ++++++++++++++++++++++++++++++= ++++ drivers/net/dsa/microchip/ksz8_reg.h | 36 ++++++++++++++++++++++++++- drivers/net/dsa/microchip/ksz_common.h | 3 +++ 3 files changed, 83 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index c354abdafc1b..596c85654f24 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -1058,6 +1058,11 @@ int ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 = reg, u16 *val) if (ret) return ret; =20 + break; + case PHY_REG_KSZ87XX_LOW_LOSS: + if (!ksz_is_ksz87xx(dev)) + return -EOPNOTSUPP; + data =3D dev->low_loss_wa_mode; break; default: processed =3D false; @@ -1271,6 +1276,46 @@ int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 = reg, u16 val) if (ret) return ret; break; + case PHY_REG_KSZ87XX_LOW_LOSS: + if (!ksz_is_ksz87xx(dev)) + return -EOPNOTSUPP; + + switch (val & PHY_KSZ87XX_LOW_LOSS_MASK) { + case PHY_LOW_LOSS_ERRATA_DISABLED: + ret =3D ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_EQ_TRAIN, + KSZ87XX_EQ_TRAIN_DEFAULT); + if (!ret) + ret =3D ksz8_ind_write8(dev, TABLE_LINK_MD, + KSZ87XX_REG_PHY_LPF, + KSZ87XX_LOW_LOSS_LPF_90MHZ); + break; + case KSZ87XX_LOW_LOSS_EQ_TRAIN: + ret =3D ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_EQ_TRAIN, + KSZ87XX_EQ_TRAIN_LOW_LOSS); + break; + case KSZ87XX_LOW_LOSS_LPF_90MHZ: + ret =3D ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_PHY_LPF, + KSZ87XX_PHY_LPF_90MHZ); + break; + case KSZ87XX_LOW_LOSS_LPF_62MHZ: + ret =3D ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_PHY_LPF, + KSZ87XX_PHY_LPF_62MHZ); + break; + case KSZ87XX_LOW_LOSS_LPF_55MHZ: + ret =3D ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_PHY_LPF, + KSZ87XX_PHY_LPF_55MHZ); + break; + case KSZ87XX_LOW_LOSS_LPF_44MHZ: + ret =3D ksz8_ind_write8(dev, TABLE_LINK_MD, KSZ87XX_REG_PHY_LPF, + KSZ87XX_PHY_LPF_44MHZ); + break; + default: + return -EINVAL; + } + + if (!ret) + dev->low_loss_wa_mode =3D val & PHY_KSZ87XX_LOW_LOSS_MASK; + return ret; default: break; } diff --git a/drivers/net/dsa/microchip/ksz8_reg.h b/drivers/net/dsa/microch= ip/ksz8_reg.h index 332408567b47..4e02e044339c 100644 --- a/drivers/net/dsa/microchip/ksz8_reg.h +++ b/drivers/net/dsa/microchip/ksz8_reg.h @@ -202,6 +202,10 @@ #define REG_PORT_3_STATUS_0 0x38 #define REG_PORT_4_STATUS_0 0x48 =20 +/* KSZ87xx LinkMD registers (TABLE_LINK_MD_V) */ +#define KSZ87XX_REG_EQ_TRAIN 0x3C +#define KSZ87XX_REG_PHY_LPF 0x4C + /* For KSZ8765. */ #define PORT_REMOTE_ASYM_PAUSE BIT(5) #define PORT_REMOTE_SYM_PAUSE BIT(4) @@ -342,7 +346,7 @@ #define TABLE_EEE (TABLE_EEE_V << TABLE_EXT_SELECT_S) #define TABLE_ACL (TABLE_ACL_V << TABLE_EXT_SELECT_S) #define TABLE_PME (TABLE_PME_V << TABLE_EXT_SELECT_S) -#define TABLE_LINK_MD (TABLE_LINK_MD << TABLE_EXT_SELECT_S) +#define TABLE_LINK_MD (TABLE_LINK_MD_V << TABLE_EXT_SELECT_S) #define TABLE_READ BIT(4) #define TABLE_SELECT_S 2 #define TABLE_STATIC_MAC_V 0 @@ -729,6 +733,36 @@ #define PHY_POWER_SAVING_ENABLE BIT(2) #define PHY_REMOTE_LOOPBACK BIT(1) =20 +/* Equalizer low-loss workaround */ +#define PHY_REG_KSZ87XX_LOW_LOSS 0x1C +#define PHY_KSZ87XX_LOW_LOSS_MASK GENMASK(2, 0) + +/* KSZ87xx low-loss EQ mode selector (vendor-specific PHY reg 0x1c) + * + * Values: + * 0: disabled (default behavior) + * 1: EQ training workaround + * 2: LPF 90 MHz + * 3: LPF 62 MHz + * 4: LPF 55 MHz + * 5: LPF 44 MHz + */ +#define PHY_LOW_LOSS_ERRATA_DISABLED 0 +#define KSZ87XX_LOW_LOSS_EQ_TRAIN 1 +#define KSZ87XX_LOW_LOSS_LPF_90MHZ 2 +#define KSZ87XX_LOW_LOSS_LPF_62MHZ 3 +#define KSZ87XX_LOW_LOSS_LPF_55MHZ 4 +#define KSZ87XX_LOW_LOSS_LPF_44MHZ 5 + +#define KSZ87XX_EQ_TRAIN_DEFAULT 0x0A +#define KSZ87XX_EQ_TRAIN_LOW_LOSS 0x15 + +/* LPF bandwidth bits [7:6]: 00 =3D 90MHz, 01 =3D 62MHz, 10 =3D 55MHz, 11 = =3D 44MHz */ +#define KSZ87XX_PHY_LPF_90MHZ 0x00 +#define KSZ87XX_PHY_LPF_62MHZ 0x40 +#define KSZ87XX_PHY_LPF_55MHZ 0x80 +#define KSZ87XX_PHY_LPF_44MHZ 0xC0 + /* KSZ8463 specific registers. */ #define P1MBCR 0x4C #define P1MBSR 0x4E diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 929aff4c55de..16a6074ea4b4 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -219,6 +219,9 @@ struct ksz_device { * the switch=E2=80=99s internal PHYs, bypassing the main SPI interface. */ struct mii_bus *parent_mdio_bus; + + /* Equalizer low-loss workaround tunable */ + u8 low_loss_wa_mode; /* KSZ87xx low-loss EQ/LPF mode selector (0-5) */ }; =20 /* List of supported models */ --=20 2.53.0 From nobody Mon Jun 15 22:06:46 2026 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84B233B9D8B for ; Tue, 14 Apr 2026 09:13:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776157983; cv=none; b=jRTuAb+GmlKOnnhhV0QLPkDo5MCD9iYvWlcoGj92taIzEPHvPkq+wBhH0OMQ5JZDufkd/EkXbVn7hpHe/TbRbM6PQ+35ScwUfKlcFSlPouRs4GnLsAGuaqrdng3yHjN3oGbFxl6SjoRC2Dww9CUnntWuZdq3FJhDg4DbYnl/UdI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776157983; c=relaxed/simple; bh=ueYfz0riU01OccrDWCw9HEhIJW+EJERRqwTDZ72FBYQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EoqlClTUBs2sQphXWpz1UccKriOmu+ZclmWiV4KSNnPqxkdswTAF3BYXQtjYlt0TCzleSzDDTattaSJ3mWurD2fV9Yydi/O38IUXeQspGTYd9Nhd0u7In5fAFGGBQUBLsL+GYQkyQ4XJlQ4k0YY8vPMyp68ESBqcJYzJ4rxSfhA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=URAoCmSB; arc=none smtp.client-ip=209.85.128.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="URAoCmSB" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488ba840146so51816945e9.1 for ; Tue, 14 Apr 2026 02:13:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1776157979; x=1776762779; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=5Dd71Vwcs/wH2BqkWU93Xb8qQUrIJYFt6l9omprx4eE=; b=URAoCmSBCoPdRSH+QbleLuenQN4v817PRPWz7Xqn2myagX/ER5LuAR7KdeYvQkiTSK H35N6N7KDgjGAM536g4Uer2p2zsU6H59WggA4gNYJUiBItDEU6eoRcLQFNFDOiB+PAY2 SpOBEzEDzITPkIIe26d2FYwh/da+IZWFWpSaaOKEcZzQ8jiG4Jb6I7JCmzPmg5gTqNMc 8nExfPPH64v0y6IqQJruP7cH1Kr0/qqfOZcUSzP1qj0taIka97AmqxnM+OUZGkpmXeZO umR0PGORbXlGBZ8Q/+BuEuvL619Z8eyvW7FmgACkjZazUWs2uLMrAFpVesQjvsT1Et9S qK3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776157979; x=1776762779; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=5Dd71Vwcs/wH2BqkWU93Xb8qQUrIJYFt6l9omprx4eE=; b=eI0RwP5DeJhRo0katxQnNhU7F1Wc4AeMreeojuwH4AhWEUaSa7zUc3cNOdTF8CzTtO ATiHWmhKyawa1xDrGIv9koe1FSGHcrY6HLjto4a0JeQF59CqLEkT6XhmEEEQuXUKkIdS eKgdInlNAsLoZqDH3bmfQcsfiNqnusl5Vh9zQmJ6/MYCoiSIkirns4gtfIvakfCHNO+k Qvwaun/1pqj7hdSuCrlyGr/+a0qauPXCA545txlFSUTRh5gKBFSXK6ezXL1D4md6eh9j UdjoV8zW1brDMDUwDoe97cSjLWfsIn0tvqyjF/TGsJd7nj3PMXrqqHhf6pi9zEpuxZpQ 02HA== X-Forwarded-Encrypted: i=1; AFNElJ8LyjJ7CnR9hYMKX6KS2FgsKrtZp/vvYPxuU061IQKBYqnz4+43s7bnssai4GvItoIfNUDCWpLtzD9yq7g=@vger.kernel.org X-Gm-Message-State: AOJu0YxQe+jDzXMXPEC6/VUb7yQOgC6hnc1I+T1rV36CHZkh/Bo8rV/7 KmfRYgBvtyuasl0JoVUF0uHMUUCFYQlKekWB/mLnsE8KsepK0fYEBJa9 X-Gm-Gg: AeBDietCVy1Ah7//Yv4i8hIi0UZXSrXBbv1i+jLk2yG6EnXo/nLmR0CUx/Ot0mowVpC bQ7TnGE84BEmjPpVtsCxKt7Rvmnk3c8KQN1vAoQ3BCNT1AchubyVX5W+grtQj9cmplHZRmPDZXz 1B2y+udKsrwJZXNHtiBcDNQ3+3y9tFfsyaFikgVWAfPCcAHAIDUr8xckd16fc/YoI/nunCF3QjA Q0+mlBRALAHbm+EEHEWdbEO7c14/QR2chbTZFkFGSU1qNZKCwNR9bP4HQafl12pcmazYBGxwff+ VYBSeq3d7zp+7JI0CakZc3Q/aA/dHIyw3m5c5u1ALR8AKPDNSr7fjMRT6kWBArWX7XhZg+hRQUT oywUm//HCGxgJxfw937Ghsy5RVcBMPCR+QEcCPlz0kvXjQjXhMKZip3Py78BW8JWPk/yMKkebvU +ml3f3D/7vT0TSgt0f+gpN0cY3Fc585OoXKCVRV1UUeOo30qX9eAr3g11BBV3DonsWK/GMw712e sAPPxQiwg== X-Received: by 2002:a05:600c:3546:b0:488:c085:22ad with SMTP id 5b1f17b1804b1-488d68867ddmr226055715e9.29.1776157978862; Tue, 14 Apr 2026 02:12:58 -0700 (PDT) Received: from [127.0.1.1] (cust-east-par-46-193-119-166.cust.wifirst.net. [46.193.119.166]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-488eddba112sm37720175e9.0.2026.04.14.02.12.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2026 02:12:58 -0700 (PDT) From: Fidelio Lawson X-Google-Original-From: Fidelio Lawson Date: Tue, 14 Apr 2026 11:12:35 +0200 Subject: [PATCH v3 2/3] net: ethtool: add KSZ87xx low-loss PHY tunable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260414-ksz87xx_errata_low_loss_connections-v3-2-0e3838ca98c9@exotec.com> References: <20260414-ksz87xx_errata_low_loss_connections-v3-0-0e3838ca98c9@exotec.com> In-Reply-To: <20260414-ksz87xx_errata_low_loss_connections-v3-0-0e3838ca98c9@exotec.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Marek Vasut , Maxime Chevallier , Simon Horman , Heiner Kallweit , Russell King Cc: Woojung Huh , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Fidelio Lawson X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776157976; l=2311; i=fidelio.lawson@exotec.com; s=20260326; h=from:subject:message-id; bh=ueYfz0riU01OccrDWCw9HEhIJW+EJERRqwTDZ72FBYQ=; b=TcVfomq/oo06I4d6VI7EKSRvwWGQx7sC+9XRsF54FY2vQNPRD4B4uPJwXIP3puPfYS2QBXtDW Yx+g5/DGw42D4d2jL3jq5D7eWvjDAt4zujelmzvTucSoHfIJv/wPhrO X-Developer-Key: i=fidelio.lawson@exotec.com; a=ed25519; pk=866eH9Bmmpjc+ctgkr5T1uXxBefZzob3tEEuiVWZ6BI= Introduce a new PHY tunable identifier, ETHTOOL_PHY_KSZ87XX_LOW_LOSS, to allow userspace to control the KSZ87xx low-loss cable erratum through the ethtool PHY tunable interface. KSZ87xx switches integrate embedded PHYs whose receiver behavior may require specific equalizer or low-pass filter adjustments when used with short or low-loss Ethernet cables, as described in Microchip errata DS80000687C (Module 3). The new tunable provides a userspace interface for selecting the desired operating mode. The tunable uses a u8 value and is vendor-specific by design. The actual handling is implemented by the corresponding PHY driver. Signed-off-by: Fidelio Lawson --- include/uapi/linux/ethtool.h | 1 + net/ethtool/common.c | 1 + net/ethtool/ioctl.c | 1 + 3 files changed, 3 insertions(+) diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h index b74b80508553..5c539e1bca4b 100644 --- a/include/uapi/linux/ethtool.h +++ b/include/uapi/linux/ethtool.h @@ -295,6 +295,7 @@ enum phy_tunable_id { * Add your fresh new phy tunable attribute above and remember to update * phy_tunable_strings[] in net/ethtool/common.c */ + ETHTOOL_PHY_KSZ87XX_LOW_LOSS, __ETHTOOL_PHY_TUNABLE_COUNT, }; =20 diff --git a/net/ethtool/common.c b/net/ethtool/common.c index e252cf20c22f..e1c98ce66093 100644 --- a/net/ethtool/common.c +++ b/net/ethtool/common.c @@ -101,6 +101,7 @@ phy_tunable_strings[__ETHTOOL_PHY_TUNABLE_COUNT][ETH_GS= TRING_LEN] =3D { [ETHTOOL_PHY_DOWNSHIFT] =3D "phy-downshift", [ETHTOOL_PHY_FAST_LINK_DOWN] =3D "phy-fast-link-down", [ETHTOOL_PHY_EDPD] =3D "phy-energy-detect-power-down", + [ETHTOOL_PHY_KSZ87XX_LOW_LOSS] =3D "phy-ksz87xx-low-loss", }; =20 #define __LINK_MODE_NAME(speed, type, duplex) \ diff --git a/net/ethtool/ioctl.c b/net/ethtool/ioctl.c index ff4b4780d6af..9e7bd887acf5 100644 --- a/net/ethtool/ioctl.c +++ b/net/ethtool/ioctl.c @@ -3109,6 +3109,7 @@ static int ethtool_phy_tunable_valid(const struct eth= tool_tunable *tuna) switch (tuna->id) { case ETHTOOL_PHY_DOWNSHIFT: case ETHTOOL_PHY_FAST_LINK_DOWN: + case ETHTOOL_PHY_KSZ87XX_LOW_LOSS: if (tuna->len !=3D sizeof(u8) || tuna->type_id !=3D ETHTOOL_TUNABLE_U8) return -EINVAL; --=20 2.53.0 From nobody Mon Jun 15 22:06:46 2026 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 354183BA248 for ; Tue, 14 Apr 2026 09:13:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776157983; cv=none; b=b3M4h9dPSFT/bIpVAJ4mqJ96FWt+ngfDlvSNL8WchNWa/FMGJLFhmLnT2rW3//x727idzBDc6/qThfYXaVshc+SVxEbn/vqtGH81w4DsBEThqorNRpV5iY5wEXdMJEMz0mpjy3XToGr9mmNyiHr26oFrYdboMBfxjT1HSMF8mXk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776157983; c=relaxed/simple; bh=2vI6ognLDqNvbJVGBaJD46iIjBYSoIanjoxDpv86i8Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=X5nqeFlyoCpIv6I3m9qyB+DZPGZ65jbcdLNFiHNLg5a8eAsxQBaBaqFV+06N8oBSz6lh0O082r/JXAcuM/d7afpueyvnpTCBCkI9sdRBParxuDO/SmAGcbfJKIy6gXO1eMSv9z7vCpq0oJNcEVPwhCmeAunMhv9h0thJkO415OM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Ant7J/HE; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ant7J/HE" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-48374014a77so72733175e9.3 for ; Tue, 14 Apr 2026 02:13:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1776157979; x=1776762779; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=QOp42/ywV8i4T7a1g68YDk4e+77ZBYbSBwy2mOXtNU0=; b=Ant7J/HET8p9uKvVQUfr3DRxk9d+3j4kB2H2WA7Q94b8eu7mgkHNjBZBDmi8NJkCaM WxHxVPUHeDyZLnIC/dH8q0+ZB6w4YJe+/SFYB5SnmZND1e4DwdyaEhnHmQ4XuYAoq4hi K4NfmLodEEfkT/vb43U+JAqLPKgTM6jXB0iZ4vSqd/5KKHOf2Bkq6mt9S/v+Cg3hV9cI 3XfKMTM9X9jAK6ynTlbYQlltnRzD0E0sAVAuh/Pg11sV7GFMGg5dUMEhGOlPqEgJRwhe mrsWmZCFj05V4dZDZg8D8UIooGXQimyfOvKQWZZrcLruXuF853RHkKHu5klqfhWBshWB RqVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1776157979; x=1776762779; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=QOp42/ywV8i4T7a1g68YDk4e+77ZBYbSBwy2mOXtNU0=; b=CgUT5gf8dXgPoLUFhl/StHd9vU8GH5tMP0PEjpcQZr07iSco18NMWj/W2cMk4b0OFD 3C+xQYRxqxkkTamacqvvG+MVHltEAqtqGcY8KS6b4XlLp84oGWB+W10JRhKGrW8XFMEf LROVSXLGBBK7M7cSeJL3bAUgN9F2Vn8/tKYZCY0/NAPXrCzwvSNDqu6n/Aa7W/OSOgbt rFj2wNnq7/lgChtSc7F9bEXs7UyF1pF/oGTgqGAANhw/dXI3P8+Ja3guUrLRXUWaM82J w2ADcaCV0szjXdoJ2cLYJdOgsV6bTPYdYSs3xI6beWVzRVU1lXlVPrhAbe/vErSUo/1V JN4Q== X-Forwarded-Encrypted: i=1; AFNElJ+iuqCDhd/RQ9Aav0Jpoc2m1u6tg66sbtGMdznkmXseKFAnmoo6L06wcDkwitxjQGEvLjYhYALQ2vrMUVs=@vger.kernel.org X-Gm-Message-State: AOJu0YxDC+YsK6X+XIE/3DbwNeZFkklxeUbxlvKYeD2qw2yye0Ijjbg+ z8FyMT0eQkY5QYdICI3ZCd8gKQMmiXCldPpt3nZ0uWkP7He1ua71QPzq X-Gm-Gg: AeBDietzhaig1avHusBJk02kq5pDX/D1gJq9db5S/10bxfkE09n8E51n/qQGGuUB+02 yTG/tm7qk4MjNOgTqPmpWV8hsWYhzdZqpPIz/hCrgkrgXQatchX+Zt8XGimkd0Yct35vOVm76kg jKKmp8inbHQJwDAB9zm+i8AV3otPHy3fwOuj3MKdc0co4JD/yfd6n4lTAYD67eVAC5YzVOjoS8I kA3XSxOA+09v3YQ5A61OS6MvIofofEhyslMbSLWe4+RnHRTokutgGYi+UfNUj/bZ3nvq6StIZey ykkj5TRrJLGKMS+SiJzzzhhG467MLg9a15BQcuK52IV4uPyUAfUEhmMkS85zcn2oNtTaJkzBbOp 444ZzmcW3Rs+nD5aXeR3ED4Qgu2ruzd3PLD+jsU4ZpQKSXFifV1pMBuJAdXd0KgSHNaBxgoiIJO aQpXpHSkMLiDqvjAsRLb2xdQ8LNeRi7vEQiMJW0xsJotyW1dQsficjmbBkxLcEeAofHTzUfVwOj yQ7cLsB2Q== X-Received: by 2002:a05:600c:c084:b0:485:4006:960c with SMTP id 5b1f17b1804b1-488d685b86bmr165530925e9.16.1776157979473; Tue, 14 Apr 2026 02:12:59 -0700 (PDT) Received: from [127.0.1.1] (cust-east-par-46-193-119-166.cust.wifirst.net. [46.193.119.166]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-488eddba112sm37720175e9.0.2026.04.14.02.12.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2026 02:12:59 -0700 (PDT) From: Fidelio Lawson X-Google-Original-From: Fidelio Lawson Date: Tue, 14 Apr 2026 11:12:36 +0200 Subject: [PATCH v3 3/3] net: phy: micrel: expose KSZ87xx low-loss erratum via PHY tunable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260414-ksz87xx_errata_low_loss_connections-v3-3-0e3838ca98c9@exotec.com> References: <20260414-ksz87xx_errata_low_loss_connections-v3-0-0e3838ca98c9@exotec.com> In-Reply-To: <20260414-ksz87xx_errata_low_loss_connections-v3-0-0e3838ca98c9@exotec.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Marek Vasut , Maxime Chevallier , Simon Horman , Heiner Kallweit , Russell King Cc: Woojung Huh , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Fidelio Lawson X-Mailer: b4 0.15.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1776157976; l=3026; i=fidelio.lawson@exotec.com; s=20260326; h=from:subject:message-id; bh=2vI6ognLDqNvbJVGBaJD46iIjBYSoIanjoxDpv86i8Y=; b=FP4OCvNO1ZybW4xzvNdkF5/zBzYowz+zBvp4wt3FGg6LXKDVyOeI//tDQ21+a/LHMjJOoODrL suZIjX1OlaCDZEecu+jz9QT7l9X9/v49Yj6V2DMUjItbPTYpuUdmRi7 X-Developer-Key: i=fidelio.lawson@exotec.com; a=ed25519; pk=866eH9Bmmpjc+ctgkr5T1uXxBefZzob3tEEuiVWZ6BI= Expose the KSZ87xx low-loss cable erratum control through the PHY tunable interface. KSZ87xx switches integrate embedded PHYs whose receiver analog front-end may require specific equalizer or low-pass filter adjustments when used with short or low-loss Ethernet cables, as described in Microchip errata DS80000687C (Module 3). Implement get_tunable / set_tunable callbacks in the Micrel PHY driver for KSZ87xx devices, mapping the ETHTOOL_PHY_KSZ87XX_LOW_LOSS tunable to a vendor-specific Clause 22 PHY register. Accesses are routed through standard phy_read() / phy_write() operations and translated by the KSZ8 DSA driver into the appropriate internal LinkMD table updates. The tunable uses a u8 mode selector, allowing userspace to select between the documented equalizer and LPF bandwidth configurations. Signed-off-by: Fidelio Lawson --- drivers/net/phy/micrel.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index c6b011a9d636..7cbca6a7ed84 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -287,6 +287,11 @@ /* PHY Control 2 / PHY Control (if no PHY Control 1) */ #define MII_KSZPHY_CTRL_2 0x1f #define MII_KSZPHY_CTRL MII_KSZPHY_CTRL_2 + +/* Vendor-specific Clause 22 register, virtualized by KSZ87xx embedded PHY= s DSA driver */ +#define MII_KSZ87XX_LOW_LOSS 0x1c +#define KSZ87XX_LOW_LOSS_MAX 5 + /* bitmap of PHY register to set interrupt mode */ #define KSZ8081_CTRL2_HP_MDIX BIT(15) #define KSZ8081_CTRL2_MDI_MDI_X_SELECT BIT(14) @@ -940,6 +945,38 @@ static int ksz8795_match_phy_device(struct phy_device = *phydev, return ksz8051_ksz8795_match_phy_device(phydev, false); } =20 +static int ksz87xx_get_tunable(struct phy_device *phydev, + struct ethtool_tunable *tuna, void *data) +{ + int ret; + + switch (tuna->id) { + case ETHTOOL_PHY_KSZ87XX_LOW_LOSS: + ret =3D phy_read(phydev, MII_KSZ87XX_LOW_LOSS); + if (ret < 0) + return ret; + *(u8 *)data =3D ret; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int ksz87xx_set_tunable(struct phy_device *phydev, + struct ethtool_tunable *tuna, const void *data) +{ + u8 val =3D *(const u8 *)data; + + switch (tuna->id) { + case ETHTOOL_PHY_KSZ87XX_LOW_LOSS: + if (val > KSZ87XX_LOW_LOSS_MAX) + return -EINVAL; + return phy_write(phydev, MII_KSZ87XX_LOW_LOSS, val); + default: + return -EOPNOTSUPP; + } +} + static int ksz9021_load_values_from_of(struct phy_device *phydev, const struct device_node *of_node, u16 reg, @@ -6809,6 +6846,8 @@ static struct phy_driver ksphy_driver[] =3D { /* PHY_BASIC_FEATURES */ .config_init =3D kszphy_config_init, .match_phy_device =3D ksz8795_match_phy_device, + .get_tunable =3D ksz87xx_get_tunable, + .set_tunable =3D ksz87xx_set_tunable, .suspend =3D genphy_suspend, .resume =3D genphy_resume, }, { --=20 2.53.0