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charset="utf-8" Enable secondary mi2s to support HDMI audio. Signed-off-by: Kumar Anurag --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 5 +++ arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 43 ++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index 6079e67ea829..d1009debc12b 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -5827,6 +5827,11 @@ mi2s1_ws: mi2s1-ws-state { function =3D "mi2s1_ws"; }; =20 + mi2s1_mclk: mi2s1-mclk-state { + pins =3D "gpio105"; + function =3D "sec_mi2s"; + }; + pcie0_clkreq_n: pcie0-clkreq-n-state { pins =3D "gpio88"; function =3D "pcie0_clkreqn"; diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot= /dts/qcom/qcs6490-rb3gen2.dts index e3d2f01881ae..2e4062052828 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -672,6 +672,7 @@ &i2c0 { lt9611_codec: hdmi-bridge@2b { compatible =3D "lontium,lt9611uxc"; reg =3D <0x2b>; + #sound-dai-cells =3D <1>; =20 interrupts-extended =3D <&tlmm 24 IRQ_TYPE_EDGE_FALLING>; reset-gpios =3D <&pm7250b_gpios 2 GPIO_ACTIVE_HIGH>; @@ -1110,6 +1111,9 @@ &sound { compatible =3D "qcom,qcs6490-rb3gen2-sndcard"; model =3D "QCS6490-RB3Gen2"; =20 + pinctrl-0 =3D <&mi2s1_data0>, <&mi2s1_mclk>, <&mi2s1_sclk>, <&mi2s1_ws>; + pinctrl-names =3D "default"; + audio-routing =3D "SpkrLeft IN", "WSA_SPK1 OUT", "SpkrRight IN", "WSA_SPK2 OUT", "VA DMIC0", "vdd-micb", @@ -1149,6 +1153,22 @@ platform { sound-dai =3D <&q6apm>; }; }; + + mi2s1-playback-dai-link { + link-name =3D "Secondary MI2S Playback"; + + codec { + sound-dai =3D <<9611_codec 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai SECONDARY_MI2S_RX>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; }; =20 &swr2 { @@ -1437,3 +1457,26 @@ &lpass_audiocc { compatible =3D "qcom,qcm6490-lpassaudiocc"; /delete-property/ power-domains; }; + +&mi2s1_data0 { + drive-strength =3D <8>; + bias-disable; +}; + +&mi2s1_mclk { + drive-strength =3D <8>; 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charset="utf-8" Add new dai link to enable DP audio. Signed-off-by: Kumar Anurag Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot= /dts/qcom/qcs6490-rb3gen2.dts index 2e4062052828..90fd8822dabd 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -1169,6 +1169,22 @@ platform { sound-dai =3D <&q6apm>; }; }; + + dp-dai-link { + link-name =3D "DisplayPort0 Playback"; + + codec { + sound-dai =3D <&mdss_dp>; + }; + + cpu { + sound-dai =3D <&q6apmbedai DISPLAY_PORT_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; }; =20 &swr2 { --=20 2.34.1 From nobody Mon Jun 15 19:03:40 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF39F3B389E; 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charset="utf-8" Add 32bit for playback and capture over secondary mi2s. Signed-off-by: Kumar Anurag --- sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c b/sound/soc/qcom/qdsp= 6/q6dsp-lpass-ports.c index 4eed54b071a5..0664f18d7a44 100644 --- a/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c +++ b/sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c @@ -380,7 +380,9 @@ static struct snd_soc_dai_driver q6dsp_audio_fe_dais[] = =3D { .stream_name =3D "Secondary MI2S Playback", .rates =3D SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, - .formats =3D SNDRV_PCM_FMTBIT_S16_LE, + .formats =3D SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, .channels_min =3D 1, .channels_max =3D 8, .rate_min =3D 8000, @@ -394,7 +396,8 @@ static struct snd_soc_dai_driver q6dsp_audio_fe_dais[] = =3D { .rates =3D SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, .formats =3D SNDRV_PCM_FMTBIT_S16_LE | - SNDRV_PCM_FMTBIT_S24_LE, + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, .channels_min =3D 1, .channels_max =3D 8, .rate_min =3D 8000, --=20 2.34.1 From nobody Mon Jun 15 19:03:40 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE12B3B19A7; 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charset="utf-8" The machine driver was unconditionally forcing S16_LE in sc8280xp_be_hw_params_fixup(), which prevents links (e.g. HDMI bridges) that require 32-bit formats from working. Drop the format override and keep only the fixed rate/channels constraints. Signed-off-by: Kumar Anurag --- sound/soc/qcom/sc8280xp.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c index 7925aa3f63ba..c00eabf200b7 100644 --- a/sound/soc/qcom/sc8280xp.c +++ b/sound/soc/qcom/sc8280xp.c @@ -75,10 +75,8 @@ static int sc8280xp_be_hw_params_fixup(struct snd_soc_pc= m_runtime *rtd, SNDRV_PCM_HW_PARAM_RATE); struct snd_interval *channels =3D hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); - struct snd_mask *fmt =3D hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); =20 rate->min =3D rate->max =3D 48000; - snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE); channels->min =3D 2; channels->max =3D 2; switch (cpu_dai->id) { --=20 2.34.1