From nobody Mon Jun 15 15:07:43 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AAEFB42050; Sun, 12 Apr 2026 16:35:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776011737; cv=none; b=txWUYmw73k8ZVsbLbsnOTlYkOzw3R3o+FIcqZ/PqfTO/ySmWgF0oiGazffZJ4QGz8n10nod5e6o4urNLqGhZ2YMy1sBZyQtO76O5qvJw0QkKaQ61IiHSMrhV/lIpM0kPSEag/DIGdclzhrZLXk0w1lQlgYCDRwWVmlzd5ekeTgs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776011737; c=relaxed/simple; bh=4+WSZKF70XQfTRs634NmjMimMoNJNgKygeVxRWCL0MQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EVg8VTic98xuuAcXgqhyTd4gu81HmlJ6yxpjJ7JumZq+u+xBlq0dfhZu27dXZLB5DQ/HKj+i6bwzWSNtnWFZCSExEDdBPYqJb9u4xSRVzYAUo9cB2vjuC/jjaI+SuGwXdhLHE+MKtvTaiUhYCC2ASP9DCCyAcRFfQ9nnQ/g0zIc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=pH3cu9Aa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="pH3cu9Aa" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5EA15C19425; Sun, 12 Apr 2026 16:35:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776011737; bh=4+WSZKF70XQfTRs634NmjMimMoNJNgKygeVxRWCL0MQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=pH3cu9Aa1YIFQNy2vsjWShpoyMOGJAm5T3FpSB+kJIt6MFOIZNXXuNGG9OGafqVHO q1NNnE7uMBKoRMfeG22Siv1l3rdOZH5t6BTzE6APNBnRM2sZCMcGTM9E6gaBsNQmtV a1fggMD3I8gSrP+g1e89wr9Z3LTx8O+vCvbEroRPme6O1Ee9rJ1Pz2kbfMKDuYfjyv lBogU0LEbiXJYH5OEiPEoGXRmI+FNkS66nQcQND2bKShx+Fm5kwJ6hfHG/frPLYrHK 2jtS+hFLiak4qHGEBJWNC386vjHdSmL6Pksy+PiPBOSD9lQlzC/22FH73wrSrA1pjN TXkHhLzde6sLA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56A4FE937EA; Sun, 12 Apr 2026 16:35:37 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Sun, 12 Apr 2026 18:35:36 +0200 Subject: [PATCH v3 1/2] arm64: dts: qcom: sdm845-google: Add dual front IMX355 cameras Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260412-pixel3-camera-v3-1-e26b090a6110@ixit.cz> References: <20260412-pixel3-camera-v3-0-e26b090a6110@ixit.cz> In-Reply-To: <20260412-pixel3-camera-v3-0-e26b090a6110@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Petr Hodina , Richard Acayan , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6886; i=david@ixit.cz; h=from:subject:message-id; bh=MWuWXLNUnlkJytdxHDINSv09dRhxGkw0hQbtOrZahRQ=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBp28nYLbNBQybXIyVt1GbOsYLnTnohsdvmFUxna QnPAbXr+nqJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCadvJ2AAKCRBgAj/E00kg ct5rD/9hhoV1ANwZsRnm/umrTyd8kHWnrHADRTEy+C8R7fiW5qfvzSK5VwVjKPPjdLiv8w4Xzsq +0nqxD9gAvtMcaAqFV66NZ/mLk5qSDWRaK0Qxa+h1zF4LWrofWLjQ/D8jwIvO9OrKwQXGKESFoo S1ka1eKlOdU0D5LMCxrJUcU0LqWzoZWM9LtKrzlTl7qtJOuidrP6Bd0LHx70RS/5IZ3X3dfe2oi 31abXX2xDztwlvBvzfSn4EQwl0j/8p8cSIxJdM3FS79zfA+2pojgsDmyNWLnkVF5KYkY5c3PH9m JM3qo79nk8sNubQ3O6Zbuh5wCIzcn3lUyvlmcbfB4EhiaBOExSmaxJmXe0KOsxIH2JWX8mLDEMg PtJHEUnqfqSFVbENeVDHF/aJ+J7f/J/kbK8FvP5ym9Fl4F/zt40MDm6vdHtuma6F1x22COKm4wy gYy2dG3hfv+MIyjwSMBmQjUibmV0DtMisLztq6TV3TgrI7BRSjN//SQoKit7UkBjai9SHquZmoh apKvu1drKUpek34AmkdsZoRMwzbq+LRS31ZozwJ8gh3YGadCcMTNARG0iF34e6VlVEcQV/TWNnz BWQcLaDFep85rfurByWhzmIo0xUHzp3zgL/AObJHXGBvQJStbzyIqr5mnyfabZNvIeAarG4DyJn OMf9hrKRhdlhsng== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg The Pixel 3 features two front-facing Sony IMX355 sensors with different focal lengths (standard and wide-angle). Both sensors are connected via CSIPHY1 and controlled over CCI I2C1, using MCLK2 as the clock source. Describe the camera nodes and associated resources in the device tree. This enables support for the dual front camera configuration. Signed-off-by: David Heidelberg --- arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi | 193 +++++++++++++++++= +++- 1 file changed, 192 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi b/arch/arm6= 4/boot/dts/qcom/sdm845-google-common.dtsi index 6930066857768..070023a9813ce 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include #include =20 #include "sdm845.dtsi" @@ -132,6 +133,38 @@ vreg_s4a_1p8: regulator-vreg-s4a-1p8 { vin-supply =3D <&vph_pwr>; }; =20 + camera_front_avdd: front-cam-avdd-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "front_cam_avdd"; + + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + + gpios =3D <&tlmm 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&cam_front_avdd_default_pin>; + pinctrl-names =3D "default"; + + vin-supply =3D <&vreg_bob>; + }; + + camera_front_aux_avdd: front-cam-aux-avdd-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "front_cam_aux_avdd"; + + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + + gpios =3D <&tlmm 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&cam_front_aux_avdd_default_pin>; + pinctrl-names =3D "default"; + + vin-supply =3D <&vreg_bob>; + }; + wcn3990-pmu { compatible =3D "qcom,wcn3990-pmu"; =20 @@ -214,6 +247,9 @@ vreg_s7a_1p025: smps7 { regulator-max-microvolt =3D <1028000>; }; =20 + vdda_mipi_csi0_0p9: + vdda_mipi_csi1_0p9: + vdda_mipi_csi2_0p9: vdda_mipi_dsi0_pll: vreg_l1a_0p875: ldo1 { regulator-min-microvolt =3D <880000>; @@ -288,6 +324,13 @@ vreg_l21a_2p95: ldo21 { regulator-initial-mode =3D ; }; =20 + vreg_l22a_3p3: ldo22 { + regulator-min-microvolt =3D <2864000>; + regulator-max-microvolt =3D <2864000>; + + regulator-boot-on; + }; + vreg_l24a_3p075: ldo24 { regulator-min-microvolt =3D <3088000>; regulator-max-microvolt =3D <3088000>; @@ -319,6 +362,11 @@ vreg_l28a_3p0: ldo28 { */ regulator-always-on; }; + + vreg_lvs1_1p8: lvs1 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; }; =20 regulators-1 { @@ -351,6 +399,53 @@ vreg_s3c_0p6: smps3 { }; }; =20 +&camss { + vdda-phy-supply =3D <&vreg_l1a_0p875>; + vdda-pll-supply =3D <&vreg_l26a_1p2>; + + vdda-csi0-supply =3D <&vdda_mipi_csi0_0p9>; + vdda-csi1-supply =3D <&vdda_mipi_csi1_0p9>; + vdda-csi2-supply =3D <&vdda_mipi_csi2_0p9>; + + /* + * MCLK2 (GPIO15) is shared between both front camera sensors. + * The clock is generated by CAMSS, therefore the pin is + * configured here rather than in individual sensor nodes. + */ + pinctrl-0 =3D <&cam_mclk2_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@1 { + reg =3D <1>; + camss_endpoint1: endpoint { + bus-type =3D ; + data-lanes =3D <0 1 2 3>; + remote-endpoint =3D <&cam_aux_front_endpoint>; + }; + }; + + port@2 { + reg =3D <2>; + camss_endpoint2: endpoint { + bus-type =3D ; + data-lanes =3D <0 1 2 3>; + remote-endpoint =3D <&cam_front_endpoint>; + }; + }; + }; +}; + +&cci0_sleep { + /* bus has external pull-up, don't pull down */ + bias-disable; +}; + &cci { status =3D "okay"; }; @@ -358,7 +453,71 @@ &cci { &cci_i2c1 { /* actuator @0c */ =20 - /* front camera, imx355 @1a */ + front_cam: camera@10 { + compatible =3D "sony,imx355"; + reg =3D <0x10>; + + clocks =3D <&clock_camcc CAM_CC_MCLK2_CLK>; + assigned-clocks =3D <&clock_camcc CAM_CC_MCLK2_CLK>; + /* + * The sensor can accept a 24 MHz clock, but 19.2 MHz has + * better driver compatibility. + */ + assigned-clock-rates =3D <19200000>; + + reset-gpios =3D <&tlmm 21 GPIO_ACTIVE_LOW>; + + avdd-supply =3D <&camera_front_avdd>; + dvdd-supply =3D <&vreg_s3a_1p35>; + dovdd-supply =3D <&vreg_lvs1_1p8>; + + pinctrl-0 =3D <&cam_front_reset_default_pin>; + pinctrl-names =3D "default"; + + rotation =3D <270>; + orientation =3D <0>; + + port { + cam_front_endpoint: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <360000000>; + remote-endpoint =3D <&camss_endpoint2>; + }; + }; + }; + + front_aux_cam: camera@1a { + compatible =3D "sony,imx355"; + reg =3D <0x1a>; + + clocks =3D <&clock_camcc CAM_CC_MCLK2_CLK>; + assigned-clocks =3D <&clock_camcc CAM_CC_MCLK2_CLK>; + /* + * The sensor can accept a 24 MHz clock, but 19.2 MHz has + * better driver compatibility. + */ + assigned-clock-rates =3D <19200000>; + + reset-gpios =3D <&tlmm 9 GPIO_ACTIVE_LOW>; + + avdd-supply =3D <&camera_front_aux_avdd>; + dvdd-supply =3D <&vreg_s3a_1p35>; + dovdd-supply =3D <&vreg_lvs1_1p8>; + + pinctrl-0 =3D <&cam_front_aux_reset_default_pin>; + pinctrl-names =3D "default"; + + rotation =3D <270>; + orientation =3D <0>; + + port { + cam_aux_front_endpoint: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <360000000>; + remote-endpoint =3D <&camss_endpoint1>; + }; + }; + }; =20 /* eeprom @50, at24 driver says 8K */ }; @@ -459,6 +618,38 @@ &tlmm { gpio-reserved-ranges =3D < 0 4>, /* SPI (Intel MNH Pixel Visual Core) */ <81 4>; /* SPI (most likely Fingerprint Cards FPC1075) */ =20 + cam_front_avdd_default_pin: cam-avdd-default-pins { + pins =3D "gpio8"; + function =3D "gpio"; + + bias-disable; + drive-strength =3D <2>; + }; + + cam_front_aux_reset_default_pin: cam-front-aux-reset-default-pins { + pins =3D "gpio9"; + function =3D "gpio"; + + bias-disable; + drive-strength =3D <2>; + }; + + cam_front_aux_avdd_default_pin: cam-avdd-aux-default-pins { + pins =3D "gpio14"; + function =3D "gpio"; + + bias-disable; + drive-strength =3D <2>; + }; + + cam_front_reset_default_pin: cam-front-reset-default-pins { + pins =3D "gpio21"; + function =3D "gpio"; + + bias-disable; + drive-strength =3D <2>; + }; + touchscreen_reset: ts-reset-state { pins =3D "gpio99"; function =3D "gpio"; --=20 2.53.0 From nobody Mon Jun 15 15:07:43 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 995D5469D; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260412-pixel3-camera-v3-2-e26b090a6110@ixit.cz> References: <20260412-pixel3-camera-v3-0-e26b090a6110@ixit.cz> In-Reply-To: <20260412-pixel3-camera-v3-0-e26b090a6110@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Petr Hodina , Richard Acayan , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1445; i=david@ixit.cz; h=from:subject:message-id; bh=7WqIva9DadD3+mE9XaAACC/Zf/TxomU1o2iRVVPNDnE=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBp28nYNrbKrzoa5xsx6fbxZcVifQuIoxyLbLirx pOgU0xEEhOJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCadvJ2AAKCRBgAj/E00kg cmOJEACyFZ69DC7UXyxsYpnMuY1nIm1/9c8/mYNEDQ1AkBJKmfFRIZgIYkv3TShdAwkL2uHwehi M16tUxEqjIE36S3tVTd0G1aWsIOxo4wNPuyM9Br0mHldpVPj9eLBu5zl8DS5IRHtfGfBHP/GSFa Mwe9K4XpHf4jBLtxE4LuhHLdF4Sr8OSvGp91iCbpIleVQKnm7TwjY9kmi8kQl7ZTJ0b28EpRNl6 sK0nHuhyozWK6OM+wv8WsM9K7gLJwzdMasdNA8+9UDGRYK07LsOQessFluVsfwTyvkLdWI0OErf dQ20knknHluMRW8I07k8ksa2Ssw3BPn5idX1VChcpKKsbmWFtVkEH1QFHmrrDnY+Q3w1f1Vtvys DMdw3oCOjg17Y0oXq0YHKSo+cfgC5BTdm/hX+mzvmZrMBkR5P0PketaPi60DhTjrDIzDQsP6YTt hCE99NKTAcXo3bSKznBu7QOK8YJ8IFN3/ZsLKqG77zvyDB1lBzRiagwMFHfG5ZSjmv+qGq44SLl iZGNvWWGKakOw0OHvtsCJlLT1zzGJEmg2W0y2uT1/Pg34vXFkWc0wGBNBwSlNhiik5QJh4nRVtJ zTXcqumg9hpSIMcnOAAJMC8zbKO9tW6DzxX/+KTbOZoFXzStC1IBFbXSTcoCwx1uV199yxKgtbT Y4AweDRGP7KdAKA== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Enable the PMI8998 flash LED block and describe the white flash LED used for the rear camera. Configure the LED in flash mode with hardware limits matching the original device configuration, including maximum current and timeout. Reviewed-by: Dmitry Baryshkov Signed-off-by: David Heidelberg Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi b/arch/arm6= 4/boot/dts/qcom/sdm845-google-common.dtsi index 070023a9813ce..e9d9842cb8674 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include #include #include =20 @@ -596,6 +597,19 @@ &pmi8998_charger { status =3D "okay"; }; =20 +&pmi8998_flash { + status =3D "okay"; + + led-1 { + function =3D LED_FUNCTION_FLASH; + color =3D ; + led-sources =3D <2>; + led-max-microamp =3D <500000>; + flash-max-microamp =3D <750000>; + flash-max-timeout-us =3D <1280000>; + }; +}; + &qupv3_id_0 { status =3D "okay"; }; --=20 2.53.0