From nobody Sat Jun 20 17:37:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF40F309EF4; Sun, 12 Apr 2026 17:05:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013534; cv=none; b=Si5bTRZEM8KoGhcc3Q+olFkoflZsmCUmAs7woxgDXk5j+DJmRnPM1tTaFOxm2j7rYJbep+Qo6bMwpmnZ3d68zXtoulOZsLxXL3ly7FN0Ik/91kV9GsKI8eMjEIo5mR5bIMjyKZJSaRczg98u62cDJF7185y+KlRc6m+CFn1HJOc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013534; c=relaxed/simple; bh=nINj9FtXsbv9p+uMbfKSjZ3iQpZizEUU7lJBoujxA+4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To; b=SVeszlxrVXhGbLBAhJqu1SmuAJ+E3ttFhm4LjT3B4eL/QC3XPn7wTkThd5BHyjXtNZk2+oHtxa1gcX7O6b1OrjG7Gfl4NQgA4yzv8CKN+Swt6dG2vtepsei/6FkJ1VsnQKe8Q2MDvS6EcuePddgP9U5sHDseH5ENaQSEOW7QPts= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=c8wwOTJh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="c8wwOTJh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 028C1C19424; Sun, 12 Apr 2026 17:05:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776013534; bh=nINj9FtXsbv9p+uMbfKSjZ3iQpZizEUU7lJBoujxA+4=; h=From:Date:Subject:References:In-Reply-To:To:From; b=c8wwOTJhboMXKadw/Dp9XcvEuKRuZ740YI5Q+6FDr24fUDfVtgFK0DJYVBoUQEm4a ID10WPdZ3CzwaXVIyrTiWcqFNqakFlZtnc9nf6NQ8QBVz8dUebMk72CbbT3Wvj5f1+ SvwKGlLfJbDC7eDXPfEZSLW4Rz4yMwvOy9KGqdAFp7ovIUbNCtE49LxGg7uLLte9RB nF34OnUMXT8i2hVadBqswaRkMR1NgicMdlx5jKe4MstX8w0uUpyZWWA+cdjYd6iDj9 AJJu+jEPLfIkl1pwJ/h+aomzsFRnmmjylggSYUYJ3hIriIg/iXct9gLdnSBkWwQj+N rsrcKC0yWz4Iw== From: Sudeep Holla Date: Sun, 12 Apr 2026 18:04:37 +0100 Subject: [PATCH 1/5] dt-bindings: interrupt-controller: Add support for secure donated SGIs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260412-b4-ffa_ns_sgi_gicv3-v1-1-af61243eb405@kernel.org> References: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> In-Reply-To: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marc Zyngier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sudeep Holla X-Mailer: b4 0.15.0 In GICv3, SGI security is defined by interrupt grouping and configuration rather than by SGI number alone. Linux conventionally reserves SGIs 0-7 for non-secure internal kernel IPIs, while higher SGIs is assumed to be owned/stolen by the Secure world unless explicitly made available. Document secure donated SGI interrupt specifiers for the GICv3 binding. It describes "arm,secure-donated-ns-sgi-ranges" for SGIs donated by the secure world to non-secure software. It excludes SGIs 0-7, which are already used by the kernel for internal IPI purposes. Signed-off-by: Sudeep Holla --- .../bindings/interrupt-controller/arm,gic-v3.yaml | 27 ++++++++++++++++++= +++- include/dt-bindings/interrupt-controller/arm-gic.h | 1 + 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic= -v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v= 3.yaml index bfd30aae682b..664727d071c9 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -45,17 +45,24 @@ description: | =20 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI interrupts, 2 for interrupts in the Extended SPI range, 3 for the - Extended PPI range. Other values are reserved for future use. + Extended PPI range, and 4 for SGI interrupts. Other values are + reserved for future use. =20 The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the range [0-15]. Extended SPI interrupts are in the range [0-1023]. Extended PPI interrupts are in the range [0-127]. =20 + SGI interrupts are in the range [8-15] which overlaps with the SGIs + assigned to/reserved for the secure world but donated to the non + secure world to use. Refer "arm,secure-donated-ns-sgi-ranges" for + more details. + The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. 1 =3D edge triggered 4 =3D level triggered + SGIs are edge triggered and must be described as such. =20 The 4th cell is a phandle to a node describing a set of CPUs this interrupt is affine to. The interrupt must be a PPI, and the node @@ -136,6 +143,24 @@ description: | - $ref: /schemas/types.yaml#/definitions/uint32 - $ref: /schemas/types.yaml#/definitions/uint64 =20 + arm,secure-donated-ns-sgi-ranges: + description: + A list of pairs , where "sgi" is the first SGI INTID of a + range donated by the secure side to non-secure software, and "span" = is + the size of that range. Multiple ranges can be provided. + + SGIs described by interrupt specifiers with type 4 (SGI) must fall + within one of these ranges. SGIs(0-7) reserved by non-secure world + for internal IPIs must not be listed here. "sgi" must be in the + range [8-15], "span" must be in the range [1-8], and the range must + not extend past SGI 15. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + - minimum: 8 + maximum: 15 + - minimum: 1 + maximum: 8 + ppi-partitions: type: object additionalProperties: false diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/d= t-bindings/interrupt-controller/arm-gic.h index 887f53363e8a..52c2f3f090c5 100644 --- a/include/dt-bindings/interrupt-controller/arm-gic.h +++ b/include/dt-bindings/interrupt-controller/arm-gic.h @@ -14,6 +14,7 @@ #define GIC_PPI 1 #define GIC_ESPI 2 #define GIC_EPPI 3 +#define GIC_SGI 4 =20 /* * Interrupt specifier cell 2. --=20 2.43.0 From nobody Sat Jun 20 17:37:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79A74310784; Sun, 12 Apr 2026 17:05:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013536; cv=none; b=m0INBz8LhNhttz4iA0TY6gcXU6yKpt9fq5ZcLE9FVl5Ycw1m54uOK06r4ujLiPh+Pb8IMtAmiyP2DKUJoXCAK4HuNpAobnu7IflWxR391MmnlVPBgSnJ7AvEewmtMkgtogH+vxLhkVT6QX3o3EiXZv2LgF9nn7w9FRXfjMDQyTA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013536; c=relaxed/simple; bh=OyYhkCOzrlRJO5g72u18UBvcrbV1IuXqg8djuqcBMYw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To; b=uDNVPiaOu7wihPCnQqazaY5CceSyK/jvHroVFJ7hXPI94vqE/RMOuZv9s2j4Hyy17OdSIrW/pDiuSV6qlSzuGPNZ3dF+8lURGrb9IwIYPbMqsgK7//I7UIDsWLHOscXf+LA/iaegVwPLjHEFlgCjGLZRnPYbBd9vvnyJiDjRjmI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Z13nwc5q; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Z13nwc5q" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B824CC2BCB0; Sun, 12 Apr 2026 17:05:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776013536; bh=OyYhkCOzrlRJO5g72u18UBvcrbV1IuXqg8djuqcBMYw=; h=From:Date:Subject:References:In-Reply-To:To:From; b=Z13nwc5qjjYT80p/eSN+DKekQnWxwRaHt42gGr9DhvCL2rsdFjrhY/O6k+Zb5SOCl aUT41FCudjo3kdd3gOdoxi9CnHIfWhnk5nv0peKDWQypQfTYGk77GEFZ+WQGVsAu0z GIpVX7B8A+7KJw0ZZftDD5Ak7UOx+6gl8dZLeMAgGKIKTqI0vv1xUUB2rW5ga/pi3Y e+08CMOxlkt04/uYjyf+W4PO+IH7Ddq+gbEYyaOocqx6LCugZZPeF2qMvDyiewmYtw CNLLhQoPyfdkWNec0t8aOYKX+6L+jFW3MyL2fIlYNS1gvXIZywpjr6EK6S0n1L33h2 GeJArqzDzHBEA== From: Sudeep Holla Date: Sun, 12 Apr 2026 18:04:38 +0100 Subject: [PATCH 2/5] irqchip/gic-v3: Support secure-donated non-secure SGIs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260412-b4-ffa_ns_sgi_gicv3-v1-2-af61243eb405@kernel.org> References: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> In-Reply-To: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marc Zyngier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sudeep Holla X-Mailer: b4 0.15.0 Parse secure-donated SGI ranges from the firmware, reject invalid interrupt specifiers, and allow devicetree consumers to map only the SGIs explicitly donated by the secure side to non-secure software. Signed-off-by: Sudeep Holla --- drivers/irqchip/irq-gic-v3.c | 86 ++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 86 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 20f13b686ab2..cc7720d9fb0e 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -35,6 +35,8 @@ #include #include =20 +#include + #include "irq-gic-common.h" =20 static u8 dist_prio_irq __ro_after_init =3D GICV3_PRIO_IRQ; @@ -65,6 +67,7 @@ struct gic_chip_data { u64 flags; bool has_rss; unsigned int ppi_nr; + u16 donated_sgi_mask; struct partition_affinity *parts; unsigned int nr_parts; }; @@ -95,6 +98,7 @@ static bool nmi_support_forbidden; * with hwirq IDs, is simplified by accounting for all 16. */ #define SGI_NR 16 +#define GIC_SGI_IPI_NR 8 =20 /* * The behaviours of RPR and PMR registers differ depending on the value of @@ -119,6 +123,74 @@ static bool nmi_support_forbidden; */ static DEFINE_STATIC_KEY_FALSE(supports_pseudo_nmis); =20 +static bool gic_sgi_is_donated_to_ns(unsigned int sgi) +{ + return sgi < SGI_NR && (gic_data.donated_sgi_mask & BIT(sgi)); +} + +static int __init gic_of_init_donated_sgi_ranges(struct device_node *node) +{ + const char *propname =3D "arm,secure-donated-ns-sgi-ranges"; + int count, i; + u32 *ranges; + u16 mask =3D 0; + + count =3D of_property_count_u32_elems(node, propname); + if (count < 0) { + if (count =3D=3D -EINVAL) + return 0; + + pr_err("%pOF: unable to read %s\n", node, propname); + return count; + } + + if (!count) + return 0; + + if (count % 2) { + pr_err("%pOF: %s must contain pairs\n", + node, propname); + return -EINVAL; + } + + ranges =3D kcalloc(count, sizeof(*ranges), GFP_KERNEL); + if (!ranges) + return -ENOMEM; + + if (of_property_read_u32_array(node, propname, ranges, count)) { + pr_err("%pOF: unable to read %s\n", node, propname); + kfree(ranges); + return -EINVAL; + } + + for (i =3D 0; i < count; i +=3D 2) { + u32 sgi =3D ranges[i]; + u32 span =3D ranges[i + 1]; + u32 end; + + if (sgi < GIC_SGI_IPI_NR || sgi >=3D SGI_NR || !span || span > 8) { + pr_err("%pOF: invalid SGI range <%u %u> in %s\n", + node, sgi, span, propname); + kfree(ranges); + return -EINVAL; + } + + end =3D sgi + span; + if (end > SGI_NR) { + pr_err("%pOF: SGI range <%u %u> exceeds SGI space in %s\n", + node, sgi, span, propname); + kfree(ranges); + return -EINVAL; + } + + mask |=3D GENMASK(end - 1, sgi); + } + + kfree(ranges); + gic_data.donated_sgi_mask =3D mask; + return 0; +} + static u32 gic_get_pribits(void) { u32 pribits; @@ -1614,6 +1686,12 @@ static int gic_irq_domain_translate(struct irq_domai= n *d, case 3: /* EPPI */ *hwirq =3D fwspec->param[1] + EPPI_BASE_INTID; break; + case GIC_SGI: /* SGI */ + if (!gic_sgi_is_donated_to_ns(fwspec->param[1])) + return -EINVAL; + + *hwirq =3D fwspec->param[1]; + break; case GIC_IRQ_TYPE_LPI: /* LPI */ *hwirq =3D fwspec->param[1]; break; @@ -1623,6 +1701,10 @@ static int gic_irq_domain_translate(struct irq_domai= n *d, =20 *type =3D fwspec->param[2] & IRQ_TYPE_SENSE_MASK; =20 + if (fwspec->param[0] =3D=3D GIC_SGI && + *type !=3D IRQ_TYPE_EDGE_RISING) + return -EINVAL; + /* * Make it clear that broken DTs are... broken. */ @@ -2239,6 +2321,10 @@ static int __init gic_of_init(struct device_node *no= de, struct device_node *pare =20 gic_enable_of_quirks(node, gic_quirks, &gic_data); =20 + err =3D gic_of_init_donated_sgi_ranges(node); + if (err) + goto out_unmap_rdist; + err =3D gic_init_bases(dist_phys_base, dist_base, rdist_regs, nr_redist_regions, redist_stride, &node->fwnode); if (err) --=20 2.43.0 From nobody Sat Jun 20 17:37:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA3902F5468; Sun, 12 Apr 2026 17:05:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013538; cv=none; b=SydkcEa/WFYQl8XozT0PfwG4j0Ykc2MJ64HRa/FRoLu4Nwb+Ls6WET6LjvZiSOelXOQNeSdbtpzaqJUJ5sk/ZCt1hIWTTR67QZFy2me/3NkoSICcm0IRIpx8urL7wPTFsChlLOgPT1kXv17A5ymc39mx5zJTSO6qHgHauKlyUk8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013538; c=relaxed/simple; bh=3zinErAF7PIUZyN4YZ8S8wFZ34k6zuwyefbRqDldTUU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To; b=DbDsmHUHa9iB+o0wNS4ePrd3+k1P+o/nvXFfpTu2i6AaWAawFlT6WxgMp+6KmyeqcYlrqc/x1EQo1PwX+SIuJniWxF0O9zcyM4htYD17MDO4nRn698ntUSp5p/v+ZV78TpmgGVoph/aod3c0fw28bzqGrxg+WZ/1jjplAvhStms= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FFHc+nEp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FFHc+nEp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7B03EC19425; Sun, 12 Apr 2026 17:05:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776013537; bh=3zinErAF7PIUZyN4YZ8S8wFZ34k6zuwyefbRqDldTUU=; h=From:Date:Subject:References:In-Reply-To:To:From; b=FFHc+nEpmbGi089Bcp/h8IU0b+Rui8aVj5WeJ93zHZ7WUVeDa+jd1ISr+DCaq/KEr MwH7eEYLR5NY4DYNtKhcUGu83wfsz5MbcwK8bZoUv0xQZj7LxS5aShB1RHXe4L3Wj1 VWqzfGv/iqHuckU5eMCmHivJ/XoiSL2j7LKzfZWTH4LF8UAWAh9V8ozNxG45oICPIW B7y9Uid0svthw1DXVIQ1TJZDyrzQEWWfr7ciklAGRyWtJbolga8+QWp3KwkozlSXLT bBgp7lNN6NqqY3FgFbUwI4IzUErH955RHA2oS9BArHJsfhJNKt0LMuNzywdUKSXkFH mxLb46kYu7UCA== From: Sudeep Holla Date: Sun, 12 Apr 2026 18:04:39 +0100 Subject: [PATCH 3/5] dt-bindings: firmware: Add Arm FF-A binding Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260412-b4-ffa_ns_sgi_gicv3-v1-3-af61243eb405@kernel.org> References: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> In-Reply-To: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marc Zyngier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sudeep Holla X-Mailer: b4 0.15.0 Document the FF-A firmware device node. Describes the "arm,ffa" compatible and requires the standard interrupts property. Signed-off-by: Sudeep Holla --- .../devicetree/bindings/firmware/arm,ffa.yaml | 42 ++++++++++++++++++= ++++ 1 file changed, 42 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/arm,ffa.yaml b/Docu= mentation/devicetree/bindings/firmware/arm,ffa.yaml new file mode 100644 index 000000000000..150f394b3327 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/arm,ffa.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/arm,ffa.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm Firmware Framework for A-profile + +maintainers: + - Sudeep Holla + +description: | + Arm Firmware Framework for A-profile (FF-A) firmware device node + describing the notification interrupt exposed to the normal world. + +properties: + $nodename: + const: ffa + + compatible: + const: arm,ffa + + interrupts: + description: + Per-CPU notification interrupt used by the normal world FF-A partiti= on. + maxItems: 1 + +required: + - compatible + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + + ffa { + compatible =3D "arm,ffa"; + interrupts =3D ; + }; --=20 2.43.0 From nobody Sat Jun 20 17:37:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E692E31D371; Sun, 12 Apr 2026 17:05:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013540; cv=none; b=nZ2IXlhLbjog8amIBLWkNGXjtRkGesxIOF8Icy0HF0O3pRBr3luR3oECTodp+mVFKXqyqexTUOyKWASE76L8H1iDj8Uo7Ksf257oEevk5cDpIhKDYc/IzP/r0FlOD6l5A3PC5ewYw648sP2Trn1jaRZRC1iQ1CFaDNPAtVBlf9c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013540; c=relaxed/simple; bh=W8zuggLj2QSx6JBIzg0DPDLdXsNV2HuCzzIW517iS7U=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To; b=nPN+Iqssg4xjkohaJWTpDhuhswy3je8mpCOtfYErCAHZt+Ob88jVhNMZbCYdwIDf59teolDeckNExBOYD3dwVQPka/gZb08B32EzjHmOPH0aPYKSUVdA/0633vlyZAsskRLvJdXLPQpjbGuuHbM7eutZvKnXvNVNam93qoBxOGI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SDGToRl9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SDGToRl9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3C70FC2BCB0; Sun, 12 Apr 2026 17:05:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776013539; bh=W8zuggLj2QSx6JBIzg0DPDLdXsNV2HuCzzIW517iS7U=; h=From:Date:Subject:References:In-Reply-To:To:From; b=SDGToRl9HJl3D+WQ0BNrCThKIOoobD5fQ2jkmv3MIlmw3svTJC+odJec5ewJI9+Nv IpCoGr0LWrddwuMuPBMLlAApzHI1ZCt1Kr/OCQ2pmhOjHB7XsqjThTszaSfzxAakUM HR2f9CEB55n9uXfdhlv0Y8Dl7sEVVl30dlzQL9c87VFFOFtE+Y/1b6FM/M5cFmRlpC zaV6I+8atcQV0t3Y4OeLfQgkn77PObyiCq0Jv9lpVH4z6u6Jrpoorv/RlMraSugbgv u1mEdvyMYgDe/DZIbpx8JmvIL7kebXXf+cBd26tfHNDtziWTQEhLnQ0+ZKAdpeynhB Tacol4r6qMfxg== From: Sudeep Holla Date: Sun, 12 Apr 2026 18:04:40 +0100 Subject: [PATCH 4/5] firmware: arm_ffa: Use device node interrupts property for IRQ lookup Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260412-b4-ffa_ns_sgi_gicv3-v1-4-af61243eb405@kernel.org> References: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> In-Reply-To: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marc Zyngier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sudeep Holla X-Mailer: b4 0.15.0 Use the standard interrupts property from the arm,ffa node instead of synthesizing a GIC mapping directly. Requires the "arm,ffa" device node to describe exactly one interrupt, validate that its affinity spans cpu_possible_mask so the interrupt is per-CPU, and then cross-check the mapped hwirq against the interrupt ID returned by FFA_FEATURES. This removes the FF-A driver's direct arm,gic-v3 lookup and raw irq_create_of_mapping() usage while still keeping the DT description in sync with the firmware-reported interrupt. Signed-off-by: Sudeep Holla --- drivers/firmware/arm_ffa/driver.c | 53 +++++++++++++++++++++++++++++------= ---- 1 file changed, 40 insertions(+), 13 deletions(-) diff --git a/drivers/firmware/arm_ffa/driver.c b/drivers/firmware/arm_ffa/d= river.c index f2f94d4d533e..7a3800a55dc1 100644 --- a/drivers/firmware/arm_ffa/driver.c +++ b/drivers/firmware/arm_ffa/driver.c @@ -1821,6 +1821,45 @@ static void ffa_sched_recv_irq_work_fn(struct work_s= truct *work) ffa_notification_info_get(); } =20 +static int ffa_dt_map_irq(int intid) +{ + struct device_node *ffa __free(device_node) =3D NULL; + const struct cpumask *affinity; + struct irq_data *irqd; + int count, irq; + + ffa =3D of_find_compatible_node(NULL, NULL, "arm,ffa"); + if (!ffa) + return -ENXIO; + + count =3D of_irq_count(ffa); + if (count <=3D 0) + return count ? count : -ENXIO; + + if (count !=3D 1) { + pr_err("FF-A currently supports exactly one interrupt\n"); + return -EINVAL; + } + + affinity =3D of_irq_get_affinity(ffa, 0); + if (!affinity || !cpumask_equal(affinity, cpu_possible_mask)) { + pr_err("FF-A currently supports only SGIs/PPIs\n"); + return -EINVAL; + } + + irq =3D of_irq_get(ffa, 0); + if (irq <=3D 0) + return irq ? irq : -ENXIO; + + irqd =3D irq_get_irq_data(irq); + if (!irqd || irqd_to_hwirq(irqd) !=3D intid) { + irq_dispose_mapping(irq); + return -EINVAL; + } + + return irq; +} + static int ffa_irq_map(u32 id) { char *err_str; @@ -1842,19 +1881,7 @@ static int ffa_irq_map(u32 id) } =20 if (acpi_disabled) { - struct of_phandle_args oirq =3D {}; - struct device_node *gic; - - /* Only GICv3 supported currently with the device tree */ - gic =3D of_find_compatible_node(NULL, NULL, "arm,gic-v3"); - if (!gic) - return -ENXIO; - - oirq.np =3D gic; - oirq.args_count =3D 1; - oirq.args[0] =3D intid; - irq =3D irq_create_of_mapping(&oirq); - of_node_put(gic); + irq =3D ffa_dt_map_irq(intid); #ifdef CONFIG_ACPI } else { irq =3D acpi_register_gsi(NULL, intid, ACPI_EDGE_SENSITIVE, --=20 2.43.0 From nobody Sat Jun 20 17:37:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4834320CCC; Sun, 12 Apr 2026 17:05:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013541; cv=none; b=PRZoZ0pWFAsD8LnHZ653yizaMoCzqMkTv8mtNkoKl6F2U5ZOY/LC3ZJn1J5hmalDiXPUoL7jSPotSzNXJ/cNH5eUQmaRfuQnSN3EGCpHkqelr+e4yxp/dvWveSREOCHSyMeorFPyk55oeC0+0RbFzOOLdVu5aZJ7WBO1GcZS29s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776013541; c=relaxed/simple; bh=DtIrfIMocwcapZAI/AWz4r5V3avBcvVN6k54z3J7SWU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To; b=pt6C2VUTiGiH03F+8Ps9UitkyURoZQwFeVXkwq7i1JBtRJqeijnjeqbpuERmPvqiEXWC0WvNPZ3UhbxVvdG++IYCg38X13pkUP56OdRPSKEENpLd467fPV53WYvXzrl+OrSZJXU6ROTVakh2rRRH6Hqt12zO39/RQ5tDc/dhHhE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=o+kDmRpY; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="o+kDmRpY" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F2182C19425; Sun, 12 Apr 2026 17:05:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776013541; bh=DtIrfIMocwcapZAI/AWz4r5V3avBcvVN6k54z3J7SWU=; h=From:Date:Subject:References:In-Reply-To:To:From; b=o+kDmRpY28se8m1ww+4QJs9bc25MHtaT/esELG36kxTTlbpU2gWqVYuZHqzDaL9YJ AZA4pk0SdA+8pL4SLH1hRyg3E/cSCRM01QJxgdivP6YePbeUD3vRCypVh9ETUVmoc2 IyvV6+2LTN5tWAJaR2pE/Bh0xg+cz84Y+AU8eYhrfEc7pVe3bzjBZdem48WtjPsO2S T7AzUIZvgxCtekAn7b7soIlSZIOmTpd3xcpAJvBaMyc3VSlIhhdSU/gwGaqM9VT0gr HdPVJxyaJd70ysnzmaghK9pHjzH2UKMhoy9pIjMue7unQYr/8DI2gBJM050LPfmixx l+AEW5TGFcVLQ== From: Sudeep Holla Date: Sun, 12 Apr 2026 18:04:41 +0100 Subject: [PATCH 5/5] arm64: dts: arm: fvp-base-revc: Add FF-A notification interrupt Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260412-b4-ffa_ns_sgi_gicv3-v1-5-af61243eb405@kernel.org> References: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> In-Reply-To: <20260412-b4-ffa_ns_sgi_gicv3-v1-0-af61243eb405@kernel.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marc Zyngier , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sudeep Holla X-Mailer: b4 0.15.0 Add an arm,ffa firmware node describing the FF-A notification interrupt on SGI 8. Also mark SGI 8 as donated to the non-secure world in the GICv3 node so the interrupt specifier is accepted by the donated-SGI DT support. Signed-off-by: Sudeep Holla --- arch/arm64/boot/dts/arm/fvp-base-revc.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dt= s/arm/fvp-base-revc.dts index 68a69f17e93d..87189b32e38d 100644 --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts @@ -40,6 +40,11 @@ psci { method =3D "smc"; }; =20 + ffa { + compatible =3D "arm,ffa"; + interrupts =3D ; + }; + cpus { #address-cells =3D <2>; #size-cells =3D <0>; @@ -224,6 +229,7 @@ gic: interrupt-controller@2f000000 { #interrupt-cells =3D <3>; #address-cells =3D <2>; #size-cells =3D <2>; + arm,secure-donated-ns-sgi-ranges =3D <8 1>; ranges; interrupt-controller; reg =3D <0x0 0x2f000000 0 0x10000>, // GICD --=20 2.43.0