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[207.179.239.100]) by smtp-relay.gmail.com with ESMTPS id 586e51a60fabf-423ddd32ab3sm599086fac.16.2026.04.10.19.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Apr 2026 19:47:51 -0700 (PDT) X-Relaying-Domain: ausil.us From: dennis@ausil.us To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: FUKAUMI Naoki , Hsun Lai , Jonas Karlman , Chaoyi Chen , John Clark , Michael Opdenacker , Quentin Schulz , Andrew Lunn , Chukun Pan , Alexey Charkov , Peter Robinson , Dennis Gilmore , Michael Riesch , Mykola Kvach , Jimmy Hon , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 3/3] arm64: dts: rockchip: Add Orange Pi 5 Pro board support Date: Fri, 10 Apr 2026 21:47:43 -0500 Message-ID: <20260411024743.195385-4-dennis@ausil.us> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260411024743.195385-1-dennis@ausil.us> References: <20260411024743.195385-1-dennis@ausil.us> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Dennis Gilmore Add device tree for the Xunlong Orange Pi 5 Pro (RK3588S). - eMMC module, you can optionally solder a SPI NOR in place and turn off the eMMC - PCIe-attached NIC (pcie2x1l1) - PCIe NVMe slot (pcie2x1l2) - AP6256 WiFi (BCM43456) via SDIO with mmc-pwrseq - BCM4345C5 Bluetooth - es8388 audio - USB 2.0 and USB 3.0 - Two HDMI ports, the second is connected to the SoC's DP controller driven by a transparent LT8711UXD bridge that has firmware onboard and needs no node defined. Vendors description and links to schematics available: http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/O= range-Pi-5-Pro.html Signed-off-by: Dennis Gilmore --- .../display/rockchip/rockchip,dw-dp.yaml | 7 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3588s-orangepi-5-pro.dts | 352 ++++++++++++++++++ drivers/gpu/drm/bridge/synopsys/dw-dp.c | 12 + 4 files changed, 372 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro.dts diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw= -dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-d= p.yaml index 6345f0132d43..079a912d97f1 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-dp.yaml @@ -57,6 +57,13 @@ properties: - const: i2s - const: spdif =20 + hpd-gpios: + maxItems: 1 + description: + GPIO used for hot plug detection when the controller's native HPD + input is not connected. If not specified, the controller uses its + internal HPD detection mechanism. + phys: maxItems: 1 =20 diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 4d384f153c13..c99dca2ae9e7 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -214,6 +214,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588s-nanopi-r6c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588s-odroid-m2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588s-orangepi-5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588s-orangepi-5b.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588s-orangepi-5-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588s-orangepi-cm5-base.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588s-radxa-cm5-io.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588s-roc-pc.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro.dts b/arch= /arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro.dts new file mode 100644 index 000000000000..84c83aa69f63 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-pro.dts @@ -0,0 +1,352 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3588s-orangepi-5.dtsi" + +/ { + model =3D "Xunlong Orange Pi 5 Pro"; + compatible =3D "xunlong,orangepi-5-pro", "rockchip,rk3588s"; + + aliases { + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + mmc2 =3D &sdio; + }; + + dp-con { + compatible =3D "dp-connector"; + + port { + dp_con_in: endpoint { + remote-endpoint =3D <&dp0_out_con>; + }; + }; + }; + + analog-sound { + compatible =3D "simple-audio-card"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hp_detect>; + simple-audio-card,bitclock-master =3D <&masterdai>; + simple-audio-card,format =3D "i2s"; + simple-audio-card,frame-master =3D <&masterdai>; + simple-audio-card,hp-det-gpios =3D <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; + simple-audio-card,mclk-fs =3D <256>; + simple-audio-card,name =3D "rockchip,es8388"; + simple-audio-card,routing =3D + "Headphones", "LOUT1", + "Headphones", "ROUT1", + "LINPUT1", "Microphone Jack", + "RINPUT1", "Microphone Jack", + "LINPUT2", "Onboard Microphone", + "RINPUT2", "Onboard Microphone"; + simple-audio-card,widgets =3D + "Microphone", "Microphone Jack", + "Microphone", "Onboard Microphone", + "Headphone", "Headphones"; + + simple-audio-card,cpu { + sound-dai =3D <&i2s2_2ch>; + }; + + masterdai: simple-audio-card,codec { + sound-dai =3D <&es8388>; + system-clock-frequency =3D <12288000>; + }; + }; + + pwm-leds { + compatible =3D "pwm-leds"; + + led-0 { + color =3D ; + function =3D LED_FUNCTION_STATUS; + linux,default-trigger =3D "heartbeat"; + max-brightness =3D <255>; + pwms =3D <&pwm15 0 1000000 0>; + }; + + led-1 { + color =3D ; + function =3D LED_FUNCTION_ACTIVITY; + linux,default-trigger =3D "heartbeat"; + max-brightness =3D <255>; + pwms =3D <&pwm3 0 1000000 0>; + }; + }; + + fan: pwm-fan { + compatible =3D "pwm-fan"; + #cooling-cells =3D <2>; + cooling-levels =3D <0 50 100 150 200 255>; + fan-supply =3D <&vcc5v0_sys>; + pwms =3D <&pwm2 0 20000000 0>; + }; + + vcc3v3_dp: regulator-vcc3v3-dp { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "vcc3v3_dp"; + vin-supply =3D <&vcc_3v3_s3>; + }; + + vcc3v3_phy1: regulator-vcc3v3-phy1 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "vcc3v3_phy1"; + startup-delay-us =3D <50000>; + vin-supply =3D <&vcc_3v3_s3>; + }; + + vcc5v0_otg: regulator-vcc5v0-otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_otg_en>; + regulator-max-microvolt =3D <5000000>; + regulator-min-microvolt =3D <5000000>; + regulator-name =3D "vcc5v0_otg"; + vin-supply =3D <&vcc5v0_sys>; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + clocks =3D <&hym8563>; + clock-names =3D "ext_clock"; + post-power-on-delay-ms =3D <200>; + reset-gpios =3D <&gpio0 RK_PD0 GPIO_ACTIVE_LOW>; + }; + + typea_con: usb-a-connector { + compatible =3D "usb-a-connector"; + data-role =3D "host"; + label =3D "USB3 Type-A"; + power-role =3D "source"; + vbus-supply =3D <&vcc5v0_otg>; + }; +}; + +&dp0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&dp0m0_pins>; + status =3D "okay"; +}; + +&dp0_in { + dp0_in_vp1: endpoint { + remote-endpoint =3D <&vp1_out_dp0>; + }; +}; + +&dp0_out { + dp0_out_con: endpoint { + remote-endpoint =3D <&dp_con_in>; + }; +}; + +&i2c1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1m4_xfer>; + status =3D "okay"; +}; + +&i2c3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c3m0_xfer>; + status =3D "okay"; + + es8388: audio-codec@11 { + compatible =3D "everest,es8388", "everest,es8328"; + reg =3D <0x11>; + #sound-dai-cells =3D <0>; + AVDD-supply =3D <&vcc_3v3_s0>; + DVDD-supply =3D <&vcc_1v8_s0>; + HPVDD-supply =3D <&vcc_3v3_s0>; + PVDD-supply =3D <&vcc_3v3_s0>; + assigned-clock-rates =3D <12288000>; + assigned-clocks =3D <&cru I2S2_2CH_MCLKOUT>; + clocks =3D <&cru I2S2_2CH_MCLKOUT>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2s2m1_mclk>; + }; +}; + +&i2c4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c4m3_xfer>; + status =3D "okay"; +}; + +&i2s2_2ch { + pinctrl-0 =3D <&i2s2m1_lrck &i2s2m1_sclk + &i2s2m1_sdi &i2s2m1_sdo>; + status =3D "okay"; +}; + +&package_thermal { + polling-delay =3D <1000>; + + cooling-maps { + map0 { + trip =3D <&package_fan0>; + cooling-device =3D <&fan THERMAL_NO_LIMIT 1>; + }; + + map1 { + trip =3D <&package_fan1>; + cooling-device =3D <&fan 2 THERMAL_NO_LIMIT>; + }; + }; + + trips { + package_fan0: package-fan0 { + hysteresis =3D <2000>; + temperature =3D <55000>; + type =3D "active"; + }; + + package_fan1: package-fan1 { + hysteresis =3D <2000>; + temperature =3D <65000>; + type =3D "active"; + }; + }; +}; + +/* NVMe */ +&pcie2x1l1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie30x1m1_1_clkreqn &pcie30x1m1_1_waken>; + reset-gpios =3D <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; + supports-clkreq; + vpcie3v3-supply =3D <&vcc_3v3_s3>; + status =3D "okay"; +}; + +/* NIC */ +&pcie2x1l2 { + reset-gpios =3D <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_phy1>; + status =3D "okay"; +}; + +&pinctrl { + bluetooth { + bt_wake_gpio: bt-wake-pin { + rockchip,pins =3D <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_host_irq: bt-wake-host-irq { + rockchip,pins =3D <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + usb { + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins =3D <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wlan { + wifi_host_wake_irq: wifi-host-wake-irq { + rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pwm15 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm15m2_pins>; + status =3D "okay"; +}; + +&pwm2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm2m1_pins>; + status =3D "okay"; +}; + +&pwm3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm3m2_pins>; + status =3D "okay"; +}; + +&sdhci { + status =3D "okay"; +}; + +&sdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + bus-width =3D <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + max-frequency =3D <150000000>; + mmc-pwrseq =3D <&sdio_pwrseq>; + no-mmc; + no-sd; + non-removable; + sd-uhs-sdr104; + status =3D "okay"; + + ap6256: wifi@1 { + compatible =3D "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; + reg =3D <1>; + interrupt-names =3D "host-wake"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_host_wake_irq>; + }; +}; + +&uart9 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart9m2_xfer &uart9m2_ctsn &uart9m2_rtsn>; + uart-has-rtscts; + status =3D "okay"; + + bluetooth { + compatible =3D "brcm,bcm4345c5"; + clocks =3D <&hym8563>; + clock-names =3D "lpo"; + device-wakeup-gpios =3D <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + interrupt-names =3D "host-wakeup"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + max-speed =3D <1500000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&bt_wake_host_irq &bt_wake_gpio>; + shutdown-gpios =3D <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + vbat-supply =3D <&vcc_3v3_s3>; + vddio-supply =3D <&vcc_1v8_s3>; + }; +}; + +&usb_host0_xhci { + dr_mode =3D "host"; +}; + +&usbdp_phy0 { + rockchip,dp-lane-mux =3D <0 1>; +}; + +&vp1 { + vp1_out_dp0: endpoint@a { + reg =3D ; + remote-endpoint =3D <&dp0_in_vp1>; + }; +}; diff --git a/drivers/gpu/drm/bridge/synopsys/dw-dp.c b/drivers/gpu/drm/brid= ge/synopsys/dw-dp.c index fd23ca2834b0..b58f57b69b22 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-dp.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-dp.c @@ -8,6 +8,7 @@ */ #include #include +#include #include #include #include @@ -330,6 +331,8 @@ struct dw_dp { u8 pixel_mode; =20 DECLARE_BITMAP(sdp_reg_bank, SDP_REG_BANK_SIZE); + + struct gpio_desc *hpd_gpiod; }; =20 enum { @@ -481,6 +484,9 @@ static bool dw_dp_hpd_detect(struct dw_dp *dp) { u32 value; =20 + if (dp->hpd_gpiod) + return gpiod_get_value_cansleep(dp->hpd_gpiod); + regmap_read(dp->regmap, DW_DP_HPD_STATUS, &value); =20 return FIELD_GET(HPD_STATE, value) =3D=3D DW_DP_HPD_STATE_PLUG; @@ -2002,6 +2008,12 @@ struct dw_dp *dw_dp_bind(struct device *dev, struct = drm_encoder *encoder, return ERR_CAST(dp->regmap); } =20 + dp->hpd_gpiod =3D devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); + if (IS_ERR(dp->hpd_gpiod)) { + dev_err_probe(dev, PTR_ERR(dp->hpd_gpiod), "failed to get hpd GPIO\n"); + return ERR_CAST(dp->hpd_gpiod); + } + dp->phy =3D devm_of_phy_get(dev, dev->of_node, NULL); if (IS_ERR(dp->phy)) { dev_err_probe(dev, PTR_ERR(dp->phy), "failed to get phy\n"); --=20 2.53.0