From nobody Sun Jun 21 00:14:15 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EAD7D3BED4A for ; Thu, 9 Apr 2026 13:17:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775740663; cv=none; b=gKfKFralKA7pCwGwNRFtdJRfIvvZisAutFJC1PumOHhMeO1eAqQzlE+mbwZxZ/yYwy7S0+uv75h6rYt8zllvMVPACSa41npcJR3sTX8KGNQ+I66aSPcgi3K9MEYArzNH1AHMEQGZHq8vMSzPPX5sBXDbQHJPTLTxF1IupItyJjE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775740663; c=relaxed/simple; bh=yXjiOMS8F3IjJUSo2JRkJ+HLz51xykyV/e/ss7Nyeos=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MRbI8r4RUAzC/21Ukki+8awgRyaJiBLT/g+rsX489XAbkD00YGeIEPU04yJZqLTixIvKCa2zgz8gD882xJx1n6IYhRL7xwIEXly6rouINdDv7CAG9CqWMhIl7kuSoCGP5P5PigmRSz1zQUl1YEgqsCyYhEX8lgJcabnlu2lkT8I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=PM84bskT; arc=none smtp.client-ip=192.198.163.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="PM84bskT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1775740660; x=1807276660; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yXjiOMS8F3IjJUSo2JRkJ+HLz51xykyV/e/ss7Nyeos=; b=PM84bskThn0wsPcCHOTy75AS1rZEycD+AtCA3M3adZOSDdbtzMyQGoa7 +A/2A2r67NzKVrTxmRQwoTa335D1+DIHhHmXw3lP0P2pRCMq1DmZ24wu8 dgVnvkOHH8/lR1qeUs3IlxvET7lsbrY83wYIr+bFAPhvdjru+NLaXJuW8 Qyjm5/QJaMZpV3uu6GjwFKGFafYVEk4h01dpvesXWBlBqRMOqakkM8ugx GclJK8nL7Wc0OW4SToMyDVTJ7tf6TRCO0ssgYr19uCU6krrBYF5n8bzZN H5QrUUSc6hirqkXUrllipLygqN5STlwW2pnLUCz6aOgUFdZSgrkRjJbzz Q==; X-CSE-ConnectionGUID: Nz+LY+aWRkWP3uy+yuBGbg== X-CSE-MsgGUID: 7eTrabCoRV2OEAgfflPOeg== X-IronPort-AV: E=McAfee;i="6800,10657,11754"; a="88129030" X-IronPort-AV: E=Sophos;i="6.23,169,1770624000"; d="scan'208";a="88129030" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2026 06:17:39 -0700 X-CSE-ConnectionGUID: PzHFqVcqRhqPLFefkvVCqw== X-CSE-MsgGUID: mSD68IbuSHuqau6lTFr+mg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,169,1770624000"; d="scan'208";a="222271383" Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2026 06:17:37 -0700 From: Alexander Usyskin To: Greg Kroah-Hartman Cc: Menachem Adin , Alexander Usyskin , linux-kernel@vger.kernel.org, Andy Shevchenko , Reuven Abliyev Subject: [char-misc-next 1/3] mei: store kind as enum Date: Thu, 9 Apr 2026 15:55:22 +0300 Message-ID: <20260409125524.111530-2-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260409125524.111530-1-alexander.usyskin@intel.com> References: <20260409125524.111530-1-alexander.usyskin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Simplify flows and prepare for future flexibility by storing kind as enum and converting to string only in sysfs. Reviewed-by: Andy Shevchenko Co-developed-by: Reuven Abliyev Signed-off-by: Reuven Abliyev Signed-off-by: Alexander Usyskin --- drivers/misc/mei/hw-me.c | 59 ++++++++++++++++++++++++++------- drivers/misc/mei/hw-me.h | 4 +-- drivers/misc/mei/main.c | 18 ++++++---- drivers/misc/mei/mei_dev.h | 27 ++++++++++++--- drivers/misc/mei/pci-txe.c | 1 + drivers/misc/mei/platform-vsc.c | 2 +- 6 files changed, 85 insertions(+), 26 deletions(-) diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c index e286763b52ec..28fbd432d80d 100644 --- a/drivers/misc/mei/hw-me.c +++ b/drivers/misc/mei/hw-me.c @@ -1584,17 +1584,40 @@ static bool mei_me_fw_type_sps_ign(const struct pci= _dev *pdev) fw_type =3D=3D PCI_CFG_HFS_3_FW_SKU_SPS; } =20 -#define MEI_CFG_KIND_ITOUCH \ - .kind =3D "itouch" +#define MEI_CFG_FW_SPS_IGN \ + .quirk_probe =3D mei_me_fw_type_sps_ign =20 -#define MEI_CFG_TYPE_GSC \ - .kind =3D "gsc" +static enum mei_dev_kind mei_cfg_kind_mei(const struct device *parent) +{ + return MEI_DEV_KIND_MEI; +} =20 -#define MEI_CFG_TYPE_GSCFI \ - .kind =3D "gscfi" +#define MEI_CFG_KIND_MEI \ + .get_kind =3D mei_cfg_kind_mei =20 -#define MEI_CFG_FW_SPS_IGN \ - .quirk_probe =3D mei_me_fw_type_sps_ign +static enum mei_dev_kind mei_cfg_kind_itouch(const struct device *parent) +{ + return MEI_DEV_KIND_ITOUCH; +} + +#define MEI_CFG_KIND_ITOUCH \ + .get_kind =3D mei_cfg_kind_itouch + +static enum mei_dev_kind mei_cfg_kind_gsc(const struct device *parent) +{ + return MEI_DEV_KIND_GSC; +} + +#define MEI_CFG_KIND_GSC \ + .get_kind =3D mei_cfg_kind_gsc + +static enum mei_dev_kind mei_cfg_kind_gscfi(const struct device *parent) +{ + return MEI_DEV_KIND_GSCFI; +} + +#define MEI_CFG_KIND_GSCFI \ + .get_kind =3D mei_cfg_kind_gscfi =20 #define MEI_CFG_FW_VER_SUPP \ .fw_ver_supported =3D 1 @@ -1630,27 +1653,32 @@ static bool mei_me_fw_type_sps_ign(const struct pci= _dev *pdev) =20 /* ICH Legacy devices */ static const struct mei_cfg mei_me_ich_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_ICH_HFS, }; =20 /* ICH devices */ static const struct mei_cfg mei_me_ich10_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_ICH10_HFS, }; =20 /* PCH6 devices */ static const struct mei_cfg mei_me_pch6_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH_HFS, }; =20 /* PCH7 devices */ static const struct mei_cfg mei_me_pch7_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH_HFS, MEI_CFG_FW_VER_SUPP, }; =20 /* PCH Cougar Point and Patsburg with quirk for Node Manager exclusion */ static const struct mei_cfg mei_me_pch_cpt_pbg_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH_HFS, MEI_CFG_FW_VER_SUPP, MEI_CFG_FW_NM, @@ -1658,6 +1686,7 @@ static const struct mei_cfg mei_me_pch_cpt_pbg_cfg = =3D { =20 /* PCH8 Lynx Point and newer devices */ static const struct mei_cfg mei_me_pch8_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, }; @@ -1671,6 +1700,7 @@ static const struct mei_cfg mei_me_pch8_itouch_cfg = =3D { =20 /* PCH8 Lynx Point with quirk for SPS Firmware exclusion */ static const struct mei_cfg mei_me_pch8_sps_4_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, MEI_CFG_FW_SPS_4, @@ -1678,6 +1708,7 @@ static const struct mei_cfg mei_me_pch8_sps_4_cfg =3D= { =20 /* LBG with quirk for SPS (4.0) Firmware exclusion */ static const struct mei_cfg mei_me_pch12_sps_4_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, MEI_CFG_FW_SPS_4, @@ -1685,6 +1716,7 @@ static const struct mei_cfg mei_me_pch12_sps_4_cfg = =3D { =20 /* Cannon Lake and newer devices */ static const struct mei_cfg mei_me_pch12_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, MEI_CFG_DMA_128, @@ -1692,6 +1724,7 @@ static const struct mei_cfg mei_me_pch12_cfg =3D { =20 /* Cannon Lake with quirk for SPS 5.0 and newer Firmware exclusion */ static const struct mei_cfg mei_me_pch12_sps_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, MEI_CFG_DMA_128, @@ -1710,6 +1743,7 @@ static const struct mei_cfg mei_me_pch12_itouch_sps_c= fg =3D { =20 /* Tiger Lake and newer devices */ static const struct mei_cfg mei_me_pch15_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, MEI_CFG_DMA_128, @@ -1718,6 +1752,7 @@ static const struct mei_cfg mei_me_pch15_cfg =3D { =20 /* Tiger Lake with quirk for SPS 5.0 and newer Firmware exclusion */ static const struct mei_cfg mei_me_pch15_sps_cfg =3D { + MEI_CFG_KIND_MEI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, MEI_CFG_DMA_128, @@ -1727,21 +1762,21 @@ static const struct mei_cfg mei_me_pch15_sps_cfg = =3D { =20 /* Graphics System Controller */ static const struct mei_cfg mei_me_gsc_cfg =3D { - MEI_CFG_TYPE_GSC, + MEI_CFG_KIND_GSC, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, }; =20 /* Graphics System Controller Firmware Interface */ static const struct mei_cfg mei_me_gscfi_cfg =3D { - MEI_CFG_TYPE_GSCFI, + MEI_CFG_KIND_GSCFI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, }; =20 /* Chassis System Controller Firmware Interface */ static const struct mei_cfg mei_me_csc_cfg =3D { - MEI_CFG_TYPE_GSCFI, + MEI_CFG_KIND_GSCFI, MEI_CFG_PCH8_HFS, MEI_CFG_FW_VER_SUPP, }; @@ -1812,7 +1847,7 @@ struct mei_device *mei_me_dev_init(struct device *par= ent, =20 dev->fw_f_fw_ver_supported =3D cfg->fw_ver_supported; =20 - dev->kind =3D cfg->kind; + dev->kind =3D cfg->get_kind(parent); =20 return dev; } diff --git a/drivers/misc/mei/hw-me.h b/drivers/misc/mei/hw-me.h index 8da8662a9d61..884736d76fbb 100644 --- a/drivers/misc/mei/hw-me.h +++ b/drivers/misc/mei/hw-me.h @@ -19,7 +19,7 @@ * * @fw_status: FW status * @quirk_probe: device exclusion quirk - * @kind: MEI head kind + * @get_kind: MEI head kind helper * @dma_size: device DMA buffers size * @fw_ver_supported: is fw version retrievable from FW * @hw_trc_supported: does the hw support trc register @@ -27,7 +27,7 @@ struct mei_cfg { const struct mei_fw_status fw_status; bool (*quirk_probe)(const struct pci_dev *pdev); - const char *kind; + enum mei_dev_kind (*get_kind)(const struct device *parent); size_t dma_size[DMA_DSCR_NUM]; u32 fw_ver_supported:1; u32 hw_trc_supported:1; diff --git a/drivers/misc/mei/main.c b/drivers/misc/mei/main.c index 54f70f513482..43667e5d3708 100644 --- a/drivers/misc/mei/main.c +++ b/drivers/misc/mei/main.c @@ -1165,6 +1165,15 @@ void mei_set_devstate(struct mei_device *dev, enum m= ei_dev_state state) } } =20 +static const char * const mei_kind_names[] =3D { + "mei", + "itouch", + "gsc", + "gscfi", + "ivsc", +}; +static_assert(ARRAY_SIZE(mei_kind_names) =3D=3D MEI_DEV_KIND_MAX); + /** * kind_show - display device kind * @@ -1178,14 +1187,11 @@ static ssize_t kind_show(struct device *device, struct device_attribute *attr, char *buf) { struct mei_device *dev =3D dev_get_drvdata(device); - ssize_t ret; =20 - if (dev->kind) - ret =3D sprintf(buf, "%s\n", dev->kind); - else - ret =3D sprintf(buf, "%s\n", "mei"); + if (dev->kind < MEI_DEV_KIND_MEI || dev->kind >=3D MEI_DEV_KIND_MAX) + return -EINVAL; =20 - return ret; + return sysfs_emit(buf, "%s\n", mei_kind_names[dev->kind]); } static DEVICE_ATTR_RO(kind); =20 diff --git a/drivers/misc/mei/mei_dev.h b/drivers/misc/mei/mei_dev.h index d8634a726990..6d081c496ccc 100644 --- a/drivers/misc/mei/mei_dev.h +++ b/drivers/misc/mei/mei_dev.h @@ -469,6 +469,25 @@ struct mei_dev_timeouts { unsigned long link_reset_wait; /* link reset wait timeout, in jiffies */ }; =20 +/** + * enum mei_dev_kind - device type + * + * @MEI_DEV_KIND_MEI: basic device + * @MEI_DEV_KIND_ITOUCH: itouch support + * @MEI_DEV_KIND_GSC: discete graphics content protection + * @MEI_DEV_KIND_GSCFI: discete graphics chassis controller + * @MEI_DEV_KIND_IVSC: visual sensing controller + * @MEI_DEV_KIND_MAX: sentinel + */ +enum mei_dev_kind { + MEI_DEV_KIND_MEI, + MEI_DEV_KIND_ITOUCH, + MEI_DEV_KIND_GSC, + MEI_DEV_KIND_GSCFI, + MEI_DEV_KIND_IVSC, + MEI_DEV_KIND_MAX +}; + /** * struct mei_device - MEI private device struct * @@ -650,7 +669,7 @@ struct mei_device { struct list_head device_list; struct mutex cl_bus_lock; =20 - const char *kind; + enum mei_dev_kind kind; =20 #if IS_ENABLED(CONFIG_DEBUG_FS) struct dentry *dbgfs_dir; @@ -911,8 +930,7 @@ static inline ssize_t mei_fw_status_str(struct mei_devi= ce *dev, */ static inline bool kind_is_gsc(struct mei_device *dev) { - /* check kind for NULL because it may be not set, like at the fist call t= o hw_start */ - return dev->kind && (strcmp(dev->kind, "gsc") =3D=3D 0); + return dev->kind =3D=3D MEI_DEV_KIND_GSC; } =20 /** @@ -924,7 +942,6 @@ static inline bool kind_is_gsc(struct mei_device *dev) */ static inline bool kind_is_gscfi(struct mei_device *dev) { - /* check kind for NULL because it may be not set, like at the fist call t= o hw_start */ - return dev->kind && (strcmp(dev->kind, "gscfi") =3D=3D 0); + return dev->kind =3D=3D MEI_DEV_KIND_GSCFI; } #endif diff --git a/drivers/misc/mei/pci-txe.c b/drivers/misc/mei/pci-txe.c index 98d1bc2c7f4b..f5441bc5efe2 100644 --- a/drivers/misc/mei/pci-txe.c +++ b/drivers/misc/mei/pci-txe.c @@ -84,6 +84,7 @@ static int mei_txe_probe(struct pci_dev *pdev, const stru= ct pci_device_id *ent) err =3D -ENOMEM; goto end; } + dev->kind =3D MEI_DEV_KIND_MEI; hw =3D to_txe_hw(dev); hw->mem_addr =3D pcim_iomap_table(pdev); =20 diff --git a/drivers/misc/mei/platform-vsc.c b/drivers/misc/mei/platform-vs= c.c index 9787b9cee71c..5100234ba5b6 100644 --- a/drivers/misc/mei/platform-vsc.c +++ b/drivers/misc/mei/platform-vsc.c @@ -350,7 +350,7 @@ static int mei_vsc_probe(struct platform_device *pdev) mei_device_init(mei_dev, dev, false, &mei_vsc_hw_ops); =20 mei_dev->fw_f_fw_ver_supported =3D 0; - mei_dev->kind =3D "ivsc"; + mei_dev->kind =3D MEI_DEV_KIND_IVSC; =20 hw =3D mei_dev_to_vsc_hw(mei_dev); atomic_set(&hw->write_lock_cnt, 0); --=20 2.43.0 From nobody Sun Jun 21 00:14:15 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE67F3A4530 for ; Thu, 9 Apr 2026 13:17:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="88129035" X-IronPort-AV: E=Sophos;i="6.23,169,1770624000"; d="scan'208";a="88129035" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2026 06:17:41 -0700 X-CSE-ConnectionGUID: cxPsed24TyaqyA0ePgezSg== X-CSE-MsgGUID: oWsV+k7lSGKoE9ukOM631Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,169,1770624000"; d="scan'208";a="222271397" Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2026 06:17:39 -0700 From: Alexander Usyskin To: Greg Kroah-Hartman Cc: Menachem Adin , Alexander Usyskin , linux-kernel@vger.kernel.org, Andy Shevchenko , Reuven Abliyev Subject: [char-misc-next 2/3] mei: expose device kind for ioe device Date: Thu, 9 Apr 2026 15:55:23 +0300 Message-ID: <20260409125524.111530-3-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260409125524.111530-1-alexander.usyskin@intel.com> References: <20260409125524.111530-1-alexander.usyskin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Detect IO extender device and set appropriate kind. Reviewed-by: Andy Shevchenko Co-developed-by: Reuven Abliyev Signed-off-by: Reuven Abliyev Signed-off-by: Alexander Usyskin --- drivers/misc/mei/hw-me-regs.h | 4 ++++ drivers/misc/mei/hw-me.c | 35 +++++++++++++++++++++++++++++++---- drivers/misc/mei/hw-me.h | 2 ++ drivers/misc/mei/main.c | 1 + drivers/misc/mei/mei_dev.h | 2 ++ drivers/misc/mei/pci-me.c | 2 +- 6 files changed, 41 insertions(+), 5 deletions(-) diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h index f145e8e36cb3..b9a67629496b 100644 --- a/drivers/misc/mei/hw-me-regs.h +++ b/drivers/misc/mei/hw-me-regs.h @@ -6,6 +6,8 @@ #ifndef _MEI_HW_MEI_REGS_H_ #define _MEI_HW_MEI_REGS_H_ =20 +#include + /* * MEI device IDs */ @@ -142,6 +144,8 @@ # define PCI_CFG_HFS_2_PM_CM_RESET_ERROR 0x5000000 /* CME reset due t= o exception */ # define PCI_CFG_HFS_2_PM_EVENT_MASK 0xf000000 #define PCI_CFG_HFS_3 0x60 +# define PCI_CFG_HFS_3_EXT_SKU_MSK GENMASK(3, 0) /* IOE detection bits */ +# define PCI_CFG_HFS_3_EXT_SKU_IOE 0x00000001 # define PCI_CFG_HFS_3_FW_SKU_MSK 0x00000070 # define PCI_CFG_HFS_3_FW_SKU_IGN 0x00000000 # define PCI_CFG_HFS_3_FW_SKU_SPS 0x00000060 diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c index 28fbd432d80d..e7fbc02fb70f 100644 --- a/drivers/misc/mei/hw-me.c +++ b/drivers/misc/mei/hw-me.c @@ -4,13 +4,13 @@ * Intel Management Engine Interface (Intel MEI) Linux driver */ =20 -#include - -#include +#include +#include #include +#include +#include #include #include -#include =20 #include "mei_dev.h" #include "hbm.h" @@ -1619,6 +1619,23 @@ static enum mei_dev_kind mei_cfg_kind_gscfi(const st= ruct device *parent) #define MEI_CFG_KIND_GSCFI \ .get_kind =3D mei_cfg_kind_gscfi =20 +static enum mei_dev_kind mei_cfg_kind_ioe(const struct device *parent) +{ + const struct pci_dev *pdev =3D to_pci_dev(parent); + unsigned int devfn; + u32 reg; + int ret; + + devfn =3D PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); + ret =3D pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_3, ®); + trace_mei_pci_cfg_read(parent, "PCI_CFG_HFS_3", PCI_CFG_HFS_3, reg, ret); + return FIELD_GET(PCI_CFG_HFS_3_EXT_SKU_MSK, reg) =3D=3D PCI_CFG_HFS_3_EXT= _SKU_IOE ? + MEI_DEV_KIND_IOE : MEI_DEV_KIND_MEI; +} + +#define MEI_CFG_KIND_IOE \ + .get_kind =3D mei_cfg_kind_ioe + #define MEI_CFG_FW_VER_SUPP \ .fw_ver_supported =3D 1 =20 @@ -1781,6 +1798,15 @@ static const struct mei_cfg mei_me_csc_cfg =3D { MEI_CFG_FW_VER_SUPP, }; =20 +/* Nova Lake with possible IOE devices */ +static const struct mei_cfg mei_me_pch22_ioe_cfg =3D { + MEI_CFG_KIND_IOE, + MEI_CFG_PCH8_HFS, + MEI_CFG_FW_VER_SUPP, + MEI_CFG_DMA_128, + MEI_CFG_TRC, +}; + /* * mei_cfg_list - A list of platform platform specific configurations. * Note: has to be synchronized with enum mei_cfg_idx. @@ -1804,6 +1830,7 @@ static const struct mei_cfg *const mei_cfg_list[] =3D= { [MEI_ME_GSC_CFG] =3D &mei_me_gsc_cfg, [MEI_ME_GSCFI_CFG] =3D &mei_me_gscfi_cfg, [MEI_ME_CSC_CFG] =3D &mei_me_csc_cfg, + [MEI_ME_PCH22_IOE_CFG] =3D &mei_me_pch22_ioe_cfg, }; =20 const struct mei_cfg *mei_me_get_cfg(kernel_ulong_t idx) diff --git a/drivers/misc/mei/hw-me.h b/drivers/misc/mei/hw-me.h index 884736d76fbb..e36f871f323e 100644 --- a/drivers/misc/mei/hw-me.h +++ b/drivers/misc/mei/hw-me.h @@ -105,6 +105,7 @@ static inline bool mei_me_hw_use_polling(const struct m= ei_me_hw *hw) * @MEI_ME_GSC_CFG: Graphics System Controller * @MEI_ME_GSCFI_CFG: Graphics System Controller Firmware Interface * @MEI_ME_CSC_CFG: Chassis System Controller Firmware Interface + * @MEI_ME_PCH22_IOE_CFG: Platform Controller Hub Gen22 and newer with IO= E detection * @MEI_ME_NUM_CFG: Upper Sentinel. */ enum mei_cfg_idx { @@ -126,6 +127,7 @@ enum mei_cfg_idx { MEI_ME_GSC_CFG, MEI_ME_GSCFI_CFG, MEI_ME_CSC_CFG, + MEI_ME_PCH22_IOE_CFG, MEI_ME_NUM_CFG, }; =20 diff --git a/drivers/misc/mei/main.c b/drivers/misc/mei/main.c index 43667e5d3708..4fbf0b323616 100644 --- a/drivers/misc/mei/main.c +++ b/drivers/misc/mei/main.c @@ -1171,6 +1171,7 @@ static const char * const mei_kind_names[] =3D { "gsc", "gscfi", "ivsc", + "ioe", }; static_assert(ARRAY_SIZE(mei_kind_names) =3D=3D MEI_DEV_KIND_MAX); =20 diff --git a/drivers/misc/mei/mei_dev.h b/drivers/misc/mei/mei_dev.h index 6d081c496ccc..e651b06704a1 100644 --- a/drivers/misc/mei/mei_dev.h +++ b/drivers/misc/mei/mei_dev.h @@ -477,6 +477,7 @@ struct mei_dev_timeouts { * @MEI_DEV_KIND_GSC: discete graphics content protection * @MEI_DEV_KIND_GSCFI: discete graphics chassis controller * @MEI_DEV_KIND_IVSC: visual sensing controller + * @MEI_DEV_KIND_IOE: IO extender * @MEI_DEV_KIND_MAX: sentinel */ enum mei_dev_kind { @@ -485,6 +486,7 @@ enum mei_dev_kind { MEI_DEV_KIND_GSC, MEI_DEV_KIND_GSCFI, MEI_DEV_KIND_IVSC, + MEI_DEV_KIND_IOE, MEI_DEV_KIND_MAX }; =20 diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c index 9efeafa8f1ca..55e0b8a98827 100644 --- a/drivers/misc/mei/pci-me.c +++ b/drivers/misc/mei/pci-me.c @@ -130,7 +130,7 @@ static const struct pci_device_id mei_me_pci_tbl[] =3D { =20 {PCI_DEVICE_DATA(INTEL, MEI_WCL_P, MEI_ME_PCH15_CFG)}, =20 - {PCI_DEVICE_DATA(INTEL, MEI_NVL_S, MEI_ME_PCH15_CFG)}, + {PCI_DEVICE_DATA(INTEL, MEI_NVL_S, MEI_ME_PCH22_IOE_CFG)}, {PCI_DEVICE_DATA(INTEL, MEI_NVL_H, MEI_ME_PCH15_CFG)}, =20 /* required last entry */ --=20 2.43.0 From nobody Sun Jun 21 00:14:15 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 086593D75AB for ; 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a="88129038" X-IronPort-AV: E=Sophos;i="6.23,169,1770624000"; d="scan'208";a="88129038" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2026 06:17:43 -0700 X-CSE-ConnectionGUID: xEtEVkt9RemR2AqH81g8Yw== X-CSE-MsgGUID: hP6Nbmz9Rumc6BWeRIBO7A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,169,1770624000"; d="scan'208";a="222271411" Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Apr 2026 06:17:41 -0700 From: Alexander Usyskin To: Greg Kroah-Hartman Cc: Menachem Adin , Alexander Usyskin , linux-kernel@vger.kernel.org, Andy Shevchenko Subject: [char-misc-next 3/3] mei: me: remove comma from mei_cfg_idx sentinel Date: Thu, 9 Apr 2026 15:55:24 +0300 Message-ID: <20260409125524.111530-4-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260409125524.111530-1-alexander.usyskin@intel.com> References: <20260409125524.111530-1-alexander.usyskin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Adhere to termnator line rule and remove comma from sentinel in enum mei_cfg_idx. Reviewed-by: Andy Shevchenko Suggested-by: Andy Shevchenko Signed-off-by: Alexander Usyskin --- drivers/misc/mei/hw-me.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/mei/hw-me.h b/drivers/misc/mei/hw-me.h index e36f871f323e..0038a6d431fd 100644 --- a/drivers/misc/mei/hw-me.h +++ b/drivers/misc/mei/hw-me.h @@ -128,7 +128,7 @@ enum mei_cfg_idx { MEI_ME_GSCFI_CFG, MEI_ME_CSC_CFG, MEI_ME_PCH22_IOE_CFG, - MEI_ME_NUM_CFG, + MEI_ME_NUM_CFG }; =20 const struct mei_cfg *mei_me_get_cfg(kernel_ulong_t idx); --=20 2.43.0