From nobody Fri Apr 10 14:26:13 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3E6C3E274D for ; Thu, 9 Apr 2026 18:11:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775758276; cv=none; b=pBRKdRqG3D4rp4GFam0Z6W7RXS3jKpYTKI39AI9Vz+7H0iLo/L+IY0+i7LTuTZ+xIND+Mutn52Tq9IOHGcuUyQRCiknagamjPasStEhfsuZUuFTMr7Xb+nOFcJ8QiWPJBAh17Iy6YRwCKVf1xVWemQTOYCM8rmxZ3ykI3rbtA+g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775758276; c=relaxed/simple; bh=4pHAiCPa/I4+70l4WTTxBfo7ZLYJXjIsYdQ2M+8BWJg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Pk1ohTmyk0PKw7h+SNH3gSl7ojv/EoaRinW5Ip8IHntAIWGGSjyK5/IXyCJZOWKBTrfWCKTAimEmwEcYTirGmo1Pb1lebNVy6TjNLgXZKtpCR4wSzU+u5CXILsZqTqT+fdx5sCOyR0zwdx2f8uT+Rez0tLWy5uXATNLHPLRzwmM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=TvHubt0t; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=TFn42TtI; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="TvHubt0t"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="TFn42TtI" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 639Ceunf2866413 for ; Thu, 9 Apr 2026 18:11:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= yB6RmntczqRFUMYtWGGfsH29TNbbMgoNZLAW4MMdSzo=; b=TvHubt0tW0XzlyR7 K19vQQmaLhl3x0Rfj29OrappZuOJLxu21wfvKrHtMMo/cOwdPkFu6LzANAlH6ENo R1qF9UQ7SRuVCZUxumHiXYMPfaa5NS2piG0Z6nXs5ORpSF/gkk+eI/AWEssNfj4H DufDtAMb+oUkXTGEOslMV6nin5rbf2oyxhEbbUehwwVm79SsEIauKOZ0v1JUB5KU wfX+kcHOv41wFjZTmL/wqt5hIpbQz2Jm3rpMWBKld11uJZTzyrd0E0j/L4gfEPr9 z2/0w21aZEnbX2dhJolsQuyqaLsy/2MB9ewBLSGyF5AJLIs5tYEq0w+/3TdniEza FLVf6g== Received: from mail-pg1-f199.google.com (mail-pg1-f199.google.com [209.85.215.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4decayha2x-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 09 Apr 2026 18:11:15 +0000 (GMT) Received: by mail-pg1-f199.google.com with SMTP id 41be03b00d2f7-c76b6ccf298so719821a12.0 for ; Thu, 09 Apr 2026 11:11:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1775758274; x=1776363074; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=yB6RmntczqRFUMYtWGGfsH29TNbbMgoNZLAW4MMdSzo=; b=TFn42TtI+4OY43sXZUsWFNkzPFILK1h1ofBCSrcaAmkbFRqanfDXnPMtHYULN6pSRJ uClIJagccFVltGB63LOo5zS/Z3dAIYP3ElDjsO29rV4gZJRfj5zktOwDda/vEPQMXLEl z0pEcJgCRWp8ckw9JvRgYEYYAZnESxNuYuWFdeWM8oud9Uw7vTUuTu/ddEEqHUZet8mu ySjD1d2m9jVfGdjzx7ekgp+ULWu5k9t2QQlFbqgKE4h0W9nEs7/WJX74BYBpy79ikspD XSr969EEO8Z2w7Gd40y1VlJbHbhQsax1+MsvmdwtLgnLh6kUQx2ZrtaiXOkdd87h/cD6 6anw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1775758274; x=1776363074; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=yB6RmntczqRFUMYtWGGfsH29TNbbMgoNZLAW4MMdSzo=; b=XWOU2DqQZUQ7qK5pisNHPesiVCXcqi2vBY3brcFToCXGMDwmmWiM0HgjwkKHw3qPka 17TSA13j84fA/JFnh+xe1H2TuD9APDxlapv5mKHMjBHQXvSvWOtPmSwj4hOkfSZy7vko MtwA5LvWmcG3Du17HsuVdCCZivwbLGZvplmssFZ6wVZE4Sw964hjrzjtsb+PxWIBzjfu q0BDHhJ2IQGpCLMEw6LzCD/yjyoeIDVnpIrE1VOae4n9i53x3Dqg/c/LWv+idz0YfKWN wMkJ97TFGqNAbLrrPVSU8pfhPDDVmlH0VEKt3q1UyMGvvzTo46ojhLsqaPsXe+7N5p2b VlYQ== X-Forwarded-Encrypted: i=1; AJvYcCWcFIxR06+XGM6lfSu6NbzEawhJDKOVrYENsqaDA8qLlkBpd7kUJTfqPDpHV0dF0ykUNw23mCTCjz9O7zE=@vger.kernel.org X-Gm-Message-State: AOJu0YxM+N8j/jfmunTH0rCgbDsO2GdTtQU7qK/KUr5l2AT57i5Z7vpX I54F0EziqTHZLtVJ1W98ps+m2sJWaHnyuhqoX0QFREA1G5AuHLdGIsvHHLlUdekV+FwXiPWiafD QIiAi8QbSXjxNVE5/pSDIhDvwwO63RgZR+wVJJZHMQXgONFy284UpoIlUGAjdh45UsI0= X-Gm-Gg: AeBDiev4Ir/KShzptBeyZQnaPXbZsm4+Hq6maWX5V5GD/uuy+NHElbgbEkN8akcyr0K 1uaHeIvlZ8cPb/JBYepO2GUf2a7nSo4Cu6LGN12I2ycF9tosSxE8VgqMDSlyULGvoVwAmlDwKNn uxX5kGP5huKK2+9zFZWV+iDaEU3yBiJLidM8519tyiq5Ji7qVFeol5tE7cN5mb+IeXwRaf61rB8 E475+bj7i3mjVslnk8b7rqFz4B1SVdUGzPEIvE6rTJHkdg/EI5u58wMQ2g/JoXrE9nY+cs1i++F Nu1YsKCJQGzxaVlg4UbkU+4AGnavpyPXc2dIO+b5xl0irH7Rx+D12f0/VZzak1CIiAoIXssH3rH rIXFqxrXMEHtdkp9UDXCVHuKjTMOEp1+b14c5Hq3ZFIA1WQ== X-Received: by 2002:a05:6a20:3412:b0:39f:43c3:b8b9 with SMTP id adf61e73a8af0-39f43c3c07amr19981178637.57.1775758274154; Thu, 09 Apr 2026 11:11:14 -0700 (PDT) X-Received: by 2002:a05:6a20:3412:b0:39f:43c3:b8b9 with SMTP id adf61e73a8af0-39f43c3c07amr19981134637.57.1775758273489; Thu, 09 Apr 2026 11:11:13 -0700 (PDT) Received: from hu-tdas-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c7921a2d9ebsm66132a12.30.2026.04.09.11.11.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Apr 2026 11:11:13 -0700 (PDT) From: Taniya Das Date: Thu, 09 Apr 2026 23:40:43 +0530 Subject: [PATCH v2 2/8] dt-bindings: clock: qcom: document the Eliza GPU Clock Controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260409-eliza_mm_cc_v2-v2-2-bc0c6dd77bc5@oss.qualcomm.com> References: <20260409-eliza_mm_cc_v2-v2-0-bc0c6dd77bc5@oss.qualcomm.com> In-Reply-To: <20260409-eliza_mm_cc_v2-v2-0-bc0c6dd77bc5@oss.qualcomm.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Maxime Coquelin , Alexandre Torgue Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Taniya Das X-Mailer: b4 0.15-dev-aa3f6 X-Authority-Analysis: v=2.4 cv=XtnK/1F9 c=1 sm=1 tr=0 ts=69d7ebc3 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=eqSiwPykCNIpSPSkj8oA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDA5MDE2NyBTYWx0ZWRfX/OBxDguZKBjT OJ9mpPLSdl7DCekp8pNQxUYtT3/68nZGux9pQAxtowWF5EGJI6fejjkPPEpnwdEJhwkXWbboh9B YKsiDQmVjg8lf0maCZTVHR8rNO8qYuAyP2QlAto+fjBQL9JqbvO9kDk7RYb4gRqb0EyfcgPaCcV lAWlmhaslU700d4FjsliX/1UeYnXS8AwDWvc746c6tXMZ+7B6fFP7aoVTT7Lai088WFr4AX9lD1 EWOa1j+mYNM8UIqW26sabNGr4xmFhr04qtDGJPwnTF9xLO7EZ7AjbUBA3JYQBSU0eY6nKZToAx5 Ylnmk9BZf/JiCuFqHKTOBeNFwqkr1O8jkZULbToWGYGUJ84hgiR795AlEDq6kHre7WLN8BSUYZg fFLLq8XQQTqQgh/VMPGLgZM72EtptEwmr0q6SwDZlJs801Gz0CLtHaeF3EtuB38rUScQM3W7VLF 5bEcwRPW0WENE6F8j8w== X-Proofpoint-GUID: GF9iQzFvgnadJ3GaKF8E1RP_xdAljvt5 X-Proofpoint-ORIG-GUID: GF9iQzFvgnadJ3GaKF8E1RP_xdAljvt5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-09_04,2026-04-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 bulkscore=0 phishscore=0 impostorscore=0 adultscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604090167 Add bindings documentation for the Eliza Graphics Clock Controller. Signed-off-by: Taniya Das --- .../bindings/clock/qcom,sm8450-gpucc.yaml | 3 ++ include/dt-bindings/clock/qcom,eliza-gpucc.h | 52 ++++++++++++++++++= ++++ 2 files changed, 55 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml= b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml index fdbdf605ee695637512ce4f98c9b6fcfacb9154f..734bab762a30800bda94c726f48= 013679f9ec542 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml @@ -15,6 +15,7 @@ description: | domains on Qualcomm SoCs. =20 See also: + include/dt-bindings/clock/qcom,eliza-gpucc.h include/dt-bindings/clock/qcom,glymur-gpucc.h include/dt-bindings/clock/qcom,kaanapali-gpucc.h include/dt-bindings/clock/qcom,milos-gpucc.h @@ -30,6 +31,7 @@ description: | properties: compatible: enum: + - qcom,eliza-gpucc - qcom,glymur-gpucc - qcom,kaanapali-gpucc - qcom,milos-gpucc @@ -71,6 +73,7 @@ allOf: compatible: contains: enum: + - qcom,eliza-gpucc - qcom,sm8750-gpucc then: required: diff --git a/include/dt-bindings/clock/qcom,eliza-gpucc.h b/include/dt-bind= ings/clock/qcom,eliza-gpucc.h new file mode 100644 index 0000000000000000000000000000000000000000..706e1c93240a8234dd8017ee181= d19e58091fd6d --- /dev/null +++ b/include/dt-bindings/clock/qcom,eliza-gpucc.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_ELIZA_H +#define _DT_BINDINGS_CLK_QCOM_GPU_CC_ELIZA_H + +/* GPU_CC clocks */ +#define GPU_CC_AHB_CLK 0 +#define GPU_CC_CRC_AHB_CLK 1 +#define GPU_CC_CX_ACCU_SHIFT_CLK 2 +#define GPU_CC_CX_FF_CLK 3 +#define GPU_CC_CX_GMU_CLK 4 +#define GPU_CC_CXO_AON_CLK 5 +#define GPU_CC_CXO_CLK 6 +#define GPU_CC_DEMET_CLK 7 +#define GPU_CC_DEMET_DIV_CLK_SRC 8 +#define GPU_CC_FF_CLK_SRC 9 +#define GPU_CC_FREQ_MEASURE_CLK 10 +#define GPU_CC_GMU_CLK_SRC 11 +#define GPU_CC_GPU_SMMU_VOTE_CLK 12 +#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 13 +#define GPU_CC_HUB_AON_CLK 14 +#define GPU_CC_HUB_CLK_SRC 15 +#define GPU_CC_HUB_CX_INT_CLK 16 +#define GPU_CC_MEMNOC_GFX_CLK 17 +#define GPU_CC_MND1X_0_GFX3D_CLK 18 +#define GPU_CC_MND1X_1_GFX3D_CLK 19 +#define GPU_CC_PLL0 20 +#define GPU_CC_PLL1 21 +#define GPU_CC_SLEEP_CLK 22 +#define GPU_CC_XO_CLK_SRC 23 +#define GPU_CC_XO_DIV_CLK_SRC 24 + +/* GPU_CC power domains */ +#define GPU_CC_CX_GDSC 0 +#define GPU_CC_GX_GDSC 1 + +/* GPU_CC resets */ +#define GPU_CC_ACD_BCR 0 +#define GPU_CC_CB_BCR 1 +#define GPU_CC_CX_BCR 2 +#define GPU_CC_FAST_HUB_BCR 3 +#define GPU_CC_FF_BCR 4 +#define GPU_CC_GFX3D_AON_BCR 5 +#define GPU_CC_GMU_BCR 6 +#define GPU_CC_GX_BCR 7 +#define GPU_CC_RBCPR_BCR 8 +#define GPU_CC_XO_BCR 9 + +#endif --=20 2.34.1