From nobody Mon Jun 15 07:36:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B67840DFD7; Thu, 9 Apr 2026 00:45:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775695528; cv=none; b=oPgnhxqBd5n8CGvZ7OEgvd2S/wyE6pcN9uXd0z51fm5czUbc+2s82qTl89P/y1BgkT+wFQ46ZYiMIe+OLuNfGQfdOOdMmPj4Y8eXBOKUjNqQnLWJcrNG9kdxcqTY+SI7i6yLZT0hV+uzeYxNfELa5PeQobsbi78WujW8/MpuKc8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775695528; c=relaxed/simple; bh=GjjLDPjnFGSnPCHOn1ibnK1BzP77ajzwwixqSGOk2HY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aOLzNRZbtqfiBp4IgH8+RHeq9kmMSMOKPYydxC4keoewdNCXyK0zXNzUZQ4QilIlh7PNGUU77A7ZZm3VSbYeCbvL5S5MIj2mrex77/7cEmSi1QF4X+Vi5KFgfsRXaLkVdemqL8TVpk3+AjxSDVlIw0/S2M0EYay/00iaFu30eW0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=itXRQpT2; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="itXRQpT2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8C447C19424; Thu, 9 Apr 2026 00:45:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1775695528; bh=GjjLDPjnFGSnPCHOn1ibnK1BzP77ajzwwixqSGOk2HY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=itXRQpT298TTmoBnNxJ944o2GBew+3i2ufMN7Ajf6mnnqm6wBZDhJwJHuV/S3Hm/P dKiFOnN3POTxxEI5M3f3WkmLP3/4SbcXsDcq9Dtq5Uwy+ZTU+fow87dxBGAHQKadw6 gdfbT5G+VDArjnW0ef32CIo/gzrwfrJ6I1EHtZnSZwig6TlfkzqxBWZLaVMIfFUOQ1 I6Jje2M4sOBZ3LMqBlt+uy3sdHFF6IkhQMxLwm8Rdirfj/rN0hnddJRpPAlfrY4fDu BiOBzffn0sM1L7FhotRty3Ii92eQIHFH4JvIQd7u+F7GGJS5j3iWaNMwv8y+EAyIy+ 2YdDE492eeVbA== From: Yixun Lan Date: Thu, 09 Apr 2026 00:45:11 +0000 Subject: [PATCH 1/2] dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260409-03-k3-pwm-drv-v1-1-1307a06fba38@kernel.org> References: <20260409-03-k3-pwm-drv-v1-0-1307a06fba38@kernel.org> In-Reply-To: <20260409-03-k3-pwm-drv-v1-0-1307a06fba38@kernel.org> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Duje_Mihanovi=C4=87?= Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, Yixun Lan X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2472; i=dlan@kernel.org; h=from:subject:message-id; bh=GjjLDPjnFGSnPCHOn1ibnK1BzP77ajzwwixqSGOk2HY=; b=owEB6QIW/ZANAwAKATGq6kdZTbvtAcsmYgBp1vac2ggiRrXysr7NeyHf0sal5mHzkegemt3Zq SAEbP1WPYiJAq8EAAEKAJkWIQS1urjJwxtxFWcCI9wxqupHWU277QUCadb2nBsUgAAAAAAEAA5t YW51MiwyLjUrMS4xMSwyLDJfFIAAAAAALgAoaXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5 maWZ0aGhvcnNlbWFuLm5ldEI1QkFCOEM5QzMxQjcxMTU2NzAyMjNEQzMxQUFFQTQ3NTk0REJCRU QACgkQMarqR1lNu+0TVg//TdIVeocbpZIR0KwWB6pCxILp6k7d4GN/2HcXvgNIk6xQS9zfXVho9 AOXaDylRtNIhr5OnHcsleIiLTWSqsxoE7EwsetNlJ8ItbRZCk3AQDlDTmNwatD84n20RI1MfL/w 6fUulRAWvfXVE4GIz3yOP+0dm5TevZxyrRVDXoehY1Sf7RVYdi9YkiEpAphMI10nshwhpmIdF74 3RZGiQ0RNc25wEWR74/fDHU3XKUTx1YDku7Ok43kWvHJJMw4SdJrbjOiTisqEHq+4cY+leQHosf CbfzFpoT0amZYqa7joTvm0n3x9PHiUFb2Vm3qVnf/43jRzNqawJKS8M/j8ms7+nsjzsQbuQoMU9 C+8S/23DC6O1gbBnPTAs3HOp111saIR5W7IAbB34lvo718VDAaf5nwBc64S6OoiH1ewCphFg/jz 6/NL+qWH6/1Pc0J0nz3tv3aX5WfH4ixuphd5TTyyJS80+tfLpXjveFmdBcvgsWElgarsgn6vsCU 4v0s/34giguywfOOJGlQrKqp2QjGy+0Dz3hRTiVzAtfVf3vtgKI6kY2bsl3KkWu11QHdwsZTkAc dpZnxoxcCmM7DVLo5daHIEdLofn08kjDcMf59SqG1Ut+aewmeujlyPwWRWuWhJa4YjeKPNz0Wr/ xQNk3H9hFNcEgmvAF9+CNaoHJb2GDA= X-Developer-Key: i=dlan@kernel.org; a=openpgp; fpr=50B03A1A5CBCD33576EF8CD7920C0DBCAABEFD55 The PWM controller in SpacemiT K3 SoC reuse the same IP as previous K1 generation, while the difference is that one additional bus clock is added. Signed-off-by: Yixun Lan --- .../devicetree/bindings/pwm/marvell,pxa-pwm.yaml | 53 ++++++++++++++++++= ++-- 1 file changed, 50 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml b/D= ocumentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml index 8df327e52810..3427c8ef3945 100644 --- a/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml @@ -15,7 +15,9 @@ allOf: properties: compatible: contains: - const: spacemit,k1-pwm + enum: + - spacemit,k1-pwm + - spacemit,k3-pwm then: properties: "#pwm-cells": @@ -26,6 +28,38 @@ allOf: const: 1 description: | Used for specifying the period length in nanoseconds. + - if: + properties: + compatible: + contains: + enum: + - spacemit,k3-pwm + then: + properties: + clock-names: + items: + - const: func + - const: bus + - if: + properties: + compatible: + contains: + enum: + - spacemit,k3-pwm + then: + required: + - clock-names + properties: + clocks: + minItems: 2 + clock-names: + minItems: 2 + else: + properties: + clocks: + maxItems: 1 + clock-names: + maxItems: 1 =20 properties: compatible: @@ -36,7 +70,9 @@ properties: - marvell,pxa168-pwm - marvell,pxa910-pwm - items: - - const: spacemit,k1-pwm + - enum: + - spacemit,k1-pwm + - spacemit,k3-pwm - const: marvell,pxa910-pwm =20 reg: @@ -47,7 +83,18 @@ properties: description: Number of cells in a pwm specifier. =20 clocks: - maxItems: 1 + minItems: 1 + items: + - description: The function clock + - description: An optional bus clock + + clock-names: + minItems: 1 + maxItems: 2 + oneOf: + - items: + - const: func + - const: bus =20 resets: maxItems: 1 --=20 2.53.0 From nobody Mon Jun 15 07:36:11 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FE0440DFB0; Thu, 9 Apr 2026 00:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775695532; cv=none; b=BJuhZhR8EU/U0BCdymK5aQCYpWL0J+3zGlhNAZ1EGAB6Jmk6UjrTck4thQIlufocveZsrxdK1TlJIB3nqBzr5XBZQrzeK1RGA2Z2OfPcLMGH6MVmMsl0P/GjfcUoC/GhoBpI06vhXTS+GfZfrTuCpgljKGrCWBCrrWjbR3tsa+0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775695532; c=relaxed/simple; bh=UvKB/rO0ym8ehbjJC0/3pdgIwU+JdYoe/WxSBUf/xtA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GDBRy4PKabLPGYlogjkNa/DABo7Gq9C7zOacmq+OlnN22v6Dr7tdnuZofHIIb4YW0K85caGFFtRuiOIfIR7SmTwCLjGU1QtJrdH0PxDzTffpoPaKRc8dFob826RJmveSg3zQn+/uuNGneXN3nA3401wYBu4ZlmXA73iXXLC+wvU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NhMwCL5c; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NhMwCL5c" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AFAA8C2BC9E; Thu, 9 Apr 2026 00:45:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1775695531; bh=UvKB/rO0ym8ehbjJC0/3pdgIwU+JdYoe/WxSBUf/xtA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=NhMwCL5cnZOvjpW/FT1aqATt59YE9Kxmgii91apFLZO5TlGHjoyVQBRHkANRPMCnL BoHHAOCzjjTye+SXKjDDUmQfkQCD3WpnpofcYR0MToDAxxmWs0skpJf/OohygcYK4+ GChEfiDfQvlgQW2ONNJQ7lOHzMb5EnBPqNWItqe0mIxipdAF/kb/CUVQ57B4KkqaTW 4BnFRbYCNMXInQOiL8Y4Amg7bGk+rxMe6nWeSghrIAPrADjl6b05vsNwNgEHG/9B6q bkvfXiAcT/QaSlUtQoIv4TqnF9QojxdFqEZymMw4cnpzrigcjGtDRMiDGeHKv+OhEl yxqNXSSsBNE/g== From: Yixun Lan Date: Thu, 09 Apr 2026 00:45:12 +0000 Subject: [PATCH 2/2] pwm: pxa: Add optional bus clock Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260409-03-k3-pwm-drv-v1-2-1307a06fba38@kernel.org> References: <20260409-03-k3-pwm-drv-v1-0-1307a06fba38@kernel.org> In-Reply-To: <20260409-03-k3-pwm-drv-v1-0-1307a06fba38@kernel.org> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , =?utf-8?q?Duje_Mihanovi=C4=87?= Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, Yixun Lan X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1234; i=dlan@kernel.org; h=from:subject:message-id; bh=UvKB/rO0ym8ehbjJC0/3pdgIwU+JdYoe/WxSBUf/xtA=; b=owEB6QIW/ZANAwAKATGq6kdZTbvtAcsmYgBp1vafLCs9aBUlDwfMwtLHaT/gneL5h3TmzUk0S QajC3U3UB+JAq8EAAEKAJkWIQS1urjJwxtxFWcCI9wxqupHWU277QUCadb2nxsUgAAAAAAEAA5t YW51MiwyLjUrMS4xMSwyLDJfFIAAAAAALgAoaXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5 maWZ0aGhvcnNlbWFuLm5ldEI1QkFCOEM5QzMxQjcxMTU2NzAyMjNEQzMxQUFFQTQ3NTk0REJCRU QACgkQMarqR1lNu+0/yQ//QYPuYB0b8I0gFUKwB3KMY+w/ICUaD59ogvayqcLMSc0LFzgi1UnGZ l7hFHdAvNn+AfWW5VCLrelrpHmbTUZcbTAvZYgrkKgPmk6CK67ag1KAexBQosMS6Lf4lP83OXQ/ Ys/5rssqfUC+CSU3zbj4IpHf3sNB+MO2wEO9LWZityY/tVIf6/vgpNi5KZhhQy2UakBcvkl/e72 uaTa1/FBhOefLHCWuO9BZ7q6psSNNdshqQJCRK0b08OYNtsyuLmixU2bY5WFVHGZmYsuiW+Yodp E3srFvPPcvDduawh3CgF91BfR7xPkf1QEPflDhIKWMgb4WsowHFTDkI3EGlWO9bdIzsUTQNaW42 CQSXvDH10jpVBmC87uUim7ifJ9uOCARtQrqDcOtxptMVnvsYgkjB8vqDU0PtpiFZejdXbjDR0ZJ zjWFnzu2lRwR/FvWCwtMv9jts8Edz+nEsNxkRAEh4/8jXtv9g5sPegEJ6QYX6lBugQnKkHZfcUM KR1SnB2VaCaVqPTZKNMot896z7/Ea6gklx88FewMq11wSfEe3dIDBdc3qtjQsSDzYMNaKJTMIpp CI0bJ+peWVejVvBbr0wnNFbOwwxenO3WsUFhkwjyFle/J0OA+qd04YZCN4sn7wr4Koy/uA23ATg Chadlirppt1DFcLKBqN8I+tAJ5Yj00= X-Developer-Key: i=dlan@kernel.org; a=openpgp; fpr=50B03A1A5CBCD33576EF8CD7920C0DBCAABEFD55 Add one secondary optional bus clock for the PWM PXA driver, also keep it compatible with old single clock. The SpacemiT K3 SoC require one bus clock for PWM controller, acquire and enable it during probe phase. Signed-off-by: Yixun Lan --- drivers/pwm/pwm-pxa.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-pxa.c b/drivers/pwm/pwm-pxa.c index 0f5bdb0e395e..2ace31405c2d 100644 --- a/drivers/pwm/pwm-pxa.c +++ b/drivers/pwm/pwm-pxa.c @@ -53,6 +53,7 @@ struct pxa_pwm_chip { struct device *dev; =20 struct clk *clk; + struct clk *bus_clk; void __iomem *mmio_base; }; =20 @@ -177,7 +178,12 @@ static int pwm_probe(struct platform_device *pdev) return PTR_ERR(chip); pc =3D to_pxa_pwm_chip(chip); =20 - pc->clk =3D devm_clk_get(dev, NULL); + pc->bus_clk =3D devm_clk_get_optional_enabled(dev, "bus"); + if (IS_ERR(pc->bus_clk)) + return dev_err_probe(dev, PTR_ERR(pc->bus_clk), "Failed to get bus clock= \n"); + + /* Get named func clk if bus clock is valid */ + pc->clk =3D devm_clk_get(dev, pc->bus_clk ? "func" : NULL); if (IS_ERR(pc->clk)) return dev_err_probe(dev, PTR_ERR(pc->clk), "Failed to get clock\n"); =20 --=20 2.53.0